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An Introduction to the Design and
Manufacture of Controlled Impedance PCBs
Controlled Impedance PCBs
Introduction
We produced the first edition of this booklet several years ago in response to many requests for a basic introduction to the manufacture of controlled
impedance printed circuit boards (PCBs). In this second issue, we have added extra material to some sections and introduced a number of new topics to reflect the changes that have occurred in the industry over the last few years. We have tried to explain the most important concepts and address the most frequently asked questions with the minimum of technical jargon.
You can download this document as a pdf file from www. https://www.doczj.com/doc/8416463131.html, or alternatively, ask your local distributor or Polar Instruments if you require further copies.
We hope that you find it useful and welcome any comments you may have e.g.areas where you would like more detail, suggestions for new topics, etc. Please email your comments to us at mail@https://www.doczj.com/doc/8416463131.html,.
What is Controlled Impedance?Why do we need controlled impedances?Controlled impedances on PCB traces
Types of systems that use controlled impedances Examples of PCB controlled impedances Manufacturing controlled impedance PCBs Test coupons
Coupon details and construction
Calculating the value of impedances using Field Solvers Characterising your manufacturing process Measuring controlled impedances Using airline standards
Differential and coplanar configurations Typical questions and answers Controlled impedance test systems Field Solvers
Page 234457891112131415161718
Index
The cable that connects the antenna to the television is a common example of a controlled impedance that most of us are familiar with.
This cable may be one of two types:
A coaxial cable consists of a round, inner conductor, separated from the outer cylindrical conductor (the shield) by an insulator. The dimensions of the conductors and insulator, and the electrical characteristics of the insulator are carefully controlled in order to determine the shape, strength and interaction of the electrical fields which, in turn, determine the electrical impedance of the cable.
Instead of a coaxial cable, an antenna may be connected to the set by means of a cable formed of two round wires spaced by a flat strip of plastic. As with the coaxial cable, the dimensions and materials of this wire are carefully controlled so as to give it the correct electrical impedance.These two cables are examples of different configurations of a controlled impedance but there are many others. In the same way, you will learn that there are many different trace configurations that are used in the PCB industry to achieve a controlled impedance. Controlled impedance PCBs emulate controlled impedance cables, where the coax shield may be represented by a plane, the insulator represented by the laminate, and the conductor is the trace. Just as for the cables, the impedance is determined by the dimensions and materials, and these parameters must be very carefully predicted in design, and then controlled in the manufacturing process to ensure that specifications are met.
Impedance is measured in Ohms (symbol ?) but is not to be confused with resistance, also measured in Ohms (also with symbol ?). Resistance is a DC characteristic, whilst impedance is an AC characteristic which becomes important as the signal frequency increases, typically becoming critical for PCB traces at signal components of two or three hundred MHz and above.
What is controlled impedance?
2
3
Impedances Matched
Impedances Mismatched
The function of a wire or trace is to transfer signal power from one device to another.Theory shows that maximum signal power is transferred when impedances are matched. A TV antenna has a "natural" characteristic impedance. At RF frequencies of between hundreds of MHz (megahertz) and GHz (gigahertz), the transfer of maximum signal power from the antenna to the cable requires that the cable impedance match the antenna impedance. Also, the TV impedance must match the cable impedance. Hence, there is a matched system where the antenna to cable to TV impedances all closely match and the
maximum amount of signal is transferred from the antenna to the cable and thence to the TV .Where there is an impedance mismatch,
maximum signal power transfer does not occur.Only a portion of the signal power is
transferred from the sending device into the receiving device (coax, PCB trace, etc.) The remainder of the signal power is reflected back to the sending device.
Suppose a cable of incorrect impedance links the antenna to the TV . Thus, the TV antenna and the cable impedance do not match, and not all of the TV signal detected by the antenna will pass from the antenna into the cable. Some will be reflected back into the antenna and be re-radiated. Thus the TV will not receive the maximum signal available, and picture quality may deteriorate.
Next, since the cable impedance does not match the TV impedance, not all of the signal conveyed by the cable will pass into the TV .
Why do we need controlled impedances?
Although we have focused on wire interconnections, exactly the same considerations apply to signal transfer through traces on a PCB. When board traces carry signals containing high frequencies, care must be taken to design traces that match the impedance of the driver and receiver devices. The longer the trace, or the greater the frequencies involved, then the greater the need to control the trace impedance. The PCB manufacturer controls the impedance by varying the dimensions and spacing of the particular trace or laminate.
Any impedance mismatch can be extremely difficult to analyse once a PCB is loaded with components. Components have a range of tolerances, so that one batch of components may tolerate an impedance mismatch, while another batch might not. Moreover, a component’s characteristics may change with temperature, so that the problems may come and go. Thus, if changing a component appears to cure a problem, the components may become the suspects instead of the trace. Component selection becomes the solution, and build costs are driven up, while all the time the real fault – trace impedance mismatch – goes undetected!
For these reasons, a PCB designer will specify trace impedance and tolerance, and should work with the PCB manufacturer to ensure that the PCB meets the specifications.As recently as 1997, only exotic, high-speed
devices of the time required controlled
impedance PCBs. These amounted to perhaps
20% of PCBs manufactured. In 2000, around
80% of all multilayer PCBs are manufactured
with controlled impedance traces. These would
include boards for all types of technologies
including
* telecommunications (analog or digital)
* video signal processing
* high speed digital processing
* real time graphic processing
* process control
Most homes today have numerous low-cost applications of these technologies, for example
* Modems, cordless phones, personal radio
communicators, analog or digital TV,
satellite TV, GPS, radar.
* Video games, digital cameras and digital
video cameras, DVDs.
* Low cost personal computers, CDs, colour printers
* Digital TVs, DVDs, Instant Playback TVs
* Auto engine control modules.
Industry and commerce are awash with these
same technologies, and the lists are continually expanding. We can therefore expect that in the
near future virtually all PCBs will include at
least some controlled impedance traces.
Controlled impedance has become the norm.
Types of systems that use controlled impedance PCBs.
Controlled impedances on PCB traces
4
Examples of PCB controlled impedances
Embedded Microstrip contains a trace
sandwiched within the PCB with a plane on one side and laminate and then air on the other.
Offset Stripline contains a trace sandwiched within the PCB with a plane on both sides of the laminate.
Edge coupled coated microstrip is a differential configuration where there are two controlled impedance traces on the surface, coated by resist and a plane on the other side of the laminate.
Edge coupled offset Stripline is a differential configuration with two controlled impedance traces sandwiched between two planes. The traces are shown offset, however they could be midway between the planes (2H1+T=H).
These diagrams are examples of some of the many different configurations that PCB designers can use. When you are looking at the stack up of a multiplayer PCB, remember that controlled impedances are shielded by planes and for this reason, you only need consider the laminate thicknesses between the planes on either side of the trace when it is inside the PCB.
5
This differential configuration has two traces that
are separated by laminate and sandwiched
between two planes. Although the diagram
shows the traces offset, the manufacturing
objective is to have the traces with no offset, i.e.
one should be directly above the other. Typically,
this configuration is difficult to fabricate.
In this Coated Coplanar Strips configuration,
there is a single controlled impedance trace
with two ground traces of a specified width
(W2/W3) either side. All the traces are coated
with resist.
The Coplanar Waveguide has a single
controlled impedance trace with planes either
side (or very wide ground traces), a continuous
plane on one side and laminate only on the
other side.
This Coplanar Waveguide is similar to the
above configuration except that there are
planes on both sides of the laminate as well as
a plane on the same layer as the controlled
impedance trace.
6
Manufacturing Controlled Impedance PCBs.
As the operating speed of electronic circuits has increased, so has the need for PCBs to have controlled impedances and the majority of PCB manufacturers are producing them. As described earlier, if the value of controlled impedance is incorrect, it can be very difficult to identify the problem once the PCB is assembled. Since the impedance depends on many parameters (trace width, trace thickness, laminate thickness, etc.) the majority of PCBs are currently 100% tested for controlled impedance. However the testing is not normally performed on the actual PCB but on a test coupon manufactured at the same time and on the same panel as the PCB. Sometimes the test coupon is integrated into the main PCB
Sometimes your PCB customer is not aware that testing is best accomplished
using test coupons and you, as the PCB manufacturer, will need to explain
the benefits of coupons which include:
* It is rare for controlled impedance traces to
be easily accessible for testing (including a
closely situated ground connection).
* Planes are not interconnected on the main
PCB and this may lead to inaccurate
measurements.
* Accurate and consistent testing results
require a straight single trace of 150mm (or
longer), often the actual PCB trace is shorter
than 150mm.
* The actual PCB trace may have branches or
vias which makes accurate measurement very
difficult
* Adding extra pads and vias for testing on
the PCB will affect the performance of the
controlled impedance trace and will occupy
space needed for the function of the PCB.
Test Coupons
The typical test coupon is a PCB approximately 200x30mm with exactly the same layer and trace construction as the main PCB. It has traces which are designed to be the same width and on the same layer as the controlled impedance traces on the main PCB.
When the artwork is produced, the same
aperture code (D-code) used for the controlled impedance traces is used to produce the test traces on the coupon. Since the coupon is fabricated at the same time as the main PCB the coupon’s traces will have the same impedance as those on the main PCB. All planes are included on the coupon and they are interconnected on the coupon only, to ensure that test results are valid. It is necessary to include a void around the coupon on the reference planes so as not to affect the connectivity of the PCB itself if BBT(Bare Board Test) occurs whilst still on the panel.
Usually one coupon is made at the end of each panel to ensure that the coupon is representative of the whole panel i.e. testing the 2 coupons will verify to a high confidence level that there are no differences in trace width, trace thickness, laminate height, etc. over the whole panel.
In fact some customers use the measurement of controlled impedance traces on test coupons on each panel to check the overall quality of PCB manufacture even when the PCB contains no controlled impedances. Since the coupon’s controlled impedance depends on all the PCB parameters, it is a very accurate measure of consistency of manufacture without sectioning the PCB.In addition to the usual PCB specifications, the
PCB designer should specify:
* Which layers contain controlled
impedance traces
* The impedance(s) of the trace(s) (there can
be more than one value of impedance
trace per layer)
* Separate aperture codes for controlled
impedance traces e.g. 4 mil non controlled
impedance trace and 4 mil controlled
impedance trace.
* And either:
1. the width (w) of the controlled
impedance trace
or
2. the laminate thickness (h) adjacent
to the controlled impedance trace
In case 1, where trace width (w) is specified,
the manufacturer will adjust the laminate thick-
ness (h) to give the correct value of impedance.
In case 2 where the laminate thickness (h) is
specified, the manufacturer will adjust the trace
width (w) to achieve the value of impedance.
Some configurations (differential, coplanar)
may have more than one parameter that can be
varied to obtain the specified impedance.
8
Exploded view of a test coupon
Exploded view of
a test coupon 9Solder mask
L1 Coated Microstrip
Pre Preg
L2 Reference (ground) plane Laminate
L3 Differential Stripline Pre Preg
L4 Stripline
Laminate
L5 Stripline
Pre Preg
L6 Differential Stripline
Laminate
L7 Reference (ground) plane
Pre Preg
L8 Coated microstrip Solder mask
10
Typical Test Coupon
Note that you can download Gerber files for a typical impedance test coupon from https://www.doczj.com/doc/8416463131.html,.Typical Test Coupon
(Reference IEC draft, addition to IEC326-3)1
Dielectric separation will replicate impedance structure on printed boards.
2.
Test connection holes shall be plated through to access all inner layer test conductors.
3.
Square pads identify plated through hole
connections to access all ground/power reference planes.
4.
Conductor widths will replicate critical conductors on each impedance layer.5.Via holes to be added as required.
6.
Cross hatching to be added to outer layer as required.
7.
Two coupons per panel. These to be individually identified with letter A & B respectively.8.
Job No. + Datecode to be added as per customer requirements.
9.
All planes to be interconnected (on test coupon only).
Capacitive loading
To minimise capacitive loading during test, you should minimise the size of pads and vias on coupons, especially for high impedance traces. Although this standard coupon design shows pads at both ends, you are likely to obtain better test results on high impedance traces if you only place a pad at one end.
L1
L3L5L7183.49203.2
172.70170.16167.62
9.86
15.88
13.35
10.80
31.75
12.80not to scale 5.08 2.54
5.08
2.54
Calculating the value of impedances using Field Solvers
11A few years ago, you could use simple published equations to obtain the nominal values of trace dimensions for a particular impedance and they were reasonably effective for line widths and spacing above 15 mil (thousandths of an inch). However these simple equations are only approximations and do not give accurate results for line widths used on current technology PCBs.
You will need to use Field Solver software
for calculation of controlled impedances.
Their effectiveness is enhanced if
they offer "goal seeking" that lets
you enter the desired impedance and
the field solver calculates the trace dimensions.
Polar Instruments pro-
duces Field Solver software
specifically for
the prediction of PCB trace impedances based on trace configuration, trace geometry and material characteristics. You can download free, functioning demonstration versions of the software from our website at
https://www.doczj.com/doc/8416463131.html,
12
Measuring controlled impedances It is also useful to microsection some of the coupons to verify the actual dimensions of the traces compared to the nominal values. These measured dimensions can be used in the
equations to calculate an impedance value from the actual dimensions, adding a third column to your table of results.
We should mention that the presence of solder resist affects the impedance of surface
microstrip and you should include this in your characterisation process.
Impedances typically range between 40 ohms to 120 ohms. The higher impedances are more difficult to control since they typically have narrower traces and will be relatively more affected by the exact etch process (i.e. since the impedance is inversely proportional to the trace width and thickness, as traces become very thin, the relative effect of the etching process will have a greater effect on their width and profile and hence, impedance).
The following relationships will give you an idea of how impedance depends on dimensions,however please remember they are only approximations for fine line widths:? Impedance is inversely proportional to trace width
? Impedance is inversely proportional to trace thickness
? Impedance is proportional to laminate height ? Impedance is inversely proportional to the square root of laminate Er
Using Field Solver software is a good starting
point for obtaining nominal values of trace width (w) and laminate thickness (h) to obtain specific values of impedance. However you will need to produce test panels containing many coupon designs, with different trace widths, different configurations (Stripline,
Microstrip, Embedded Microstrip) and different layer structures with different laminate /pre-preg thicknesses.
Ideally you will produce standard coupons (see suggested design) and each coupon can contain a variety of different impedances. After manufacture of the test panels, you will then need to measure the actual values of impedance and see how they correlate against theoretical values.
Laminate suppliers will provide you with lists of Er (dielectric constant) for different core constructions, typically FR-4 has Er=4.2. If you use preferred core material, you will be assured of consistent performance characteristics. By constructing a table of results comparing the measured values with the calculated values,you will see the variance between your process and the theoretical calculations. You can then remake the test panels, altering (w) and / or (h)to obtain the "exact" design values of imped-ance. After several iterations, you will have an understanding of your process that allows you in most cases to take the designers’
requirements and convert them into values that suit your process and produce boards whose impedances are centred around the specified nominal impedance to maximise yield.
Characterising your manufacturing process
13
Impedances can be measured using:? A Network Analyser
? A laboratory Time Domain Reflectometer (TDR)
? A Controlled Impedance Test System (employing TDR techniques)
Both Network Analysers and laboratory TDRs are highly complex and sophisticated laboratory instruments that typically need to be operated with great care even by a skilled engineer. A Controlled Impedance Test System (employing TDR
measurement techniques) that is specifically designed for measuring controlled impedances on PCBs offers the optimum solution.
A TDR applies a very fast electrical step signal to the coupon via a controlled
impedance cable (and preferably a matching impedance probe). Whenever there is a change in impedance value (discontinuity), part of the signal power is reflected back (as discussed earlier) to the TDR instrument which is capable of measuring this reflected signal.
The time delay between the transmitted pulse and the receipt of the reflected signal is proportional to the distance of the discontinuity. The magnitude of the reflected signal is related to the value of the discontinuity.
From this data it is possible to graph impedance versus its position on the test
coupon. This is typically achieved using software to control the TDR and to acquire and process the data which it produces.
A TDR specifically appropriate for the measurement of PC
B controlled impedance in a manufacturing plant should be able to:
? Be operated reliably and conveniently in the normal plant environment by a non-technical person with minimum training requirement.? Offer a degree of test automation for high throughput lines.
? Produce easy-to-understand results in the form of graphs of impedance versus distance over the length of the test coupon.
? Indicate and log unequivocal Pass/Fail results for each device tested.
? Datalog results and produce reports suitable for presentation to the customer.? Store test files which contain the specifications for each type of coupon produced, and automatically set up the TDR.
Measuring controlled impedances
Polar Instruments designs and manufactures rugged, manual and robotic Controlled Impedance Test Systems specifically for PCB measurements in the
manufacturing environment.Polar is a world leader supplying instruments to premier PCB manufacturers around the globe.
Using airline standards
Precision airlines are accepted as the
"standard" for controlled impedances.
They consist of two accurately machined
concentric tubes where all of the dimensions
are very tightly controlled, terminated with a
suitable connector. TDRs used for impedance
measurement are precision measurement
instruments and need to be regularly calibrated.
Reference air line standards are used for TDR
calibration and are available in a variety of
standard impedances (typically 28?, 50?, 75?
and 100?).
Precision air lines are a high cost item and an
acceptable alternative for less critical
applications is a set of precision semi rigid
cables calibrated against air lines.
Air lines are made traceable to National
Standards (NIST, NPL) by a precision
metrology technique called air gauging which
allows the bores of the air line to be measured
and the impedance calculated using a standard
formula.
14
Differential configurations
Many modern designs use a differential pair of traces between components. When compared to a single trace, differential configurations are less susceptible to interference from adjacent traces and generate less interference.
To be effective, they need to be matched i.e.:? Both traces should have the same dimensions and spacing to adjacent traces and planes ? The traces should be as close as possible to each other as the manufacturing process allows
? The spacing between the two traces should be constant
The value of the controlled impedance depends on the trace separation as well as the dimensions of the individual traces and when you are measuring them, you will need to make a differential measurement.
Typically the differential measurement will be slightly below twice the value of the impedance of each trace e.g. if you measure each individual trace of a 100?differential pair,
they are both likely to read around 53?or 55?
.Coplanar configurations have become
increasingly popular in the past few years and
are widely used for Rambus TM. One of the
benefits of surface coplanar configurations is
that they extend the operating frequency of
FR4 laminate which loses performance above
2Ghz. In surface coplanar, most of the field
between the trace and plane is through air
rather than the laminate and so the loss caused
by the laminate has less effect at high
frequencies.
There are many variants of coplanar con-
figurations and you should also be aware that
coplanar differential traces can be fabricated.
Coplanar configurations
This diagram
shows just one
of the many
coplanar
configurations .
15
Q A
16
Typical Questions and Answers
Q. My customer says I need to test their PCBs at 900MHz. Can I do this
with a TDR based test system?
A. Yes, a TDR based impedance test system is suitable for testing over a
wide range of frequencies. The parameters that determine impedance (laminate Er) do not vary significantly below 3 to 4GHz. So it is
unnecessarily expensive and time consuming to do a single frequency test using a network analyser.
Q. My customer does not specify that I measure controlled impedances,
what should I do?
A. Your customer may think that by specifying the dimensions, the traces
will automatically have the correct value of impedance. As explained earlier,each manufacturing process requires characterisation to ensure that the process is matched to nominal values produced by Field Solver calculators.Your customer will not be satisfied if their PCBs fail because the final value of controlled impedances are incorrect. Work in partnership with your customer and help them understand the need for test.
Q. How do I calculate the dimensions for controlled impedances on inner
layers on my stack up?
A. You can ignore any layers that are beyond the planes either side of the
trace being calculated. You only need to consider the laminate thicknesses either side of the trace to the nearest planes on both sides. You can think of this as the plane forming a shield either side of the trace.
Q. Why are all of the impedances measurements on my coupon are wrong
but the dimensions agree with the Field Solver?
A. You have probably forgotten to connect all of the planes to each other.
This is necessary to obtain the correct values. Remember that this should be done on the coupon only and you should leave a void around the coupon to avoid these interconnections affecting bare board test if the coupon is attached.
You can
read and download a wide range of Application Notes from our website at
w w w.p o l a r i n s t r u m e n t s.c o m.
The Polar Instruments CITS controlled impedance test system has become the industry standard for use by non technical operators in manufacturing environments.
It is also widely used by CEMs to verify conformance of incoming PCBs.
CITS uses TDR techniques to
measure controlled
impedances and it
automatically reports when a
measurement is outside the
specified tolerance. It
automatically processes the
data to produce a simple
display of impedance versus
distance.
All results and system set up data are
automatically datalogged. Data can be easily
exported to a third party database (eg for
statistical process control). Test Reports can
be produced suitable for supply to customers.
High accuracy is assured with instruments that
run 32 bit software as they are factory
calibrated against precision reference airlines at
28, 50, 75 and 100 ohms, all traceable to
National Standards. Users report excellent gage
R&R results.
17The Polar Instruments RITS robotic impedance test system is used for medium to high volume testing of controlled impedance PCBs. The measurement system is based on the industry standard CITS with robotic automation speeding the throughput and offering unparalleled accuracy, reliability and consistency of test.
Controlled Impedance Test Systems (CITS)Robotic Impedance Test System (RITS)
Impedance calculation using SI6000 Field Solvers
SI6000 is the result of
feedback from the hundreds
of customers who use Polar
CITS25 for controlled
impedance design. New Field
Solvers in the SI6000A allow
you to graph impedance
against various PCB
parameters.
Using Excel 97 or 2000 as a
powerful and convenient user
interface, the SI6000A can be
used as supplied to goal seek for various
designs or graph Zo against a range of
parameters.
The SI6000A supports a huge number of
popular impedance controlled structures and
allows you to fully evaluate their behaviour.
You benefit by producing impedance controlled
boards with better yields and as a result have
fewer board turns before ramping up
production.
You can download an evaluation copy from
our website
https://www.doczj.com/doc/8416463131.html,
18
Who is Polar Instruments?
Established for 25 years,
Polar Instruments Ltd
has become recognised as
the world leader for both
measurement and calculation
of PCB controlled
impedances. By focussing
and specialising in this area,
we are able to work closely
with our customers to ensure
that our products are
continually enhanced to
meet industry needs.
Polar is ISO9000 certified
and we have offices in
California, Singapore and
England to ensure that
together with our 35
distributors, we can give
the level of support that
you require.
Further information is
available on our website
or contact us using one of
the addresses shown.
Polar Instruments Ltd.
Garenne Park Guernsey
UK. GY2 4AF
Tel: +44 1481 253081
Fax: +441481 252476
mail@https://www.doczj.com/doc/8416463131.html, Polar Instruments (UK) Ltd. 20A Picton House
Hussar Court
Waterlooville Hampshire England PO7 7SQ
Tel: +44 23 9226 9113 Fax:+44 23 9226 9114
mail@https://www.doczj.com/doc/8416463131.html,
$19.95
?Polar Instruments 2000.
Polar Instruments pursues a policy of
continuous improvement. The specifications
in this document may therefore be changed
without notice.
All trademarks recognised.
LIT: 145 Issue 2
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320E. Bellevue Avenue
San Mateo
CA94401, USA
Tel:(800) 328-0817
Fax:(650) 344-7964
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Fax: +65 873 7471
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说明：信号源输出阻抗一般都为50ohm ，信号源面板显示的输出信号幅度，频率是图2处信号的幅度，频率。 （1）若负载输入阻抗为50ohm ，则信号源输出与负载输入匹配，则负载获得的信号幅度，频率与2处的电压幅度理论上一致。 （2）若负载输入阻抗为1Mohm ，则信号源输出与负载输入不匹配，则负载获得的信号幅度，频率与1处的电压幅度理论上一致。 ◆ 纯电阻电路：低频和高频都存在；（匹配） 1、 负载电阻R 电压：1 1l i i R U U U r R r R = =++；负载电阻越大，则负载获得的电压越高。 2、 负载R 电流：i l U i R r = +；负载越小，则负载获得的电流越小。 3、 负载获得的功率：2 22222//24l i l i i U U R r P i R U R U R r R R r R r ????====++≤ ? ?+???? ；当且 仅当R=r 时；负载功率最大。 ◆ 存在容性和感性阻抗时，（共轭匹配） 共轭匹配：当交流电路中含有容性或感性阻抗时，若信号源与负载阻抗的实部相等，虚 部互为相反数，此时负载获得最大功率。 源电抗：r r Z r jX =+
负载电抗：R R Z R jX =+ 负载功率： ()() ()()()()22 22 22222 142R r R r R r R r U R U U U P r R r X X R r X X r X X R r X X R R R R = ==≤??+++??+++++++++ ????? 当且仅当R r R r X X =??=-?时，负载获得最大功率。 结论： 1、需要大的电流输出，则选择小的负载R ； 2、需要大的电压输出，则选择大的负载R ； 3、需要输出最大功率，则选择与信号源内阻匹配的电阻R 。（功率传递！） 低频时，信号的波长相对与传输线来说很长，传输线可以看成短线，反射可以不考虑。 高频时，f c λ=；信号频率很高时，信号的波长就很短，当波长和传输线的长度可以比拟时，反射信号叠加在原来信号上将会改变原信号的形状。例：传输线的特性阻抗跟负载阻抗不匹配时，在负载端就产生反射，能量传输不过去，降低效率，功率发射不出去，甚至会顺坏发射设备。 当信号源和传输线、负载的阻抗相互匹配时候，有更多的能量从信号源中发射出来！！！ 问题：、25kHz~80kHz 用示波器50ohm 输入阻抗实测，为何信号源输出和示波器显示信号的幅度不一致？（据说这种射频源有些频段幅度不准,建议下次问问罗德斯瓦茨做源的代理）
用LC 元件设计L 型的阻抗匹配网络 一 设计要求： 用分立LC 设计一个L 型阻抗匹配网络，使阻抗为Z s =25-j*15 Ohm 的信号源与阻抗为Z L =100-j*25 Ohm 的负载匹配，频率为50Mhz 。（L 节匹配网络） 二 阻抗匹配的原理 用两个电抗元件设计L 型的匹配网络，应该是匹配网络设计中最简单的一种， 但仅适用于较小的频率和电路尺寸的范围，即L 型的匹配网络有其局限性 在RF 理论中，微波电路和系统的设计（包括天线，雷达等），不管是无源电路还是有源电路，都必须考虑他们的阻抗匹配（impedance matching ）问题。阻抗匹配网络是设计微波电路和系统时采用最多的电路元件。其根本原因是微波电路传输的是电磁波，不匹配会引起严重的反射，致使严重损耗。所以在设计时，设计一个好的阻抗匹配网络是非常重要的。阻抗匹配是指负载阻抗与激励源内部阻抗互相适配，得到最大功率输出的一种工作状态。对于不同特性的电路，匹配条件是不一样的。在纯电阻电路中，当负载电阻等于激励源内阻时，则输出功率为最大，这种工作状态称为匹配，否则称为失配。 根据最大功率传输定理，要获得信号源端到负载端的最大传输功率，需要满足信号源阻抗与负载阻抗互为共轭的条件，即L L S S iX R iX R +=+。若电路为纯电阻电路则0==L S X X ， 即L S R R =。而此定理表现在高频电路上，则是表示无反射波，即反射系数为0.值得注意的是，要得到最佳效率的能量传输并不需要负载匹配，此条件只是避免能量从负载端到信号源端形成反射的必要条件。当RL=Rs 时可获得最大输出功率,此时为阻抗匹配状态。无论负载电阻大于还是小于信号源内阻,都不可能使负载获得最大功率,且两个电阻值偏差越大,输出功率越小. 阻抗匹配是无线电技术中常见的一种工作状态，它反映了输人电路与输出电路之间的功率传输关系。当电路实现阻抗匹配时，将获得最大的功率传输。反之，当电路阻抗失配时，不但得不到最大的功率传输，还可能对电路产生损害。阻抗匹配常见于各级放大电路之间、放大器与负载之间、测量仪器与被测电路之间、天线与接收机或发信机与天线之间，等等。 为了使信号和能量有效地传输，必须使电路工作在阻抗匹配状态，即信号源或功率源的内阻等于电路的输人阻抗，电路的输出阻抗等于负载的阻抗。在一般的输人、输出电路中常含有电阻、电容和电感元件，由它们所组成的电路称为电抗电路，其中只含有电阻的电路称为纯电阻电路。 L 型匹配网络通常不用于高频电路中，以及如果在窄带射频中选用了L 型匹配网络，也应该注意他的匹配禁区，在这个禁区中，无法在任意负载阻抗中和源阻抗之间实现预期的匹配，即应选择恰当的L 型匹配网络以避开其匹配禁区。 三 设计过程 1新建ADS 工程，新建原理图，在元件面板列表中选择“simulation S--param ”在原理图中
附件1： 基础训练 题目阻抗匹配网络的计算 学院自动化学院 专业电气工程及其自动化 班级1004班 姓名南杨 指导教师朱国荣 2012 年7 月 4 日
基础强化训练的目的 1.较全面的了解常用的数据分析与处理原理及方法 2.能够运用相关软件进行模拟分析 3.掌握基本的文献检索和文献阅读的方法 4.提高正确的撰写论文的基本能力 训练内容与要求 阻抗匹配网络的计算 使信号源（其内阻Rs=12Ω）与负载（RL=3Ω）相匹配 插入一阻抗匹配网络 求负载吸收的功率 初始条件 Matlab软件基本操作及其使用方法 指导老师签名﹍﹍﹍﹍日期：﹍﹍年﹍﹍月﹍﹍日
目录 1.摘要 (4) 2.MATLAB简介 (5) 3.阻抗及阻抗匹配的概念 (6) 3.1阻抗的概念 (6) 3.2阻抗匹配的概念 (6) 4.阻抗匹配网络的计算 (6) 4.1对阻抗匹配网络进行原理分析 (7) 4.2 建模： (7) 4.3应用MATLAB对上面的题目编程 (8) 4.4 结果 (9) 5.结果对比与分析 (10) 6.心得体会. (11) 7.参考文献. (12)
1. 摘要 本文主要是通过训练使学生掌握相关的理论知识及实际处理方法，熟练使用MATLAB语言编写所需应用程序，上机调试，输出实验结果，并对实验结果进行分析。MATLAB 的名称源自 Matrix Laboratory ，它是一种科学计算软件，专门以矩阵的形式处理数据。 MATLAB 将高性能的数值计算和可视化集成在一起，并提供了大量的内置函数，从而被广泛地应用于科学计算、控制系统、信息处理等领域的分析、仿真和设计工作。 本文运用了MATLAB的M程序编程的方法对于一个电路进行了分析。体现了MATLAB的强大功能。 关键字：MATLAB，M文件，矩阵，计算 Abstract This paper is mainly to ask students to master relevant theoretical knowledge and practical operating methods by training. We should use MATLAB to write applications, computer debugging, then output results and analysis it. The full name of MATLAB is Matrix Laboratory. It is a kind of special scientific calculation software with the matrix form data processing. Because MATLAB not only combines the high-performance numerical calculation and visualization, but also provided a lot of built-in functions, it widely used in scientific calculations, the control system, information processing, simulation and design work. This paper is based on the M programming and design methods of module simulink. We use these two methods to analyzes the circuit.We can see the strong function of MATLAB. keyword: MATLAB, M files, simulation module, Matrix, calculating
一,首先给大家介绍一下Polar软件,Polar是专业计算阻抗的软件,其版本包 括:Si6000,Si8000,及Si9000. 二,其次给大家介绍常见的几种阻抗模型:特性阻抗,差分阻抗,共面性阻抗. 1.外层特性阻抗模型: 2.内层特性阻抗模型: 3.外层差分阻抗模型: 4.内层差分阻抗模型: 5.共面性阻抗模型:包括(1)外层共面特性阻抗，(2)内层共面特性阻抗，(3)外层共面差分阻抗，(4)内层共面差分阻抗. 三,再次给大家介绍一下芯板(即Core)及半固化片(即PP), 每个多层板都是由芯板和半固化片通过压合而成的,普通的FR-4板材一般有:生益,建滔,联茂等板材供应商.生益FR-4的芯板根据板厚来划分 有:0.10MM ,0.15MM,,0.2MM ,,0.25MM.0.3MM,0.4MM,0.5MM等,包括有H/HOZ,1/1OZ,等这里有一点需要大家特别注意:含两位小数的板厚是指不含铜的厚度,只有一位小数指包括铜的总厚度,例如:0.10MM 1/1OZ的芯板,其0.10MM是指介质的厚度,其总厚度应为 0.10MM+0.035+0.035MM=0.17MM,再如:0.15MM 1/1OZ的芯板,其总厚度 是:0.15MM+0.035MM+0.035MM=0.22MM,而0.2MM 1/1OZ的芯板,其总厚度就是0.2MM,它的介质厚度应为:0.2MM-0.035MM-0.035MM=0.13MM. 半固化片(即PP),一般包括:106,1080,2116,7628等,其厚度为:106为 0.04MM,1080为0.06MM,2116为0.11MM,7628为0.19MM. 当我们计算层叠结构时候通常需要把几张PP叠在一起,例如:2116+106,其厚度为0.15MM,即6MIL;1080*2+7628,其厚度为0.31MM,即12.2MIL等.但需注意以下几点:1,一般不允许4张或4张以上PP叠放在一起,因为压合时容易产生滑板现象.2,7628的PP一般不允许放在外层,因为7628表面比较粗糙,会影响板子的外观.3,另外3张1080也不允许放在外层,因为压合时也容易产生滑板现象. 后续我会把一些常用的芯板以及各种组合的PP厚度汇总给大家,以便学习用Polar软件计算阻抗及层叠结构时使用! 四, 怎样使用Polar Si9000软件计算阻抗: 首先应知道是特性阻抗还是差分阻抗,具体阻抗线在哪些信号层上,阻抗线的参考面是哪些层?其次根据文件选择正确的阻抗模型来计算阻抗,最后通过调整各层间的介质厚度,或者调整阻抗线的线宽及间距来满足阻抗及板厚的要求! 五,举例说明怎样使用Polar Si9000计算阻抗及设计层叠结构: 1.四层板板厚1.6MM,外层信号线要求控制50欧姆特性阻抗和100欧姆差分阻抗.其设计结构详见:4层板1.6MM阻抗设计.jpg,其中H1代表的是信号层与参考层之间的介质厚度,即L1与L2之间的厚度为3.2MIL,Er1为板材的介电常数,FR-4通常为4.2-4.6,W1称为下线宽，W2称为上线宽,一般认为W1=W+0.5MIL,W2=W-0.5MIL,S1(注意S1<2W)为两根差分线之间的间距(指线边缘与线边缘之间距离),T1信号层的成品铜厚，外层1OZ=1.4MIL,而内层考虑的蚀刻的因素，我们通常认为内层1OZ=1.2MIL,而0.5OZ=0.6MIL。Zdiff为阻抗值。Calculate为计算按钮，各因素是可以互相推算的,例如我们要控制50欧姆的阻抗,线宽为
习题1：求1uH 电感与5欧电阻串联电路在10MHz 、100MHz 、1GHz 下的并联等效电路（分别计算出相应的元件值）。 解： 222s s p s 22s s p 2s p s s p (1)1(1)s s R X R Q R R R X X X X Q R X Q R X ?+==+???+?==+?? ==
习题2：某接收机输入回路的简化电路如图所示。 已知C 1=5pF ，C 2=15pF ，Ｒs =75 Ω，ＲL =300 Ω。为了使电路匹配，即负载ＲL 等效到ＬＣ回路输入端的电阻Ｒ′L ＝Ｒs ， 线圈初、次级匝数比Ｎ1／Ｎ2应该是多少？ 解：电容接入系数p1为： 480025.0300/'25 .015 55 2112 2 11====+=+= p RL RL c c c p 电感接入系数p2为： 1429.0)21/(22/112/12 /1211125.04800/7522=-=+= +===p p N N N N N N N N N p p 习题3：试设计一个г型匹配网络，使100Ω的电阻性负载在100MHz 时转换为50Ω。 （1）画出匹配网络的电路结构； （2）计算匹配网络的元件值； 解：（1） 因须将阻抗从大变为小，故电路结构如 X1 R=100 Rin=50
图。其中X1、X2为性质相反的电抗元件。 将X2和R 变为串联结构，则： 22 '50 100(1)5012 21002 2'50(11/) 12'50 R Q R Q X X X X Q X X ==+== == =+== ● 若X1＝50，则X2＝－100，有： 150/(2)50/(21006)7.968()79.6() 1 2 1.5911()15.9() (2)100 L f e e H nH C e F pF f πππ===-===-= ● 若X1＝－50，则X2＝100，有： 1 1 3.1811()31.8() (2)50 2100/(2)100/(21006) 1.597()159()C e F pF f L f e e H nH πππ= =-====-= X1 X2' R ’ =50 Rin=50
阻抗匹配基本認識 阻抗匹配是指信号源或者传输线跟负载之间的一种合适的搭配方式得到最大功率输出的一种工作状态。对于不同特性的电路，匹配条件是不一样的。阻抗匹配分为低频和高频两种情况讨论。我们先从直流电压源驱动一个负载入手。由于实际的电压源，总是有内阻的（请参看输出阻抗一问），我们可以把一个实际电压源，等效成一个理想的电压源跟一个电阻r串联的模型。假设负载电阻为R，电源电动势为U，内阻为r，那么我们可以计算出流过电阻R的电流为：I=U/(R+r)，可以看出，负载电阻R越小，则输出电流越大。负载R上的电压为：Uo=IR=U×[1+(r/R)]，可以看出，负载电阻R越大，则输出电压Uo越高。再来计算一下电阻R消耗的功率为： P=I2×R=(U/(R+r))2×R=U2×R/(R2+2×R×r+r2) =U2×R/((R-r)2+4×R×r) =U2/(((R-r)2/R)+4×r) 对于一个给定的信号源，其内阻r是固定的，而负载电阻R则 是由我们来选择的。注意式中((R-r)2/R)，当R=r时，(R-r)2/R可 取得最小值0，这时负载电阻R上可获得最大输出功率 Pmax=U2/(4×r)。即，当负载电阻跟信号源内阻相等时，负载可 获得最大输出功率，这就是我们常说的阻抗匹配之一。 对于纯电阻电路，此结论同样适用于低频电路及高频电路。 当交流电路中含有容性或感性阻抗时，结论有所改变，就是需 要信号源与负载阻抗的的实部相等，虚部互为相反数，这叫做共厄匹配。 Z=R+jX ﹐Z=R-jX 在低频电路中，我们一般不考虑传输线的匹配问题，只考虑信号源跟负载之间的情况，因为低频信号的波长相对于传输线来说很长，传输线可以看成是“短线”，反射可以不考虑（可以这么理解：因为线短，即使反射回来，跟原信号还是一样的）。从以上分析我们可以得出结论：如果我们需要输出电流大，则选择小的负载R；如果我们需要输出电压大，则选择大的负载R；如果我们需要输出功率最大，则选择跟信号源内阻匹配的电阻R。 有时阻抗不匹配还有另外一层意思，例如一些仪器输出端是在特定的负载条件下设计的，如果负载条件改变了，则可能达不到原来的性能，这时我们也会叫做阻抗失配。 在高频电路中，我们还必须考虑反射的问题。当信号的频率很高时，则信号的波长就很短，当波长短得跟传输线长度可以比拟时，反射信号叠加在原信号上将会改变原信号的形状。如果传输线的特征阻抗跟负载阻抗不相等（即不匹配）时，在负载端就会产生反射。为什么阻抗不匹配时会产生反射以及特征阻抗的求解方法，牵涉到二阶偏微分方程的求解，在这里我们不细说了，有兴趣的可参看电磁场与微波方面书籍中的传输线理论。 传输线的特征阻抗（也叫做特性阻抗）是由传输线的结构以及材料决定的，而与传输线的长度，以及信号的幅度、频率等均无关。 例如，常用的闭路电视同轴电缆特性阻抗为75Ω，而一些射频设备上则常用特征阻抗为50Ω的同轴电缆。另外还有一种常见的传输线是特性阻抗为300Ω的扁平平行线，这在农村使用的电视天线架上比较常见，用来做八木天线的馈线。因为电视机的射频输入端输入阻抗为75Ω，所以
阻抗计算说明 Rev0.0 heroedit@https://www.doczj.com/doc/8416463131.html, z给初学者的 一直有很多人问我阻抗怎么计算的. 人家问多了,我想给大家整理个材料,于己于人都是个方便.如果大家还有什么问题或者文档有什么错误,欢迎讨论与指教! 在计算阻抗之前,我想很有必要理解这儿阻抗的意义 z传输线阻抗的由来以及意义 传输线阻抗是从电报方程推导出来(具体可以查询微波理论) 如下图,其为平行双导线的分布参数等效电路: 从此图可以推导出电报方程 取传输线上的电压电流的正弦形式 得 推出通解
定义出特性阻抗 无耗线下r=0, g=0得 注意,此特性阻抗和波阻抗的概念上的差异(具体查看平面波的波阻抗定义) ε μ=EH Z 特性阻抗与波阻抗之间关系可从 此关系式推出. Ok,理解特性阻抗理论上是怎么回事情,看看实际上的意义,当电压电流在传输线传播的时候,如果特性阻抗不一致所求出的电报方程的解不一致,就造成所谓的反射现象等等.在信号完整性领域里,比如反射,串扰,电源平面切割等问题都可以归类为阻抗不连续问题,因此匹配的重要性在此展现出来. z 叠层(stackup)的定义 我们来看如下一种stackup,主板常用的8层板(4层power/ground 以及4层走线层,sggssggs,分别定义为L1, L2…L8)因此要计算的阻抗为 L1,L4,L5,L8 下面熟悉下在叠层里面的一些基本概念,和厂家打交道经常会使用的 Oz 的概念 Oz 本来是重量的单位Oz(盎司 )=28.3 g(克) 在叠层里面是这么定义的,在一平方英尺的面积上铺一盎司的铜的厚度为1Oz, 对
阻抗匹配与史密斯(Smith)圆图：基本原理
在处理 RF 系统的实际应用问题时，总会遇到一些非常困难的工作，对各部分级联电路的不同阻抗进行匹配就是其中之一。一般情况下， 需要进行匹配的电路包括天线与低噪声放大器(LNA)之间的匹配、 功率放大器输出(RFOUT)与天线之间的匹配、 LNA/VCO 输出与混频器输入 之间的匹配。匹配的目的是为了保证信号或能量有效地从“信号源”传送到“负载”。
在高频端，寄生元件(比如连线上的电感、板层之间的电容和导体的电阻)对匹配网络具有明显的、不可预知的影响。频率在数十兆赫兹 以上时，理论计算和仿真已经远远不能满足要求，为了得到适当的最终结果，还必须考虑在实验室中进行的 RF 测试、并进行适当调谐。 需要用计算值确定电路的结构类型和相应的目标元件值。
有很多种阻抗匹配的方法，包括
?
计算机仿真： 由于这类软件是为不同功能设计的而不只是用于阻抗匹配，所以使用起来比较复杂。设计者必须熟悉用正确的 格式输入众多的数据。设计人员还需要具有从大量的输出结果中找到有用数据的技能。另外，除非计算机是专门为这个用途 制造的，否则电路仿真软件不可能预装在计算机上。
? ? ?
手工计算： 这是一种极其繁琐的方法，因为需要用到较长(“几公里”)的计算公式、并且被处理的数据多为复数。 经验： 只有在 RF 领域工作过多年的人才能使用这种方法。总之，它只适合于资深的专家。 史密斯圆图：本文要重点讨论的内容。
本文的主要目的是复习史密斯圆图的结构和背景知识，并且总结它在实际中的应用方法。讨论的主题包括参数的实际范例，比如找出匹 配网络元件的数值。当然，史密斯圆图不仅能够为我们找出最大功率传输的匹配网络，还能帮助设计者优化噪声系数，确定品质因数的 影响以及进行稳定性分析。
图 1. 阻抗和史密斯圆图基础
基础知识
在介绍史密斯圆图的使用之前，最好回顾一下 RF 环境下(大于 100MHz) IC 连线的电磁波传播现象。这对 RS-485 传输线、PA 和天线之间 的连接、LNA 和下变频器/混频器之间的连接等应用都是有效的。
输入阻抗、输出阻抗、阻抗匹配分析 输入阻抗 四端网络、传输线、电子电路等的输入端口所呈现的阻抗。实质上是个等效阻抗。只有确定了输入阻抗,才能进行阻抗匹配,从信号源、传感器等获取输入信号。阻抗是电路或设备对交流电流的阻力,输入阻抗是在入口处测得的阻抗。高输入阻抗能够减小电路连接时信号的变化,因而也是最理想的。在给定电压下最小的阻抗就是最小输入阻抗。作为输入电流的替代或补充,它确定输入功率要求。 天线的输入阻抗定义为输入端电压和电流之比。其值表征了天线与发射机或接收机的匹配状况,体现了辐射波与导行波之间能量转换的好坏。 输出阻抗 阻抗是电路或设备对交流电流的阻力,输出阻抗是在出口处测得的阻抗。阻抗越小,驱动更大负载的能力就越高。 输入阻抗和输出阻抗在很多地方都用到,非常重要。 首先,输入阻抗和输出阻抗是相对的,我们先要明白阻抗的意思。 阻抗,简单的说就是阻碍作用,甚至可以说就是电阻,即一种另一层意思上的等效电阻。 引入输入阻抗和输出阻抗这两个词,最大的目的是在设计电路中,要提高效率,即要达到阻抗匹配,达到最佳效果。 有了输入输出阻抗这两个词,还可以方便两个电路独立的分开来设计。当A电路中输入阻抗和B电路的输出阻抗相同(或者在一定范围时,两个电路就可不作任何更改,直接组合成一个更复杂的电路(或者系统。
由上也可以得出:输入阻抗和输出阻抗实际上就是等效电阻,单位自然就是欧姆了。 一、输入阻抗 输入阻抗是指一个电路输入端的等效阻抗。在输入端上加上一个电压源U,测量输入端的电流I,则输入阻抗Rin就是U/I。你可以把输入端想象成一个电阻的两端,这个电阻的阻值,就是输入阻抗。 输入阻抗跟一个普通的电抗元件没什么两样,它反映了对电流阻碍作用的大小。对于电压驱动的电路,输入阻抗越大,则对电压源的负载就越轻,因而就越容易驱动,也不会对 信号源有影响;而对于电流驱动型的电路,输入阻抗越小,则对电流源的负载就越轻。因此,我们可以这样认为:如果是用电压源来驱动的,则输入阻抗越大越好;如果是用电流源来驱动的,则阻抗越小越好(注:只适合于低频电路,在高频电路中,还要考虑阻抗匹配问题。另外如果要获取最大输出功率时,也要考虑阻抗匹配问题 二、输出阻抗 无论信号源或放大器还有电源,都有输出阻抗的问题。输出阻抗就是一个信号源的内阻。本来,对于一个理想的电压源(包括电源,内阻应该为0,或理想电流源的阻抗应当为无穷大。输出阻抗在电路设计最特别需要注意 但现实中的电压源,则不能做到这一点。我们常用一个理想电压源串联一个电阻r的方式来等效一个实际的电压源。这个跟理想电压源串联的电阻r,就是(信号源/放大器输出/电源的内阻了。当这个电压源给负载供电时,就会有电流I从这个负载上流过,并在这个电阻上产生I×r的电压降。这将导致电源输出电压的下降,从而限制了最大输出功率(关于为什么会限制最大输出功率,请看后面的“阻抗匹配”一问。同样的,一个理想的电流源,输出阻抗应该是无穷大,但实际的电路是不可能的 三、阻抗匹配
阻抗匹配与史密斯(Smith)圆图: 基本原理 本文利用史密斯圆图作为RF 阻抗匹配的设计指南。文中给出了反射系数、阻抗和导 纳的作图范例，并用作图法设计了一个频率为60MHz 的匹配网络。 实践证明：史密斯圆图仍然是计算传输线阻抗的基本工具。 在处理RF 系统的实际应用问题时，总会遇到一些非常困难的工作，对各部分级联电路的不同阻抗进行匹配就是其中之一。一般情况下，需要进行匹配的电路包括天线与低噪声放大器(LNA)之间的匹配、功率放大 器输出(RFOUT)与天线之间的匹配、LNA/VCO 输出与混频器输入之间的匹配。匹配的目的是为了保证信号或能量有效地从“信号源”传送到“负载”。 在高频端，寄生元件(比如连线上的电感、板层之间的电容和导体的电阻)对匹配网络具有明显的、不可预 知的影响。频率在数十兆赫兹以上时，理论计算和仿真已经远远不能满足要求，为了得到适当的最终结果，还必须考虑在实验室中进行的RF 测试、并进行适当调谐。需要用计算值确定电路的结构类型和相应的目标元件值。 有很多种阻抗匹配的方法，包括: ? 计算机仿真: 由于这类软件是为不同功能设计的而不只是用于阻抗匹配，所以使用起来比较复杂。设计者必须熟悉用正确的格式输入众多的数据。设计人员还需要具有从大量的输出结果中找到有用数据的技能。另外，除非计算机是专门为这个用途制造的，否则电路仿真软件不可能预装在计算机上。 ? 手工计算: 这是一种极其繁琐的方法，因为需要用到较长(“几公里”)的计算公式、并且被处理的数据多为复数。 ? 经验: 只有在RF 领域工作过多年的人才能使用这种方法。总之，它只适合于资深的专家。 ? 史密斯圆图: 本文要重点讨论的内容。 本文的主要目的是复习史密斯圆图的结构和背景知识，并且总结它在实际中的应用方法。讨论的主题包括参数的实际范例，比如找出匹配网络元件的数值。当然，史密斯圆图不仅能够为我们找出最大功率传输的匹配网络，还能帮助设计者优化噪声系数，确定品质因数的影响以及进行稳定性分析。 w w w . p c b t e c h .n e t
一、阻抗匹配概念 定义: 1、指信号源或者传输线跟负载之间的一种合适的搭配方式；阻抗匹配分为低频和高频两种情况讨论。 2、阻抗匹配（Impedance matching）是微波电子学里的一部分，主要用于负载阻抗与激励源内部阻抗互相适配，得到最大功率输出的一种工作状态，来达至所有高频的微波信号皆能传至负载点的目的，不会有信号反射回来源点，从而提升能源效益。 我们以下例（软管送水浇花）来感性认识一下阻抗匹配的功用 A、一端于手握处加压使其射出水柱，另一端接在水龙头，。当握管处所施压的力道恰好，而让水柱的射程正确洒落在目标区.如下图所示： B、然而一旦用力过度水注射程太远，不但腾空越过目标浪费水资源。也有可能因强力水压无处宣泄，以致往来源反弹造成软管自龙头上的挣脱(阻抗太高)；如下图所示： C、反之，当握处之挤压不足以致射程太近者，则照样得不到想要的结果。(阻抗太低)，如下图所示；唯有拿捏恰到好处才能符合实际需求的距离。(阻抗匹配)
二、PCB走线的阻抗匹配与阻抗控制 （1）定义 阻抗匹配是电路学里的重要议题，也是射频微波电路的重点。一般的传输线都是一端接电源，另一端接负载，此负载可能是天线或任何具有等效阻抗ZL的电路。传输线阻抗和负载阻抗达到匹配的定义，简单说就是：Z0=ZL。在阻抗匹配的环境中，负载端是不会反射电波的，换句话说，电磁能量完全被负载吸收。因为传输线的主要功能就是传输能量和传送电子讯号或数字数据，一个阻抗匹配的负载和电路网络，将可确保传输到最终负载的电磁能量值能达到最大量。 （2）PCB走线作阻抗控制的原因 1：针对目前高频高速的要求，及对信号失真状况越来越高的要求，在设计PCB时方波信号在多层板讯号线中，其特性阻抗值必须要和电子元件的内置电子阻抗相匹配，才能保证信号的完整的传输。 2：当特性阻抗值超出公差时，所传讯号的能量将出现反射、散失、衰减或延误等劣化现象，严重时会出现错误讯号。 3：由于元件的电子阻抗越高，其传输速率越快。总之，是为了配合电子元器件的电子阻抗，避免信号传输时失真的现象，所以要控制阻抗。 (3)、决定阻抗控制大小的因素，主要包括以下几个方面： 1、W-----线宽/线与地平面间距 2、H----绝缘介质厚度 3、T------铜厚 4、H1---绿油厚 5、Er-----介电常数 6、参考地平面层 射频信号在多层板传输线（Transmission Line，是由信号线、介质层、及接地层三者所共同组成）中所进行的快速传送；如下图所示： 三、PCB阻抗控制线计算概述 对于常见的FR4 板材的 PCB 板上， 对于微带线，线宽 W 是介质厚度 h的2 倍。对于带状线，线条两侧介质总厚度b 是线宽 W 的两倍(估算法)；精确计算公式分别如下所示：
目录 摘要 (1) 1 理论知识 (2) 1.1基尔霍夫定律 (2) 1.2结点电压法 (2) 2 阻抗匹配网络的计算 (3) 2.1原理分析 (3) 2.2 建模 (4) 2.3应用MATLAB对上面的题目编程 (5) 2.4 绘图 (6) 3 simulink程序仿真 (8) 3.1电路图及仿真效果 (8) 3.2仿真过程中发现的问题 (9) 4 结果对比分析 (10) 5 心得体会 (11) 参考文献 (12)
摘要 做为一名自动化专业的学生，掌握基本的电路知识是非常重要的。但是在掌握基本的知识点的时候，我们也需要掌握一些解决电路方面的“诀窍”，比如某些软件。本文就以电路中的一些基本知识点引入这些软件在解决电路问题中的一些具体应用。而且本文是以Matlab为例，说明如何运用Matlab来进行电路的求解和仿真。 在求解和仿真的过程中，我们可以发现应用这些软件可以让非常复杂的电路的分析、计算编的非常简单，是一个非常实用、有效的工具。 关键词：电路；Matlab；仿真；
1 理论知识 1.1基尔霍夫定律 基尔霍夫定律包括基尔霍夫电流定律（KCL）和基尔霍夫电压定律（KVL）。 基尔霍夫电流定律（KCL）：在集总电路中，任何时候，对任意结点，所有流出结点的支路电流的代数和恒为零。电流的“代数和”是根据电流是流出结点还是流入结点判断的。若流出节点的电流前面取“+”号，则流入结点的电流前面取“-”号；电流是流出结点还是流入结点，均根据电流的参考方向判断。所以对任一结点都有 Σi=0； 基尔霍夫电压定律（KVL）: 在集总电路中，任何时候，对任意回路，所有支路电压的代数和恒为零。在应用时，需要任意指定一个回路的绕行方向，凡是支路电压的参考方向与回路的绕行方向一致者，该电压前面取“+”号；支路电压参考方向与回路绕行方向相反者，前面取“-”。最后，对任一回路都有 Σu=0； 1.2结点电压法 定义：结点电压是在为电路任选一个结点作为参考点（此点通常编号为“0”），并令其电位为零后,其余结点对该参考点的电位。并根据KCL写出方程，求出每个结点的电压。 在电路中任意选择某一结点为参考结点，其他结点为独立结点，这些结点与次参考结点之间的电压称为结点电压，结点电压的参考极性是以参考结点为负，其余独立结点为正。由于任意支路都连接在两个节点上，根据KVL，不难断定支路电压就是两个结点电压表示。在具有n个结点电压的共（n-1）个独立结点的KCL方程，就得到变量为（n-1）个独立方程，称为结点电压方程，最后由这些方程解出结点电压，从而求出所需的电压、电流。这就是结点电压法。
功率放大器设计的关键：输出匹配电路的性能 2008-05-15 17:51:20 作者：未知来源:电子设计技术 关键字：功率放大器匹配电路匹配网络s参数串联电阻输出功率Cout耗散功率网络分析仪高Q值对于任何功率放大器（功率放大器）设计，输出匹配电路的性能都是个关键。但是，在设计过程中，有一个问题常常为人们所忽视，那就是输出匹配电路的功率损耗。这些功率损耗出现在匹配网络的电容器、电感器，以及其他耗能元件中。功率损耗会降低功率放大器的工作效率及功率输出能力。 因为输出匹配电路并不是一个50Ω的元件，所以耗散损失与传感器增益有很大的区别。输出匹配的具体电路不同，损耗也不一样。对于设计者而言，即使他没有选择不同技术的余地，在带宽和耗散损失之间，在设计方面仍然可以做很多折衷。 匹配网络是用来实现阻抗变化的，就像是功率从一个系统或子系统传送另一个系统或者子系统，RF设计者们在这上面下了很大的功夫。对于功率放大器，阻抗控制着传送到输出端的功率大小，它的增益，还有它产生的噪声。因此，功率放大器匹配网络的设计是性能达到最优的关键。 损耗有不同的定义，但是这里我们关心的是在匹配网络中，RF功率以热量的形式耗散掉的损耗。这些损耗掉的功率是没有任何用途。依据匹配电路功能的不同，损耗的可接受范围也不同。对功率放大器来讲，输出匹配损耗一直是人们关注的问题，因为这牵涉到很大的功率。效率低不仅会缩短通话时间，而且还会在散热和可靠性方面带来很大的问题。 例如，一个GSM功率放大器工作在3.5V电压时，效率是55%，能够输出34dBm的功率。在输出功率为最大时，功率放大器的电流为1.3A。匹配的损耗在0.5dB到1dB的数量级，这与输出匹配的具体电路有关。在没有耗散损失时，功率放大器的效率为62%到69%。尽管损耗是无法完全避免的，但是这个例子告诉我们，在功率放大器匹配网络中，损耗是首要问题。 耗散损失 现在我们来看一个网络，研究一个匹配网络（图1a）中的耗散损失。电源通过无源匹配网络向无源负载传输功率。在电源和负载阻抗之间没有任何其他的限制。把匹配网络和负载合在一起考虑，电源输出一个固定量的功率Pdel 到这个网络（图1b）。输出功率的一部分以热量的形式耗散在匹配网络中。而其余的则传输到负载。Pdel是传输到匹配网络和负载（图1c）上的总功率，PL是传输到负载的那部分功率。 了解了这两个量，我们就可以知道，实际上到底有多大的一部分功率是作为有用功率从电源传输到了负载，其比例等于PL/Pdel。 这是对功率放大器输出匹配的耗散损失的正确测量，因为它只考虑了实际传输功率以及耗散功率。反射功率没有计算进去。 由此可知，这个比例就等于匹配网络工作时的功率增益GP。而工作时的功率增益完整表达式为： 这里，是负载反射系数，是匹配网络的s参数， 损失就是增益的倒数。因此，耗散损失可以定义为： Ldiss = 1/GP。 对于功率放大器而言，我们为它设计的负载一般是50Ω。通常，我们用来测量s参数的系统阻抗也是50Ω。如果系统阻抗和负载都是50Ω，那么就为0，于是，上面的表达式就可以简化为： 在计算一个匹配网络的耗散损失时，只需要知道它的传输值和反射散射参数的大小，这些可以很容易地从s参数的计算过程中得到，因为网络分析仪通常都会采用线性的方式来显示s参数的值。在评估输入和级间耗散损失时，负载的阻抗不是50Ω，但是上述的规律依然适用。 因为反射和耗散损失很容易混淆，射频工程师有时就会采用错误的方法来计算耗散损失。而最糟糕的方法就是采用未经处理的s21来进行计算。一个典型的匹配网络在1GHz（图2）时，对功率放大器而言，是数值为4+j0Ω的负载阻抗。匹配网络采用的是无损耗元件来进行模拟的，所以在匹配网络中不存在功率的耗散问题。然而，s21却是-6dB，因为在50Ω的源阻抗和4Ω的负载之间存在着巨大的不匹配问题。作为一个无损耗网络，除了一些数字噪音外，模拟的耗散损失为0dB。 在电路的模拟当中，我们可能可以采用s21来求出正确的耗散损失。这一过程包括采用复杂模拟负载线的共轭
怎样理解阻抗匹配 阻抗匹配是指信号源或者传输线跟负载之间的一种合适的搭配方式。阻抗匹配分为低频和高频两种情况讨论。 我们先从直流电压源驱动一个负载入手。由于实际的电压源，总是有内阻的（请参看输出阻抗一问），我们可以把一个实际电压源，等效成一个理想的电压源跟一个电阻r串联的模型。假设负载电阻为R，电源电动势为U，内阻为r，那么我们可以计算出流过电阻R的电流为：I=U/(R+r)，可以看出，负载电阻R越小，则输出电流越大。负载R上的电压为：Uo=IR=U/[1+(r/R)]，可以看出，负载电阻R 越大，则输出电压Uo越高。再来计算一下电阻R消耗的功率为：P=I2×R=[U/(R+r)]2×R=U2×R/(R2+2×R×r+r2) =U2×R/[(R-r)2+4×R×r] =U2/{[(R-r)2/R]+4×r} 对于一个给定的信号源，其内阻r是固定的，而负载电阻R则是由我们来选择的。注意式中[(R-r)2/R]，当R=r时，[(R-r)2/R]可取得最小值0，这时负载电阻R上可获得最大输出功率Pmax=U2/(4×r)。即，当负载电阻跟信号源内阻相等时，负载可获得最大输出功率，这就是我们常说的阻抗匹配之一。对于纯电阻电路，此结论同样适用于低频电路及高频电路。当交流电路中含有容性或感性阻抗时，结论有所改变，就是需要信号源与负载阻抗的的实部相等，虚部互为相反数，这叫做共扼匹配。在低频电路中，我们一般不考虑传输线的
匹配问题，只考虑信号源跟负载之间的情况，因为低频信号的波长相对于传输线来说很长，传输线可以看成是"短线"，反射可以不考虑（可以这么理解：因为线短，即使反射回来，跟原信号还是一样的）。从以上分析我们可以得出结论：如果我们需要输出电流大，则选择小的负载R；如果我们需要输出电压大，则选择大的负载R；如果我们需要输出功率最大，则选择跟信号源内阻匹配的电阻R。有时阻抗不匹配还有另外一层意思，例如一些仪器输出端是在特定的负载条件下设计的，如果负载条件改变了，则可能达不到原来的性能，这时我们也会叫做阻抗失配。 在高频电路中，我们还必须考虑反射的问题。当信号的频率很高时，则信号的波长就很短，当波长短得跟传输线长度可以比拟时，反射信号叠加在原信号上将会改变原信号的形状。如果传输线的特征阻抗跟负载阻抗不相等（即不匹配）时，在负载端就会产生反射。为什么阻抗不匹配时会产生反射以及特征阻抗的求解方法，牵涉到二阶偏微分方程的求解，在这里我们不细说了，有兴趣的可参看电磁场与微波方面书籍中的传输线理论。传输线的特征阻抗（也叫做特性阻抗）是由传输线的结构以及材料决定的，而与传输线的长度，以及信号的幅度、频率等均无关。 例如，常用的闭路电视同轴电缆特性阻抗为75Ω，而一些射频设备上则常用特征阻抗为50Ω的同轴电缆。另外还有一种常见的传输线是特性阻抗为300Ω的扁平平行线，这在农村使用的电视天线架上
注：此试卷只有部分答案，为本人所做，如果错误，敬请原谅. 绝密★考试结束前 全国2013年4月高等教育自学考试 计算机网络原理试题 课程代码：04741 请考生按规定用笔将所有试题的答案涂、写在答题纸上。 选择题部分 注意事项： 1.答题前，考生务必将自己的考试课程名称、姓名、准考证号用黑色字迹的签字笔或钢笔填写在答题纸规定的位置上。 2.每小题选出答案后，用2B铅笔把答题纸上对应题目的答案标号涂黑。如需改动，用橡皮擦干净后，再选涂其他答案标号。不能答在试题卷上。 一、单项选择题（本大题共24小题，每小题1分，共24分） 在每小题列出的四个备选项中只有一个是符合题目要求的，请将其选出并将“答题纸” 的相应代码涂黑。错涂、多涂或未涂均无分。 1.无线应用协议WAP的特点是p8 A.支持手机上网 B.不需要基站 C.基于分组交换 D.无固定路由器 2.智能大厦及计算机网络的信息基础设施是p12 A.通信自动化 B.楼宇自动化 C.结构化综合布线 D.现代通信网络 3.因特网工程特别任务组IETF发布的许多技术文件被称为p19 A.ANSI文件 B.ITU文件 C.EIA文件 D.RFC文件 4.涉及速度匹配和排序的网络协议要素是p19 A.语义 B.语法 C.定时 D.规则 5.数据链路层的协议数据单元通常被称为p22 A.帧 B.报文 计算机网络原理试题第1 页(共6 页)
C.分组 D.比特流 6.DTE-DCE接口标准X.21的机械特性采用p35 A.8芯标准连接器 B.9芯标准连接器 C.15芯标准连接器 D.25芯标准连接器 7.光纤上采用的多路复用技术为p49 A.STDM B.TDM C.FDM D.WDM 8.设码字中的信息位为8位，外加一位冗余位，则编码率为知识点p76 A.1/8 B.1/9 C.8/9 D.9/8 9.用特定的字符来标志一帧的起始与终止的帧同步方法称为p71 A.违法编码法 B.首尾标志法 C.位同步法 D.首尾定界符法 10.下列属于静态路由选择算法的是p99 A.距离矢量路由算法 B.最短路由选择算法 C.链路状态路由算法 D.多目标路由算法 11.提供网络层的协议转换，并在不同网络之间存储和转发分组的网间连接器是p119 A.转发器 B.网桥 C.路由器 D.网关 12.因特网支持的代表局域网中所有系统的永久组地址是 A.224.0.0.1 B.224.0.0.2 C.224.0.0.4 D.224.0.0.5 13.简单邮件传输协议SMTP使用的端口号是p139 A.20 B.21 C.23 D.25 14.局域网参考模型中可提供差错恢复和流量控制功能的是p169 中上部分文字 A.无连接服务 B.面向连接服务 C.无确认无连接服务 D.有确认无连接服务 15.对于l0Mbps的基带CSMA/CD网，MAC帧的总长度为p173 计算机网络原理试题第2 页(共6 页)
关于阻抗匹配原则 阻抗匹配是无线电技术中常见的一种工作状态，它反映了输人电路与输出电路之间的功率传输关系。当电路实现阻抗匹配时，将获得最大的功率传输。反之，当电路阻抗失配时，不但得不到最大的功率传输，还可能对电路产生损害。阻抗匹配常见于各级放大电路之间、放大器与负载之间、测量仪器与被测电路之间、天线与接收机或发信机与天线之间，等等。例如，扩音机的输出电路与扬声器之间必须做到阻抗匹配，不匹配时，扩音机的输出功率将不能全部送至扬声器。如果扬声器的阻抗远小于扩音机的输出阻抗，扩音机就处于过载状态，其末级功率放大管很容易损坏。反之，如果扬声器的阻抗高于扩音机的输出阻抗过多，会引起输出电压升高，同样不利于扩，音机的工作，声音还会产生失真。因此扩音机电路的输出阻抗与扬声器的阻抗越接近越好。又例如，无线电发信机的输出阻抗与馈线的阻抗、馈线与天线的阻抗也应达到一致。如果阻抗值不一致，发信机输出的高频能量将不能全部由天线发射出去。这部分没有发射出去的能量会反射回来，产生驻波，严重时会引起馈线的绝缘层及发信机末级功放管的损坏。为了使信号和能量有效地传输，必须使电路工作在阻抗匹配状态，即信号源或功率源的内阻等于电路的输人阻抗，电路的输出阻抗等于负载的阻抗。在一般的输人、输出电路中常含有电阻、电容和电感元件，由它们所组成的电路称为电抗电路，其中只含有电阻的电路称为纯电阻电路。下面对纯电阻电路和电抗电路的阻抗匹配问题分别进行简要的分析。
阻抗匹配的基本原理： 1．纯电阻电路 在中学物理电学中曾讲述这样一个问题：把一个电阻为R的用电器，接在一个电动势为E、内阻为r的电池组上，在什么条件下电源输出的功率最大呢？当外电阻等于内电阻时，电源对外电路输出的功率最大，这就是纯电阻电路的功率匹配。假如换成交流电路，同样也必须满足R=r这个条件电路才能匹配。 2．电抗电路 电抗电路要比纯电阻电路复杂，电路中除了电阻外还有电容和电感。元件，并工作于低频或高频交流电路。在交流电路中，电阻、电容和电感对交流电的阻碍作用叫阻抗，用字母Z表示。其中，电容和电感对交流电的阻碍作用，分别称为容抗及和感抗而。容抗和感抗的值除了与电容和电感本身大小有关之外，还与所工作的交流电的频率有关。值得注意的是，在电抗电路中，电阻R，感抗而与容抗双的值不能用简单的算术相加，而常用阻抗三角形法来计算（见图2）。因而电抗电路要做到匹配比纯电阻电路要复杂一些，除了输人和输出电路中的电阻成分要求相等外，还要求电抗成分大小相等符号相反