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Comparison of press-pack IGBT at hard switching and clamp operation for medium voltage converters

Comparison of press-pack IGBT at hard switching and clamp operation for medium voltage converters
Comparison of press-pack IGBT at hard switching and clamp operation for medium voltage converters

Comparison of Press-Pack IGBT at Hard Switching and Clamp Operation for Medium Voltage Converters

Rodrigo Alvarez,Felipe Filsecker,Steffen Bernet

Technische Universitaet Dresden

Helmholzstrasse9

Dresden,Germany

Email:Rodrigo.alvarez@mailbox.tu-dresden.de

Keywords

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Abstract

The newly developed press-pack IGBT devices compete with IGCTs in high power industrial applica-tions.These new semiconductors were already studied in detail for hard switching[1]and for clamp operation[2].Nevertheless,a comparison of the basic switching characteristics of the IGBT press-pack devices for hard switching and clamp operation has not been done so far.

This paper compares the switching behavior,the switching losses and the safe operating area trajectories

of the new85mm,4.5kV,1.2kA press-pack SPT+IGBT for hard switching and clamp operation.The methods used for the experimental characterization and comparison are explained in detail.

Introduction

Nowadays medium voltage converters are essential for the application areas industry,traction,marine

and energy.They increase the ef?ciency of processes,allowing better control of the energy?ow.Power semiconductors are the basic building block of medium voltage converters,and their development has enabled a substantial improvement of the converter technology during the last years[3–5].Up to now,

IGBT modules and IGCT press pack devices have shared the market of self commutated medium voltage converters.Recent trends suggest that self-commutated converters will be the dominating technology for applications below30MV A in the middle term[6,7].

Press-pack IGBTs combine the advantages of IGBT dies with those of press-pack housing,making them

an attractive alternative to IGCTs[8–11].The static and switching behavior of the new85mm,4.5kV,

1.2kA press-pack SPT+IGBT at hard switching was described in[1].Reference[2]proposes the use

of a clamp circuit for the aforementioned IGBT.An IGBT press pack device offers the potential of a

high power cycling capability,an explosion free converter design,and low switching and total losses. Obviously,the IGBT press pack devices have become an interesting alternative to IGCTs in high power medium voltage applications.[8,10]

This paper presents a detailed comparison of the switching behavior,the switching losses and the semi-conductor stress of both modes of operation for diverse collector currents and junction temperatures.

Semiconductor Data and Test Bench

For the comparison of the switching behavior and switching losses of the new4.5kV,1.2kA press-

pack Soft-Punch-Through Plus(SPT+)IGBT T1200EB45E four con?gurations have been tested:?Hard Switching with a stray inductance of120nH

?Clamp1with L cl-1=1μH

?Clamp2with L cl-2=2μH

?Clamp3with L cl-3=5.6μH

Table I:Semiconductor data

Device Diode IGBT

Manufacturer In?neon Westcode

Model D1031SH T1200EB45E

Diameter62.8mm85mm

Si-area3097mm24284mm2

Active Si-area A aSi2463mm22142mm2

R thJH(2sides)14.1K/kW9K/kW

Table II:Semiconductor core values

Diode IGBT

V RRM4500V V CES4500V

I FRMSM2300A V DC-link2800V

I FA VM1470A I C(DC)2132A

I RM1500A I C(nom)1200A

C

(a)

C

(b)

Figure1:Test bench schematic diagram for(a)hard switching and for(b)soft switching with clamp circuit The test setup includes the diode D1031SH as freewheeling diode D f as well as clamp diode D cl,and the commercially available gate unit C0030BG400(R G,on=3.3?and R G,off=2.2?).The semiconductor data are summarized in Tables I and II.The test bench schematic diagram for the different operation modes is shown in Fig.1.The clamp circuit design is detailed in Table III.

The test circuit is a buck converter,which allows the study of the switching behavior of an active switch (e.g.IGBT,IGCT)and its corresponding freewheeling diode through the use of a double-pulse switching pattern[3].The dc-link was buffered near to the stack by an extra capacitor C stb(220μF)in order to

Table III:Test bench and current snubber setup

Test bench Clamp circuit

C dc 4.5mF C cl10μF

C stb220μF R cl0.5?

L Load1mH L cl1,2,5.6μH

V dc 2.5kV

(a)(b)

Figure2:Experimental setup(a)IGBT stack for hard switching,(b)stack with clamp circuit achieve a low stray inductance.

A robust mechanical design was accomplished using2mm-thick copper plates connecting the dc-link capacitor C dc,the additional buffer capacitor C stb and the stack.Thus,the mechanical construction of the test bench is able to withstand short circuit currents of about200kA in case of a device failure.The two diodes D prot limit possible negative voltages across the dc-link capacitor,preventing an oscillation of the short circuit current and the fuse F avoids the complete discharge of the dc-link capacitors through the stack in failure case limiting the maximum short circuit current to value of less than60kA.These are two important components of the safety concept of the test bench.

The junction temperatures of the devices are adjusted by two ring heaters mounted in the stack,control-ling the case temperature[3].The dc-link capacitor is charged by a high-voltage power supply before the measurements are carried out.A partially automated measurement system was used.The values of V dc and I L are set using a LabVIEW program on a PC connected to the test bench by optical?ber cables. The measurements are captured by two8bit four-channel digital oscilloscopes(Tektronix TDS714L), capable of working at a500MS/s sample rate.The storage and analysis of the data is carried out on an extra computer.The experimental setup is shown in Fig.2.

Comparison of4.5kV,1.2kA Press-Pack IGBT at Hard Switching and Clamp Operation

The press-pack IGBT was characterized for hard switching and clamp operation for different gate resis-tances R G,collector currents i C,dc-link voltages V dc and junction temperatures T j,as Table IV shows. Hard switching and clamp operation are compared regarding the stress in the safe operating area(SOA), peak power,semiconductor switching losses and clamp switching losses.The de?nitions of the quantities used for the calculations(e.g.d i/dt,d v/dt)correspond with those presented in[1,2].

Comparison of SOA Trajectories and Maximum Instantaneous Power

The press-pack IGBT and the freewheeling diode feature a smooth switching behavior in all investigated operating points.Waveforms of device voltages,currents and instantaneous power as well as SOA tra-jectories at V dc=2.5kV,i C=1.2kA,T j=125?C and the lowest recommended gate resistance illustrate the behavior of the semiconductors for the selected hard switching and clamp operation(Figs.3to5).

(a)

(b)(c)

Figure3:IGBT turn-off behavior(a)waveforms,(b)peak power,(c)Safe Operating Area trajectories(T j=125?C, V DC=2.5kV and i C=1.2kA)

(a)

(b)(c)

Figure4:IGBT turn-on behavior(a)waveforms,(b)peak power,(c)Safe Operating Area trajectories(T j=125?C, V DC=2.5kV and i C=1.2kA)

Table IV:Conducted measurements

Hard Switching

Variable Value

V dc2000and2500V

i L100,300,600,900,1200,1500and1800A

T j25,60,90,125?C

Lσ120and210nH

R G,on-1...3 3.3,5.6and6.8?

R G,off-1...3 2.2,3.6and6.8?

Clamp Operation

Variable Value

V dc2000and2500V

i L100,300,600,900,1200,1500and1800A

T j25,60,90,125?C

L cl1,2,3 1.0,2.0and5.6μH

The turn-off behavior of the IGBT is almost not in?uenced by the different clamp con?gurations,con-?rming the adequate selection of the clamp components.The clamp inductance L cl induces a small overvoltage caused by the demagnetization(Fig.3a),which does not affect the peak power(Fig.3b),but slightly increases the turn-off losses by about8%compared to hard switching.

The clamp inductance has a remarkable in?uence on the turn-on transient,changing the d i C/dt from 4.2kA/μs for GU-1(R G,on-1=3.3?and R G,on-1=2.2?)at hard switching to0.5kA/μs for operation with L cl-3,keeping d v CE/dt at roughly3.5kV/μs(Fig.4a).Moreover,the clamp reduces the turn-on stress of the IGBT in contrast to hard switching:the collector current i C rises with a low device voltage, which reduces the IGBT turn-on peak power by approximately95%from5.15MW for hard switching to0.23MW for L cl-3=5.6μH(Fig.4b).The turn-on SOA traces of the clamp-operated IGBTs show a substantially larger distance to the SOA margins than the IGBT at hard switching(Fig.4c).Obviously, the maximum collector current i C at IGBT turn-on is smaller for IGBTs at clamp operation,due to the reduction of d i C/dt,which also affects the reverse-recovery behavior and losses of the corresponding freewheeling diode.

As expected for the diode,the reverse recovery current is reduced as the clamp inductance L cl is in-creased,see Fig.5a(a lower d i D/dt reduces the reverse recovery charge).Accordingly,the diode presents the highest stress for the operation with clamp1(L cl-1),caused by the larger voltage peak generated through the combination of a still considerable d i D/dt and the relatively large stray inductance of the clamp circuit con?guration(Fig.5b).An increase of L cl reduces the d i D/dt,the peak reverse recovery current and the rate of current change of the decrease of the reverse recovery current.Thus,the instanta-neous peak power decreases for L cl-2and L cl-3.

The diode turn-off SOA traces show that the hard switching operation approaches to the i D margins of the SOA,whereas the clamp operation increases the distance to this limit,but reduces the distance to the diode voltage v D limit(Fig.5c).The diode presents maximum stress at turn-off transients;the clamp con?guration can reduce or increase this stress depending on the relation between clamp inductance, stray inductance,peak reverse recovery current and rate of change of the decrease of the reverse recovery current.A poor design can generate large diode voltage peaks,increasing the stress of the diode.

For the studied operating points,the press-pack IGBT is subject to the largest stress at hard switching during turn-on,and with clamp operation during turn-off transients.The maximum stress is reduced by about40%compared to hard switching,due to the addition of a clamp circuit.

Comparison of Losses

The main goal of the use of the clamp con?guration is the reduction of the IGBT switching losses.Of course also the diode losses and the total converter losses should not increase compared to hard switching. The semiconductor switching losses of IGBT and diode(E sw,SC)are de?ned as:

E sw,SC=E on,IGBT+E off,IGBT+E off,Diode(1) with

E on,IGBT:IGBT turn-on switching losses

E off,IGBT:IGBT turn-off switching losses

(a)

(b)

(c)

Figure 5:Diode turn-off behavior (a)waveforms,(b)peak power,(c)Safe Operating Area trajectories (T j =125?C,V DC =2.5kV and i C =1.2kA)

E off,Diode :Diode turn-off switching losses

In case of clamp operation,the clamp losses are calculated by (2),which includes the losses of the clamp diode E D,cl and clamp resistor E R,cl .Stationary losses of the clamp inductor (caused by the parasitic ohmic resistance)and the clamp capacitor (caused by the equivalent parallel resistance)are neglected.

E cl =E D,cl +E R,cl

(2)

The sum of the semiconductor and clamp switching losses of the four selected con?gurations were com-pared at V dc =2.5kV ,T j =125?C and i C =600and 1200A.The results can be seen in Fig.6.The values on top of the columns are the sum of the semiconductor and clamp switching losses (E sw,SC+cl )and the values in parentheses are the semiconductor switching losses.

The semiconductor switching losses were reduced by 13to 30%(clamp 1to 3respectively)for clamp operation compared to hard switching.The largest loss reduction by the clamp circuit was achieved during IGBT turn-on.However,the sum of the semiconductor and clamp switching losses were reduced by less than 3%at 600A and less than 11%at 1200A ,which means that a major part of the turn-on losses are transferred from the IGBT to the clamp resistance R cl .

The larger reduction of the semiconductor switching losses is achieved by L cl-3.However,the selection of a clamp should consider the stress of the semiconductors,both switching and clamp losses and particular speci?cations for the application (e.g.d v /dt,power density,reliability,mounting cost,etc.).

For example,in the studied cases,clamp 2presents a good trade off between a reduction of semicon-ductor switching losses,clamp switching losses and stress of the diode.The diode stress is increased marginally (3.37%),achieving a reduction of the semiconductor switching losses of 25%and a reduc-tion of the semiconductor and clamp switching losses of 8%.This allows the reduction of the cooling system or a higher converter output power.However,?nally an optimum for criteria like volume,weight,ef?ciency and costs must be found.The realization of a clamp seems to be an interesting option.

Figure6:Semiconductor and clamp switching losses(V dc=2.5kV,T j=125?C,left i C=600A,right i C=1200A) Conclusions

This paper shows a detailed comparison of the switching behavior and switching losses of the press-pack IGBT T1200EB45E at hard switching and clamp operation.It shows that the use of clamp circuits for press-pack IGBTs features interesting characteristics like reduced switching losses(up to30%)and less stress of the semiconductors(lower d i C/dt,reverse recovery current and peak power for IGBT and diode). The optimum clamp circuit will depend on the speci?cation requirements of the particular application. The saved semiconductor switching losses enable an increase of the converter power or switching fre-quency in medium voltage converters,since both characteristics are limited thermally by the semicon-ductor losses and the cooling con?guration.It is remarkable that the sum of switching and clamp losses are lower than at hard switching.For example the sum of switching and clamp losses are reduced by about3%at50%and11%at100%rated current.

References

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