DPX2NE-67MSAW8S33B-33中文资料

16M-BIT [x 1 / x 2] CMOS SERIAL FLASH 32M-BIT [x 1 / x 2] CMOS SERIAL FLASH 64M-BIT [x 1 / x 2] CMOS SERIAL FLASHFEATURESGENERAL• Serial Peripheral Interface compatible -- Mode 0 and Mode 3• 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits (two I/O read mode) structure 32M:33,554,432 x 1 bit structure or 16,772,216 x 2 bits (two I/O read mode) structure 64M:67,108,864 x 1 bit structure or 33,554,432 x 2 bits (two I/O read mode) structure • 512 Equal Sectors with 4K byte each (16Mb)1024 Equal Sectors with 4K byte each (32Mb)2048 Equal Sectors with 4K byte each (64Mb)- Any Sector can be erased individually•32 Equal Blocks with 64K byte each (16Mb)64 Equal Blocks with 64K byte each (32Mb)128 Equal Blocks with 64K byte each (64Mb)- Any Block can be erased individually • Single Power Supply Operation- 2.7 to 3.6 volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to Vcc +1V • Low Vcc write inhibit is from 1.5V to 2.5VPERFORMANCE • High Performance- Fast access time: 86MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock (30pF + 1TTL Load)- Serial clock of two I/O read mode : 50MHz (15pF + TTL Load), which is equivalent to 100MHz - Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)- Byte program time: 9us (typical)- Continuously program mode (automatically increase address under word program mode)- Fast erase time: 60ms(typ.) /sector (4K-byte per sector) ; 0.7s(typ.) /block (64K-byte per block); 14s(typ.) /chip for 16Mb, 25s(typ.) for 32Mb, and 50s(typ.) for 64Mb • Low Power Consumption- Low active read current: 25mA(max.) at 86MHz, 20mA(max.) at 66MHz and 10mA(max.) at 33MHz - Low active programming current: 20mA (max.)- Low active erase current: 20mA (max.)- Low standby current: 20uA (max.)- Deep power-down mode 1uA (typical)• Typical 100,000 erase/program cyclesSOFTWARE FEATURES • Input Data Format- 1-byte Command code •Advanced Security Features - Block lock protectionThe BP0-BP3 status bit defines the size of the area to be software protection against program and erase instructions - Additional 512-bit secured OTP for unique identifier • Auto Erase and Auto Program Algorithm- Automatically erases and verifies data at selected sector- Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths (Any page to be programed should have page in the erased state first)MX25L1605D MX25L3205D MX25L6405D元器件交易网•Status Register Feature•Electronic Identification- JEDEC 1-byte manufacturer ID and 2-byte device ID- RES command for 1-byte Device ID- Both REMS and REMS2 commands for 1-byte manufacturer ID and 1-byte device IDHARDWARE FEATURES• SCLK Input- Serial clock input• SI Input- Serial Data Input• SO Output- Serial Data Output• WP#/ACC pin- Hardware write protection and program/erase acceleration• HOLD# pin- pause the chip without diselecting the chip• PACKAGE- 16-pin SOP (300mil)- 8-land WSON (8x6mm or 6x5mm)- 8-pin SOP (200mil, 150mil)- 8-pin PDIP (300mil)- 8-land USON (4x4mm)- All Pb-free devices are RoHS CompliantALTERNATIVE• Security Serial Flash (MX25L1615D/MX25L3215D/MX25L6415D) may provides additional protection features for op-tion. The datasheet is provided under NDA.GENERAL DESCRIPTIONThe MX25L1605D are 16,777,216 bit serial Flash memory, which is configured as 2,097,152 x 8 internally. When it is in two I/O read mode, the structure becomes 8,388,608 bits x 2. The MX25L3205D are 33,554,432 bit serial Flash memory, which is configured as 4,194,304 x 8 internally. When it is in two I/O read mode, the structure becomes 16,772,216 bits x 2. The MX25L6405D are 67,108,864 bit serial Flash memory, which is configured as 8,388,608 x 8 internally. When it is in two I/O read mode, the structure becomes 33,554,432 bits x 2. (please refer to the "Two I/O Read mode" section). The MX25L1605D/3205D/6405D feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input.When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output.The MX25L1605D/3205D/6405D provides sequential read operation on whole chip.After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256 bytes) basis, or word basis for Continuously program mode, and erase command is executes on sector (4K-byte), or block (64K-byte), or whole chip basis.To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.Advanced security features enhance the protection and security functions, please see security features section for more details.When the device is not in operation and CS# is high, it is put in standby mode and draws less than 20uA DC current. The MX25L1605D/3205D/6405D utilizes MXIC's proprietary memory cell, which reliably stores memory contents even after typical 100,000 program and erase cycles.Table 1. Additional Feature ComparisonPIN CONFIGURATIONSSYMBOL DESCRIPTION CS#Chip SelectSI/SIO0Serial Data Input (for 1 x I/O)/ Serial Data Input & Output (for 2xI/O read mode)SO/SIO1Serial Data Output (for 1 x I/O)/ Serial Data Input & Output (for 2xI/O read mode)SCLK Clock InputWP#/ACCWrite protection: connect to GND ;9.5~10.5V for program/eraseacceleration: connect to 9.5~10.5V HOLD#Hold, to pause the device without deselecting the device VCC + 3.3V Power Supply GNDGroundPIN DESCRIPTION16-PIN SOP (300mil)8-LAND WSON (8x6mm, 6x5mm), USON (4x4mm)8-PIN SOP (200mil, 150mil)PACKAGE OPTIONS16M 32M 64M150mil 8-SOP V 200mil 8-SOP V V 300mil 16-SOP V V V300mil 8-PDIP V V 6x5mm WSON V V 8x6mm WSON V4x4mm USONVV12345678HOLD#VCC NC NC NC NC CS#SO/SIO1161514131211109SCLK SI/SIO0NC NC NC NC GND WP#/ACCCS#SO/SIO1WP#/ACCGND VCC HOLD#SCLK SI/SIO0CS#SO/SIO1WP#/ACC GND VCC HOLD#SCLK SI/SIO01234CS#SO/SIO1WP#/ACC GND 8765VCC HOLD#SCLK SI/SIO08-PIN PDIP (300mil)BLOCK DIAGRAMDATA PROTECTIONThe MX25L1605D/3205D/6405D is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transition. During power up the device automatically resets the state machine in the Read mode. In addition, with its control register architecture, alteration of the memory contents only occurs after successful completion of specific command sequences. The device also incorporates several features to prevent inadvertent write cycles resulting from VCC power-up and power-down transition or system noise.•Power-on reset and tPUW: to avoid sudden power switch by system power supply transition, the power-on reset and tPUW (internal timer) may protect the Flash.• Valid command length checking: The command length will be checked whether it is at byte base and completed on byte boundary.• Write Enable (WREN) command: WREN command is required to set the Write Enable Latch bit (WEL) before other command to change data. The WEL bit will return to reset stage under following situation:- Power-up- Write Disable (WRDI) command completion- Write Status Register (WRSR) command completion- Page Program (PP) command completion- Continuously Program mode (CP) instruction completion- Sector Erase (SE) command completion- Block Erase (BE) command completion- Chip Erase (CE) command completion- Write Read-lock Bit (WRLB) instruction completion•Deep Power Down Mode: By entering deep power down mode, the flash device also is under protected from writing all commands except Release from deep power down mode command (RDP) and Read Electronic Signature command (RES).•Advanced Security Features: there are some protection and securuity features which protect content from inadvertent write and hostile access.I. Block lock protection- The Software Protected Mode (SPM) use (BP3, BP2, BP1, BP0) bits to allow part of memory to be protected as read only. The proected area definition is shown as table of "Protected Area Sizes", the protected areas are more flexible which may protect various area by setting value of BP0-BP3 bits.Please refer to table of "protected area sizes".- The Hardware Proteced Mode (HPM) use WP#/ACC to protect the (BP3, BP2, BP1, BP0) bits and SRWD bit.Table 2. Protected Area SizesII. Additional 512-bit secured OTP for unique identifier: to provide 512-bit one-time program area for setting device unique serial number - Which may be set by factory or system customer. Please refer to table 3. 512-bit secured OTP definition.- Security register bit 0 indicates whether the chip is locked by factory or not.- To program the 512-bit secured OTP by entering 512-bit secured OTP mode (with ENSO command), and going through normal program procedure, and then exiting 512-bit secured OTP mode by writing EXSO command.- Customer may lock-down the customer lockable secured OTP by writing WRSCUR(write security register) command to set customer lock-down bit1 as "1". Please refer to table of "security register definition" for security register bit definition and table of "512-bit secured OTP definition" for address range definition.- Note: Once lock-down whatever by factory or customer, it cannot be changed any more. While in 512-bit secured OTP mode, array access is not allowed.Table 3. 512-bit Secured OTP DefinitionAddress range Size Standard Customer LockFactory Lockxxxx00~xxxx0F128-bit ESN (electrical serial number)Determined by customer xxxx10~xxxx3F384-bit N/AHOLD FEATURESHOLD# pin signal goes low to hold any serial communications with the device. The HOLD feature will not stop the operation of write status register, programming, or erasing in progress.The operation of HOLD requires Chip Select(CS#) keeping low and starts on falling edge of HOLD# pin signal while Serial Clock (SCLK) signal is being low (if Serial Clock signal is not being low, HOLD operation will not start until Serial Clock signal being low). The HOLD condition ends on the rising edge of HOLD# pin signal while Serial Clock(SCLK) signal is being low( if Serial Clock signal is not being low, HOLD operation will not end until Serial Clock being low), see Figure 1. Figure 1. Hold Condition OperationThe Serial Data Output (SO) is high impedance, both Serial Data Input (SI) and Serial Clock (SCLK) are don't care during the HOLD operation. If Chip Select (CS#) drives high during HOLD operation, it will reset the internal logic of the device. To re-start communication with chip, the HOLD# must be at high and CS# must be at low.PROGRAM/ERASE ACCELERATIONTo activate the program/erase acceleration function requires ACC pin connecting to 9.5~10.5V voltage (see Figure 2), and then to be followed by the normal program/erase process. By utilizing the program/erase acceleration operation, the performances are improved as shown on table of "ERASE AND PROGRAM PERFORMACE".After power-up ready, it should wait 10ms at least to apply VHH(9.5~10.5V) on the WP#/ACC pin.Figure 2. ACCELERATED PROGRAM TIMING DIAGRAMNote: tVHH (VHH Rise and Fall Time) min. 250nsTable 4. COMMAND DEFINITIONCOMMAND (byte)WREN (writeenable)WRDI (write disable)RDID (read identification )RDSR (read statusregister)WRSR(write status register)READ (read data)FAST READ(fast read data)2READ (2x I/O read command)note1SE (sector erase)1st byte 06 (hex)04 (hex)9F (hex)05 (hex)01 (hex)03 (hex)0B (hex)BB (hex)20 (hex)2nd byte AD1AD1ADD(2)AD13rd byte AD2AD2ADD(2) &Dummy(2)AD24th byte AD3AD3AD35th byte Actionsets the (WEL)write enable latch bit resets the (WEL)write enable latch bitoutputs JEDEC ID:1-byte manufactur er ID & 2-byte device IDto read out the values of the status register to writenew values to the statusregister n bytes read out until CS#goes high n bytes read out until CS#goes high n bytes read out by 2 x I/O until CS#goes high to erase the selectedsector Note 1: The count base is 4-bit for ADD(2) and Dummy(2) because of 2 x I/O. And the MSB is on SI/SIO0 which is different from 1 x I/O conditionCOMMAND (byte)BE (block erase)CE (chip erase)PP (Page program)CP (Continuo-usly program mode)DP (Deep powerdown)RDP (Release from deep power down)RES (read electronic ID)REMS(read electronic manufactu-rer &device ID)REMS2(read ID for 2x I/O mode)1st byte D8 (hex)60 or C7(hex)02 (hex)AD (hex)B9 (hex)AB (hex)AB (hex)90 (hex)EF (hex)2nd byte AD1AD1AD1x x x 3rd byte AD2AD2AD2x x x 4th byte AD3AD3AD3x ADD(note 2)ADD(note2)5th byteAction to erase theselected block to erase whole chip to program the selected page continously program wholechip, theaddress is automatica lly increaseentersdeep power down moderelease from deep power down mode to read out 1-byte device ID outout the manufactu-rer ID &device ID output the manufactu-rer ID &device ID Note 2: ADD=00H will output the manufacturer ID first and ADD=01H will output device ID first Note 3: It is not recommoded to adopt any other code not in the command definition table, which will potentially enter the hidden mode.COMMAND (byte)ENSO (enter secured OTP)EXSO (exit secured OTP)RDSCUR (read security register)WRSCUR (write security register)ESRY (enable SO to output RY/BY#)DSRY (disable SO to output RY/BY#)1st byte B1 (hex)C1 (hex)2B (hex)2F (hex)70 (hex)80 (hex)2nd byte 3rd byte 4th byte 5th byte Actionto enter the 512-bit secured OTP mode to exit the 512-bit secured OTP mode to read value of security registerto set the lock-down bit as "1"(once lock-down,cannot be updated)to enable SO to output RY/BY#during CP mode to disable SO to output RY/BY#during CP modeDummyTable 5-1. Memory Organization (16Mb)Table 5-2. Memory Organization (32Mb)Table 5-3. Memory Organization (64Mb)DEVICE OPERATION1.Before a command is issued, status register should be checked to ensure device is ready for the intended operation.2.When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until next CS# falling edge. In standby mode, SO pin of this LSI should be High-Z.3.When correct command is inputted to this LSI, this LSI becomes active mode and keeps the active mode until next CS# rising edge.4.Input data is latched on the rising edge of Serial Clock(SCLK) and data shifts out on the falling edge of SCLK. The difference of Serial mode 0 and mode 3 is shown as Figure 3.Figure 3. Serial Modes Supported5.For the following instructions: RDID, RDSR, RDSCUR, READ, FAST_READ, 2READ, RES, REMS and REMS2 the shifted-in instruction sequence is followed by a data-out sequence. After any bit of data being shifted out, the CS# can be high. For the following instructions: WREN, WRDI, WRSR, SE, BE, CE, PP, CP, RDP, DP, ENSO, EXSO,and WRSCUR, the CS# must go high exactly at the byte boundary; otherwise, the instruction will be rejected and not executed.6.During the progress of Write Status Register, Program, Erase operation, to access the memory array is neglected and not affect the current operation of Write Status Register, Program, Erase.Note:CPOL indicates clock polarity of Serial master, CPOL=1 for SCLK high while idle, CPOL=0 for SCLK low while not transmitting. CPHA indicates clock phase. The combination of CPOL bit and CPHA bit decides which Serial mode is supported.SCLKMSBCPHASI 01CPOL 0(Serial mode 0)(Serial mode 3)1SO SCLKMSBCOMMAND DESCRIPTION(1) Write Enable (WREN)The Write Enable (WREN) instruction is for setting Write Enable Latch (WEL) bit. For those instructions like PP, CP, SE, BE, CE, and WRSR, which are intended to change the device content, should be set every time after the WREN instruction setting the WEL bit.The sequence of issuing WREN instruction is: CS# goes low-> sending WREN instruction code-> CS# goes high. (see Figure 12)(2) Write Disable (WRDI)The Write Disable (WRDI) instruction is for resetting Write Enable Latch (WEL) bit.The sequence of issuing WRDI instruction is: CS# goes low-> sending WRDI instruction code-> CS# goes high. (see Figure 13)The WEL bit is reset by following situations:- Power-up- Write Disable (WRDI) instruction completion- Write Status Register (WRSR) instruction completion- Page Program (PP) instruction completion- Sector Erase (SE) instruction completion- Block Erase (BE) instruction completion- Chip Erase (CE) instruction completion- Continuously program mode (CP) instruction completion(3) Read Identification (RDID)The RDID instruction is for reading the manufacturer ID of 1-byte and followed by Device ID of 2-byte. The MXIC Manufacturer ID is C2(hex), the memory type ID is 20(hex) as the first-byte device ID, and the individual device ID of second-byte ID are listed as table of "ID Definitions".The sequence of issuing RDID instruction is: CS# goes low-> sending RDID instruction code -> 24-bits ID data out on SO -> to end RDID operation can use CS# to high at any time during data out. (see Figure. 14)While Program/Erase operation is in progress, it will not decode the RDID instruction, so there's no effect on the cycle of program/erase operation which is currently in progress. When CS# goes high, the device is at standby stage.(4) Read Status Register (RDSR)The RDSR instruction is for reading Status Register Bits. The Read Status Register can be read at any time (even in program/erase/write status register condition) and continuously. It is recommended to check the Write in Progress (WIP) bit before sending a new instruction when a program, erase, or write status register operation is in progress.The sequence of issuing RDSR instruction is: CS# goes low-> sending RDSR instruction code-> Status Register data out on SO (see Figure. 15)The definition of the status register bits is as below:WIP bit. The Write in Progress (WIP) bit, a volatile bit, indicates whether the device is busy in program/erase/write status register progress. When WIP bit sets to 1, which means the device is busy in program/erase/write status register progress. When WIP bit sets to 0, which means the device is not in progress of program/erase/write status register cycle.WEL bit. The Write Enable Latch (WEL) bit, a volatile bit, indicates whether the device is set to internal write enable latch. When WEL bit sets to 1, which means the internal write enable latch is set, the device can accept program/erase/write status register instruction. When WEL bit sets to 0, which means no internal write enable latch; the device will not accept program/erase/write status register instruction. The program/erase command will be ignored and not affect value of WEL bit if it is applied to a protected memory area.BP3, BP2, BP1, BP0 bits. The Block Protect (BP3, BP2, BP1, BP0) bits, non-volatile bits, indicate the protected area(as defined in table 1) of the device to against the program/erase instruction without hardware protection mode being set. To write the Block Protect (BP3, BP2, BP1, BP0) bits requires the Write Status Register (WRSR) instruction to be executed. Those bits define the protected area of the memory to against Page Program (PP), Sector Erase (SE), Block Erase (BE) and Chip Erase(CE) instructions (only if all Block Protect bits set to 0, the CE instruction can be executed).Continuously Program Mode( CP mode) bit. The Continuously Program Mode bit indicates the status of CP mode, "0" indicates not in CP mode; "1" indicates in CP mode.SRWD bit. The Status Register Write Disable (SRWD) bit, non-volatile bit, is operated together with Write Protection (WP#/ ACC) pin for providing hardware protection mode. The hardware protection mode requires SRWD sets to 1 and WP#/ACC pin signal is low stage. In the hardware protection mode, the Write Status Register (WRSR) instruction is no longer accepted for execution and the SRWD bit and Block Protect bits (BP3, BP2, BP1, BP0) are read only.Status Registernote1: see the table "Protected Area Sizes"(5) Write Status Register (WRSR)The WRSR instruction is for changing the values of Status Register Bits. Before sending WRSR instruction, the Write Enable (WREN) instruction must be decoded and executed to set the Write Enable Latch (WEL) bit in advance. The WRSR instruction can change the value of Block Protect (BP3, BP2, BP1, BP0) bits to define the protected area of memory (as shown in table 1). The WRSR also can set or reset the Status Register Write Disable (SRWD) bit in accordance with Write Protection (WP#/ACC) pin signal. The WRSR instruction cannot be executed once the Hardware Protected Mode (HPM)is entered.The sequence of issuing WRSR instruction is: CS# goes low-> sending WRSR instruction code-> Status Register data on SI-> CS# goes high. (see Figure 16)The WRSR instruction has no effect on b6, b1, b0 of the status register.The CS# must go high exactly at the byte boundary; otherwise, the instruction will be rejected and not executed. The self-timed Write Status Register cycle time (tW) is initiated as soon as Chip Select (CS#) goes high. The Write in Progress (WIP) bit still can be check out during the Write Status Register cycle is in progress. The WIP sets 1 during the tW timing,and sets 0 when Write Status Register Cycle is completed, and the Write Enable Latch (WEL) bit is reset.Table 6. Protection ModesNote:1. As defined by the values in the Block Protect (BP3, BP2, BP1, BP0) bits of the Status Register, as shown in Table 1.As the above table showing, the summary of the Software Protected Mode (SPM) and Hardware Protected Mode (HPM).Software Protected Mode (SPM):-When SRWD bit=0, no matter WP#/ACC is low or high, the WREN instruction may set the WEL bit and can changethe values of SRWD, BP3, BP2, BP1, BP0. The protected area, which is defined by BP3, BP2, BP1, BP0, is at software protected mode (SPM).-When SRWD bit=1 and WP#/ACC is high, the WREN instruction may set the WEL bit can change the values of SRWD,BP3, BP2, BP1, BP0. The protected area, which is defined by BP3, BP2, BP1, BP0, is at software protected mode (SPM)ModeStatus register condition Software protection mode(SPM)Status register can be written in (WEL bit is set to "1") and the SRWD, BP0-BP3bits can be changedWP# and SRWD bit status MemoryWP#=1 and SRWD bit=0, or WP#=0 and SRWD bit=0, or WP#=1 and SRWD=1The protected area cannot be program or erase.The protected area cannot be program or erase.WP#=0, SRWD bit=1The SRWD, BP0-BP3 ofstatus register bits cannot be changedHardware protection mode (HPM)Note: If SRWD bit=1 but WP#/ACC is low, it is impossible to write the Status Register even if the WEL bit has previously been set. It is rejected to write the Status Register and not be executed.Hardware Protected Mode (HPM):-When SRWD bit=1, and then WP#/ACC is low (or WP#/ACC is low before SRWD bit=1), it enters the hardware protected mode (HPM). The data of the protected area is protected by software protected mode by BP3, BP2, BP1, BP0 and hardware protected mode by the WP#/ACC to against data modification.Note: to exit the hardware protected mode requires WP#/ACC driving high once the hardware protected mode is entered. If the WP#/ACC pin is permanently connected to high, the hardware protected mode can never be entered; only can use software protected mode via BP3, BP2, BP1, BP0.(6) Read Data Bytes (READ)The read instruction is for reading data out. The address is latched on rising edge of SCLK, and data shifts out on the falling edge of SCLK at a maximum frequency fR. The first address byte can be at any location. The address is automatically increased to the next higher address after each byte data is shifted out, so the whole memory can be read out at a single READ instruction. The address counter rolls over to 0 when the highest address has been reached.The sequence of issuing READ instruction is: CS# goes low-> sending READ instruction code-> 3-byte address on SI -> data out on SO-> to end READ operation can use CS# to high at any time during data out. (see Figure. 17)(7) Read Data Bytes at Higher Speed (FAST_READ)The FAST_READ instruction is for quickly reading data out. The address is latched on rising edge of SCLK, and data of each bit shifts out on the falling edge of SCLK at a maximum frequency fC. The first address byte can be at any location. The address is automatically increased to the next higher address after each byte data is shifted out, so the whole memory can be read out at a single FAST_READ instruction. The address counter rolls over to 0 when the highest address has been reached.The sequence of issuing FAST_READ instruction is: CS# goes low-> sending FAST_READ instruction code-> 3-byte address on SI-> 1-dummy byte address on SI->data out on SO-> to end FAST_READ operation can use CS# to high at any time during data out. (see Figure. 18)While Program/Erase/Write Status Register cycle is in progress, FAST_READ instruction is rejected without any impact on the Program/Erase/Write Status Register current cycle.(8) 2 x I/O Read Mode (2READ)The 2READ instruction enable double throughput of Serial Flash in read mode. The address is latched on rising edge of SCLK, and data of every two bits(interleave on 2 I/O pins) shift out on the falling edge of SCLK at a maximum frequency fT. The first address byte can be at any location. The address is automatically increased to the next higher address after each byte data is shifted out, so the whole memory can be read out at a single 2READ instruction. The address counter rolls over to 0 when the highest address has been reached. Once writing 2READ instruction, the following address/dummy/ data out will perform as 2-bit instead of previous 1-bit.The sequence of issuing 2READ instruction is: CS# goes low→ sending 2READ instruction→ 24-bit address interleave on SIO1 & SIO0→ 8-bit dummy interleave on SIO1 & SIO0→ data out interleave on SIO1 & SIO0→ to end 2READ operation can use CS# to high at any time during data out (see Figure of 2 x I/O Read Mode Timing Waveform)While Program/Erase/Write Status Register cycle is in progress, 2READ instruction is rejected without any impact on the Program/Erase/Write Status Register current cycle.The 2 I/O only perform read operation. Program/Erase /Read ID/Read status/Read ID....operation do not support 2 I/O throughputs.(9) Sector Erase (SE)The Sector Erase (SE) instruction is for erasing the data of the chosen sector to be "1". The instruction is used for any 4K-byte sector. A Write Enable (WREN) instruction must execute to set the Write Enable Latch (WEL) bit before sending the Sector Erase (SE). Any address of the sector (see table 3) is a valid address for Sector Erase (SE) instruction. The CS# must go high exactly at the byte boundary (the latest eighth of address byte been latched-in); otherwise, the instruction will be rejected and not executed.Address bits [Am-A12] (Am is the most significant address) select the sector address.The sequence of issuing SE instruction is: CS# goes low -> sending SE instruction code-> 3-byte address on SI -> CS# goes high. (see Figure 22)The self-timed Sector Erase Cycle time (tSE) is initiated as soon as Chip Select (CS#) goes high. The Write in Progress (WIP) bit still can be check out during the Sector Erase cycle is in progress. The WIP sets 1 during the tSE timing, and sets 0 when Sector Erase Cycle is completed, and the Write Enable Latch (WEL) bit is reset. If the page is protected by BP3, BP2, BP1, BP0 bits, the Sector Erase (SE) instruction will not be executed on the page.(10) Block Erase (BE)The Block Erase (BE) instruction is for erasing the data of the chosen block to be "1". The instruction is used for 64K-byte sector erase operation. A Write Enable (WREN) instruction must execute to set the Write Enable Latch (WEL) bit before sending the Block Erase (BE). Any address of the block (see table 3) is a valid address for Block Erase (BE) instruction. The CS# must go high exactly at the byte boundary (the latest eighth of address byte been latched-in); otherwise, the instruction will be rejected and not executed.The sequence of issuing BE instruction is: CS# goes low -> sending BE instruction code-> 3-byte address on SI -> CS# goes high. (see Figure 23)The self-timed Block Erase Cycle time (tBE) is initiated as soon as Chip Select (CS#) goes high. The Write in Progress (WIP) bit still can be check out during the Sector Erase cycle is in progress. The WIP sets 1 during the tBE timing, and sets 0 when Sector Erase Cycle is completed, and the Write Enable Latch (WEL) bit is reset. If the page is protected by BP3, BP2, BP1, BP0 bits, the Block Erase (BE) instruction will not be executed on the page.(11) Chip Erase (CE)The Chip Erase (CE) instruction is for erasing the data of the whole chip to be "1". A Write Enable (WREN) instruction must execute to set the Write Enable Latch (WEL) bit before sending the Chip Erase (CE). Any address of the sector (see table 3) is a valid address for Chip Erase (CE) instruction. The CS# must go high exactly at the byte boundary( the latest eighth of address byte been latched-in); otherwise, the instruction will be rejected and not executed.The sequence of issuing CE instruction is: CS# goes low-> sending CE instruction code-> CS# goes high. (see Figure 24)。

号功能简述型号AD1380JDAD1380KDAD1671JQAD1672APAD1674ADAD1674JNAD202JNAD202JYAD204JNAD22100KTAD22105ARAD261BND-1AD2S99APAD420AN-32AD420AR-32AD421BNAD421BRAD515AJHAD515ALHAD517JHAD518JHAD521JDAD524ADAD526BDAD526JNAD532JHAD534JDAD534JHAD536AJDAD536AJHAD536AJQAD537JHAD537SHAD538ADAD539JNAD542JHAD545ALHAD546JNAD547JHAD548JNAD549JHAD549LHAD5539JNAD557JNAD558JNAD568JQ AD569JN AD570JD/+ AD574AJD AD574AKD AD578KN AD580JH AD580LH AD581JH AD582KD AD584JH AD584JN AD585AQ AD586JN AD586JQ AD586KN AD586KQ AD586KR AD587KN AD587KR AD588AQ AD589JH AD590JH AD590KH AD592AN AD592BN AD595AD AD595AQ AD598AD AD600XN AD602JN AD603AQ AD606JN AD607ARS AD620AN AD621AN AD622AN AD623AN AD623AR AD624AD AD625JN AD625KN AD626AN AD627AN AD629AN AD630JNAD636JDAD636JHAD637JQAD648JNAD650JNAD650KNAD652AQAD654JNAD654JRAD660ANAD6640AST AD6644AST AD667JNAD667KNAD669ANAD670JNAD676JDAD676JNAD676KDAD677ARAD677JDAD677JNAD678JDAD678KNAD679JNAD679KNAD680JNAD684JQAD693AQAD694AQAD694JNAD698APAD7008AP20 AD7008JP-50 AD704JNAD705JNAD706JNAD707AQAD707JNAD708AQAD708JNAD7111ABN AD7111LN AD711AQAD711JNAD711JRAD712JN AD713BQ AD713JN AD720JP AD7224KN AD7226KN AD7228ABN AD722JR-16 AD7237AAN AD7237JN AD7243AN AD7245AAN AD7249BN AD724JR AD73360AR AD734AQ AD736JN AD737AQ AD737JN AD7416AR AD741KN AD743JN AD744JN AD745JN AD75019JP AD7501JN AD7502JN AD7502KQ AD7503JN AD7506JN AD7507JN AD7510DIJN AD7510DIKN AD7512DIJN AD7512DIKN AD7520LN AD7523JN AD7524JN AD7528JN AD7528KN AD7533JN AD7535JN AD7537JN AD7541AKN AD7542JN AD7543KNAD7564BN AD7574JN AD7590DIKN AD7660AST AD7664AST AD767JNAD768ARAD7701AN AD7703AN AD7703BN AD7705BN AD7705BR AD7706BN AD7707BR AD7710AN AD7711AN AD7712AN AD7713AN AD7714AN-3 AD7714AN-5 AD7715AN-5 AD7715AR-5 AD7731BN AD7741BN AD7742BN AD7750AN AD7755AARS AD7777AR AD779JDAD780ANAD781JNAD7820KN AD7821KN AD7822BN AD7824BQ AD7824KN AD7837AN AD7845JN AD7846JN AD7847AN AD7856AN AD7862AN-10 AD7864AS-1 AD7865AS-1 AD7872AN AD7874ANAD7886JD AD7886KD AD7888AR AD7890AN-10 AD7891AP-1 AD7892AN-1 AD7895AN-10 AD790JNAD795JNAD797ANAD797ARAD8001AN AD8002AN AD8009AR AD8011AN AD8015AR AD8018AR AD8031AN AD8032AN AD8036AN AD8037AN AD8041AN AD8041AR AD8042AN AD8044AN AD8047AN AD8055AR AD8056AR AD8058AR AD8079AR AD8108AST AD8109AST AD810ANAD8111AST AD8115AST AD8116AST AD811ANAD811JRAD812ANAD812ARAD8131AR AD8138AR AD813ANAD813AR-14 AD815AYAD8170ANAD817ANAD8180AN AD8184AN AD818ANAD820ANAD822ANAD822AN-3V AD823ANAD824ANAD826ANAD827AQAD827JNAD828ANAD829JNAD8307AN AD8307AR AD8309ARU AD830ANAD830ANAD8313ARM AD8313ARM AD8320ARP AD834JNAD8350AR15 AD835ANAD8402AN-10 AD8403AN100 AD840JNAD843AQAD844ANAD845JNAD845KNAD847AQAD847JNAD847SQAD849JNAD8522AN AD8551AR AD8552AR AD8561AN AD8561AR AD8564AN AD8598AN AD9042AST AD9048JQ AD9049BRSAD9051BRSAD9057BRS-40 AD9057BRS-60 AD9058JJAD9059BRSAD9066JRAD9071BRAD9101ARAD9200ARSAD9203ARUAD9220ARAD9221ARAD9223ARAD9225ARAD9226ARSAD9240ASAD9243ASAD9260ASAD9280ARSAD9281ARSAD9283BRS-100 AD9283BRS-80 AD9288BRS-80 AD9300KQAD9483KS-100 AD9500BQAD9501JNAD9617JRAD9617JNAD9618JNAD9630ANAD9631ANAD96687BQAD9698KNAD9708ARUAD9709ASTAD9713BANAD9721BRAD9731BRAD9732BRSAD9750ARAD9752ARAD9760ARAD9762ARAD9764ARAD976CNAD976AAN AD9772AST AD977AAN AD977AN AD9801JCST AD9802JST AD9803JST AD9805JS AD9816JS AD9822JR AD9830AST AD9831AST AD9832BRU AD9850BRS AD9851BRS AD9852AST AD9852ASQ AD9853AS AD9854AST AD9854ASQ AD9901KQ ADG201AKN ADG201HSJN ADG211AKN ADG222AKN ADG333ABN ADG333ABR ADG408BN ADG409BN ADG411BN ADG417BN ADG419BN ADG431BN ADG436BN ADG441BN ADG442BN ADG506AKN ADG507AKN ADG508AKN ADG508FBN ADG509AKN ADG511BN ADG608BN ADG609BN ADG719BRM ADG736BRMADM690ANADM708ANADSP21060KS160 ADSP21060CZ-160 ADSP21062KS-160 ADSP2181KS-133 ADSP2181KST-133 ADUC812BS ADVF32KNADXL105JQC ADXL202AQC AMP02FPAMP04FPDAC08CPDAC8228FPOP07AZ/883COP07CPOP07CSOP176GPOP177GPOP27GPOP291GPOP295GPOP296GPOP297GPOP297GSOP37EPOP37GPOP495GPOP497GPOP77GPOP90GPOP97FPOP97FSPKD01FPREF02CPREF03GPREF192GPREF192GSREF194GPREF195GSREF43FZSMP04EPSMP08FPSSM2141PSSM2142PSSM2211P SSM2275P TMP03FS TMP04FS TMP36GT9 MAX038CPP MAX1044CPA MAX110ACPE MAX110BCPE MAX111BCPE MAX122BCNG MAX1232CPA MAX1242BCSA MAX125CEAX MAX134CPL MAX135CPI MAX139CPL MAX140CPL MAX1480BCPI MAX1480BEPI MAX1483CPA MAX1487CPA MAX1487ECPA MAX1488ECPD MAX1489ECPD MAX148BCPP MAX1490BCPG MAX158BCPI MAX1771CPA MAX1771CSA MAX180CCPL MAX186CCPP MAX187BCPA MAX189CCPA MAX191BCNG MAX192BCPP MAX197BCNI MAX202CPE MAX202CSE MAX202ECPE MAX202EESE MAX202EPE MAX207CNG MAX208CNG MAX232CPE MAX232CSEMAX235CPG MAX238CNG MAX238ENG MAX260BCHG MAX260BENG MAX261BCNG MAX280CPA MAX291CPA MAX292CPA MAX293CPA MAX294CPA MAX297CPA MAX301CPE MAX305EPE MAX306CPI MAX3080CPD MAX3082CPA MAX308CPE MAX309CPE MAX3100CPD MAX312CPE MAX313CPE MAX318CPA MAX319CPA MAX3218CPP MAX3223CPP MAX3232CPE MAX325CPA MAX333CPP MAX338CPE MAX339CPE MAX351CPE MAX354CPE MAX354CWE MAX354EPE MAX355CPE MAX355CWE MAX366CPA MAX367CPN MAX384CPN MAX391CPE MAX400CPA MAX4016ESA MAX4100ESA MAX4101ESA MAX4106ESAMAX4142ESD MAX4146ESD MAX419CPD MAX420CPA MAX427CPA MAX435CPD MAX436CPD MAX440CPI MAX441CPP MAX442CPA MAX4456CPL MAX453EPA MAX457EPA MAX458CPL MAX468CPE MAX470CPE MAX479CPD MAX480EPA MAX483CPA MAX485CPA MAX487CPA MAX487ECPA MAX487EEPA MAX488CPA MAX490ECPA MAX491CPD MAX491ECPD MAX501AENG MAX504CPD MAX505BCNG MAX506CPP MAX509BCPE MAX512CPD MAX515CPA MAX517BCPA MAX518BCPA MAX526DCNG MAX527DCNG MAX528CPP MAX530BCNG MAX531BCPD MAX532BCPE MAX536BCWE MAX538BCPA MAX543ACPA MAX551ACPAMAX619CPA MAX6225ACPA MAX6225AESA MAX6225BCPA MAX6225BCSA MAX622CPA MAX6250BCPA MAX633ACPA MAX638AEPA MAX639CPA MAX660CPA MAX662ACPA MAX667CPA MAX691ACPE MAX691CPE MAX705CPA MAX706CPA MAX708CPA MAX708CSA-T MAX709LEPA MAX712CPE MAX712EPE MAX713CPE MAX7219CNG MAX7219ENG MAX724CCK MAX726CCK MAX729CCK MAX730ACPA MAX733CPA MAX735CPA MAX736CPD MAX738ACPA MAX738AEPA MAX739CPD MAX739CWE MAX7400CPA MAX743CPE MAX743EPE MAX749CPA MAX750ACPA MAX756CPA MAX761CPA MAX764CPA MAX765CPA MAX766EPAMAX791CPE MAX807LCPE MAX810LEUR-T MAX813LCPA MAX813LEPA MAX818LCPA MAX860ISA MAX865EUA MAX866ESA MAX874EPA MAX875BCPA MAX882CPA MAX883CPA MAX883CSA MAX907CPA MAX910CNG MAX912CPE MAX913CPA MAX931CPA MAX934CPE MXD1210CPA LFC2LFC3LFC4LFC54LFC75F003F004(5G23)F005F006F007(5G24)F010F011F1550F1490F1590F157/AF253F741(F007)F741AF747OP-07OP111AF4741F101A/201AF301AF308F110/210 F310F118/218 F441F318F124/224 F324F148F248/348 F158/258 F358F1558F4558LF791LF4136 FD37/FD38 FD46LF082 LFOP37LF3140LF7650LZ1606LZ19001 LBMZ1901 LM741LM747OP-07LM101/201 LM301LM108/208 LM308LM110LM310LM118/218 LM318LM124/224 LM324LM148LM248/348 LM158/258 LM358LM1558 OP-27CP TL062TL072TL082TL084MC1458LF147/347LF156/256/356LF107/307LF351LF353LF155/355LF157/357LM359LM381CA3080CA3100CA3130CA3140CA3240CA3193CA3401MC3303MC3403LF411LF444µpc4558MC4741LM709LM725LM733LM748ICL7650ICL7660稳压器固定输出（正电压）稳压器78xx 系列 3端稳压器 5V 到 24V1A78Lxx 系列 3端稳压器 5V 到 24V 0.1A78Mxx 系列 3端稳压器 5V 到 24V 0.5A78Sxx 系列 3端稳压器 5V 到 24V 2A固定输出（负电压）稳压器79xx 系列 3端负电压稳压器 -5V 到 -24V 1A [110kb] 79Lxx 系列 3端负电压稳压器 -5V 到 -24V 0.1A [95kb]可调输出 - 常用稳压器LM117 1.2V... 37V 1.5A 正电压可调稳压器 [100kb] LM217 1.2V... 37V 1.5A 正电压可调稳压器 [100kb] LM317 1.2V... 37V 1.5A 正电压可调稳压器 [100kb] LM137 -1.2V...-37V 1.5A 负电压可调稳压器 [246kb] LM237 -1.2V...-37V 1.5A 负电压可调稳压器 [246kb]LM337 -1.2V...-37V 1.5A 负电压可调稳压器 [246kb] LM138 1.2V --32V 5-安培 可调LM338 1.2V -- 32V 5-安培 可调LM723 高精度可调 [136kb]L200 2 A / 2.85 to 36 V.可调 [166KB]TTL 逻辑电路 [LS - HC 或 HCT 系列]74LS0074LS0474LS0874LS1074LS1374LS1474LS2774LS3074LS3274LS4274LS4574LS4774LS9074LS9274LS9374LS12174LS15474LS19274LS19374HC23774LS37474LS390CMOS 逻辑电路4001400240074011401340164017402240234025402640284029404040464051405240534055 4056 4060 4066 4067 4068 4069 4071 4072 4075 4081 4082 4093 4511 4518 4583 4584晶体管小功率管2N9302N16132N2222A 2N34392N34402N39042N39062N54012N54152N54162N55502N55512N65152N49212N49222N4923 AF125 BC107 BC108 BC109 BC148 BC177 BC178 BC179 BC182 BC183 BC184BC214BC327BC301BC302BC303BC304BC328BC337BC338BC414BC416BC461BC516BC517BC546BC547BC548BC549BC550BC556BC557BC558BC559BC560BC635BC636BC637BC638BC639BC640BCY70BCY71BCY78BCY79BCY87BCY88BCY89MPSL01 MPSL51 MPSA06 MPSA42 MPSA43 MPSA56 MPSA92 MPSA93中、大功率管2N6283 2N6284 2N6286 2N6287 BD135 BD136 BD137 BD138 BD139 BD140 BD162 BD203 BD204 BD241C BD242C BD243 BD249 BD250 BD375 BD376 BD377 BD378 BD379 BD380 BD543 BD529 BD530 BD533 BD534 BD535 BD536 BD537 BD538 BD677 BD678 BD679 BD680 BD681 BD682 BD591 BD592 BDX53C BDX54C BDW51 BU208A BU508AMJ2955MJ4502MJ15003MJ15004MJE340MJE350MJE15028MJE15029MJE15030MJE15031PMD16K100PMD17K100TIP31TIP32TIP122TIP140TIP141TIP142TIP145TIP146TIP147TIP2955TIP3055Fet 晶体管2N52482N54572N5460BS170BF245CBF256BJ210J211J212Fet 功率管2SK15302SJ201IRF540IRF9540集成电路（模拟）AD711CA3130LH0032LF351LF411LM108LM208LM833LM358LM359LM324LM391LM393NE5532NE5534OP27OP37TL071TL072TL074TL081TL082TL084TLC271TLC272TLC274MN3004IC's 功率放大 [模拟] L165LM388LM1875TDA1516BQTDA1519CTDA1563QTDA2002TDA2005TDA2004TDA2030STK4036 IISTK4036 XISTK4038 IISTK4040 IISTK4040 XISTK4042 IISTK4042 XISTK4044 IISTK4044 IISTK4046 XISTK4048 XISTK4050 V显示驱动LM3914LM3915UAA180CA3161ECA3162EICL7136PLL 立体声解码LM1800CA3090PMC1310P定时-时钟电路555556MN3101XR2206光电耦合4N254N264N274N284N354N364N37H11A1H11A2H11A3SCR - TRIAC BTY79-800RC106D时钟MM5314N二极管1N4000 系列1N41481N5408IN5236B1N5240B1N5252B电子管300B5U4G6SN76BX76DJ8ECC886N1PECC88692212AT712AU712AX7E80CCECC81ECC82ECC83ECC88EL34EL84Z2CKT88常用锁相环电路集成电路型号(规格) 数据表生产厂家器件名称参考单价兼容型号EM92600/1EMC 专用型锁相环（中国10频道）HT9286A/BHT9287A/BHOLTEK 专用型锁相环（美国10频道）HT9288A/BHOLTEK 专用型锁相环（中国10频道）HYL21011S/JHYUNDAI 通用型锁相环HYL21012S/JHYUNDAI 专用型锁相环（美国10频道）HYL21014S/JHYUNDAI 专用型锁相环（中国10频道）MC145162MOTOROLA通用型锁相环MC145166MOTOROLA专用型锁相环（美国10频道）MC145167MOTOROLA专用型锁相环（美国10频道）KS8805BGM6532LG 专用型锁相环（中国10频道）DMD5603DAEWOO专用型锁相环（中国10频道）DMD5602DAEWOO专用型锁相环（美国10频道）KA567KA567LLM567常用元器件ICL7106,ICL7107DAC0830/DAC0832ADC0831/ADC0832/ADC0834/ADC0838 ADC0808/ADC0809ADC0802/ADC0803/ADC0804AD7520/AD7521/AD7530/AD75214N35/4N36/4N37ICL7116,ICL7117ICL7650ICL7660/MAX1044ICL7106,ICL7107DAC0830/DAC0832ADC0831/ADC0832/ADC0834/ADC0838 ADC0808/ADC0809ADC0802/ADC0803/ADC0804AD7520/AD7521/AD7530/AD75214N35/4N36/4N37ICL7116,ICL7117ICL7650ICL7660/MAX1044ICL8038ICM7216ICM7226ISO2-CMOSLF351LF353LM117/LM317A/LM317LM124/LM124/LM324LM137/LM337LM139/LM239/LM339LM158/LM258/LM358LM193/LM293/LM393LM201/LM301LM231/LM331LM285/LM385LM308ALM386LM399LM431LM567/LM567CLM741LM831LM833LM8365MAX038MC1403MC1404MC1413/MC1416MC145026/MC145027/MC145028MC145403-5/8MC145406MC145407MC145583MC145740MC1488MC1489MC2833MC3362MC4558MC7800系列MC78L00系列MC78M00系列MC78T00系列MC7900系列MC79L00系列MC79M00系列Microchip PIC系列单片机RS232通讯应用MM5369MOC3009/MOC3012MOC3020/MOC3023MOC3081/MOC3082/MOC3083MOC8050MOC8111MT8870MT8888CNE5532/NE5532ANE5534/SE5534NE555/SA555NE556/SA556/SE556NE570/NE571/SA571OP07OP27OP37OP77OP90PC817/PC827/PC847PT2262PT2272SG2524/SG3524ST7537TDA1521TDA7000TTDA7010TTDA7021TTDA7040TTDA7050TL062/TL064TL071/TL072/TL074TL082/TL084 JFETTL494TL594TLP521/1-4TOP100-4TOP221-7TOP232-4TOP412/TOP414ULN2068ULN2803ULN2803/ULN2804VFC32LM319LM393/LM339经典8腿IC封装（LM393）经典14腿IC封装（LM339）电源范围 2――36V静态工作电流 0.4mA翻转时间 1.3us最大输出电流 16mA输入电压范围 －0.3V――Vcc型号功能简述功能16位 20us高性能模数转换器(民用级)16位 20us高性能模数转换器(民用级)12位 1.25MHz采样速率带宽2MHz模数转换器(民用级)12位 3MHz采样速率带宽20MHz单电源模数转换器(工业级)12位 100KHz采样速率带宽500KHz模数转换器(工业级)12位 100KHz采样速率带宽500KHz模数转换器(民用级)小型2KHz隔离放大器(民用级)卧式小型2KHz隔离放大器(民用级)立式小型5KHz隔离放大器(民用级)卧式带信号调理比率输出型温度传感器可编程温控开关电阻可编程温度控制器 SOIC数字隔离放大器可编程正弦波振荡器（工业级） PLCC16位单电源 4-20mA输出数模转换器（工业级）DIP16位单电源 4-20mA输出数模转换器（工业级）SOIC16位环路供电符合HART协议 4-20mA输出数模转换器（工业级）DIP 16位环路供电符合HART协议 4-20mA输出数模转换器（工业级）SOIC 低价格，低偏置电流，高输入阻抗运放(民用级) TO-99低价格，低偏置电流，高输入阻抗运放(民用级) TO-99低失调电压，高性能运放 (民用级) TO-99宽带，低价格运放(民用级) TO-99电阻设置增益精密仪表放大器（民用级）DIP引脚设置增益高精度仪表放大器（工业级）DIP软件编程仪表放大器（工业级）DIP软件编程仪表放大器（民用级）DIP模拟乘法器(民用级)TO-99模拟乘法器(民用级)DIP模拟乘法器(民用级)TO-99集成真有效值直流转换器(民用级)DIP集成真有效值直流转换器(民用级)TO-99集成真有效值直流转换器(民用级)DIP150KHZ集成压频转换器（民用级）TO-99150KHZ集成压频转换器（军用级）TO-99单片实时模拟乘法器（工业级）DIP宽带双通道线性乘法器（民用级）DIP低价格，低偏置电流，高输入阻抗运放(民用级) TO-99低偏置电流，高输入阻抗运放(民用级) TO-99静电计放大器（民用级）DIP低价格，低偏置电流，高输入阻抗运放(民用级) TO-99精密 BiFET输入运放（民用级）DIP低偏置电流，高输入阻抗运放(民用级) TO-99低偏置电流，高输入阻抗运放(民用级) TO-99高速运放（民用级）DIP微处理器兼容完整7位电压输出数模转换器（民用）DIP微处理器兼容完整8位电压输出数模转换器（民用）DIP12位 0.25us电流输出数模转换器（民用）DIP12位超高速电流输出数模转换器（民用）DIP16位 3us电流输出数模转换器（民用）DIP8位 25us模数转换器（民用）DIP12位 25us模数转换器（民用）DIP12位 25us模数转换器（民用）DIP12位 3us模数转换器（民用）DIP精密 2.5V电压基准源（民用级）TO-52精密 2.5V电压基准源（民用级）TO-52精密 10V电压基准源（民用级）TO-50.7us采样保持放大器（民用）DIP引脚设置输出电压基准源（民用级）TO-99引脚设置输出电压基准源（民用级）DIP3us采样保持放大器（工业级）DIP精密 5V电压基准源（民用级）DIP精密 5V电压基准源（民用级）DIP精密 5V电压基准源（民用级）DIP精密 5V电压基准源（民用级）DIP精密 5V电压基准源（民用级）SOIC精密 10V电压基准源（民用级）DIP精密 10V电压基准源（民用级）SOIC精密可编程电压基准源（工业级）DIP精密 1.235V电压基准源（民用级）H-02A—55℃～150℃测温范围温度传感器 TO-52—55℃～150℃测温范围温度传感器 TO-52低价格，精密单片温度传感器 TO-92低价格，精密单片温度传感器 TO-92K型（铬-铝）热电偶信号调节器（工业级）DIPK型（铬-铝）热电偶信号调节器（工业级）DIP线性可变位移信号调节器（LVDT）（工业级）DIP低噪声宽带可变增益双运放（民用级）DIP低噪声宽带可变增益双运放（民用级）DIP低噪声可变增益运放（工业级）DIP50MHz, 80db对数放大器（民用级）DIP低功耗混频器/AGC/RSSC 3V接收机的IF子系统（工业级） SSOP 低功耗仪表放大器（工业级）DIP低功耗仪表放大器（工业级）DIP单电源仪表放大器（工业级）DIP单电源Rail-Rail输出仪表放大器（工业级）DIP单电源Rail-Rail输出仪表放大器（工业级）SOIC精密仪表放大器（工业级）DIP可编程增益仪表放大器（民用级）DIP可编程增益仪表放大器（民用级）DIP单电源仪表放大器（工业级）DIP单电源低功耗Rail-Rail输出仪表放大器（工业级）DIP高电压抑制比差分放大器（工业级） DIP平衡跳制解调器（民用级）DIP低价格模拟乘法器（民用级）DIP高精度真有效值直流转换器（民用级）DIP高精度真有效值直流转换器（民用级）TO-99高精度真有效值直流转换器（民用级）DIP精密，BiFET输入运放（民用级）DIP1MHz，电压频率转换器（民用级）DIP1MHz，电压频率转换器（民用级）DIP2MHz，同步电压频率转换器（工业级）DIP500KHz，低价格电压频率转换器（民用级）DIP500KHz，低价格电压频率转换器（民用级）SOIC16位 8us串并行输入数模转换器（工业级）DIP12位65MSPS模数转换器(工业级) LQFP14位65MSPS模数转换器(工业级) LQFP12位 3us并行输入数模转换器（民用级）DIP12位 3us并行输入数模转换器（民用级）DIP16位 8us并行输入数模转换器（工业级）DIP单电源，内带仪表放大器电压基准源8位数模转换器（民用级）DIP16位100KSPS采样速率并行输出模数转换器（民用级）DIP16位100KSPS采样速率并行输出模数转换器（民用级）DIP16位100KSPS采样速率并行输出模数转换器（民用级）DIP16位100KSPS采样速率串行输出模数转换器（民用级）SOIC16位100KSPS采样速率串行输出模数转换器（民用级）DIP16位100KSPS采样速率串行输出模数转换器（民用级）DIP12位200KSPS采样速率并行输出模数转换器（民用级）DIP12位200KSPS采样速率并行输出模数转换器（民用级）DIP14位128KSPS采样速率并行输出模数转换器（民用级）DIP14位128KSPS采样速率并行输出模数转换器（民用级）DIP精密 2.5V电压基准源（民用级）DIP1us 四通道采样保持放大器（民用级）DIP环路供电，4～20mA输出传感器信号变送器（工业级）DIP0～2V或0～10V输入，4～20mA或0-20mA输出信号变送器（工业级）DIP 0～2V或0～10V输入，4～20mA或0-20mA输出信号变送器（民用级）DIP 通用线性可变位移信号调节器（LVDT）（工业级）PLCC带10位D/A，20MHz主频直接数字同步调制器（工业级）PLCC带10位D/A，50MHz主频直接数字同步调制器（民用级）PLCC精密四运放（民用级）DIP精密运放（民用级） DIP精密双运放（民用级） DIP精密单运放（工业级）DIP精密单运放（民用级）DIP双AD707（工业级）DIP双AD707（民用级）DIP0.37db对数数模转换器（工业级）DIP0.37db对数数模转换器（工业级）DIP精密 BiFET输入运放（工业级）DIP精密 BiFET输入运放（民用级）DIP精密 BiFET输入运放（民用级）SOIC双AD711（工业级）DIP双AD711（民用级）DIP四AD711（工业级）DIP四AD711（民用级）DIPRGB-NTSC/PAL编码器（民用级）PLCC8位 3us转换时间电压输出数模转换器（民用级）DIP8位 4通道3us转换时间电压输出数模转换器（民用级）DIP8位 8通道5us转换时间电压输出数模转换器（工业级）DIPAnalog toNTSC/PAL编码器（民用级） SOIC12位 2通道5us转换时间电压输出数模转换器（工业级）DIP12位 2通道5us转换时间电压输出数模转换器（民用级）DIP12位电压输出型数模转换器（工业级） DIP12位 10us转换时间电压输出数模转换器（工业级）DIP12位双路串行输出数模转换器（工业级） DIPAnalog toNTSC/PAL编码器（民用级） SOIC16位6通道数据采集子系统（三相电量测量IC）（工业级） SOIC10MHz带宽四象限模拟乘法器（工业级）DIP通用真有效值直流转换器（民用级）DIP通用真有效值直流转换器（工业级）DIP通用真有效值直流转换器（民用级）DIP片内带D/A 数字输出温度传感器 LM35升级品可8片级联（工业级）SOIC 通用运放（民用级）DIP低噪声，BiFET输入运放（民用级）DIP精密，双极性运放（民用级）DIP精密低噪声运放（民用级） DIP16×16音频距阵开关（民用级） PLCC8选1 CMOS多路转换器（民用级）DIP差动4选1 CMOS多路转换器（民用级）DIP差动4选1 CMOS多路转换器（民用级）DIP8选1 CMOS多路转换器（民用级）DIP16选1 CMOS多路转换器（民用级）DIP差动8选1 CMOS多路转换器（民用级）DIP四单刀单掷 CMOS介质隔离模拟开关9民用级）DIP四单刀单掷 CMOS介质隔离模拟开关9民用级）DIP双单刀双掷 CMOS介质隔离模拟开关9民用级）DIP双单刀双掷 CMOS介质隔离模拟开关9民用级）DIP10位 CMOS数模转换器（民用级）DIP8位 CMOS数模转换器（民用级）DIP8位 CMOS带锁存数模转换器（民用级）DIP8位 180ns电流输出CMOS数模转换器（民用级）DIP8位 180ns电流输出CMOS数模转换器（民用级）DIP10位 600ns电流输出CMOS数模转换器（民用级）DIP14位 1.5us电流输出CMOS数模转换器（民用级）DIP12位双路1.5us电流输出CMOS数模转换器（民用级）DIP12位 600ns电流输出CMOS数模转换器（民用级）DIP12位 250ns电流输出CMOS数模转换器（民用级）DIP12位串行输入CMOS数模转换器（民用级）DIP12位 1us电流输出CMOS数模转换器（民用级）DIP低功耗四路数模转换器（工业级） DIP8位 15us电流输出CMOS数模转换器（民用级）DIP四单刀单掷 CMOS带锁存介质隔离模拟开关9民用级）DIP16位100KSPS CMOS模数转换器（工业级） LQFP16位570KSPS CMOS模数转换器（工业级） LQFP12位高速电压输出数模转换器（民用级）DIP16位高速电流输出数模转换器（民用级）SOIC16位 ∑–△模数转换器（工业级）DIP20位 ∑–△模数转换器（工业级）DIP20位 ∑–△模数转换器（工业级）DIP16位 ∑–△模数转换器（工业级）DIP16位 ∑–△模数转换器（工业级）SOIC16位 ∑–△模数转换器（工业级）DIP16位 ∑–△模数转换器（工业级）SOIC24位 ∑–△模数转换器（工业级）DIP24位 ∑–△模数转换器（工业级）DIP24位 ∑–△模数转换器（工业级）DIP24位 ∑–△模数转换器（工业级）DIP24位 ∑–△模数转换器（工业级）DIP 3V电源24位 ∑–△模数转换器（工业级）DIP 5V电源16位 ∑–△模数转换器（工业级）DIP 5V电源16位 ∑–△模数转换器（工业级）SOIC 5V电源24位 ∑–△模数转换器（工业级）DIP单通道输入6MHz压频转换器（工业级） DIP四通道输入6MHz压频转换器（工业级） DIP两通道乘积/频率转换器电度表专用芯片（工业级）DIPIEC521/1036标准电度表专用芯片（工业级）DIP10位多路T/H子系统（工业级） SOIC14位128KSPS采样速率并行输出模数转换器（民用级）DIP2.5V或3V可选输出高精度电压基准源（工业级）DIP700ns采样保持放大器（民用级）DIP8位500KSPS采样速率模数转换器（民用级）DIP8位1MSPS采样速率模数转换器（民用级）DIP8位2MSPS采样速率模数转换器（工业级）DIP8位四通道高速模数转换器（民用级）DIP8位四通道高速模数转换器（工业级）DIP12位双路乘法数模转换器（工业级）DIP12位乘法数模转换器（民用级）DIP16位电压输出数模转换器（民用级）DIP12位双路乘法数模转换器（工业级）DIP14位8通道285KSPS采样速率模数转换器（工业级）DIP12位4通道同时采样250KSPS速率模数转换器带2SHA and 2ADCs（工业级）DIP 12位4通道同时采样147KSPS速率模数转换器（工业级）PQFP14位4通道同时采样175KSPS速率模数转换器带2SHA and 2ADCs（工业级）PQFP 14位串行输出模数转换器（工业级）DIP12位 750KSPS采样速率模数转换器（民用级）DIP12位8通道200KSPS速率模数转换器（工业级）SOIC12位单电源八通道串行采样模数转换器（工业级）DIP12位单电源八通道串并行采样模数转换器（工业级）DIP12位600KSPS采样模数转换器（工业级）DIP12位单电源200KSPS采样速率模数转换器（工业级）DIP12位四通道同时采样模数转换器（工业级）DIP12位四通道同时采样模数转换器（工业级）SOIC12位 750KSPS采样速率模数转换器（民用级）DIP高速精密比较器（民用级）DIP低偏置电流低噪声运放（民用级）DIP低失真低噪声运放（工业级）DIP低失真低噪声运放（工业级）SOIC800MHz 电流反馈运放（工业级）DIP800MHz 电流反馈双运放（工业级）DIP1GHz 4500V/us 电流反馈双运放（工业级）DIP340MHz 电流反馈运放（工业级）DIP单电源真空管前置放大器（工业级） SOIC5V Rail-Rail 大电流输出 XDSL线性驱动放大器（工业级） SOIC 单电源 Rail-Rail输入输出运放（工业级）DIP单电源 Rail-Rail输入输出双运放（工业级）DIP低失真宽带240MHz电压输出运放（工业级）DIP低失真宽带270MHz电压输出运放（工业级）DIP120MHz带宽 Rail-Rail输出运放(工业级)DIP120MHz带宽 Rail-Rail输出运放(工业级)SOIC120MHz带宽 Rail-Rail输出双运放(工业级)DIP80MHz带宽 Rail-Rail输出四运放(工业级)DIP电压反馈运放（工业级） DIP电压反馈运放（工业级） SOIC低价格 300MHz电压反馈双运放(工业级) SOIC电压反馈双运放（工业级） SOIC双通道 260MHz缓冲器(工业级) SOIC8×8视频距阵开关（工业级） LQFP8×8视频距阵开关（工业级） LQFP带电源休眠控制端的低功耗视频运放(工业级) DIP16×8视频距阵开关（工业级） LQFP16×16视频距阵开关（工业级） LQFP16×16视频距阵开关（工业级） LQFP高性能视频运放(工业级) DIP高性能视频运放(工业级) SOIC低功耗电流反馈双运放(工业级) DIP低功耗电流反馈双运放(工业级) SOIC差分输入输出电压反馈放大器（工业级） SOICIF 放大器（工业级） SOIC单电源低功耗三视频运放(工业级) DIP单电源低功耗三视频运放(工业级) SOIC大电流输出,差动输入\输出运放(工业级)2选1视频多路转换器(工业级) DIP4选1视频多路转换器(工业级) DIP高速低功耗宽电源运放(工业级) DIP差动2选1视频多路转换器(工业级) DIP4选1视频多路转换器(工业级) DIP低价格高速电压反馈视频运放(工业级) DIP单电源低功耗FET输入 Rail-Rail输出运放(工业级) DIP 双AD820(工业级) DIP双AD820(工业级) DIP 3V电源单电源 Rail-Rail输出双运放（工业级） DIP单电源 Rail-Rail输出四运放（工业级） DIP高速低功耗双运放(工业级) DIP双AD847 (工业级) DIP双AD847 (民用级) DIP双AD818(工业级) DIP高速低噪声视频运放(工业级) DIP500MHz对数放大器（工业级）DIP500MHz对数放大器（工业级）SOIC500MHz对数放大器（工业级）TSSOP高速视频差动运放(工业级) DIP高速视频差动运放(工业级) DIP2.5GHz对数放大器（工业级） RM-82.5GHz对数放大器（工业级） RM-8数字可变增益线性驱动器（工业级） RP-20500MHz带宽四象限模拟乘法器（工业级）DIP差分输入射频放大器（工业级） SOIC250MHz带宽四象限电压输出模拟乘法器（工业级）DIP2通道数字电位器阻值10K(工业级) DIP4通道数字电位器阻值100K(工业级) DIP宽带高速运放(民用级) DIP34MHz带宽高速FET输入运放(工业级) DIP2000V/us高速运放(工业级) DIP16MHz带宽高速FET输入运放(民用级) DIP16MHz带宽高速FET输入运放(民用级) DIP300V/us高速低功耗运放(工业级) DIP300V/us高速低功耗运放(民用级) DIP300V/us高速低功耗运放(军用级) DIP高速低功耗运放(民用级) DIP12 位单电源双路电流输出型数模转换器（工业级） DIP 自稳零运放（工业级） SOIC自稳零双运放（工业级） SOIC单电源比较器（工业级）DIP单电源比较器（工业级） SOIC单电源TTL/CMOS四路比较器（工业级） DIP单电源双路比较器（工业级） DIP12位41MSPS模数转换器(工业级) LQFP8位35MSPS视频模数转换器(民用级) DIP9位30MSPS模数转换器(工业级) SSOP10位40MSPS模数转换器(工业级) SOIC10位60MSPS模数转换器(工业级) SSOP8位40MSPSz视频模数转换器(工业级) SSOP8位60MSPS视频模数转换器(工业级) SSOP双路8位50MSPS视频模数转换器(民用级) LCC双路8位60MSPS视频模数转换器(工业级) SSOP双路6位60MSPS视频模数转换器(民用级) SSOP10位TTL兼容100MSPS模数转换器(工业级) SOIC7ns建立时间采样保持放大器（工业级） SOIC10位20MSPS模数转换器(工业级) SSOP10位40MSPS模数转换器(工业级) TSSOP12位10MSPS模数转换器(工业级) SOIC12位1MSPS模数转换器(工业级) SOIC12位3MSPS模数转换器(工业级) SOIC12位25MSPS模数转换器(工业级) SOIC12位65MSPS模数转换器(工业级) SSOP14位10MSPS模数转换器(工业级) MQFP14位3MSPS模数转换器(工业级) MQFP16位2.5MSPS∑–△模数转换器（工业级）MQFP单电源8位32MSPS模数转换器（工业级） SSOP单电源 8位双路32MSPS模数转换器（工业级） SSOP单电源8位100MSPS模数转换器（工业级） SSOP单电源8位80MSPS模数转换器（工业级） SSOP单电源 8位双路80MSPS模数转换器（工业级） SSOP4选1宽带视频多路转换器(民用级) DIP8位 100MSPS三视频模数转换器（民用级）MQFP数字化可编程延迟信号发生器(工业级) DIPTTL/COMS数字化可编程延迟信号发生器(民用级) DIP 1400V/us,140MHz带宽高速运放(民用级) SOIC1400V/us,140MHz带宽高速运放(民用级) DIP1800V/us,160MHz带宽高速运放(民用级) DIP低失真闭环缓冲放大器(工业级) DIP超低失真宽带电压反馈放大器(工业级) DIP高速双电压比较器(工业级) DIP高速TTL兼容双电压比较器(工业级) DIP8位100MSPS 双路数模转换器（工业级） TSSOP8位125MSPS 双路数模转换器（工业级） PQFP12位 80MSPS TTL兼容数模转换器(工业级) DIP10位 400MSPS TTL兼容数模转换器(工业级) SOIC10位 170MSPS 双电源数模转换器(工业级) SOIC10位 200MSPS 单电源数模转换器(工业级) SSOP10位125MSPS 数模转换器（工业级） SOIC12位125MSPS 数模转换器（工业级） SOIC10位100MSPS 数模转换器（工业级） SOIC12位100MSPS 数模转换器（工业级） SOIC14位100MSPS 数模转换器（工业级） SOIC16位100KSPS BiCMOS并行输出模数转换器（工业级） DIP16位100KSPS BiCMOS并行输出模数转换器（工业级） DIP16位200KSPS BiCMOS并行输出模数转换器（工业级） DIP14位300MSPS 数模转换器（工业级） LQFP16位200KSPS BiCMOS串行输出数模转换器（工业级） DIP16位100KSPS BiCMOS串行输出数模转换器（工业级） DIP10位 6MSPS CCD信号处理器（民用级）LQFP10位 6MSPS CCD信号处理器（民用级）LQFP10位 6MSPS CCD信号处理器（民用级）LQFP10位 3通道 6MSPS CCD信号处理器（民用级） MQFP12位 3通道 6MSPS CCD信号处理器（民用级） MQFP14位 3通道 12MSPS CCD信号处理器（民用级） SOIC带10位D/A，25MHz主频直接数字同步调制器（工业级）PQFP带10位D/A，50MHz主频直接数字同步调制器（工业级）PQFP带10位D/A，25MHz主频直接数字同步调制器（工业级）TSSOP带10位D/A，125MHz主频直接数字同步调制器（工业级）SSOP带10位D/A，180MHz主频直接数字同步调制器（工业级）SSOP带12位D/A，200MHz主频直接数字同步调制器（工业级）LQFP-80带散热器带12位D/A，300MHz主频直接数字同步调制器（工业级）LQFP-80数字 QPSK/16 QAM 调整器（工业级） PQFP带12位D/A，200MHz主频直接数字同步调制器（工业级）LQFP-80带散热器带12位D/A，300MHz主频直接数字同步调制器（工业级）LQFP-80线性相位探测器/频率鉴别器（民用级） DIP四单刀单掷模拟开关（民用级） DIP四单刀单掷模拟开关（民用级） DIP四单刀单掷模拟开关（民用级） DIP四单刀单掷模拟开关（民用级） DIP四单刀单掷模拟开关（工业级） DIP四单刀单掷模拟开关（工业级） SOIC8选1CMOS模拟多路转换器（工业级） DIP差动4选1CMOS模拟多路转换器（工业级） DIP四单刀单掷模拟开关（工业级） DIP单刀单掷模拟开关（工业级） DIP单刀单掷模拟开关（工业级） DIP四单刀单掷模拟开关（工业级） DIP双单刀单掷模拟开关（工业级） DIP四单刀单掷模拟开关（工业级） DIP四单刀单掷模拟开关（工业级） DIP16选1CMOS模拟多路转换器（民用级） DIP差动8选1CMOS模拟多路转换器（民用级） DIP8选1CMOS模拟多路转换器（民用级） DIP8选1CMOS带过压保护模拟多路转换器（工业级） DIP差动4选1CMOS模拟多路转换器（民用级） DIP单电源四单刀单掷模拟开关（工业级） DIP8选1CMOS模拟多路转换器（工业级） DIP差动4选1CMOS模拟多路转换器（工业级） DIP单路视频CMOS模拟开关（工业级）RM-6双路视频CMOS模拟开关（工业级）RM-10DC-DC转换器（工业级）DIP微处理器监控电路（工业级） DIP微处理器监控电路（工业级） DIP32位浮点数字信号处理器内存4M（民用级）PQFP32位浮点数字信号处理器内存4M（工业级）PQFP32位浮点数字信号处理器内存2M（民用级）PQFP16位定点数字信号处理器（民用级）PQFP-12816位定点数字信号处理器（民用级）TQFP-128带单片机、8路12位A/D、2路D/A的数采系统（工业级）PQFP 500KHz工业标准压频转换器（民用级） DIP±1g-±5g带温度补偿加速度传感器（民用级）QC-14±2g双路加速度传感器（工业级）QC-14高精度仪表放大器（工业级） DIP单电源精密仪表放大器（工业级） DIP8位高速电流输出型数模转换器（民用级） DIP8位双路电压输出型数模转换器（工业级） DIP超低失调电压运放（军用级）DIP超低失调电压运放（工业级）DIP超低失调电压运放（工业级）SOIC低失真低噪声运放（工业级）DIP高精密运放（工业级） DIP低噪声精密运放（工业级） DIP单电源 Rail-Rail输入输出双运放（工业级）DIP单电源 Rail-Rail输入输出双运放（工业级）DIP微功耗 Rail-Rail输入输出双运放（工业级）DIP超低偏置电流精密双运放（工业级） DIP超低偏置电流精密双运放（工业级） SOIC低噪声精密运放（民用级） DIP低噪声精密运放（工业级） DIP单电源 Rail-Rail输入输出四运放（工业级）DIP超低偏置电流精密四运放（工业级） DIPOP07改进型（工业级） DIP低电压微功耗精密运放（工业级） DIP微功耗精密运放（工业级） DIP微功耗精密运放（工业级） SOIC峰值检测器（工业级） DIP精密5V电压基准源带温度传感器（工业级） DIP精密低价格2.5V电压基准源（工业级） DIP低功耗大电流输出2.5V电压基准源（工业级） DIP低功耗大电流输出2.5V电压基准源（工业级） SOIC低功耗大电流输出4.5V电压基准源（工业级） DIP低功耗大电流输出5V电压基准源（工业级） SOIC高精度2.5V电压基准源（工业级）DIP7us四通道采样保持放大器（工业级） DIP7us八通道采样保持放大器（工业级） DIP差动线路接收器 Gain=0dB(工业级） DIP平衡线路驱动器（工业级） DIP差动线路接收器 Gain=-6dB(工业级） DIP1W功率差分输出音频功率放大器（工业级）DIPRail-Rail输出双音频功率放大器（工业级）DIPPWM输出，直接与微处理器接口数字输出温度传感器 SOIC反相PWM输出，直接与微处理器接口数字输出温度传感器 SOIC 电压输出温度传感器 TO-92波形发生器60KHz振荡器自举模式DC-DC 电荷泵转换器低价格双路14位串形模数转换器低价格双路14位串形模数转换器低价格14位串形模数转换器高速带采保和基准的12位模数转换器微处理器监控电路10位带2.5V基准的串形模数转换器14位2×4通道4路同时采集并行模数转换器积分型A/D转换器，+5V，3-3/4位低功率A/D转换器积分型A/D转换器积分型A/D转换器完全隔离半双RS-485接口完全隔离半双RS-485接口RS-485/RS-442接口，256个节点RS-485/RS-442接口，128个节点RS-485/RS-442接口，+15KV保护RS-232接口，+15KV保护RS-232接口，+15KV保护低功耗8路10位A/D完全隔离全双IKS-485接口高速8路8位A/D开关型DC-DC变换器开关型DC-DC变换器8路12位A/D串行接口A/D，带采保，电压基准，12位，采样速率133KHZ串行A/D，12位，采样速率75KHZ低功耗，12位单通道，串行带采保和电压基准A/D低功耗，12位单通道，带采保和电压基准A/D串行A/D，10位采样速率133M12位，八通道故障保护，带采保并行A/DRS-232接口,+5VRS-232接口＋15KV静电保护RS-232接口＋15KV静电保护，工业级RS-232接口工业级RS-232接口RS-232接口RS-232接口RS-232接口,+5VRS-232接口工业级RS-232接口RS-232接口5组收发器RS-232接口RS-232接口双路，开关电容型4阶滤波器双路，开关电容型4阶滤波器双路，开关电容型4阶滤波器单路，开关电容型5阶滤波器有源滤波器，时钟可编程有源滤波器，时钟可编程有源滤波器，时钟可编程有源滤波器，时钟可编程有源滤波器，时钟可编程模拟开关模拟开关模拟多路转换器失效保护RS-485/RS-232失效保护RS-485/RS-232模拟多路转换器模拟多路转换器通用异步收发信机（UART）模拟开关模拟开关模拟开关模拟开关RS-232接口RS-232接口RS-232接口模拟开关模拟开关模拟多路转换器模拟多路转换器模拟开关模拟多路转换器模拟多路转换器模拟多路转换器（工业级）模拟多路转换器模拟多路转换器模拟多路转换器模拟多路转换器模拟多路转换器模拟多路转换器运算放大器视频放大器视频放大器视频放大器视频放大器。

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