DS9285C-03数据手册

SPST,250 VAC,3 A（阻性负载） 机械寿命：10,000,000次以上. 电气寿命：100,000次以上.
NPN：20毫安12 VDC（带短路防护护） PNP：20毫安12 VDC（带短路防护护）
0至10 VDC： 允许负载阻抗：1kΩ分. 分辨率：约. 2600
4至20 mA：
允许负载阻抗：500
故障：10〜55赫兹,10米/秒 毁灭：10至55赫兹20米/秒
（约1G）10分钟每个在X,Y,Z方向 （约2G）,每次2小时在X,Y,Z方向
故障：200米/秒
分钟. （约20G）,每6个方向3倍
（100米/秒（约10G）施加到继电器）
毁灭：300米/秒
分钟. （30G）,各自在6个方向3倍
工作： 存储：
检查报告
数字控制器可以提供与检验报告. 请参考下面图例与后缀订货时与检验报告一起提供典范"K".
E5CK-AA1-K, E53-CKF-K
I 附件（另售）
端子盖
Name
Model E53-COV07
Model
产品规格
RS-232C RS-485 事件输入：1点 转移输出（4到20毫安）
技术指标
I 额定值
型号结构
I 型号图例
订货集模型时,请参阅以下内容.
E5CK-@@@
123 1.控制输出 1 /控制输出 2
AA：无单路输出元（现场可更换） RR：继电器/继电器 QR：脉冲（NPN）/继电器 CR：线性（4至20 mA）/继电器 VR：线性（0〜10 V）/继电器 QQ：脉冲（​NPN）/脉冲（NPN） Note: E5CK-VR1和E5CK-QQ1都无法使用,但与选项.

元器件交易网
DS3885 BTL Arbitration TransceDS3885 BTL Arbitration Transceiver
General Description
The DS3885 is one in a series of transceivers designed specifically for the implementation of high performance Futurebus a and proprietary bus interfaces The DS3885 Arbitration Transceiver is designed to conform to IEEE 1194 1 (Backplane Transceiver Logic BTL) as specified in the IEEE 896 2 Futurebus a specification The Arbitration Transceiver incorporates the competition logic internally which simplifies the implementation of a Futurebus a application by minimizing the on board logic required The DS3885 driver output configuration is an NPN open collector which allows Wired-OR connection on the bus Each driver output incorporates a Schottky diode in series with its collector to isolate the transistor output capacitance from the bus thus reducing the bus loading in the inactive state The BTL drivers also have high sink current capability to comply with the bus loading requirements defined within IEEE 1194 1 BTL specification Backplane Transceiver Logic (BTL) is a signaling standard that was invented and first introduced by National Semicon(Continued)

GENERAL DESCRIPTIONThe DS2252T secure microcontroller module is an 8051-compatible microcontroller based on nonvolatile RAM technology. It is designed for systems that need to protect memory contents from disclosure. This includes key data, sensitive algorithms, and proprietary information of all types. Like other members of the secure microcontroller family, it provides full compatibility with the 8051 instruction set, timers, serial port, and parallel I/O ports. By using NV RAM instead of ROM, the user can program, then reprogram the microcontroller while in-system. This allows frequent changing of sensitive processes with minimal effort. PIN CONFIGURATIONOperating information and detailed summary of this product’ssecurity features are contained in the Secure Microcontroller User’s Guide. This data sheet provides ordering information,pinout, and electrical specifications.FEATURES8051-Compatible Microcontroller 8, 32, or 64kbytes of Nonvolatile SRAM for Program and/or Data Memory Storage In-System Programming via On-Chip Serial Port Capable of Modifying its Own Program and/or Data Memory in the End System Firmware Security Features Memory Stored in Encrypted Form Encryption Using On-Chip 64-Bit Key Automatic True Random Key Generator Self-Destruct Input (SDI) Improved Security Over Previous Generations Protects Memory Contents from PiracyCrashproof OperationMaintains All Nonvolatile Resources Up to 10 Years in the Absence of V CC at Room Temperature Power-Fail Reset Early Warning Power-Fail Interrupt Watchdog Timer Precision Reference for Power Monitor Fully 8051 Compatible 128 Bytes Scratchpad RAM Two Timer/Counters On-Chip Serial Port 32 Parallel I/O Port Pins Permanently Powered Real-Time ClockORDERING INFORMATIONPARTRAM SIZE (kB)MAX CRYSTAL SPEED (MHz)TIMEKEEPING?DS2252T-64-16 64 16 Yes DS2252T-64-16# 64 16 Yes DS2252T-128-16 128 16 Yes DS2252T-128-16# 12816Yes# Denotes RoHS-compliant device that may contain lead exempt under the RoHS requirements.DS2252TSoft Microcontroller ModuleDETAILED DESCRIPTIONThe DS2252T provides an array of mechanisms to prevent an attacker from examining the memory. It is designed to resist all levels of threat including observation, analysis, and physical attack. As a result, a massive effort would be required to obtain any information about memory contents. Furthermore, the “Soft” nature of the DS2252T allows frequent modification of secure information. This minimizes that value of any information that is obtained.Using a security system based on the DS5002FP, the DS2252T protects the memory contents from disclosure. It loads program memory via its serial port and encrypts it in real time prior to storing it in SRAM. Once encrypted, the RAM contents and the program flow are unintelligible. The real data exists only inside the processor chip after being decrypted. Any attempt to discover the on-chip data, encryption keys, etc., results in its destruction. Extensive use of nonvolatile lithium-backed technology creates a microcontroller that retains data for over 10 years at room temperature, but which can be erased instantly if tampered with. The DS2252T even interfaces directly to external tamper protection hardware.The DS2252T provides a permanently powered real time lock with interrupts for time stamp and date. It keeps time to one hundredth of a second using its onboard 32 kHz crystal.Like other Secure Microcontrollers in the family, the DS2252T provides crashproof operation in portable systems or systems with unreliable power. These features include the ability to save the operating state, Power-fail Reset, Power-fail Interrupt, and Watchdog Timer. All nonvolatile memory and resources are maintained for over 10 years at room temperature in the absence of power.A user loads programs into the DS2252T via its on-chip Serial Bootstrap Loader. This function supervises the loading of software into NV RAM, validates it, then becomes transparent to the user. It also manages the loading of new encryption keys automatically. Software is stored in onboard CMOS SRAM. Using its internal Partitioning, the DS2252T can divide a common RAM into user selectable program and data segments. This Partition can be selected at program loading time, but can be modified anytime later. The microcontroller will decode memory access to the SRAM, access memory via its Byte-wide bus and write-protect the memory portion designated as program (ROM).DS2252T BLOCK DIAGRAM Figure 1PIN ASSIGNMENTPIN NAME PIN NAME1 P1.0 11 P1.52 V CC12 P0.4 3 P1.1 13 P1.6 4 P0.0 14 P0.55 P1.215 P1.76 P0.1 16 P0.67 P1.3 17 RST8 P0.2 18 P0.79 P1.4 19 P3.0/RXD 10 P0.3 20 SDIINSTRUCTION SETThe DS2252T executes an instruction set that is object code-compatible with the industry standard 8051 microcontroller. As a result, software development packages such as assemblers and compilers that have been written for the 8051 are compatible with the DS2252T. A complete description of the instruction set and operation are provided in the Secure Microcontroller User’s Guide.MEMORY ORGANIZATIONFigure 2 illustrates the memory map accessed by the DS2252T. The entire 64k of program and 64k of data are available to the Byte-wide bus. This preserves the I/O ports for application use. An alternate configuration allows dynamic Partitioning of a 64k space as shown in Figure 3. Any data area not mapped into the NV RAM is reached via the Expanded bus on Ports 0 and 2. Off-board program memory is not available for security reasons. Selecting PES = 1 provides access to the real-time clock as shown in Figure 4. These selections are made using Special Function Registers. The memory map and its controls are covered in detail in the Secure Microcontroller User’s Guide.DS2252T MEMORY MAP IN NON-PARTITIONABLE MODE (PM = 1) Figure 2DS2252T MEMORY MAP IN PARTITIONABLE (PM = 0) Figure 3NV RAM PROGRAM NV RAM DATAPROGRAM MEMORY DATA MEMORY (MOVX)FFFFh --0000h ---- 64KNV RAM PROGRAMNV RAM DATAPROGRAM MEMORYDATA MEMORY (MOVX)FFFFh --0000h --PARTITIONNOTE: PARTITIONABLE MODE IS NOT SUPPORTED ON THE 128KB VERSION OF THE DS2252T.LEGEND:=NV RAM MEMORY= EXPANDED BUS (PORTS 0 AND 2)=NOT AVAILABLEDS2252T MEMORY MAP WITH (PES = 1) Figure 4POWER MANAGEMENTThe DS2252T monitors V CC to provide power-fail reset, early warning power-fail interrupt, and switchover to lithium backup. It uses an internal band-gap reference in determining the switch points. These are called V PFW , V CCMIN , and V LI respectively. When V CC drops below V PFW , the DS2252T will perform an interrupt vector to location 2Bh if the power-fail warning is enabled. Full processor operation continues regardless. When power falls further to V CCMIN , the DS2252T invokes a reset state. No further code execution will be performed unless power rises back above V CCMIN . All decoded chip enables and the R/W signal go to an inactive (logic 1) state. V CC is still the power source at this time. When V CC drops further to below V LI , internal circuitry will switch to the built-in lithium cell for power. The majority of internal circuits will be disabled and the remaining nonvolatile states will be retained. The Secure Microcontroller User’s Guide has more information on this topic. The trip points V CCMIN and V PFW are listed in the electrical specifications.NV RAM PROGRAMPROGRAM MEMORY DATA MEMORY (MOVX)FFFFh --0000h --PARTITION=NOT ACCESSIBLEREAL-TIME CLOCKC000h --B000h --4000h ---- 64K-- 16KABSOLUTE MAXIMUM RATINGSVoltage Range on Any Pin Relative to Ground……………………………………...-0.3V to (V CC + 0.5V) Voltage Range on V CC Relative to Ground…………………………………………………-0.3V to +6.0V Operating Temperature Range……………………………………………………………...-40°C to +85°C Storage Temperature (Note 1)…………………………………………………………….-55°C to +125°C Soldering Temperature………………………………………………………………+260°C for 10 seconds This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.Note 1: Storage temperature is defined as the temperature of the device when V CC = 0V and V LI = 0V. In this state the contents of SRAM are not battery-backed and are undefined.DC CHARACTERISTICSDC CHARACTERISTICS (continued)(V CC = 5V ±10%, T A = 0°C to +70°C.)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESWith BAT = 3.0V 4.0 4.25Reset Trip Point in StopMode With BAT =3.3V4.4 4.65V 1SDI Input High Voltage V IHS 2.0 V CC V 1,2 SDI Input High Voltage V IHS 2.0 3.5 V 1,2 SDI Pulldown Resistor R SDI 25 60 kΩAC CHARACTERISTICS(V CC = 0V to 5V, T A = 0°C to +70°C.)PARAMETER SYMBOL MIN TYP MAX UNITS NOTES(4.5V < V CC < 5.5V) t SPR 2SDI Pulse Reject(V CC = 0V, V BAT = 2.9V) 4µs 10(4.5V < V CC < 5.5V) t SPA 10 SDI PulseAccept (VCC = 0V,V BAT = 2.9V) 50µs 10AC CHARACTERISTICS—EXPANDED BUS MODE TIMING SPECIFICATIONSEXPANDED DATA MEMORY READ CYCLEEXPANDED DATA MEMORY WRITE CYCLEAC CHARACTERISTICS—EXTERNAL CLOCK DRIVE (V CC = 5V ±10%, T A = 0°C to +70°C.)# PARAMETER SYMBOL MIN MAX UNITS At 12MHz 20 28 External Clock High Time At 16MHz t CLKHPW 15 nsAt 12MHz 2029 External Clock Low Time At 16MHz t CLKLPW 15 nsAt 12MHz 2030 External Clock Rise Time At 16MHz t CLKR 15 nsAt 12MHz20 31 External Clock Fall Time At 16MHzt CLKF15nsEXTERNAL CLOCK TIMINGAC CHARACTERISTICS—POWER CYCLE TIMING(V CC = 5V ±10%, T A = 0°C to +70°C.)# PARAMETER SYMBOL MIN MAX UNITS 32 Slew Rate from V CCMIN to 3.3V t F 130µs8)33 Crystal Startup Time t CSU (Note34 Power-On Reset Delay t POR 21,504t CLK POWER CYCLE TIMINGAC CHARACTERISTICS—SERIAL PORT TIMING: MODE 0(V CC = 5V ±10%, T A = 0°C to +70°C.)# PARAMETER SYMBOL MIN MAX UNITS35 Serial Port Clock Cycle Time t SPCLK 12t CLK µs36 Output Data Setup to Rising Clock Edge t DOCH 10t CLK - 133 ns37 Output Data Hold after Rising Clock Edge t CHDO 2t CLK - 117 ns38 Clock Rising Edge to Input Data Valid t CHDV 10t CLK - 133 nsns 39 Input Data Hold after Rising Clock Edge t CHDIV 0SERIAL PORT TIMING: MODE 0NOTES:1. All voltage referenced to ground.2. SDI should be taken to a logic high when V CC = +5V, and to approximately 3V when V CC < 3V.3. SDI is deglitched to prevent accidental destruction. The pulse must be longer than t SPR to pass thedeglitcher, but SDI is not guaranteed unless it is longer than t SPA.4. Maximum operating I CC is measured with all output pins disconnected; XTAL1 driven with t CLKR,t CLKF=10 ns, V IL = 0.5V; XTAL2 disconnected; RST = PORT0 = V CC.5. Idle mode I IDLE is measured with all output pins disconnected; XTAL1 driven with t CLKR, t CLKF = 10ns, V IL = 0.5V; XTAL2 disconnected; PORT0 = V CC, RST = V SS.6. Stop mode I STOP is measured with all output pins disconnected; PORT0 = V CC; XTAL2 notconnected; RST = XTAL1 = V SS.7. Pin capacitance is measured with a test frequency—1 MHz, T A = +25°C.8. Crystal startup time is the time required to get the mass of the crystal into vibrational motion from thetime that power is first applied to the circuit until the first clock pulse is produced by the on-chiposcillator. The user should check with the crystal vendor for a worst-case specification on this time.PACKAGE DRAWINGDIM MIN MAXA 2.645 2.655B 2.379 2.389C 0.995 1.005D 0.395 0.405E 0.245 0.255F 0.050 BSCG 0.075 0.085H 0.245 0.255I 0.950 BSCJ 0.120 0.130K 1.320 1.330L 1.445 1.455M 0.057 0.067N - 0.300O - 0.165P 0.047 0.054DATA SHEET REVISION SUMMARYThe following represent the key differences between 12/13/95 and 08/16/96 version of the DS2252T data sheet. Please review this summary carefully.1. Change V CC slew rate specification to reference 3.3V instead of V LI.2. Add minimum value to PCB thickness.The following represent the key differences between 08/16/96 and 05/28/97 version of the DS2252T data sheet. Please review this summary carefully.1. AC characteristics for battery-backed SDI pulse specification added.The following represent the key differences between 05/28/97 and 11/08/99 version of the DS2252T data sheet. Please review this summary carefully. (PCN I80903)1. Correct Absolute Maximum Ratings to reflect changes to DS5002FP microprocessor.2. Add note clarifying that SRAM contents are not defined under storage temperature conditions. The following represent the key differences between 11/08/99 and 01/18/00 version of the DS2252T data sheet. Please review this summary carefully.1. Data sheet conversion from Interleaf to Word.The following represent the key differences between 01/18/00 and 06/13/06 version of the DS2252T data sheet. Please review this summary carefully.1. Updated reference in Features (Crashproof Operation) to 10-year NV RAM data life to includeroom temperature caveat.2. Added RoHS-compliant packages to Ordering Information table.3. Replaced references to “Secure Microcontroller Data Book” with “Secure MicrocontrollerUser’s Guide.”16 of 16Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time.。

远程通讯 .................................................................... 53
将仪器连接到 PC .......................................................... 53 虚拟串口配置 ................................................................ 55 RMT 操作 ...................................................................... 55 命令协议 ....................................................................... 57
装箱单
TH2822 系列包装盒按下列清单配置： • TH2822/TH2822A/TH2822C 手持 LCR 一台 • 指导说明书（手册）一本 • Mini-USB 通讯电缆一根 • 红/黑橡胶插头-鄂鱼夹测试线一付 • 短路片一只 • *9V 碱性电池或 8.4V 充电电池一只 • *AC 电源适配器一只 • *TH26027A 开尔文测试线一付 • *TH26009C SMD 测试钳一付 • *TH26029C SMD 测试钳一付 *部分品种是选项配置，按产品实际装箱单或包装盒上
仪器上电 .................................................................... 18
安装电池 ....................................................................... 18 连接外部电源 ................................................................ 20 低电量及充电指示 ......................................................... 22