数字系统及网络 练习题 (2)
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Module 2 Tutorial
1. Find the following using binary addition and subtraction. Indicate any carry or borrow generated
(a) 0101 0001 + 0111 1010(b) 1101 0011 – 0010 1101
(c) 1001 1000 + 0000 0111(d) 0111 1101 – 1011 0010
(e) 1000 0010 + 1100 0111 (f) 0110 1101 –1100 0001
2. Express the following decimal numbers in 8 bit signed 2’s complement form.
(a) –38(b) +57(c) –12 (d) +12(e) –100(f) +60
3. Use the 2’s complement method determine the result of the following subtractions. Convert the
result back to decimal. Hint: Use 8 bit signed 2’s complement.
(a) 7 – 5(b) –7 –5(c) 60 –100(d) 57 - 38
4. Create an adder to add two 12 bit numbers using 74LS283 ICs.
5. Design a circuit for a 3 to 8 decoder.
6. Convert the following binary values to their equivalent Gray code values.
(a) 0011(b) 1000 (c) 1111
7. Convert the following Gray code values to their equivalent binary code value.
(a) 0011(b) 1000 (c) 1111
8. Using a multiplexor create a circuit for the following combinatorial expression: Z = A.B + C
9. From the following multiplexor circuit derive the corresponding combinatorial expression.
A
B
I1
I2
I3
I4
Z
VCC
10. What is the value of the parity bit to make 10101010(a) even parity(b) odd parity
11. For the RS latch sketch the output Q waveform for the following R and S inputs.
R
S
12. For the gated D latch sketch the output Q waveform for the following Enable and D inputs.
13. What is the meaning of the following terms and how are they indicated on a circuit diagram.
(a) Positive Level triggered(b) Negative Level triggered.
(c) Positive Edge triggered(d) Negative Edge triggered.
14. For the two toggle flipflops given below sketch the output waveform for the following clock input.
(a) (b)
Enable
D
JCLKKQ1J
CLK
K
Q
1
11
CLK
