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M74HC294B1R中文资料

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M54/74HC292/7292

M54/74HC294/7294

October1993PROGRAMMABLEDIVIDER/TIMER

B1R(PlasticPackage)

ORDERCODES:M54HCXXXF1RM74HCXXXM1RM74HCXXXB1RM74HCXXXC1RF1R(CeramicPackage)

M1R(MicroPackage)C1R(ChipCarrier)

PINCONNECTION(topview).

HIGHSPEED

fMAX=70MHz(TYP.)atVCC=5V.

LOWPOWERDISSIPATION

ICC=4mA(MAX.)atTA=25oC.

HIGHNOISEIMMUNITY

VNIH=VNIL=28%VCC(MIN.).

OUTPUTDRIVECAPABILITY

10LSTTLLOADS.

SYMMETRICALOUTPUTIMPEDANCE

|IOH|=IOL=4mA(MIN.).

BALANCEDPROPAGATIONDELAYS

tPLH=tPHL.

WIDEOPERATINGVOLTAGERANGE

VCC(OPR)=2VTO6V.

PINANDFUNCTIONCOMPATIBLEWITH

54/74LS292/294

DESCRIPTION

The54/74HC292/7292andHC294/7294arehigh

speedCMOSPROGRAMMABLEDIVIDER/TIMER

fabricatedwithsiliconC2MOStechnology.

Theyachievethehighspeedoperationsimilarto

equivalentLSTTLwhilemaintainingtheCMOSlowpowerdissipation.

Thesedevicesareprogrammablefrequency

dividers.Thetypeshavetwoclockinputs,eitherone

maybeusedforclockgating.(seethefunction

table).TheHC292/7292candividefrom22to231,

andtheHC294/7294candividefrom22to215.Thetypesfeatureanactive-lowclearinputtoinitialize

thestateofallflip-flops.Tofacilitateincoming

inspection,testpointsareprovided.(TP1,TP2and

TP3ontheHC292/7292andTPonthe

HC294/7294).Allinputsareequippedwith

protectioncircuitsagainststaticdischargeand

transientexcessvoltage.

HC292/294haveQoutputwith”Totempole”

configurationandtestpointTPwith”OpenDrain”outputconfiguration.

HC7292/7294havealloutputs”TotemPole”.

HC292HC7292HC294HC7294HC292HC7292HC294HC7294

1/14元器件交易网www.cecb2b.com

INPUTANDOUTPUTEQUIVALENTCIRCUIT

(TOTEMPOLEOUTPUT)

PINDESCRIPTION(HC292/7292)

PINNoSYMBOLNAMEANDFUNCTION

4,5CLK1,CLK2inputClock

1,2,10,14,15AtoEProgramInputs

3,6,13TP1,TP2,TP3TestPointOutputs

11CLRClear(ActiveLOW)

7QOutput

8GNDGround(0V)

16VCCPositiveSupplyVoltage

IECLOGICSYMBOLS

TRUTHTABLE

CLEARCLOCK1CLOCK2QOUTPUTMODE

LXXCLEAREDTOL

HLUPCOUNT

HL

HHXNOCHANGE

HXHINPUTANDOUTPUTEQUIVALENTCIRCUIT

(OPENDRAINOUTPUT,HC292/294)

PINDESCRIPTION(HC294/7294)

PINNoSYMBOLNAMEANDFUNCTION

4,5CLK1,CLK2inputClock

1,2,14,15AtoDProgramInputs

3TP1TestPointOutput

11CLRClear(ActiveLOW)

7QOutput

8GNDGround(0V)

16VCCPositiveSupplyVoltage

HC292/HC7292HC294/HC7294M54/M74HC292/7292/294/7294

2/14元器件交易网www.cecb2b.com

LOGICDIAGRAM(HC292/7292)M54/M74HC292/7292/294/7294

3/14元器件交易网www.cecb2b.com

LOGICDIAGRAM(HC294/7294)M54/M74HC292/7292/294/7294

4/14元器件交易网www.cecb2b.com

FUNCTIONTABLE(HC292/7292)

PROGRAMMINGINPUTSFREQUENCYDIVISION

QTP1TP2TP3

EDCBABINARYDECIMALBINARYDECIMALBINARYDECIMALBINARYDECIMAL

LLLLLInhibitInhibitInhibitInhibitInhibitInhibitInhibitInhibit

LLLLHInhibitInhibitInhibitInhibitInhibitInhibitInhibitInhibit

LLLHL22429512217131,07222416,777,216

LLLHH23829512217131,07222416,777,216

LLHLL241629512217131,07222416,777,216

LLHLH253229512217131,07222416,777,216

LLHHL266429512217131,07222416,777,216

LLHHH2712829512217131,07222416,777,216

LHLLL2825629512217131,072224

LHLLH2951229512217131,072224

LHLHL2101,02429512217131,0722416

LHLHH2112,04829512217131,0722416

LHHLL2124,09629512217131,0722664

LHHLH2138,19229512217131,0722664

LHHHL21416,38429512DisabledLow28256

HHHHH21532,76829512DisabledLow28256

HLLLL21665,536295122382101,024

HLLLH217131,072295122382101,024

HLLHL218262,1442951225322124,096

HLLHH219524,2882951225322124,096

HLHLL2201,048,576295122712821416,384

HLHLH2212,097,152295122712821416,384

HLHHL2224,194,304DisabledLow2951221665,536

HLHHH2238,388,608DisabledLow2951221665,536

HHLLL22416,777,2162382112,048218262,144

HHLLH22533,554,4322382112,048218262,144

HHLHL22667,108,86425322138,1922201,048,576

HHLHH227134,217,72825322138,1922201,048,576

HHHLL228268,435,4562712821532,7682224,194,304

HHHLH229536,870,9122712821532,7682224,194,304

HHHHL2301,073,741,82429512217131,07222416,777,216

HHHHH2312,147,483,64829512217131,07222416,777,216M54/M74HC292/7292/294/7294

5/14元器件交易网www.cecb2b.com

FUNCTIONTABLE(HC294/7294)

PROGRAMMINGINPUTSFREQUENCYDIVISION

QTP

DCBABINARYDECIMALBINARYDECIMAL

LLLLInhibitInhibitInhibitInhibit

LLLHInhibitInhibitInhibitInhibit

LLHL22429512

LLHH23829512

LHLL241629512

LHLH253229512

LHHL266429512

LHHH27128DisabledLow

HLLL28256224

HLLH29512238

HLHL2101,0242416

HLHH2112,0482532

HHLL2124,0962664

HHLH2138,19227128

HHHL21416,38428256

HHHH21532,76829512

ABSOLUTEMAXIMUMRATINGS

SymbolParameterValueUnit

VCCSupplyVoltage-0.5to+7V

VIDCInputVoltage-0.5toVCC+0.5V

VODCOutputVoltage-0.5toVCC+0.5V

IIKDCInputDiodeCurrent±20mA

IOKDCOutputDiodeCurrent±20mA

IODCOutputSourceSinkCurrentPerOutputPin±25mA

ICCorIGNDDCVCCorGroundCurrent±50mA

PDPowerDissipation500(*)mW

TstgStorageTemperature-65to+150oC

TLLeadTemperature(10sec)300oC

AbsoluteMaximumRatingsarethosevaluesbeyondwhichdamagetothedevicemayoccur.Functionaloperationundertheseconditionsisnotimplied.(*)500mW:≅65oCderateto300mWby10mW/oC:65oCto85oC

RECOMMENDEDOPERATINGCONDITIONS

SymbolParameterValueUnit

VCCSupplyVoltage2to6V

VIInputVoltage0toVCCV

合集下载

M54HC623B1R中文资料

M54HC623B1R中文资料

M54/74HC620

M54/74HC623

October1992HC6203STATEINVERTINGHC6233STATENONINVERTINGOCTALBUSTRANSCEIVER

B1R(PlasticPackage)

ORDERCODES:M54HCXXXF1RM74HCXXXM1RM74HCXXXB1RM74HCXXXC1RF1R(CeramicPackage)

M1R(MicroPackage)C1R(ChipCarrier)

PINCONNECTIONS(topview)

NC=NoInternalConnectionDESCRIPTION.

HIGHSPEEDtPD=10ns(TYP.)ATVCC=5V.

LOWPOWERDISSIPATIONICC=4µA(MAX.)ATTA=25°C.

HIGHNOISEIMMUNITYVNIH=VNIL=28%VCC(MIN.).

OUTPUTDRIVECAPABILITY15LSTTLLOADS.

SYMMETRICALOUTPUTIMPEDANCE|IOH|=IOL=6mA(MIN.).

BALANCEDPROPAGATIONDELAYStPLH=tPHL.

WIDEOPERATINGVOLTAGERANGEVCC(OPR)=2Vto6V.

PINANDFUNCTIONCOMPATIBLEWITHLS620/623

TheM54/74HC620/623arehighspeedCMOSOCTALBUSTRANSCEIVERSfabricatedinsilicongateC2MOStechnology.TheyhavethesamehighspeedperformanceofLSTTLcombinedwithtrueCMOSlowpowerconsumption.

Theseoctalbustransceiversaredesignedforasyn-chronoustwo-waycommunicationbetweendatabuses.Thecontrolfunctionimplementationallowsmaximumflexibilityintiming.

MM74HC11中文资料

MM74HC11中文资料

MM54HC11󰁋MM74HC11

Triple

3-Input

AND

Gate

January1988

MM54HC11󰁋MM74HC11

Triple3-InputANDGate

GeneralDescription

TheseANDgatesutilizeadvancedsilicon-gateCMOStech-

nologytoachieveoperatingspeedssimilartoLS-TTLgates

withthelowpowerconsumptionofstandardCMOSinte-

gratedcircuits󰀟Allgateshavebufferedoutputs󰀷providing

highnoiseimmunityandtheabilitytodrive10LS-TTLloads󰀟

The54HC󰁋74HClogicfamilyisfunctionallyaswellaspin-

outcompatiblewiththestandard54LS󰁋74LSlogicfamily󰀟

Allinputsareprotectedfromdamageduetostaticdis-

chargebyinternaldiodeclampstoVCCandground󰀟Features

YTypicalpropagationdelay󰀌12ns

YWidepowersupplyrange󰀌2–6V

YLowquiescentcurrent󰀌20mAmaximum(74HCSeries)

YLowinputcurrent󰀌1mAmaximum

YFanoutof10LS-TTLloads

ConnectionandLogicDiagrams

Dual-In-LinePackage

TL󰁋F󰁋5298–1TopView

OrderNumberMM54HC11orMM74HC11

TL󰁋F󰁋5298–2(1OF3GATES)

74hc541中文资料

74hc541中文资料

74HC541 8路缓冲器/线路驱动器具备74HC240所有的功能，并且把输入引脚和输出引脚分布在封装的两边，这就极大方便了印刷电路板的布线。

1.74hc541中文资料

74HC541 8路缓冲器/线路驱动器具备74HC240所有的功能，并且把输入引脚和输出引脚分布在封装的两边，这就极大方便了印刷电路板的布线。

74HC541的三态输出由一个两输入或非门控制。当任一个输出使能端（OE1或OE2）为高时，八个输出端将进入高阻态。74HC541器件的输出为原码数据。

该7HC/HCT54是八进制非反相缓冲器/线路，具有三态输出的驱动器。三态输出是由输出使能输入OE1和OE2控制。OEN高导致输出呈现高电平。阻抗呈关闭状态，“541”与“540”相同，但具有非反相输出。

2.74hc541引脚图及功能

SN74HC541能够完成两侧输入的封装和输引脚的排列与输出的功能，通俗的说，就是可以完成三态输出的八线路缓冲器和线路驱动器。

SN54HC541引脚配置和功能

OE1 ：输出使能（低电平有效）两个OE必须为低电平才能使能输出

A1：通道1输入，A2 ：通道2输入，A3：通道3输入，A4：通道4输入，A5：通道5输入，A6：通道6输入，A7：通道7输入，A8：通道8输入。

GND：【地】

Y8 ：通道8输出，Y7 ：通道7输出，Y6 ：通道6输出，Y5 ：通道5输出，Y4 ：通道4输出，Y3 ：通道3输出，Y2 ：通道2输出，Y1 ：通道1输出。

OE2 ：输出使能（低电平有效）OE必须为低电平才能使能输出。

VCC ：电源引脚

74192中文资料

74192中文资料

M54/M74HC192M54/M74HC193

October1992HC193-SYNCHRONOUSUP/DOWNBINARYCOUNTERHC192-SYNCHRONOUSUP/DOWNDECADECOUNTER

B1R(PlasticPackage)

ORDERCODES:M54HCXXXF1RM74HCXXXM1RM74HCXXXB1RM74HCXXXC1RF1R(CeramicPackage)

M1R(MicroPackage)C1R(ChipCarrier)

PINCONNECTIONS(topview)

NC=NoInternalConnectionDESCRIPTION.HIGHSPEEDfMAX=54MHz(TYP.)ATVCC=5V.LOWPOWERDISSIPATIONICC=4µA(MAX.)ATTA=25°C.HIGHNOISEIMMUNITYVNIH=VNIL=28%VCC(MIN.).OUTPUTDRIVECAPABILITY10LSTTLLOADS.SYMMETRICALOUTPUTIMPEDANCE|IOH|=IOL=4mA(MIN.).BALANCEDPROPAGATIONDELAYStPLH=tPHL.WIDEOPERATINGVOLTAGERANGEVCC(OPR)=2VTO6V.PINANDFUNCTIONCOMPATIBLEWITH54/74LS192-193

TheM54/74HC192/193areahighspeedCMOSSYN-CHRONOUSUP/DOWNDECADECOUNTERSfab-ricatedinsilicongateC2MOStechnology.TheyhavethesamehighspeedperformanceofLSTTLcombinedwithtrueCMOSlowpowerconsumption.Thecounterhastwoseparateclockinputs,anUPCOUNTinputandaDOWNCOUNTinput.Alloutputsoftheflip-floparesimultaneouslytriggeredonthelowtohightransi-tionofeitherclockwhiletheotherinputisheldhigh.Thedirectionofcountingisdeterminedbywhichinputisclocked.ThiscountermaybepresetbyenteringthedesireddataontheDATAA,DATAB,DATAC,andDATADinput.WhentheLOADinputistakenlowthedataisloadedindependentlyofeitherclockinput.Thisfeatureallowsthecounterstobeusedasdivide-by-ncountersbymodifyingthecountlengthwiththepresetinputs.Inadditionthecountercanalsobecleared.ThisisaccomplishedbyinputtingahighontheCLEARinput.All4internalstagesaresettolowindependentlyofeitherCOUNTinput.BothaBORROWandCARRYoutputareprovidedtoenablecascadingofbothupanddowncountingfunctions.TheBORROWoutputpro-ducesanegativegoingpulsewhenthecounterunder-flowsandtheCARRYoutputsapulsewhenthecounteroverflows.ThecountercanbecascadedbyconnectingtheCARRYandBORROWoutputsofonedevicetotheCOUNTUPandCOUNTDOWNinputs,respectively,ofthenextdevice.Allinputsareequippedwithprotectioncircuitsagainststaticdischargeandtransientexcessvoltage.