Under Submission
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BinuK.Mathew
SchoolofComputingmbinu@cs.utah.edu
UniversityofUtahPh:(801)809-8111
50SCentralCampusDrive,RM3190Fax:(801)581-5843
SaltLakeCity,UT84112http://www.cs.utah.edu/~mbinu/
ResearchInterests
ComputerArchitecture,Lowpowerprocessors,Powerestimationandmodeling,Perception,mediaandstreaming
architectures,VLSIdesign,CompilerandCADalgorithms,OperatingsystemsandNetworking
Education
Ph.DinComputerScience,UniversityofUtah,SaltLakeCity,UTExpectedMay2004
Dissertation:PerceptionProcessingAdvisor:Prof.AlDavis
MSinComputerScience,UniversityofUtah,SaltLakeCity,UTJanuary2000
Thesis:ParallelVectorAccess:ATechniqueforImprovingMemorySystemPerformance
ThesisAdvisors:Prof.AlDavis,Prof.SallyA.McKee
B.TechinComputerScience,UniversityofKerala,IndiaOctober1995
Thesis:DesignandImplementationofaMicro-kernelOperatingSystemThesisAdvisor:Prof.FrahadMusadeekh
Publications
Allpapersareavailableonlineathttp://www.cs.utah.edu/~mbinu/pubs/.
•ALow-PowerAcceleratorfortheSPHINX3SpeechRecognitionSystem,BINUK.MATHEW,ALDAVIS
ANDZHENFANG,InternationalConferenceonCompilers,ArchitectureandSynthesisforEmbeddedSystems
(CASES),2003
•PerceptionCoprocessorsforEmbeddedSystems,BINUK.MATHEW,ALDAVISANDALIIBRAHIM,Workshop
onEmbeddedSystemsforReal-TimeMultimedia(ESTIMedia),2003
•ACharacterizationofVisualFeatureRecognition,BINUK.MATHEW,ALDAVISANDROBERTEVANS,IEEE
6thAnnualWorkshoponWorkloadCharacterization,2003
•TheImpulseMemoryController,LIXINZHANG,ZHENFANG,MICHAELA.PARKER,BINUK.MATHEW,
LAMBERTSCHAELICKE,JOHNB.CARTER,WILSONC.HSIEH,ANDSALLYA.MCKEE,IEEETransactions
onComputers,SpecialIssueonAdvancesinHighPerformanceMemorySystems,2001
•DesignofaParallelVectorAccessUnitforSDRAMMemorySystems,BINUK.MATHEW,SALLYA.MC-
KEEANDJOHNB.CARTER,ALDAVIS,ProceedingsoftheSixthAnnualSymposiumonHighPerformance
ComputerArchitecture(HPCA),2000.
•AlgorithmicFoundationsforaaParallelVectorAccessMemorySystem,BINUK.MATHEW,SALLYA.MC-
KEEANDJOHNB.CARTER,ALDAVIS,ProceedingsoftheEleventhACMSymposiumonParallelAlgorithms
andArchitectures(SPAA),2000.
UnderSubmission
•AClusterArchitectureforEmbeddedPerception,BINUK.MATHEW,ALDAVIS,MICHAELA.PARKER.
•AnEnergyEfficientHighPerformanceScratch-padMemorySystem,BINUK.MATHEW,ALDAVIS.
BookSection
•VeryLargeInstructionWordArchitectures,inComputerEngineeringHandbook,CRCPressLLC,December
2001.
WorkinProgress
•ALowPowerEmbeddedSpeechRecognitionSystem–JointworkwithBrianDelaney,GeorgiaTech.
1of4InvitedTalks
•July2003,“StreamingArchitecturesforPerception”,CVAGroupSeminar,StanfordUniversity.
•November14,2000,“AugmentedvonNeumannProcessors”,ASPLOSIX,WCISession,Boston.
•January17,2000,“DesignofaParallelVectorAccessUnitforSDRAMMemorySystems”,HighPerformance
ComputingGroupSeminar,Departmentd’ArquitecturadeComputadors,UPC,Barcelona.
Ph.D.Research:PerceptionProcessing
Computersofthenearfutureneedtohandleefficiently,perceptionorientedworkloads,involvinglargevocabulary
speechrecognitionandcomputervision.Earlyestimatesshowthatthecomputationrequirementsofsuchworkloads
willexceed10GOPS.Evenifthehighendcomputersoftomorrowcansolvetheseproblems,bytheirverynature,
perceptiontasksaremoreusefulonmorelowendandmobileplatformsrangingfromPDAs,automobilecomputersand
informationkioskstogadgetsembeddedintoautomatedhomesandoffices.Thepowerandperformancerequirements
ofperceptionalgorithmsareordersofmagnitudebeyondthecapabilitiesoftypicalembeddedprocessors.Myresearch
focusesonthegenerationofdomainspecificstreamprocessorsthatcanacceleratetheperformanceofavarietyof
perceptionalgorithmsatlowpowerbudgets.Overasetofperceptionandstreamingbenchmarks,thestreamprocessor
delivers1.75timestheperformanceofa2.4GHzPentium4whileusingonly1/15thoftheenergyconsumedbyan
IntelXScaleembeddedprocessor.Thiscorrespondstoafactorof135improvementintheenergydelayproductwhen
comparedtoastateoftheartembeddedprocessor.Detailsareavailableonlineathttp://www.cs.utah.edu/
~mbinu/research/.
MSThesisResearch:ParallelVectorAccessMemorySystem
Base-stridevectorsarecommoninscientificcode.Idevelopedanewmathematicaltechniquetodecomposeabase
stridevectorintomultiplevectorsthatcanbeaccessedinparallelonamulti-bankmemorysystem.Thisapproachwas
implementedinthehardwareforanSDRAMmemorycontroller.Foravarietyofscientifickernelsspeedupsranging
from4to39timeswereobtained.
Skills
•VLSIdesignwithVerilog,VerilogPLIprogramming
•PowerestimationandmodelingusingSpiceandsimulators
•FPGAbasedprototyping
•Tools:
–SynopsisModuleCompiler,VCS,DesignAnalyser,Nanosim,Powercompiler,SiliconEnsemble
–HSpice,ADFMImodels,dc_shellscripting
•Programminglanguages:C,C++,Python,Lisp,MIPSandx86Assemblylanguage,Forth.
•Networkprogrammingusingsockets,TLI,STREAMS,RPC.
•OSdesignandimplementation:IndustryexperienceprogrammingtheSVR4Unixkernelandexperiencein
portingandmodifyingtheLinuxandFreeBSDkernels.ExposedtoalargevarietyofUnixvariants.Experience