Single Chip Digital Filter - MSP430

Analog and Digital Filters
Anal og Fil t ers Digital Filters
Advantages of using Digital Filter Digital filters are easily designed, tested and implemented Extremely stable with respect both to time and temperature Handle low frequency signals accurately A digital filter is programmable Digital filters are very much more versatile Hardware requirements relatively simple and compact in comparison with the equivalent analog circuitry
T
S/H
12-bit SAR + -
1.5 or 2.5V Software Timer_A Timer_B
Channel
Ref 16 x 8 Input Ref Control
CONSEQx
16 x 12 Memory Buffer
12-bits DACs + DMA Completes SCoC
Single Chip Digital Filter MSP430
Gurjit Singh, Gill Instruments Bangalore
8th Texas Instruments Developer Conference India 30 Nov - 1 Dec 2005, Bangalore
Order Of Filter & Coefficients
Order of a digital filter
• The order of a digital filter is the number of previous inputs (stored in the processor's memory) used to calculate the current output. • Filters may be of any order from zero upwards.
Software Timer_A Timer_B Group Load
• Two 12-bit DACs • Three DMA Channels
DMAREQ Timer_A Timer_B USART0 USART1 DAC12 ADC12 MPY DMA2 External
DAC12_0 DAC12_1
MSP430- looks like a Elephant
Feels Like a Butterfly
Why MSP430 ?
Flexible and Fast Clock System
MSP430F1132 Glass Break Detector
Why Ultra-low Power is required
43
0F
16
100
9
kHz
Man Machine Interface
MSP430 Instruction Set
Mnemonic • • • • • • • • • • • • • • • • • • • ADC(.B) ADD(.B) ADDC(.B) AND(.B) BIC(.B) BIS(.B) BIT(.B) BR CALL CLR(.B) CLRC CLRN CLRZ CMP(.B) DADC(.B) DADD(.B) DEC(.B) DECD(.B) DINT dst src,dst src,dst src,dst src,dst src,dst src,dst dst dst dst Description Add C to destination Add source to destination Add source and C to destination AND source and destination Clear bits in destination . Set bits in destination Test bits in destination Branch to destination Call destination Clear destination Clear C Clear N Clear Z Compare source and destination Add C decimally to destination Add source and C decimally to dst. Decrement destination Double-decrement destination Disable interrupts
How Digital Filter Works
The analog input signal must first be sampled and digitized using an ADC The resulting binary numbers, representing successive sampled values of the input signal, are transferred to the processor, which carries out numerical calculations on them. These calculations typically involve multiplying the input values by constants and adding the products together. If necessary, the results of these calculations, which now represent sampled values of the filtered signal, are output through a DAC to convert the signal back to analog form.
Digital filter coefficients
All of the digital filter examples given above can be written in the following ger expressions can be developed for filters of any order. The constants a0, a1, a2, ... appearing in these expressions are called the filter coefficients. It is the values of these coefficients that determine the characteristics of a particular filter.
MSP430 Instruction Set
• • • • • • • • • • • • • • • RETI RLA(.B) dst RLC(.B) dst RRA(.B) dst RRC(.B) dst SBC(.B) dst SETC SET SETZ SUB(.B) src,dst SUBC(.B) src,dst SWPB dst SXT dst TST(.B) dst XOR(.B) src,dst Return from interrupt Rotate left arithmetically Rotate left through C Rotate right arithmetically Rotate right through Subtract not(C) from destination Set C Set N Set Z Subtract source from destination Subtract source and not (C) from dst. Swap bytes Extend sign Test destination Exclusive OR source and destination
DMA0 Complete Address Space
DMA1
DMA2 2 MCLK
DMA Increases Performance 25x
MSP430F169
Fully Automatic
ADC DMA DAC
M
SP
“MCU”
100%
“MCU” MIPS MIPS
ADC SPI SPI DAC
Modern Orthogonal 16-Bit RISC CPU
Unified Memory Map
Password Protected Flash !
Precision Operational Amplifiers
High Performance 12-bit ADC
• 12-bit monotonic • 200ksps+ • Single sequence repeat-single repeat-sequence CPU-free data-handling
src,dst dst src,dst dst dst
MSP430 Instruction Set
• • • • • • • • • • • • • • • • • EINT INC(.B) INCD(.B) INV(.B) JC/JHS JEQ/JZ JGE JL JMP JN JNC/JLO JNE/JNZ MOV(.B) NOP POP(.B) PUSH(.B) RET dst dst dst label label label label label label label label src,dst dst src Enable interrupts Increment destination Double-increment destination Invert destination Jump if C set/Jump if higher or same Jump if equal/Jump if Z set Jump if greater or equal Jump if less Jump PC + 2 x offset Jump if N set Jump if C not set/Jump if lower Jump if not equal/Jump if Z not set Move source to destination No operation Pop item from stack to destination Push source onto stack Return from subroutine