Compressible area fill synthesis

  • 格式:pdf
  • 大小:1.08 MB
  • 文档页数:19

IEEETRANSACTIONSONCOMPUTER-AIDEDDESIGNOFINTEGRATEDCIRCUITSANDSYSTEMS,VOL.24,NO.8,AUGUST20051169CompressibleAreaFillSynthesis

YuChen,AndrewB.Kahng,GabrielRobins,Member,IEEE,AlexanderZelikovsky,andYuhongZheng

Abstract—ControlofvariabilityandperformanceinthebackendoftheVLSImanufacturinglinehasbecomeextremelydifficultwiththeintroductionofnewmaterialssuchascopperandlow-kdielectrics.Toimprovemanufacturability,andinparticulartoen-ablemoreuniformchemical–mechanicalplanarization(CMP),itisnecessarytoinsertareafillfeaturesintolow-densitylayoutre-gions.Becauseareafillfeaturesizesareverysmallcomparedtothelargeemptylayoutareasthatneedtobefilled,thefillingprocesscanincreasethesizeoftheresultinglayoutdatafilebyanorderofmagnitudeormore.Toreducefiletransfertimes,andtoaccom-modatefuturemasklesslithographyregimes,datacompressionbe-comesasignificantrequirementforfillsynthesis.Inthispaper,wemakethefollowingcontributions.First,wedefinetwocom-plementarystrategiesforfilldatavolumereductioncorrespondingtotwodifferentpointsinthedesign-to-manufacturingflow:com-pressiblefillingandpost-fillcompression.Second,wecomparecom-pressiblefillingmethodsinthefixed-dissectionregimewhentwodifferentsetsofcompressionoperatorsareused:thetraditionalGDSIIarrayreference(AREF)construct,andthenewOpenArt-workSystemInterchangeStandard(OASIS)repetitions.Weapplygreedytechniquestofindpracticalcompressiblefillingsolutionsandcomparethemwithoptimalintegerlinearprogrammingsolu-tions.Third,forthepost-filldatacompressionproblem,weproposetwogreedyheuristics,anexhaustivesearch-basedmethod,andasmartspatialregularitysearchtechnique.WeutilizeanoptimalbipartitematchingalgorithmtoapplyOASISrepetitionoperatorstoirregularfillpatterns.Ourexperimentalresultsindicatethatbothfilldatacompressionmethodologiescanachievesignificantdatacompressionratios,andthattheyoutperformindustrytoolssuchasCalibreV8.8fromMentorGraphics.OurexperimentsalsohighlighttheadvantagesofthenewOASIScompressionoperatorsovertheGDSIIAREFconstruct.

IndexTerms—Dummyfill,filldatacompression,GDSIIAREF,greedymethod,OASISrepetitions,VLSImanufacturability.

I.INTRODUCTIONANDBACKGROUND

CHEMICAL–MECHANICALplanarization(CMP)and

othermanufacturingstepsinnanometer-scaleVLSIpro-cesseshavevaryingeffectsondeviceandinterconnectfeatures,

ManuscriptreceivedApril29,2003;revisedFebruary6,2004.ThisworkwassupportedbyaPackardFoundationFellowship,bytheMARCOGigascaleSiliconResearchCenter,byaNationalScienceFoundation(NSF)YoungIn-vestigatorAwardMIP-9457412,byNSFGrantCCR-9988331,andbyagrantfromCadenceDesignSystems,Inc.ThispaperwasrecommendedbyAssociateEditorT.Yoshimura.Y.ChenwaswiththeDepartmentofComputerScience,UniversityofCali-fornia,LosAngeles,CA90095-1596USA.HeisnowwithBlaze-DFM,Inc.,Sunnyvale,CA94089USA(e-mail:yuchen@blaze-dfm.com).A.B.KahngiswiththeDepartmentofComputerScienceandEngineering,andDepartmentofElectricalandComputerEngineering,UniversityofCali-forniaatSanDiego,LaJolla,CA92093-0114USA(e-mail:abk@ucsd.edu).G.RobinsiswiththeDepartmentofComputerScience,UniversityofVir-ginia,Charlottesville,VA22903-2442USA(e-mail:robins@cs.virginia.edu).A.ZelikovskyiswiththeDepartmentofComputerScience,GeorgiaStateUniversity,Atlanta,GA30303USA(e-mail:alexz@cs.gsu.edu).Y.ZhengiswiththeDepartmentofComputerScience,UniversityofCaliforniaatSanDiego,LaJolla,CA92093-0114USA(e-mail:yzheng@cs.ucsd.edu).DigitalObjectIdentifier10.1109/TCAD.2005.850859

dependingonthelocalcharacteristicsofthelayout.Toimprovemanufacturabilityandperformancepredictability,foundryrulesrequirethatalayoutbemadeuniformwithrespecttoprescribeddensitycriteria,throughtheinsertionofareafillfeatures.Currently,areafillisaddedbyphysicalverificationtools(suchasMentorGraphics’Calibre)intheformofaflat“targetlayer”[26],whichiseventuallymergedwiththeactuallayoutfeaturesatthemaskdatapreparationstepofthemanufacturinghandoff.InterconnectlayersaboveM1havelittlenaturalhierarchythatcanbeexploited,andcontextsforinstantiationsofIPblocksmaybedifferent;thistypicallyleadstoaflatfillingsolution.Accordingtothe2002InternationalTechnologyRoadmapforSemiconductors[20],thefractured(MEBESformat)layoutdatavolumeforasinglecriticallayerwillreachhundredsofgigabytesduringthetransitionbetween130nmand90nmtechnologies[2].Toalleviatefiletransfertimes,andtoaccommodatefutureregimesofmasklesslithog-raphy(e.g.,direct-writerequirestransferofterabytesoflayoutdatapersecond1),layoutdatamustbecompressedasmuchas

possible(requiredcompressionfactorshavebeenestimatedat20ormore[15]).Thebasicareafillfeatureistypicallythesameacrosstheen-tirelayout(withthemostcommonfillshapebeingsquareorrectangular).Moreover,fillingpatternsexhibitahighdegreeofspatialregularityacrossthelayout[22].Areafillfeaturedimen-sionsscalewiththeunderlyingtechnology,sincemicroloadingandothermechanismsofprocessvariabilityareexacerbatedbylargevariationsinfeaturedimensions.Thus,thenumberoffillfeaturesperlayerisexpectedtoscaleatapproximately2pertechnologynode(ignoringtheimpactofreticleenhancementtechniquessuchasOPC).ThefillingprocesstendstoincreasethesizeofaGDSIIfilebyanorderofmagnitude,duetothesmallsizeoftheareafillfeaturesrelativetothelargeemptylayoutareasthatmustbefilled.2Higherdatavolumesleadto