rfic-lecture7-0

ITEM CONTENTS UNIT LCD Type TFT/Transmissive/Normally Black/IPS / Size 7.0 Inch Viewing Direction Free / Outside Dimensions (W x H x D) 181.60 x 100.60 x 17.75 mm Active Area (W x H) 154.21 x 85.92 mm Pixel Pitch (W x H) 0.1506 x 0.1432 mm Resolution 1024 x 600 / Brightness 1000 cd/m 2 Color Depth 16.7 M / Pixel Arrangement RGB Vertical Stripe / Driver IC of Board STM32H747XIH6 / External SDRAM 64Mbit (32-bit access) / External Flash Memory 512Mbit / Supply Voltage for Module 6.0 - 36.0 V With/Without Touch Without Touch Panel / Weight TBD g STM32 EMBEDDED 7.0" DISPLAY DATASHEET RVT70HSSFWN00 Rev.0.1 2022-03-28 F T M O D U L E S P E C I F I C A T I O N Note 1: RoHS3 compliant Note 2: LCM weight tolerance: ± 5%.REVISION RECORDREV NO. REV DATE CONTENTS REMARKS0.1 2022-03-28 Preliminary versionCONTENTSREVISION RECORD (2)CONTENTS (3)MODULE CLASSIFICATION INFORMATION (4)ASSEMBLY GUIDE (5)MODULE DRAWING (6)ABSOLUTE MAXIMUM RATINGS (7)ELECTRICAL CHARACTERISTICS (7)BACKLIGHT ELECTRICAL CHARACTERISTICS (7)ELECTRO-OPTICAL CHARACTERISTICS (8)BOARD INTERFACES AND CONNECTORS (10)USER INTERFACES (16)DISPLAY SEPCIFICATION (17)INSPECTION (17)RELIABILITY TEST (19)LEGAL INFORMATION (20)MODULE CLASSIFICATION INFORMATIONRV T 70 H S S F W N 00 1. 2. 3. 4. 5. 6. 7. 8. 9. 10.ASSEMBLY GUIDEMounting frameFor dimensions 3.5”, 4.3”, 5.0”, 7.0” and 10.1”, the product with mounting frame version is available. Thanks to the four catches attached to the side, frame provides strong assembly to the surface by mounting element (like the screw, see Figure 1). The frames are specially designed to fit Riverdi products perfectly. The diameter of the mounting hole is 3.5mm.Figure 1. Mounting frameABSOLUTE MAXIMUM RATINGSPARAMETER SYMBOL MIN MAX UNIT NOTESupply Voltage for Module VDD 0.0 48.0V Note 1Digital I/O signals Voltage - -0.5 3.3 Note 1,2Operating Temperature T OP-20 70 °CStorage Temperature T ST-30 80 °CStorage Humidity (@ 25 ± 5°C) H ST10 - % RHOperating Ambient Humidity (@ 25 ± 5°C) H OP10 - % RHNote 1. Exceeding maximum values may cause improper operation or permanent damageto the unit.Note 2. Most of the GPIOs have the 5.0 V tolerant input voltage, please refer to the datasheetof STM32H747XIH6 for more details.ELECTRICAL CHARACTERISTICSPARAMETER SYMBOL MIN TYP MAX UNIT Supply Voltage for Module VDD_IN 6.0 12.0 36.0 VPOWER‘ENABLE’ = ‘0’***************************I VDD_IN=6.0 V TBD TBD TBD uA ****************************I VDD_IN=12.0 V TBD TBD TBD uA ****************************I VDD_IN=24.0 V TBD TBD TBD uA ****************************I VDD_IN=36.0 V TBD TBD TBD uAPOWER‘ENABLE’ = ‘1’***************************I VDD_IN=6.0 V TBD TBD TBD mA ****************************I VDD_IN=12.0 V TBD TBD TBD mA ****************************I VDD_IN=24.0 V TBD TBD TBD mA ****************************I VDD_IN=36.0 V TBD TBD TBD mAInput Voltage “H” Level V IH 2.0 - 3.3 V Input Voltage “L” Level V IL 0 - 0.8 V Note. POWER ‘ENABLE’ refers to pin 4, ‘ENABLE’ of the power input connector(P2).By default, POWER ‘ENABLE’ = ‘1’,When POWER ‘ENABLE’ = ‘0’, the device is turned off.BACKLIGHT ELECTRICAL CHARACTERISTICSPARAMETER SYMBOL MIN TYP MAX UNIT NOTE Lifetime - - 50,000 - hours Note 1Note 1. Operating life means the period in which the LED brightness goes down to 50% ofthe initial brightness. Typical operating lifetime is the estimated parameter.ELECTRO-OPTICAL CHARACTERISTICSITEM SYMBOL CONDITION MIN TYP MAX UNIT RMK NOTEResponse Time Tr+Tfθ=0°∅=0° - 35 35 ms FIG 2. 4Contrast Ratio Cr 800 1000 - --- FIG 3. 1 Luminance δ- 75 - % FIG 3. 3 Figure 3.Contrast Ratio =Average Surface Luminance with all white pixels (P1,P2,P3,P4,P5) Average Surface Luminance with all black pixels (P1,P2,P3,P4,P5)Note 2.Surface luminance is the LCD surface from the surface with all pixels displaying white. For more information see Figure 3.Lv = Average Surface Luminance with all white pixels (P1, P2, P3, P4, P5)Note 3.The uniformity in surface luminance δWHITE is determined by measuring luminance at each test position 1 through 5, and then dividing the minimum luminance of 5 points luminance by maximum luminance of 5 points luminance. For more information see Figure 3.δ WHITE =Minimum Surface Luminance with all white pixels (P1,P2,P3,P4,P5) Maximum Surface Luminance with all white pixels (P1,P2,P3,P4,P5)Note 4. Response time is the time required for the display to transition from white to black (Rise Time, Tr) and from black to white (Decay Time, Tf). For additional information see Figure 2. The test equipment is Autronic-Melchers’s ConoScope series.Note 5. CIE (x, y) chromaticity, the x, y value is determined by measuring luminance at each test position 1 through 5, and then calculating the average value.Note 6. Viewing angle is the angle at which the contrast ratio is greater than 2. For TFT module the contrast ratio is greater than 10. The angles are determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which is normal to LCD surface. For more information see Figure 4.Note 7. For viewing angle and response time testing, the testing data is based on Autronic-Melchers’s ConoScope series. Instruments for Contrast Ratio, Surface Luminance, Luminance Uniformity, CIE the test data is based on TOPCON’s BM-5 photo detector.Figure 2. The definition of response timeFigure 3. Measuring method for Contrast ratio, surface luminance, Luminance uniformity, CIE (x, y) chromaticityA: 5mmB: 5mmH, V: Active AreaLight spot size ∅=5mm, 500mm distancefrom the LCD surface to detector lens.Measurement instrument is TOPCON’Sluminance meter BM-5Figure 4. The definition of viewing angleBOARD INTERFACES AND CONNECTORSPower input connectorThe 1.25mm, 6-pin Molex connector labeled as “POWER’ (P2) is power input connector. There is an internal reverse polarity protection which ensures that the device is not damaged if the power supply polarity is reversed.NO. PIN DESCRIPTION NOTE1 VDD_IN Power supply input; 6.0-36.0VNote 12 VDD_IN Power supply input; 6.0-36.0V3 VDD_IN Power supply input; 6.0-36.0V4 ENABLE Enable/ Disable power supply. Note 25 GND Ground6 GND GroundNote 1: STM32 Embedded Display allows to directly connect one additional display to the system. There is RiBUS connector on the board where you can connect any of intelligent display from Riverdi based on EVE4 (BT817Q). However, please note that it may change power supply requirement as below:The power supply voltage must range between 7.0V- 14.0 V (TYP. 9.0 V), if Riverdi EVE4 10.1” series display is connected through RiBUS. At the same time, jumper P5 shall be configured according to subchapter 10.8, note 1.The power supply voltage ranges between 6.0 V- 36.0V if any of Riverdi EVE4 3.5”,4.3”,5.0” and 7.0” series display is connected through RiBUS. At the same time, jumper P12 shall be configured according to subchapter 10.8, note 1.Note 2: By default, pin “ENABLE” is pulled up to VDD and enabled. To disable, ground the pin to turn off the device completely.USB interfaceThe 1.25mm, 5-pin Molex connector labeled as “USB’ (P10) is USB interface.NO. PIN DESCRIPTION NOTE1 VCC_USB Power supply2 D- USB data-3 D+ USB data+4 ID USB OTG ID; Host /Device detect Note 15 GND GroundNote 1. Configuration of the USB Host/Device mode:Host Mode: Pin 4 (ID) should be connected to GND.In this mode, it can provide +5V output voltage to the connected USB device and Max output current 500 mA.Device Mode: Pin 4 (ID) should be not connected (floating).RS485 interfaceThe 1.25mm, 4-pin Molex connector labeled as “RS485’ (P3) is RS485 interface.NO. PIN DESCRIPTION NOTE1 VDD_IN Power supply input; 6.0-36.0V2 A Non-inverting receiver input and non-inverting driver output3 B Inverting receiver input and inverting driver output4 GND GroundRS232 interfaceThe 1.25mm, 5-pin Molex connector labeled as “RS232’ (P1) is RS232 interface.NO. PIN DESCRIPTION NOTE1 RTS Request to send2 CTS Clear to send3 TXD Transmit Data4 RXD Receive Data5 GND Ground2 x CAN FD interfacesThe main board supports 2 channels of the CANFD (Control Area Network Flexible Data-Rate) communication bus, based on the high-speed (2.5-8.0Mbps) CAN transceiver.2 pcs of 1.25mm, 4-pin Molex connectors labeled as “CAN1’ (P11) and “CAN2” (P15) are respectively interfaces of CAN FD1 and CAN FD2.NO. PIN DESCRIPTION NOTE1 GND Ground2 CAN_L CAN Low-Level Voltage3 CAN_H CAN High-Level Voltage4 VDD_IN Power supply input; 6.0 – 36.0 VHaptic feedback connectorThe 1.25mm, 2-pin Molex connector labeled as “HAPTIC’ (P7) is haptic feedback connector. Haptic feedback P7 is used to connect with the haptic motor directly.NO. PIN DESCRIPTION NOTE1 OUT- Negative haptic driver differential outputNote 12 OUT+ Positive haptic driver differential outputNote 1: The haptic driver DRV2605L is controlled directly by I2C protocolSWD (Serial Wire Debug) connectorThe 1.25mm, 6-pin Molex connector labeled as ‘SWD’ (P6) is SWD interface, which is used for programing the MCU on board.NO. PIN DESCRIPTION NOTE1 VCC_+3.3V Power input2 SW_CLK Serial wire clock3 GND Ground4 SW_DIO Serial wire debug data input/output5 RST Reset; Active low6 SWO Serial wire trace outputRiBUSAny size of the Riverdi EVE4 series display can be connected through RiBUS to act as a slave module to the mainboard.NO. PIN DESCRIPTION NOTE1 VCC_+3.3V Supply voltage for module; TYP3.3Vbetween 7.0 - 14.0V (TYP. 9V).For Riverdi EVE4 series display ranging from sizes of 3.5” to 7.0”, the backlight voltage (BLVDD) shall be 5.0V.Backlight jumper selectors, P5 and P12, labeled as “BLVDD SEL EXT”and “BLVDD SEL INT are used to configure the backlight voltage range.Warning! Jumper configuration shall be done when module is not powered.DO NOT change ANY jumpers while the module has power. Improper operation might cause permanent damage to the unit.Please pay special attention to not misplace the jumpers. Incorrect jumpers setting may lead to damage to the module as well.The P5, P12 jumpers setting are shown below.Table 1. Internal backlight selector P12 setting: 5.0V (default) backlight voltageSETTING P5, PIN 1 &2P5, PIN 3 &4P12, PIN 1 &2P12, PIN 3 &45.0V (Default) Open Open Short ShortTable 2. External backlight selector P5 setting: 7.0V-14.0V backlight voltageSETTING P5, PIN 1 &2P5, PIN 3 &4P12, PIN 1 &2P12, PIN 3 &47.0V - 14.0 V Short Short Open OpenExpansion connectorThe main board has one 1.27mm, 40-pin expansion pin header which is labeled as “EXPANSION CONNECTOR’ (P8).It provides direct access to below GPIOs of MCU STM32H747XIH6,which make it possible to easily extend a daughterboard for a specific application.• 2 x I2C• 1 x UART• 1 x USART• 1 x SPI• 1 x USB•7 x PWMs• 2 x DACs (Digital-to-analog)• 2 x ADCs (Analog-to-digital)Each of the GPIO pins can be configured by software as output (push-pull or open-drain, with or without pull-up or pull-down), as input (floating, with or without pull-up or pull-down) or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog alternate functions. Please refer to the datasheet of MCU STM32H747XIH6 for more details.I/O/P PIN NAME NO. NO. PIN NAME I/O/PP VCC_+5V 1 2 VCC_+3.3V PP VCC_+5V 3 4 VCC_+3.3V PI/O PA5 5 6 GND PP GND 7 8 PA4 I/OI/O PE4 9 10 PD11 I/OI/O PK1 11 12 PB10 I/OI/O PD12 13 14 PC7 I/OI/O PD13 15 16 PA3 I/OP GND 17 18 GND PI/O PC2 19 20 PA0_C I/OI/O PC3 21 22 PA1_C I/OI/O PA12 23 24 PC2_C I/OI/O PA9 25 26 PC3_C I/OI/O PA10 27 28 GND PI/O PJ8 29 30 PC13 I/OI/O P18 31 32 PA8 I/OI/O PJ10 33 34 PB11 I/OI/O PB0 35 36 PH4 I/OI/O PC6 37 38 PB12 I/OI/O PB14 39 40 PB15 I/ONote 1. ***************************from pin 1 and pin3 is maximum 1A.********************************************************.Note 2.The ‘USR LED’ is connected to pin 33, PJ10, of the expansion connector.By default, the resistor R60, (0402, 1k ohms) is soldered. Please remove R60 to useGPIO channel PJ10.Note 3. Push button BTN2(S2) is connected to pin 35, PB0, of the expansion connector. Please remove R58 to use GPIO channel PB0.Push button BTN1(S1) is connected to pin 37, PC6, of the expansion connector.Please remove R57 to use GPIO channel PC6.Micro SD slotThe mainboard is equipped with Micro-SD slot, which supports all types of Micro SD cards.2 x 20-pin, 1.27 mm pin sockets for POE Add-on BoardThe 2 x 20-pin, 1.27 mm, pin sockets, labeled as U9a and U9b, are used to connect the Riverdi POE Add-on Board.The Riverdi POE Add-on Board features 10/100M Ethernet Port with Power-Over-Ethernet enabled. It allows you to power the module through the Ethernet port.Note. The Riverdi POE Add-on Board is offered as an accessory.USER INTERFACES3 x push buttonsPush button labeled as “RST” is used to “RESET” the module.Another 2 push buttons labeled as BTN1, BTN2 are for user’s development.•BTN1(S1) is connected to pin 37, PC6, of the expansion connector.•BTN2(S2) is connected to pin 35, PB0, of the expansion connector.By default, pushbuttons BTN1(S1), BTN2(S2) are enabled. To use GPIO channel PC6 and PB0, R57 and R58 should be removed.3 x LEDs1 x LED, labeled as ‘PWR LED’, emits green light when the modules is powered.1 x LED, labeled as ‘USB OVR’, emits red light when VCC_USB pin is shorted.1 x LED, labeled as ‘USR LED’, is for user’s development.•The ‘USR LED’ is connected to pin 33, PJ10, of the expansion connector.By default, the resistor R60, (0402, 1k ohms) is soldered. Please remove R60 to use GPIO channel PJ10.D ISPLAY SEPCIFICATIONTFT resolutionThe supported resolution of the display in this module is 1024*600.Full TFT specificationFor detailed information on the display, please refer to datasheet of displayRVT70HSMFWN00.I NSPECTIONStandard acceptance/rejection criteria for TFT moduleInspection conditionAmbient conditions:•Temperature: 25 ± 2°C•Humidity: (60 ± 10) %RH•Illumination: Single fluorescent lamp non-directive (300 to 700 lux) Viewing distance: 35 ± 5cm between inspector bare eye and LCD.Viewing Angle: U/D: 45°/45°, L/R: 45°/45°Inspection standardITEM CRITERIONBlack spots,white spots,light leakage,Foreign Particle(round Type)D=(x+y)/2Spot’s density: 10 mmSize = 7”Average Diameter Qualified QtyD ≤ 0.2 mm Ignored0.2 mm < D ≤ 0.3 mm N≤30.5mm < D Not allowed 0.5mm < DLCD black spots, white spots, light leakage (line Type)Size = 7”Length Width Qualified Qty - W ≤ 0.05IgnoredL ≤ 5.00.05 < W ≤ 0.1 35.0 < L 0.1 < W Not allowedBright/Dark DotsSize = 7”Item Qualified Qty Bright dots N≤2Dark dots N≤3 Total bright and dark dots N≤4Clear spotsSize = 7”Average Diameter Qualified QtyD < 0.2 mm Ignored0.2 mm < D < 0.3 mm 40.3 mm < D < 0.5 mm 20.5 mm < D 0Polarizer bubblesSize = 7”Average Diameter Qualified QtyD ≤ 0.2 mm Ignored0.2 mm < D ≤ 0.5 mm 40.5 mm < D 0Touch panel spotSize ≥ 5"Average Diameter Qualified QtyD < 0.25 mm Ignored0.25 mm < D < 0.5 mm 40.5 mm < D 0Touch panel White line ScratchSize ≥ 5’’Length Width Qualified Qty - W < 0.03 IgnoredL < 5.0 0.03 < W < 0.05 2- 0.05 < W 0RELIABILITY TESTNO.TEST ITEMTEST CONDITIONNOTE1 High Temperature Storage 80°C/120 hoursNote 12 Low Temperature Storage -30°C/120 hours3 High Temperature Operating 70 °C /120 hours Note 2. Before cosmetic and function test, the product must have enough recovery time, at least 2 hours at room temperature.L EGAL INFORMATIONRiverdi grants the guarantee for the proper operation of the goods for a period of 12 months from the date of possession of the goods. If in a consequence of this guaranteed execution the customer has received the defects-free item as replacement for the defective item, the effectiveness period of this guarantee shall start anew from the moment the customer receives the defects-free item.Information about device is the property of Riverdi and may be the subject of patents pending or granted. It is not allowed to copy or disclosed this document without prior written permission.Riverdi endeavors to ensure that all contained information in this document is correct but does not accept liability for any error or omission. Riverdi products are in developing process and published information may be not up to date. Riverdi reserves the right to update and makes changes to Specifications or written material without prior notice at any time. It is important to check the current position with Riverdi.Images and graphics used in this document are only for illustrative the purpose. All images and graphics are possible to be displayed on the range products of Riverdi, however the quality may vary. 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Riverdi and i ts suppliers specifically disclaim any expressed or implied warranty of fitness for High-Risk Activities. Using Riverdi products and devices in 'High-Risk Activities' and in any other application is entirely at the buyer’s risk, and the buyer agrees to def end, indemnify, and hold harmless Riverdi from all damages, claims or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Riverdi intellectual property rights.。

CMOS 射频集成电路设计2006年11月17日唐长文助理研究员zwtang@/faculty/personweb/tangzhangwen/RFIC/RFIC.htm复旦大学专用集成电路与系统国家重点实验室版权©2005-2006, 版权所有，不得侵犯z相位噪声概述z相位噪声分析理论线性时不变分析非线性时不变分析线性相位时变分析复旦大学专用集成电路与系统国家重点实验室唐长文复旦大学专用集成电路与系统国家重点实验室唐长文z理想的正弦波频率处的两个脉冲振荡幅度A ，振荡频率，初始相位z实际振荡器振荡波形 振荡幅度和相位都是时间的函数 幅度噪声和相位噪声()()0cos out V t A t ωφ=+()0()()()out V t A t f t t ωφ=+0ωφ0ω±()A t ()t φ复旦大学专用集成电路与系统国家重点实验室唐长文射频收发机中的相位噪声z接收通道：干挠信号的混频会恶化信噪比z发射通道强本振信号的干挠开环传递函数()out j G ω⎛⎞=⋅z假设条件：线性时不变负反馈网络z意义和优点解释了加性噪声(闪烁噪声和白噪声)对相位噪声的影响有意义的结论：相位噪声随着频偏成-20dB下降z局限和缺点无法解释单频噪声在载波两侧都会产生噪声的现象存在经验拟合参数复旦大学专用集成电路与系统国家重点实验室唐长文处的噪声电压和电流之间关系222ω−2ωz Samori模型阐述了差分对管噪声和尾电流源噪声是如何造成振荡器的相位噪声的ησz但是，噪声因子F(频率折叠因子和)仍然是经验参数z所以，Samori模型也是一种定性的噪声分析模型复旦大学专用集成电路与系统国家重点实验室唐长文(LPTV, Linear Phase Time Varying)z线性相位时变复旦大学专用集成电路与系统国家重点实验室唐长文复旦大学专用集成电路与系统国家重点实验室唐长文z幅度复原机制：非线性特性的作用一旦受到干挠，相位误差将永远保持经过长时间，幅度变化会被非线性消除电压和电流的轨迹图复旦大学专用集成电路与系统国家重点实验室唐长文zISF函数表征了波形上每一点对干挠的敏感程度t−∞∫t−∞∫∑[]0cos ()t t ωφ+()t φz Hajimiri模型可以分析器件1/f噪声上变频成为相位噪声的程度与振荡波形对称性的关系z Hajimiri模型可以分析平稳噪声，甚至是周期平稳噪声z Hajimiri模型是一种通用的、精确的、定量分析方法复旦大学专用集成电路与系统国家重点实验室唐长文参考文献z博士论文唐长文，“电感电容压控振荡器”，第五章，2004年5月，复旦大学博士论文z杂志文章D.B. Leeson, “A simple model of feedback oscillator noises spectrum,”Proc.IEEE, vol.54, pp.329-330, Feb. 1966.J. Craninckx and M. Steyaert, “Low-noise voltage-controlled oscillators using enhanced LC-tanks,”IEEE Trans. Circuits Syst.-II, vol. 42, pp. 794-904, Dec.1995.B. Razavi, “A study of phase noise in CMOS oscillators,”IEEE J. Solid-StateCircuits, vol. 31, pp. 331-343, Mar. 1996.C. Samori, A.L. Lacaita, F.Villa, and F. Zappa, “Spectrum folding and phasenoise in LC tuned oscillators,”IEEE Trans. Circuits Syst.-II, vol. 45, pp. 781-790, Jul. 1995.A. Hajimiri and T. H. Lee, “A general theory of phase noise in electricaloscillators,”IEEE J. Solid-State Circuits, vol. 33, pp. 179-194, Feb. 1998.T. H. Lee and A. Hajimiri, “Oscillator phase noise: A tutorial,”IEEE J. Solid-State Circuits, vol. 35, pp. 326-336, Mar. 2000.复旦大学专用集成电路与系统国家重点实验室唐长文。

《网络测量与分析技术》第7课Internet Tomography网络断层分析技术杨家海清华大学计算机系/ CERNET网络中心2008年秋季OutlineMotivationIntroductionNetwork tomography in literaturePacket loss inferenceTopology inference2008-11-1022008-11-103MotivationGoal:obtain detailed picture of anetwork/internet from end-to-end views Infrastructureinfer topology/connectivity2008-11-104MotivationGoal:obtain detailed picture of anetwork/internet from end-to-end views infer link-level–loss–delay–utilization infrastructure2008-11-105MotivationGoal:obtain detailed picture of anetwork/internet from end-to-end viewsWhat is the:Traffic demandsbetween users of thenetwork?–Using only limited linkmeasurements.SD 2008-11-106Network TomographyUse a limited number of measurements to infer network (link) performance parameters, using:–Maximum Likelihood Estimator.–Bayesian Inference.and assuming a prior model.Categories of problems:–Link level parameter estimation.–Topology Inference.–Origin-Destination traffic intensity/matrix.2008-11-107Why End-to-Endno participation by network needed –measurement probes regular packetsno administrative access neededinference across multiple domains –no cooperation required –monitor service level agreementsreconfigurable applications –video, audio, reliable multicast2008-11-108Examples of Tomography Atom probe tomography (APT)Computed tomography (CT) (formerly CAT) Cryo-electron tomography (Cryo-ET)Electrical impedance tomography (EIT)Magnetic resonance tomography (MRT)Optical coherence tomography (OCT)Positron emission tomography (PET)Quantum tomographySingle photon emission computed tomography (SPECT) Seismic tomographyX-ray tomography2008-11-109Computed Tomography2008-11-1010Network TomographyThe Metrics•Link Traffic (volume, variance) (Traffic Matrix estimation)•Link Loss (average, temporal)•Link Delay (variance, distribution)•Link Topology•Path Properties (network `kriging’)•Joint problems (use loss or delay to infer topology)Began with Vardi [1996]“Network Tomography: estimating source-destination traffic intensities from link data”Classes of Inversion Problems•End-to-end measurements →internal metrics•Internal measurements →path metrics2008-11-1011Origin-Destination Literature Source-Destination Traffic Estimation.–[Vardi, J. of the Amer. Statist. Assoc., 1996].Bayesian Inference on Network Traffic Using Link Count Data.–[Tabaldiand West, J. of the Amer. Statist. Assoc., 1998]. Time-Varying Network Tomography.–[Caoet al., J. of the Amer. Statist. Assoc., 2000].Traffic Matrix Estimation: Existing Techniques and New Directions.–[Medina et al., ACM SigComm2002].An Information-Theoretic Approach to Traffic Matrix Estimation.–[Zhang et al., ACM SigComm2003].2008-11-1012Link Perf. Inference Literature Multicast-based Inference of Network-internal Characteristics (MINC Project).–[Caceres, Duffield, LoPresti, Horowitz, Kurose, Towsley, Paxson]. Network Loss Inference using Unicast End-to-End Measurement.–[Coates and Nowak, ITC Seminar on IP Traffic, Measurement and Modeling, 2000].Unicast inference of network link delay distributions from edge measurements –[Shih and Hero, IEEE Int. Conf. on Acoust. Speech and Sig. Proc., 2001]. Nonparametric Internet Tomography.–[Tsang, Coates, and Nowak, IEEE Intl. Conf. on Acc., Speech and Signal Proc., 2002].Simple Network Performance Tomography.–[Nick Duffield, ACM IMC 2003].Tomography-based Overlay Network Monitoring.–[Chen, Bindel, Katz, ACM IMC 2003].2008-11-1013Topology Inference Literature Maximum Likelihood Network Topology Identification from Edge-based Unicast Measurements.–[Coates et al., ACM Sigmetrics, 2002].Multicast Topology Inference from Measured End-to-End Loss.–[Duffieldet al., IEEE Trans. on Info. Theory, 2002] Merging Logical Topologies Using End-to-end Measurements.–[Coates et al., ACM IMC, 2003].2008-11-1014Papers TodayR. Caceres, N.G. Duffield, J. Horowitz, D. Towsley,"Multicast-based Inference of Network-Internal Loss Characteristics", IEEE Transactions on Information Theory, Nov. 1999.R. Cáceres, N. Duffield, S.B. Moon, D. Towsley,"Inference of Internal Loss Rates in the MBone", Proc. IEEE Globecom'99, Brazil, Dec. 1999.M. Coates, R. Castro, R. Nowak, M. Gadhiok, R. King, Y. Tsang, "Maximum likelihood network topology identification from edge-based unicast measurements", ACM/Sigmetrics 2002.2008-11-1015Naive Approach: IM 1M 2D 0D 1D 2D i -one way delayD 0 +D 1= M 1D 0 +D 2= M 22 equations,3 unknowns ⇒{D i } not identifiable2008-11-1016D’0D’2D’1Naive Approach: IID 0D 1D 2D 0 + D 1D 0 +D 2bidirectional tree2008-11-1017Naive Approach: IID’0D’2D’1D 0D 1D 2D 0 + D 1D 0 +D 2D’2+ D 1bidirectional tree2008-11-1018Naive Approach: IID’2+ D 1D’1+D 2D’0D’2D’1D 0D 1D 2D 0 + D 1D 0 +D 2bidirectional tree2008-11-1019D’0D’2D’1Naive Approach: IID’0 +D’1D’0 +D’2D’2+ D 1D’1+D 2D 0D 1D 2D 0 + D 1D 0 +D 2bidirectional tree 2008-11-1020Naive Approach: IIbidirectional tree D’0D’2D’1D’0 +D’1D’0 +D’2D’2+ D 1D’1+D 2D 0D 1D 2D 0 + D 1D 0 +D 2not linearly independent! (not identifiable)–6 equations, 6 unknowns2008-11-1021Naive Approach: IIIRound trip link delays:AB C R 1R AB = R 0 + R 1R AC = R 0 + R 2R BC = R 1+ R 2Linear independence! (identifiable)true for general treescan infer some link delays withingeneral graph (Shavitt, etal, INFOCOM 2001) measurements over cycles(Sidi, etal, INFOCOM 2001)R 2R 02008-11-1022Bottom Linesimilar approach for lossesyields round trip and one way metrics for subset of linksapproximations for other linksCan we do better?Correlation!MINC (Multicast Inference of NetworkCharacteristics)/minc/分组到达一颗组播树的内部节点的事实，可通过分组已经到达该节点的一个或多个孩子节点的事实推断出来2008-11-10242008-11-1025MINC (Multicast Inference of Network Characteristics)multicast probes–copies made as needed within network receivers sourcereceivers observe correlatedperformance exploit correlation to get link behavior –loss rates –Delaysαk is the prob. that a given probe pkt isn ’t lost on the link terminating at ka 1a 2a 32008-11-1026multicast probes–copies made as needed within networkMINC (Multicast Inference of Network Characteristics) receivers observe correlated performance exploit correlation to get link behavior–loss rates–delays α1α2α3☺☺2008-11-1027MINC (Multicast Inference of Network Characteristics) receivers observe correlated performance exploit correlation to get link behavior –loss rates–delays ☺α1α2α3☺x☺multicast probes–copies made as needed within network2008-11-1028MINC (Multicast Inference of Network Characteristics) receivers observe correlated performance exploit correlation to get link behavior –loss rates–delays α1α2α3☺x ☺☺☺multicast probes–copies made as needed within network2008-11-1029MINC (Multicast Inference of Network Characteristics)☺ ☺☺☺ estimates of α1, α2, α3 receivers observe correlated performance exploit correlation to get link behavior –loss rates–delays α1α2α3 multicast probes–copies made as needed within network2008-11-1030Modeling Loss on Multicast Trees tree model –known logical mcast topologysource receivers–probes multicast from source node–set of receivers R2008-11-1031Modeling Loss on Multicast Trees source receivers kαkloss model –Bernoulli losses, ακon link k –independent between links –ακ假设分组到达k 的父节点，其成功通过该链路传输到k 的概率 data –n probes –Stochastic process X = (Xk )k ∈V the passage of probes down the tree X k takes value in {0, 1}, X k =1 means the probe reaches node k 2008-11-1032Stochastic loss process on link k acts deterministically on probes arriving to Node and Link Processes•loss process on link k•probe `bookkeeping’process for node kThe Loss Model1100…1100…100…Bookkeeping processLink loss process2008-11-1033From Link Passage to Path PassageProbabilitiesPath probabilities: only ancestors matterSufficient to estimate path probabilitiesProbe 到达节点k 的概率2008-11-1034Modeling Loss on Multicast Treessourcereceiverskαkgoal–estimate link probabilities α= {αk : k ∈R } from X k –And the above equations2008-11-1035Inference: Loss EstimatorInference–given α= {ακ}, constructprobability Prob( X k ; α) of observed data–Maximum Likelihood Estimator α(k ) = arg max αProb( X k ; α)Maximum Likelihood Estimator (MLE)–estimator has minimal variancestrongly consistent–converges to true value as n →∞asymptotically normal–can find confidence intervals2008-11-1036Loss Estimator: exampleEach probe has 4 potential outcomesSome algebra–4 outcome probabilities { p 00, p 01, p 10, p 11}–3 link probabilities {α1, α2, α3}–can express p’s in terms of α’s–measured p’s must sum to 1–3 independent equations–solve for 3 unknown α’sResulting estimates2008-11-1037Loss Estimator: general topology Probability probe reach node kProbability probe reach at least one leaf in the subtree rooted at node k:如果γ已知，就可求出A k , 进而求出αk = A k /A p(k)2008-11-1038Loss Estimator: general topology γk 是以k 作为其祖先的树中对给定的分组至少到达一个接受者的概率，可以通过下面的方式实际计算这组变量：定义Y k (i )为n 个探测分组的测量结果的函数：k 是叶子节点k 是非叶子节点可得到：Simulation Setupnetwork simulator (ns)multicast tree–4 nodes, 2 receivers–8 nodes, 4 receiversloss generation–Bernoulli loss model–long-lived TCP connections2008-11-1039 Simulation Results: loss modelConvergence of MLE2008-11-1040Simulation Results: loss modelConfidence interval of MLE2008-11-1041 Simulation Results: TCP TrafficTracking loss variation2008-11-10422008-11-1043Before •Spatial:link loss processes independent•Temporal:link loss processes Bernoulli•Parameters: link passage probabilitiesTemporal Independence:How Far to Relax?After•Spatial:link loss processes independent•Temporal :link loss processes stationary, ergodic•Parameters : joint link passage probabilities over index setsFull characterisation/identification possible!2008-11-1044Impact of CorrelationsAnalysis assume probes dropped independently on a link–short-term temporal correlation has limited impact on accuracy: slower convergence–change the pacing of probesAnalysis assume probes dropped independently across links in the m-tree–spatial correlation biased the estimation–model compensation given correlation structure 依赖程度的先验信息可以用于修正模型–在具有相似丢包特性的区域MLE 对空间依赖性不敏感“Inference of Internal Loss Ratesin the Mbone ”R.Caceres N.G. Duffield S.B. MoonD.TowsleyProc. IEEE Global Internet'99Question: How it works in real world?2008-11-1046Internet Measurementsexperiments with 2-8receivers (100ms probes)summer ’98－–1200 probes topology determined using mtrace 2 minute inferencesEnd-to-end loss measured by mbatvalidation against mtraceGA cambridge SF/CA UMass AT&T NJ USC CMU GaTech UCB UWash kentuckyInternet MeasurementsLoss rates varied between 4-30%Difference: below 1. 5%2008-11-1047Internet MeasurementsConvergence rate1 interval (2 min)Concern: loss rate GA >USC,or CA ?2008-11-10482008-11-1049Other resultsAcross a wide range of loss rates (4-30%) on the same linkAcross links with very low (< 1%) and very high (>30%) loss ratesAcross all links in a multicast tree regardless of their position in the treeAcross different multicast treesAcross time of day and day of the week2008-11-1050Summary: MINCEnd-end multicast probing to infer network internal loss/delayNo network cooperationScales well to large networkRigorous statistical analysis–MLE/consistent/unbiased/confidenceValidated by simulations and Internet experiments –inferred values closely match actual values –converges fast with low overhead2008-11-1051A F ED CB One Multicast Tree Limitations may not characterize links of interestneed two trees to characterize links of interestnetwork tomography on a general topology –tree layout–inference ??Links of interest: {(C,F), (D,F) }“Tree Layout for Internal Network Characterizations in Multicast Networks'‘M. Adler, T. Bu, R. Sitaraman, and D. Towsley Proceedings of Third International Workshop on Networked Group Communication, 2001“Maximum Likelihood Network Topology Identification from Edge-based Unicast Measurements”M.Coates*, R.Castro,R.Nowak*McGill UniversityRice UniversityProceedings of ACM SIGMETRICS 2002Question: What if we don ’t know thetopology?自学为主2008-11-1053Network Topology TomographyInferring network topology based on “external”end-to-end measurements.Traceroute requires cooperation of routers: May not be met in practiceThis paper assumes no internal networkcooperationSolely host-based unicast measurements2008-11-1054How Does It WorkProblem statement: logical topo.Assuming single source communicating with multiple receivers2008-11-1055How Does It WorkInformation we haveEnd-to-end measurements that measure the degree of correlation between receiversAssociate metric γi,j with pair of receivers i,j ∈R Monotonicity property:–p i ,p j,p k : paths from sender to i,j,k–if p i shares more links with p j than with p k , then γi,j > γi,k 2008-11-1056An ExampleHere γ18,19> γi,19for all other iSimple Bottom-up merging algorithms can be used to identify full, logical topology2008-11-1057Two-fold ContributionNovel measurement scheme:–Sandwich Probing–Each probe: three packets–Main Idea: Small packets queues behind the large, inducing extra separation between small packets on shared linksA stochastic search method for topology identification2008-11-1058012534Sandwich Probing 35γ+d dμ01: queuing delay of p2on link 0→1, γ35= μ01γij : sum of μ’s on the shared links to receiver i and jno cross-traffic:p 1p 22008-11-105934γ+d 012534more shared queues ⇒larger γ3534γ>γd Sandwich Probingγ34= μ01+μ12γ35= μ012008-11-1060Advantages over loss and delaybased metricsProbe loss is rare on Internet–Large number of measurements required For measuring delay, clock sync required Each measurement contributes here–在基于传统Loss 或Delay 的测量中，会有许多测量是无效的2008-11-1061Measurement frameworkijx Measurement ofγij contaminated by cross traffic ()ij ij ij ij n N x /ˆ,2σγ→Multiple measurementsCLT 012534Cross traffic: zero-mean effect on ijx 多次采样，均值x i,j ，方差σi,jx ={x i,j }, var={σi,j } for allpairs of measurements 2008-11-1062Maximum Likelihood Tree可以想见：1）由于背景流量的存在，可能有多种拓扑都会产生同样的测量结果，可能拓扑集合＝森林F2）需要建立模型，估计出最佳拓扑TT: treeμl : theoretical delay difference value of each link l S i,j : the set of shared links in the paths to receivers i, jμ(T)= {μl }μ’(T): maximum likelihood estimate of μ(T), if we consider a particular tree T∑∈≡j i S l lj i ,,μγ2008-11-1063Likelihood FormulationThe Prob. density for the measured data x as p (x |μ, T )–Where T is underlying topology–μare vector of theoretical delay differences When p (x |μ, T )is viewed as function of T and μ, it is called the likelihood of T and μ2008-11-1064Likelihood FormulationMaximum Likelihood Tree is given by:–F denotes forest of all possible trees–U denotes set of all possible link delays Maximization involved is formidableBrute Force method: for N = 10, more than 1.8 x106trees2008-11-1065Simplifying the ProblemFor a particular tree T , estimate the means μ(T ) ofthe model p(x|T , μ(T )), from the measurements x MLELog likelihood of TMaximum Likelihood Tree is the one in the forestthat has the largest likelihood value2008-11-1066Maximum Penalized Likelihood TreeL λ(x|T) ≡L(x|T) -λn(T)λ≥0, chosen by usern(T): number of links in tree T•Vast number of trees, a formidable optimization •(Reversible Jump) MCMC tree searchDrawback: no penalty on the number of links in the tree -> Trees with more links can have higher likelihood values. Since the extra degrees of freedom they possess can allow them to fit the data more closely －－classic “overfitting”2008-11-1067Maximum Penalized Likelihood Tree Only a relatively small number of trees have significant likelihood设计一种能有效遍历拓扑森林的方法，这种方法主要集中和专注于那个可能性最大的小集合 避免局部优化，追求全局优化采用随机搜索方法直觉上，搜索应向着可能性最大的树的方向前进2008-11-1068MCMC Algorithm•Construct a discrete probability density ())|,(,|))|(exp()(x T p T x p e T x L T n μμλλ∝=−•When prior for T and μchosen properly•Posterior distribution p(T, μ| x) gives the region of high likelihood trees in F•can be used as a guide to searchU: uniform density (constant)2008-11-1069MCMC AlgorithmMajor task: generate and compare random samples (T , μ) from the posterior distributionThe random samples will naturally be concentrated in the regions of high likelihoodStochastic search: a set of random moves between trees, both within the para. space of a given tree and from one tree to another–Birth step, death step, μ-step–μ-step: Choose a link l at random and changes the value of μl 2008-11-1070•Propose a random move (birth or death)•Accept with probability :))()|()()|(,1min(211122T T m x T p T T m x T p →→MCMC Algorithm•Initialization: tree topology, link para.2008-11-1071Birth Move (insert node)T 1T 22008-11-1072Death Move (delete node)T 2T 12008-11-1073ns-2 Simulationssource1234567892008-11-107420406080100400060008000Simulation results% CorrectNumber of Probes Light utilizationMCMC Algorithmtrue topology MCMC topology can identify layer 2 branching pointshigh speed connections can fool tomography 2008-11-1075Summary•Delay-based measurement, no need for clock synchronization•MCMC algorithm to explore forest and identify maximum (penalized) likelihood tree2008-11-10762008-11-1077Issues and Challengesrelationship between logical and physical topologyrelation to unicasttree layout/compositioncombining with network-aided measurementsscalability2008-11-1078Summarynetwork tomography new, exciting research area –intellectually challenging –huge potential applicabilityessential ingredient–quantifiable correlationelements–statistical, algorithmic techniquesQuestions and Comments Measurement design:+ strive to use every measurement: delay-based+ able to identify some contaminated measurements-does not use loss information-how to choose d(sufficiently large) ?-length of measurement to be sufficient ?* use delay and loss information jointlyStochastic search:+ based on global optimization criterion+ introduce penalty to limit the number of links+ not deterministic, not exhaustive? extend to multiple-sender topology identification2008-11-1079Thanks !。

CMOS RF IC Design (Radio Frequency Integrated Circuit) 2005-6Institute of Microelectronics1Contents:z Introductionz Transmission Line Theoryz Smith Chartz Impedance Matchingz Inductorz Varactorz Active Devicez System requirementz LNA designz Mixer designz VCO designz PA design2005-6Institute of MicroelectronicsContents:z Transceiver structuresz Basics of wireless communication z System requirements2005-6Institute of MicroelectronicsFirst part:transceiver architecture 2005-6Institute of MicroelectronicsThe processing technology for RF circuit2005-6Institute of Microelectronics2005-6Institute of Microelectronics2005-6Institute of MicroelectronicssuperheterodynezCarefully chosen intermediate frequency zMost amplification and filtering are done at IF zHigh quality image rejection and channel selection filter z High sensitivity, dynamic range and well defined selectivityBut Discrete IF and IR filter Need off-chip matching2005-6Institute of Microelectronicssuperheterodyne2005-6Institute of MicroelectronicsLow IFzNo DC and 1/f noise influence zBut has close image2005-6Institute of MicroelectronicsRF transceiver architectureDirect conversion2005-6Institute of MicroelectronicsRF transceiver architectureDirect conversionzNo image interference zNo image rejection filter zOnly LPF for channel selection z Problems:LO leakage; DC offset; 1/f noiseZero IF LO Leakage+ OffsetBasics of wireless communication 2005-6Institute of Microelectronics2005-6Institute of MicroelectronicszFDMA (Frequency Division Multiple Access)2005-6Institute of MicroelectronicszFDMA (Frequency Division Duplexing)2005-6Institute of Microelectronicsz FDMA (Time Division Duplexing)2005-6Institute of MicroelectronicszTDMA (Time Division Multiple Access)2005-6Institute of MicroelectronicszCDMA (Code Division Multiple Access)-Transmitter2005-6Institute of MicroelectronicszCDMA (Code Division Multiple Access)-ReceiverSystem Fundamental 2005-6Institute of Microelectronics2005-6Institute of MicroelectronicsTypical Receiver Specificationsz Gain: output signal/input signalz Noise figure: measures amount of noise added by circuitsz Distortion: measures amount of nonlinearityzPhase noise: measures local oscillator random phase2005-6Institute of Microelectronicsz SNR is reduced and leading to possible bit errors zReduce bandwidth can lessen the influence of noise zIncrease the input power2005-6Institute of MicroelectronicszBit error are created when the I/Q value beyond theboundry2005-6Institute of MicroelectronicszModel noise influence by using PDF2005-6Institute of MicroelectronicsNoisezThermal NoiseGenerated by resistors,base and emitter resistance of bipolar devices, and channel resistance of MOSFETs.zShot NoiseA Gaussian white process associated with the transfer of charge across an energy barrier (e.g. a pn junction)zFlicker NoiseArises from random trapping of charge at the oxide-silicon interface of MOSFETs.⎟⎠⎞⎜⎝⎛=m ng kT I 3242qII n22=fWLC K V OX n12⋅=2005-6Institute of MicroelectronicsInput-Referred Noise : The noise of a two-port system can be modeled by two input noise generators: a series voltage source and a parallel current source.cc+-2n V 2nINoisy CircuitNoiseless CircuitFigure 4 Representation of noise by input noise generators2nDI inV outV 1L 1M inV outV 1L 1M +-2n V 2nI ()3242m nD g kT I =()m ng kT V 382=()2238inm nZ g kT I =2005-6Institute of MicroelectronicszIn order to get acceptable Bit Error Rate:sourceinput to due noise output powernoiseoutputtotal ==out in SNR SNR NF2005-6Institute of MicroelectronicszMinimum input noise power to achieve acceptable SNR:z Minimum input noise power to achieve acceptable SNR: Assume the input impedance is matched to antenna, α=1/22005-6Institute of Microelectronics2005-6Institute of MicroelectronicsSensitivityThe sensitivity of an RF receiver is defined as the minimum signal level that the system can detect with acceptable signal-to-noise ratio.Note that the sum of the first three terms is the total integrated noise of the system and is sometimes called the “noise floor”.minmin ,log 10/174SNR B NF Hz dBm P in +++−=2005-6Institute of MicroelectronicszCascaded stage noise figurez Cascaded stage noise figure----referred to input z Create an equivalent noise voltage source 2005-6Institute of Microelectronics。