西电课件-半导体器件物理

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q (V0 + ∆V ) qV0 ] − I s exp ∆I = I s exp[ IDQ kT kT qV0 q ∆V q ∆V (exp = I s exp − 1) = I DQ (exp − 1) kT kT kT
ΔI
注意:不管增量△V是多大,上式都成立。
V0 V0+ΔV
2、Conductance(8.2.1)
中性区中非平衡载流子电荷随 外加电压的变化率; 正负电荷在空间上是重叠的; 与直流电流成线性关系,与直 流偏压成指数关系; 只存在于正偏下; 要使 CD↓,应使 IF↓(A↓, 正偏↓),τ ↓。
5、 Equivalent circuit
CT
CD
rs
gD gl
gl is the drain conductance,rs 为 is the resistance in series .
(2) calculation of the conductance with the current increment For small signal,ΔV << kT/q,then
ΔI =IDQ
q ∆V q ∆V ∆I = I DQ (exp − 1) ≈ I DQ = g d ∆V kT kT
1、 Theoretic analysis (8.2.2)
(1)、model If the applied voltage is
V = V0 + v (t ) = V0 + V1e jω t
where V0 is the DC voltage, and V0 >> kT/q V1 is the amplitude of the AC signal,and V1 << kT/q
4、Depletion layer capacitance
(1)、Conception
− ∆Q − Q
Q
∆Q
P区
N区
∆xp
xp
xn
∆ xn
4、Depletion layer capacitance
(2)、Calculation According to the comception of depletion layer capacitance
1 2
4、Depletion layer capacitance
(2)、Calculation the width of the depletion layer is
1 2
⎡ 2εs ⎤ xd = xn + xp = ⎢ (Vbi −V )⎥ ⎣ qN0 ⎦
the depletion layer capacitance
① 直流工作点电流增加,则交流小信号电导也随之线性增加。 ② 不同材料的PN结,IDQ相同处的I-V曲线切线相互平行。
I U
I(mA)
100
Ge
Si
80
60
40
20
0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Va(V)
3、Diffusion conductance
(1)、Conception
q [ J p ( xn )τ p + J n ( x p )τ n ] Cd = Cdp + C dn = kT
4、Depletion layer capacitance
(1)、Conception
PN junction capacitance
Depletion capacitance CT Diffusion conductance CD
小结
•势垒电容的物理含义与表达式 •势垒电容测量的实际应用 •势垒电容与扩散电容的对比 •集成电路设计软件中势垒电容模型参数的含义和作用 •交流小信号等效电路
半导体器件物理
The Physics of Semiconductor Devices
西安电子科技大学 微电子学院 Microelectronics Institute, Xidian University
Ch1 PN junction diode
平衡PN结定性分析 平衡PN结定量分析 理想PN结直流伏安特性 实际特性与理想模型的偏离
IDQ
∆I q gd = = I DQ ∆V kT
V0 ΔV = kT/q
注意:推导该表达式过程中采用了小信号条件△V<<kT/q 若ΔV = kT/q,如果用小信号结论计算的话,则ΔI=IDQ。
2、Conductance(8.2.1)
(3) Calculation of the conductance through direct differential At high forword current The conductance is
ω is the frequency ,and e jω t = cos ω t + j sin ω t
Then the current can be expressed as:
I = I DQ + i = I DQ + I1e jω t
1、 Theoretic analysis (8.2.2)
Unlike the DC performance, in AC characterisics:
Charge per unit area
qVa ⎡ ⎤ ) − 1⎥ Q p = q ∫ ( pn ( x) − pn 0 )dx = qL p pn 0 ⎢ exp( xn kT ⎣ ⎦

At high forward voltage
Qp = L2p Dp J p ( xn ) = τ p J p ( xn )
The electrostatic analysis of a p-n diode is of interest since it provides knowledge about the charge density and the electric field in the depletion region. It is also required to obtain the capacitance-voltage characteristics of the diode. A p-n diode contains two kinds of capacitance
1/C
2
-2/qεND
Vbi
V
4、Depletion layer capacitance
3、讨论
CT = A
εs
xd
CD =
qI DQτ 2kT
势垒区中电离杂质电荷随外加 电压的变化率; 正负电荷在空间上是分离的; 与直流偏压成幂函数关系; 正偏反偏下均存在,可作电容 器使用; 要使 CT↓, 应使 A↓,xd↑ (N ↓, 反偏↑)。
PN junction AC characteristics PN junction transient behavior PN junction breakdown
Theoretic analysis Conductance Diffusion capacitance Depletion capacitance Equivalent circuit
(2)P region diffusion capacitance
dQn q 2 ⎛ qVa Cdn = Ln n p 0 exp ⎜ = dVa kT ⎝ kT ⎞ q [ J n ( x p )τ n ] ⎟= ⎠ kT
(3)total diffusion capacitance
assumingτn=τp=τ,then q Cd = ( ⋅ I DQ ) ⋅τ kT
qD p pn 0 ⎡ ⎛ qV exp ⎜ a J p ( xn ) = Lp ⎢ ⎝ kT ⎣ ⎞ ⎤ ⎟ − 1⎥ ⎠ ⎦
3、Diffusion conductance
(1)N region diffusion capacitance
q2 ⎛ qVa Cdp = Lp pn 0 exp ⎜ = dVa kT ⎝ kT dQ p ⎞ q [ J p ( xn )τ p ] ⎟= ⎠ kT
Depletion capacitance CT Diffusion conductance CD
3、Diffusion conductance
(1)、Conception
P区
+∆Qpp −∆Qnp
−∆Qnn
N区
pp0 +∆Qpn
nn 0 pn 0 x
np0
V1 = ∆V →
N region: +∆Qpn (simultaneously −∆Qnn ) P region: −∆Qnp (simultaneously +∆Qpp )
⎡ ε s qN0 ⎤ CT = A = A ⎢ ⎥ xd ⎣ 2 (Vbi − V ) ⎦
εs
1 2
4、Depletion layer capacitance
(2)、Calculation Practise expression(in CAD tools)
Vbi Vbi CT = A = CT 0 2( N a + N d )Vbi (Vbi − Va ) (Vbi − Va )
Q = A xn qN D = A( 2εs q N0 ) (Vbi −V )
1 2
1 2
1 2
⎡ ⎤ 2εs NA xn = ⎢ (Vbi −V )⎥ ⎣ qND ( NA + ND ) ⎦
⎡ ε s qN 0 ⎤ dQ CT = = A⎢ ⎥ dV ⎣ 2 (Vbi − V ) ⎦ NA ND where,N 0 = NA + ND
3、Diffusion conductance
(1)、Conception
3、Diffusion conductance
(2)、Calculation The hole densities at the depletion region boundaries is:
qVa xn − x ⎡ ⎤ pn ( x) − pn 0 = pn 0 ⎢exp( ) − 1⎥ exp( ) kT Lp ⎣ ⎦
∆p ≠0 ∆t
For given V1 ,and corresponding I1 ,the AC conductance is
I1 Y = V1
(2)、小信号条件 我们下面所讨论的“小信号”模型需满足两个条件: (1) V1 << kT/q,(2)ωτ<<1。
1、 Theoretic analysis (8.2.2)
qVa I = I s exp kT
Baidu Nhomakorabea
dI dVa
Va =V0
qVa q = ( I s ⋅ exp )⋅ kT kT
= I DQ
Va =V0
q = gd kT
2、Conductance(8.2.1)
4、讨论 (1) gd=IDQq/kT的几何解释:直流电流-电压曲线的斜率。 (2) 小信号电导只与直流工作点有关而与半导体材料无关
Common expression
ε s qN a N d
⎛ Va ⎞ CT = CT 0 ⎜1 − ⎟ ⎝ Vbi ⎠
−m
For one-side abrupt junction, m=1/2 For linearly graded junction,m=1/3
4、Depletion layer capacitance
(3)、Discussion A capacitance versus voltage measurement can be used to obtain the built-in voltage and the doping density of a onesided p-n diode. The capacitance-voltage characteristic and the corresponding 1/C2 curve are shown in the left figure.
(3)、Conclusin Small signal conductance
q gd = I DQ kT
capacitance
q Cd = (τ )( I DQ ) 2kT
2、Conductance(8.2.1)
(1) the expression of the current increment If the voltage increases from V0 to V0+ΔV