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F951D475MAAAQ2中文资料

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CAT.8100V

After applying the pressure load of 5Nfor 10±1 seconds horizontally to the

center of capacitor side body which hasno electrode and has been soldered beforehand on an aluminum substrate, there shall be found neither exfoliationnor its sign at the terminal electrode.

46.310162025350G0J1A1C1D1E1V1105PP •SP •S •A1.5155PSA2.2225PP •S(P) •

S •AA3.3335PP

AA(A) •B4.7475PPS •A(Q) • S • A(T) •B6.8685PQ •A(Q)10106PPP •Q •S •AA •B(A) •B15156PPP S • A 22226PPP •Q •S •AQ •S •A •T •BB33336PP •Q •S •AQ • S •A(A) •(T) •B47476P •Q •S •AP •Q •S •A(P) •(Q) • S • A •T •BB68686S •AS •AB100107P •Q •S •A(P) •(Q) • S • A •T •B(T) •B150157(P) •BB220227S •A •T •B(T) •B330337(S) •(A) •T •B(B)470477(B)V•After 1 minute's application of rated voltage, leakage current at 20˚Cis notmore than 0.01CV or 0.5µA, whichever is greater.•After 1 minute's application of rated voltage, leakage current at 85˚Cis notmore than 0.1CV or 5µA, whichever is greater.•After 1 minute's application of derated voltage, leakage current at 125˚Cisnot more than 0.125CV or 6.3µA, whichever is greater.

Dipping Flow at 260˚Cfor 10 seconds, reflow at 260˚Cfor 10 seconds+15% Max. (at +125˚C) +10% Max. (at +85˚C) --10% Max. (at --55˚C) Damp HeatTemperature CyclesAt 40˚C, 90 ~ 95% R.H., For 500 hours (No voltage applied)Capacitance Change••••••Refor to next page (∗1)Dissipation Factor••••••••••Initial specified value or lessLeakage Current••••••••••••Initial specified value or lessAt --55˚C / +125˚C, 30 minutes each, For 5 cycles,Capacitance Change••••••Refor to next page (∗1)Dissipation Factor••••••••••Initial specified value or lessLeakage Current••••••••••••Initial specified value or lessResistance toSoldering HeatCapacitance Change••••••Refor to next page (∗1)Dissipation Factor••••••••••Initial specified value or lessLeakage Current••••••••••••Initial specified value or less

Endurance

∗After 2000 hours' application of rated voltage at 85˚C, or derated voltage at125˚C, capacitors meet the characteristic requirements listed below.Capacitance Change••••••Refor to next page (∗1)Dissipation Factor••••••••••Initial specified value or lessLeakage Current••••••••••••Initial specified value or lessSurge∗After application of surge voltage in series with a 33Ωresistor at the rate of 30seconds ON, 30 seconds OFF, for 1000 successive test cycles at 85˚C,capacitors meet the characteristics requirements listed below.Capacitance Change••••••Refor to next page (∗1)Dissipation Factor••••••••••Initial specified value or lessLeakage Current••••••••••••Initial specified value or less

Shear Test

Terminal StrengthKeeping a capacitor surface-mounted on a substrate upside down and supporting the substrate at both of the opposite

bottom points 45mm apart from the center of the capacitor,the pressure strength is applied witha specified jig at the center of thesubstrate so that the substrate may bend by 1mm as illustrated. Then, there shall be found no remarkable

abnormality on the capacitor terminals.5N (0.51kg • f)For 10 ± 1 secondsSOLID TANTALUM ELECTROLYTIC CAPACITORSF95 Conformal coatedChipSpecifications

Type numbering system (Example : 35V 1.5µF)

DrawingLWHSolderelectrodeelectrodeSolderABC(D)Resin

Single-side electrodes (Both electrodes at bottom side only)ItemCategory Temperature RangeCapacitance ToleranceDissipation Factor(at 120Hz)Leakage CurrentCapacitance Changeby TemperaturePerformance Characteristics--55~+125˚C(Rated temperature : 85˚C) ±20%, ±10% (at 120Hz) (However P.Q.T Case ±20%)

D dimension only for reference

( ) The series in parentheses are being developed.Please contact to your local Nichicon sales office whenthese series are being designed in your application.DimensionsRefer to P.235

R2304545201mm∗As for the surge and derated voltage at 125˚C, refer to page 266 for details.Standard ratings(mm)

Cap.(µF) CodeRefer to P.235ESR(100kHz)

Tapingcode(Refertopage267fordetails)SinglefaceelectrodeF1925314V5165758M9A1011A12Q13214CasecodeCapacitancetoleranceRatedCapacitanceRatedvoltageSeries

case codeL2.2 ±0.31.25 ±0.31.0 ±0.20.6 ±0.30.8 ±0.30.8 ±0.3WHABC( D )(0.2)P3.2 ±0.21.6 ±0.20.8 ±0.20.8 ±0.21.2 ±0.20.8 ±0.2(0.2)Q3.2 ±0.31.6 ±0.31.0 ±0.20.8 ±0.31.2 ±0.30.8 ±0.3(0.2)S1.4 ±0.21.0 ±0.20.8 ±0.30.8 ±0.21.2 ±0.31.2 ±0.20.8 ±0.31.1 ±0.21.7 ±0.32.7 ±0.23.2 ±0.33.5 ±0.2(0.2)(0.2)AT1.8 ±0.20.8 ±0.31.2 ±0.31.1 ±0.32.7 ±0.33.3 ±0.3(0.2)BAdapted to the RoHS directive (2002/95/EC).元器件交易网www.cecb2b.com

CAT.8100V15P

F950G156MPAAQ20.6 101.8∗22PF950G226MPAAQ20.9 141.1∗33PF950G336MPAAQ21.3141.1∗47PF950G476MPAAQ21.9141.1∗47QF950G476MQAAQ21.9101.1∗47SF950G476MSAAQ21.9 100.8∗47AF950G476MAAAQ21.9 80.6∗68SF950G686MSAAQ22.7 100.8∗68AF950G686MAAAQ22.7 100.5∗100PF950G107MPAAQ24.0301.2±15100QF950G107MQAAQ24.0251.0±15100SF950G107MSAAQ24.0140.8∗100AF950G107MAAAQ24.0 120.5∗150BF950G157MBAAQ26.0 140.4 ∗220SF950G227MSAAQ28.8 250.8±15220AF950G227MAAAQ28.8 250.8±15220TF950G227MTAAQ28.8 250.6∗220BF950G227MBAAQ28.8 160.4∗330TF950G337MTAAQ213.2 400.8±20330BF950G337MBAAQ213.2 300.6±1510PF950J106MPAAQ20.6 82.0∗15PF950J156MPAAQ20.9 101.8∗22PF950J226MPAAQ21.4 141.1∗33PF950J336MPAAQ22.1 141.1∗33QF950J336MQAAQ22.1 102.0∗33SF950J336MSAAQ22.1 101.0∗33AF950J336MAAAQ22.1 80.8∗47PF950J476MPAAQ23.0 201.1±1547QF950J476MQAAQ23.0 101.1∗47SF950J476MSAAQ23.0 100.9∗47AF950J476MAAAQ23.0 100.6∗68SF950J686MSAAQ24.3 140.9∗68AF950J686MAAAQ24.3 120.5∗100SF950J107MSAAQ26.3 200.9±15100AF950J107MAAAQ26.3 140.5∗100TF950J107MTAAQ26.3 140.6∗100BF950J107MBAAQ26.3 140.4∗150BF950J157MBAAQ29.5 180.4∗220BF950J227MBAAQ213.9 300.4∗3.3PF951A335MPAAQ20.5 85.0∗4.7PF951A475MPAAQ20.5 84.0∗6.8PF951A685MPAAQ20.7 84.0∗10PF951A106MPAAQ21.0 83.0∗15PF951A156MPAAQ21.5 103.0∗22PF951A226MPAAQ22.2 143.0∗22QF951A226MQAAQ22.2 102.0∗22SF951A226MSAAQ22.2 101.1∗22AF951A226MAAAQ22.2 60.9∗33QF951A336MQAAQ23.3183.0±1533SF951A336MSAAQ23.3 101.1∗

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FSO-1D中文资料

FSO-1D中文资料

FSO-1D

sFeatures

¡Ultra Low Jitter.¡Complementary LVPECL Outputs.¡Operation at fundamental High Frequency.sApplications

¡SONET/SDH.¡1 Gbit Ethernet, 10Gbit Ethernet.¡

Fiber Channel.

sSpecificationsTypeFSO-1DFrequency RangeStandard FrequencyFrequency StabilityOperation Temperature RangeStorage Temperature RangeSupply VoltageCurrentLoadOutput LevelSymmetryRaise Time/Fall TimeStart-up TimeJitter (σ)Weight50~330MHzTable 1±100×10−6 (All over)±0~+70:−40~+85:3.3V±5%50mA max.50Ω Terminated Vcc−2VVoh: 2.275V min./Vol: 1.68V max.50%±5% at outputs cross point1ns max.(20%,80%)10ms max.5ps rms max.0.2gsTable 1 Original FrequenciesTable 1Standard Frequency (MHz) 80125155.52156.25250312.5

sOutlinesLand Pattern (reference)

s

Typical External Component Connection

250A1AAKSS 2G

1.402.542.00max.

Pad Layout1. Mute2. NC3. GND4. OUT5. OUT6. VCC2.545.00+/-0.27.00+/-0.2

MEMORY存储芯片MT29F4G01AAADDHC-ITX D中文规格书

MEMORY存储芯片MT29F4G01AAADDHC-ITX D中文规格书

(IDD5R), IPP6x for self refresh cases (IDD6N, IDD6E, IDD6R, IDD6A), IPP7 for the operating

bank interleave read case (IDD7) and IPP9 for the MBIST-PPR operation case. These

have the same definitions as the IDD currents referenced but are measured on the VPPsupply.

•IDDQ currents are measured as time-averaged currents with VDDQ balls of the device

under test grouped together. Micron does not specify IDDQ currents.

•IPP and IDDQ currents are not included in IDD currents, IDD and IDDQ currents are not

included in IPP currents, and IDD and IPP currents are not included in IDDQ currents.

Note: IDDQ values cannot be directly used to calculate the I/O power of the device. They

can be used to support correlation of simulated I/O power to actual I/O power. In

DRAM module application, IDDQ cannot be measured separately because VDD and VDDQare using a merged-power layer in the module PCB.

MYTECH、AKEBO、MK、FMSI、WVA、KD、FBK编号对照表

MYTECH、AKEBO、MK、FMSI、WVA、KD、FBK编号对照表

AKEBONO.BP0001D1081MKD-206MBP0002A-108KD6009D-25820892KD-82BP0003A-109KD6010-02D-29921126KD-83BP0004A-110KD6008-02D-27120955BP0005A113KD2023D241\D24220870KD-76BP0006A-114KD0003-02KD-98

BP0007A-116KD3016D26421041KD-93

BP0008A-117KD2068-02

BP0009A-118KD2052-02

BP0010A-119AKD1053MKD-146M

BP0011A-119KD1042KD-140

BP0012A-119WKD1069M-02KD-165M

BP0013A-11KD2000KD-4

BP0014A-120KD1024D-30820957

BP0015A-120WKD1055M-02D-30820957KD-153M

BP0016A-121KD0002-02

BP0017A-121KD9002KD-88

BP0018A-122KD1020-02KD-77

BP0019A-124KD2026-02KD-85BP0020A-128KD6012-02D-32921125KD-100BP0021A-12KD3000D-42KD-3BP0022A-131KD9001-02D-29622071KD-121BP0023A-134KD5014-02KD-91

BP0024A-134KD5034-02KD-192BP0025A-135KD2027-02D-30321158KD-89BP0026A-137KD4014MD-28520880KD-196MBP0027A-138KD6011-02D-28420956KD-89

BP0028A-139KD3026D-131KD-117

BP0029A-140KD3027-02D-28317900KD-118

MEMORY存储芯片MT29F4G01AAADDHC中文规格书

MEMORY存储芯片MT29F4G01AAADDHC中文规格书

ODT Timing Definitions

Definitions for tADC, tAONAS, and tAOFAS are provided in the Table 131 (page 309) andshown in Figure 242 (page 310) and Figure 244 (page 311). Measurement reference set-tings are provided in the subsequent Table 132 (page 309).

The tADC for the dynamic ODT case and read disable ODT cases are represented bytADC of Direct ODT Control case.

Table 131: ODT Timing DefinitionsParameterBegin Point DefinitionEnd Point DefinitionFiguretADCRising edge of CK_t, CK_c defined by the end point ofDODTLoffExtrapolated point at VRTT,nomFigure 242(page 310)

Rising edge of CK_t, CK_c defined by the end point ofDODTLonExtrapolated point at VSSQFigure 242(page 310)

Rising edge of CK_t, CK_c defined by the end point ofODTLcnwExtrapolated point at VRTT,nomFigure 243(page 310)

Rising edge of CK_t, CK_c defined by the end point ofODTLcwn4 or ODTLcwn8Extrapolated point at VSSQFigure 243(page 310)tAONASRising edge of CK_t, CK_c with ODT being first registeredHIGHExtrapolated point at VSSQFigure 244(page 311)tAOFASRising edge of CK_t, CK_c with ODT being first registeredLOWExtrapolated point at VRTT,nomFigure 244(page 311)