dsp实验

北京化工大学北方学院课程设计报告课程名称DSP原理与应用设计题目 D/A转换实验、数字波形产生、数字图像处理、二维图形生成专业、班级 *******&&……&*%&￥&￥学号%……&……&￥￥姓名 Y&$%^^ 指导教师 &%……&￥&￥设计时间2011年9月26号2011年9 月26日一、引言1 实验目的实验一：（1）熟悉D/A转换的基本原理；（2）掌握AD7303的技术指标和常用方法；（3）熟悉DSP的多通道缓冲串口配置为SPI的应用方法；（4）掌握并熟练使用DSP和AD7303的接口及其操作。

实验二：（1）了解数字波形产生的基本原理（2）学习用C54x DSP芯片产生正弦信号的基本方法和步骤。

实验三：（1）了解数字图象处理的基本原理；（2）学习灰度图象二值化处理技术；（3）学习灰度图象反色处理技术。

实验四：（1）了解DSP的图形处理功能；掌握CCS的图形观察功能；（2）学会简单的二维图形生成编程。

二、正文实验一：1 实验设备计算机，CCS 2.0版软件，DSP仿真器，实验箱，示波器。

2实验步骤（1）系统连接进行dsp实验之前，先必须连接好仿真器、试验箱及计算机。

（2）上电复位在硬件安装完成后，确认安装正确、各实验部件及电源连接正常后，接通仿真器电源或启动计算机，此时，仿真盒上的“红色小灯”应该是亮的，否则说明dsp开发系统与计算机连接有问题。

（3）运行CCS程序待计算机启动成功后，实验箱上电，启动CCS，此时仿真器上的“绿色小灯”应点亮，CCS正常启动，证明系统连接正常；否则仿真器的连接、JTAG接口存在问题。

关掉实验箱电源，检查仿真器的连接、JTAG接口连接。

（4）新建工程：Project◊New给工程起名xf，放在E盘xf文件夹。

（5）把E盘dsp_usb文件夹下的“DSP常用文件”下的“EXP06-AD”文件中的vectors.asm、tms320uc5402.h、tms320uc5402.cmd 、RTS.LIB 文件拷贝至刚才工程文件pjt所在文件夹下。

（6）新建源文件：File◊New◊Source File，保存为xf.c到上述文件夹下。

（7）把上述红色字体的文件添加到工程中去：Project◊Add Files to…(注意：头文件.h 文件是不能直接添加的，需要在c文件中include才能出现在工程中)（8）编写程序xf.c，完成后再修改中断向量文件vectors.asm，点击工具Compile，如果没有问题，则点击Build（构建），在Debug文件夹下生成.out文件（9）上述无误后，点击File Load Program，下载.out文件，接着点击Run按钮，观察实验结果单击“Run”运行程序一次，然后取消运行。

打开一个图形观察窗口，以观察程序产生的波形。

设置观察窗口参数，起始地址为data_buff，长度为256，16位整型（10）、然后单击“Run”全速运行程序。

用示波器检测“D/A转换单元的的2号孔接口“输出1”输出一个正弦波；程序代码//------------------头文件--------------------------------------//#include "MMRegs.h"#include "DspRegDefine.h" //VC5402 寄存器定义#include "math.h"//---------------------------------------------------------------/* ****************** 宏定义****************************************************************************/#define UCHAR unsigned char#define UINT16 unsigned int#define UINT32 unsigned long#define TRUE 1#define FALSE 0#define pi 3.1415926#define LEN 256//--------------- AD7303 控制字--------------------------------// 15--------14-------13-----12-----11-----10------9-------8-----// INT/EXT---X--------LDAC---PDB---PDA-----A/B-----CR1-----CR0---// 参考电压--保留---- -B省电--A省电----0/A-1/B-//-------------------------------------------------------------//---------------------------------------------------------/* 端口定义*///---------------------------------------------------------ioport UINT16 port8001; //定义输出io端口为0x8001;//----------------------------------------------------------//----------------------------------------------------------/* 全局变量定义*///---------------------------------------------------------int data_buff[LEN]; //数据缓冲UINT16 show = 0x00aa; //LED显示的数值/*********************************************************************** *************** 所使用的函数原型*************************************************************************************** */void cpu_init(void); //初始化CPUvoid Delay(UINT16 numbers); //延迟extern void delay_3us(void); //3us延迟void mcbsp0_write_rdy(UINT16 out_data);//MCBSP0发送一个数据void mcbsp0_init_SPI(void);//MCBSP0设置为SPI模式void mcbsp0_close(void);//MCBSP0关闭//-------------------------------------------------------------------/************************************************************************* *********************** 函数定义****************************************************************************************** *///--------------------------------------------------------------------// 函数名称: void cpu_init(void)// 函数说明: 初始化CPU// 输入参数: 无// 输出参数: 无//--------------------------------------------------------------------void cpu_init(void){asm(" nop ");asm(" nop ");asm(" nop ");//-------------------------------------------------------------------//CLKMD DEFINITIONS:// PLLMUL (bit 15-12) - 0000 PLL multiplier = 0 (mult by 1)// PLLDIV (bit 11) - 0 PLL divider = 0 (div by 1)// PLLCOUNT (bit 10-3)- 11111111 PLL counter set to max// PLLONOFF (bit 2) - 1 PLL on// PLLNDIV (bit 1) - 1 Select PLL mode// PLLSTATUS (bit 1) - x PLL Status (read only)// ------------------// 0000011111111111 = 0x07ff CLKMD=1 X CLKIN//--------------------------------------------------------------------*(unsigned int*)CLKMD=0x0; //switch to DIV mode clkout= 1/2 clkinwhile(((*(unsigned int*)CLKMD)&01)!=0);*(unsigned int*)CLKMD=0x37ff; //switch to PLL X 4 mode//--------------------------------------------------------------------// ST0 DEFINITIONS:// ARP (bit 15-13) - 000 Auxiliary register pointer// TC (bit 12) - 1 Test/control flag// C (bit 11) - 1 Carry is set to 1 if the result of an addition generates a carry; it is cleared to 0 if the// result of a subtraction generates a borrow.// OVA (bit 10) - 0 Overflow flag for accumulator A// OVB (bit 9) - 0 Overflow flag for accumulator B// DP (bit 8-0) - 00000000 Data-memory page pointer// --------------------// 0001 1000 0000 0000 =0x1800 Reset value//--------------------------------------------------------------------// *(unsigned int*)ST0=0x1800;//--------------------------------------------------------------------// ST1 DEFINITIONS:// BRAF (bit 15) - 0 Block-repeat active flag// CPL (bit 14) - 1 Compiler mode CPL=0 DP;CPL=1 SP// XF (bit 13) - 1 XF status// HM (bit 12) - 0 Hold mode// INTM (bit 11) - 1 Interrupt mode INTM=0,All unmasked interrupts are enabled // Reser (bit 10) - 0 Always read as 0// OVM (bit 9) - 0 Overflow mode// SXM (bit 8) - 1 Sign-extension mode// C16 (bit 7) - 0 Dual 16-Bit/double-precision arithmetic mode// FRCT (bit 6) - 0 Fractional mode// CMPT (bit 5) - 0 Compatibility mode// ASM (bit 4-0) - 00000 Accumulator shift mode// --------------------// 0110 1001 0000 0000 =0x2900 Reset value//--------------------------------------------------------------------// *(unsigned int*)ST1=0x6900;//--------------------------------------------------------------------//IPTR DEFINITIONS?// IPTR (bit 15-7) - 001111111 Run-time Interrupt vector location = 0x3f80 (for now) // MP/~MC (bit 6) - 1 Turn off internal Instruction ROM (use RAM)// OVLY (bit 5) - 1 Turn on internal RAM// AVIS (bit 4) - 1 Address visibility on// DROM (bit 3) - 0 Data ROM of FF00~FFFF is external// CLKOFF (bit 2) - 0 Clockout enabled,only for use clkout=cpu clock// SMUL (bit 1) - 1 Saturate before multiply on MAC// SST (bit 0) - 0 Do not saturate before store// -----------------// 0011 1111 1111 0010 = 0x3ff2/*---------------------------------------------------------------------*/*(unsigned int*)PMST=0x3FF2;//---------------------------------------------------------------------// SWWSR DEFINITIONS?// XPA (bit 15) - 0 Extended program address control bit. XPA is used in conjunction with the program space fields// (bits 0 through 5) to select the address range for program space wait states// I/O (bits 14-12) - 111 set to max wait states for seven// Data1 (bits 11-9) - 111 Seven Wait state for Upper data space(0x8000-0xFFFF) // Data2 (bits 8-6) - 111 Seven Wait states for Lower data space (0x0000 - 0x7FFF) // Prog1 (bits 5-3) - 111 Seven Wait state for Upper program space. (xx8000-xxFFFF) // Prog2 (bits 2-0) - 111 Seven Wait states for Program space. (xx0000-xx7FFF) // -----------------// 1 111 111 111 111 111 - 0x7fff/*--------------------------------------------------------------------*/*(unsigned int*)SWWSR=0x7fff;//--------------------------------------------------------------------//SWCR DEFINITIONS?// Reserved (bits 15-1)// SWSM (bit 0) - 1 wait-state base values are mulitplied by 2// for a maximum of 14 wait states.// --------------------------// 0000 0000 0000 0001//--------------------------------------------------------------------*(unsigned int*)SWCR=0x0001;//--------------------------------------------------------------------//BSCR DEFINITIONS?// BNKCMP (bit 15-12) - 1111 Bank compare. Determines the external memory-bank size. BNKCMP is used to mask the four MSBs of// an address.// 1111 4k// 1110 8k// 1100 16k// 1000 32k// 0000 64k// PS-DS (bit 11) - 1 One extra cycle is inserted between consecutive data and program reads.// Reserved (bits 10-3) - 00000000// HBH (bit 2) - 0 The hpi bus holder is disabled// BH (bit 1) - 0 The data bus holder is disabled// EXIO (bit 0) - 0 The external bus interface functions as usual// ------------------------------------// 1111 1000 0000 0000//--------------------------------------------------------------------*(unsigned int*)BSCR=0xf800;//--------------------------------------------------------------------asm(" ssbx intm "); //Disable all mask interrupts//--------------------------------------------------------------------// IMR DEFINITIONS// Writing a 1 to any IMR bit position enables the corresponding interrupt (when INTM = 0)// Reserved (bits 15-14) - xx// DMAC5 (bit 13) - 0 DMA channel 5 interrupt mask bit// DMAC4 (bit 12) - 0 DMA channel 4 interrupt mask bit// BXINT1/DMAC3 (bit 11) - 0 McBSP1 transmit interrupt mask bit, or the DMA channel 3// BRINT1/DMAC2 (bit 10) - 0 McBSP1 receive interrupt mask bit, or the DMA channel 2// HPINT (bit 9) - 0 Host to ’54x interrup /mask// INT3 (bit 8) - 0 External interrupt 3 mask// TINT1/DMAC1 (bit 7) - 0 timer1 interrupt mask bit, or the DMA channel 1 interrupt mask bit// DMAC0 (bit 6) - 0 reserved, or the DMA channel 0 interrupt mask bit// BXINT0 (bit 5) - 0 McBSP0 transmit interrupt mask bit// BRINT0 (bit 4) - 0 McBSP0 receive interrupt mask bit// TINT0 (bit 3) - 0 Timer 0 interrupt mask bit// INT2 (bit 2) - 0 External interrupt 2 mask bit// INT1 (bit 1) - 0 External interrupt 1 mask bit// INT0 (bit 0) - 0 External interrupt 0 mask bit// ------------------------------// 0000 0000 0000 0000//--------------------------------------------------------------------*(unsigned int*)IMR=0x0;//--------------------------------------------------------------------// IFR DEFINITIONS// Writing a 1 to any IFR bit position clear the corresponding interrupt mask ,when corresponding interrupt occur IFR corresponding bit=1// Reserved (bits 15-14) - xx// DMAC5 (bit 13) - 1 DMA channel 5 interrupt flag bit// DMAC4 (bit 12) - 1 DMA channel 4 interrupt flag bit// BXINT1/DMAC3 (bit 11) - 1 McBSP1 transmit interrupt flag bit, or the DMA channel 3// BRINT1/DMAC2 (bit 10) - 1 McBSP1 receive interrupt flag bit, or the DMA channel 2// HPINT (bit 9) - 1 Host to ’54x interrutpflak// INT3 (bit 8) - 1 External interrupt 3 flag// TINT1/DMAC1 (bit 7) - 1 timer1 interrupt flag bit, or the DMA channel 1 interrupt mask bit// DMAC0 (bit 6) - 1 reserved, or the DMA channel 0 interrupt flag bit// BXINT0 (bit 5) - 1 McBSP0 transmit interrupt flag bit// BRINT0 (bit 4) - 1 McBSP0 receive interrupt flag bit// TINT0 (bit 3) - 1 Timer 0 interrupt flag bit// INT2 (bit 2) - 1 External interrupt 2 flag bit// INT1 (bit 1) - 1 External interrupt 1 flag bit// INT0 (bit 0) - 1 External interrupt 0 flag bit// ------------------------------// 1111 1111 1111 1111/*--------------------------------------------------------------------*/*(unsigned int*)IFR=0xffff;//--------------------------------------------------------------------asm(" nop ");asm(" nop ");asm(" nop ");}/************************************************************- 函数名称: void Delay(int numbers)- 函数说明: 延时- 输入参数: numbers- 输出参数: 无************************************************************/void Delay(UINT16 numbers){UINT16 i,j;for(i=0;i<4000;i++)for(j=0;j<numbers;j++);}/************************************************************************** - 函数名称: void mcbsp0_write_rdy(UINT16 out_data);- 函数说明: MCBSP0发送一个数据- 输入参数: data- 输出参数: 无- 补充说明: 内部带是否发送完成的判断************************************************************************** */void mcbsp0_write_rdy(UINT16 out_data){UINT16 j;*(unsigned int*)McBSP0_SPSA=0x0001; //McBSP0_SPSA 指向SPCRwhile ((*(unsigned int *)McBSP0_SPSD&0x0002)==0);//mask XRDY bit,XRDY = 1 Transmitter is ready for new data in DXR[1,2].for(j=0;j<20;j++); //delay*(unsigned int *)McBSP0_DXR1= out_data;}/************************************************************************** - 函数名称: void mcbsp0_init_SPI(void);- 函数说明: MCBSP0设置为SPI模式- 输入参数: 无- 输出参数: 无- 补充说明:***************************************************************************/void mcbsp0_init_SPI(void){//--------------------------------------------------------//复位McBSP0*(unsigned int*)McBSP0_SPSA=0x0000;//SPCR1*(unsigned int*)McBSP0_SPSD=0x0000;//设置SPCR1.0(RRST=0)*(unsigned int*)McBSP0_SPSA=0x0001;//SPCR2*(unsigned int*)McBSP0_SPSD=0x0000;//设置SPCR1.0(XRST=0)//---------------------------------------------------------//延迟Delay(0); //延迟4000*CPU 时钟周期//等待复位稳定//---------------------------------------------------------//配置McBSP0为SPI 模式*(unsigned int*)McBSP0_SPSA=0x0000;//SPCR1*(unsigned int*)McBSP0_SPSD=0x1800;//DLB (bit 15) 0 Digital loop back mode disabled//RJUST (bit 14-13) 00 Right-justify and zero-fill MSBs in DRR[1,2]//CLKSTP (bit 12-11) 11//X (bit 10-8) 000 Reserved//DXENA (bit 7) 0 data transmit delay bit.DX enabler is off//ABIS (bit 6) 0 A-bis mode is disabled//RINTM (bit 5-4) 00 RINT driven by RRDY//RSYNER (bit 3) 0 No synchronization error//RFULL (bit 2) 0 RBR[1,2] is not in overrun condition//RRDY (bit 1) 0 Receiver is not ready//RRST (bit 0) 0 Serial port receiver is disabled and in reset state//---------- 0001 1000 0000 0000*(unsigned int*)McBSP0_SPSA=0x0001;//SPCR2*(unsigned int*)McBSP0_SPSD=0x0000;//X (bit 15-10) 000000 Reseved//FREE (bit 9) 0 Free running mode is disabled//SOFT (bit 8) 0 SOFT mode is disabled//FRST (bit 7) 0 Frame-synchronization logic is reset.//GRST (bit 6) 0 Sample rate generator is reset//XINTM (bit 5-4) 00 XINT driven by XRDY//XSYNER (bit 3) 0 No synchronization error//XEMPTY (bit 2) 0 XSR[1,2] is empty//XRDY (bit 1) 0 Transmitter is not ready//XRST (bit 0) 0 serial port transmitter is disabled and in reset state//---------- 0000 0000 0000 0000*(unsigned int*)McBSP0_SPSA=0x000E;//PCR*(unsigned int*)McBSP0_SPSD=0x0A0C;//X (bit 15-14) 00 Reseved//XIOEN (bit 13) 0 DX, FSX and CLKX are configured as serial port//RIOEN (bit 12) 0 DR, FSR, CLKR and CLKS are configured as serial port//FSXM (bit 11 1 Frame synchronization is determined by the sample rate//generator//FSRM (bit 10) 0 Frame-synchronization pulses generated by an external//device. FSR is an input pin//CLKXM (bit 9) 1 CLKX is an output pin and is driven by the internal sample//rate generator.//CLKRM (bit 8) 0 Receive clock (CLKR) is an input driven by an external//X (bit 7) 0 Reserved//CLKS_STAT(bit 6) 0 CLKS pin status.//DX_STAT (bit 5) 0 DX pin status.//DR_STAT (bit 4) 0 DR pin status.//FSXP (bit 3) 1 Frame-synchronization pulse FSX is active low//FSRP (bit 2) 1 Frame-synchronization pulse FSR is active low//CLKXP (bit 1) 0 Transmit data sampled on rising edge of CLKX//CLKRP (bit 0) 0 Receive data sampled on falling edge of CLKR//---------- 0000 1010 0000 1100*(unsigned int*)McBSP0_SPSA=0x0002;//RCR1*(unsigned int*)McBSP0_SPSD=0x0040;////X (bit 15) 0 Reserved//RFRLEN1 (bit 14-8) 0000000 Receive Frame Length 1,RFRLEN1 = 000 0000 1 word per frame //RWDLEN1 (bit 7-5) 010 Receive Word Length 1,RWDLEN1 = 010 16 bits//X (bit 4-0) 00000 Reserved//----- 0000 0000 0100 0000*(unsigned int*)McBSP0_SPSA=0x0003;//RCR2*(unsigned int*)McBSP0_SPSD=0x0041;////RPHASE (bit 15) 0 Receive Phases，RPHASE = 0 Single-phase frame//RFRLEN2 (bit 14-8) 0000000 Receive Frame Length 2，RFRLEN2 = 000 0000 1 word per frame//RWDLEN2 (bit 7-5) 010 Receive Word Length 2，RWDLEN2 = 010 16 bits//RCOMPAND(bit 4-3) 00 No companding,//RFIG (bit 2) 0 Receive Frame Ignore//RDATDLY (bit 1-0) 01 Receive data delay，1-bit data delay//----- 0000 0000 0100 0001*(unsigned int*)McBSP0_SPSA=0x0004;//XCR1*(unsigned int*)McBSP0_SPSD=0x0040;//X (bit 15) 0 Reserved//XFRLEN1 (bit 14-8) 0000000 Transmit Frame Length 1,RFRLEN1 = 000 0000 1 word per frame//XWDLEN1 (bit 7-5) 010 Transmit Word Length 1,RWDLEN1 = 010 16 bits//X (bit 4-0) 00000 Reserved//----- 0000 0000 0100 0000*(unsigned int*)McBSP0_SPSA=0x0005;//XCR2*(unsigned int*)McBSP0_SPSD=0x0041;//XPHASE (bit 15) 0 Transmit Phases，RPHASE = 0 Single-phase frame//XFRLEN2 (bit 14-8) 0000000 Transmit Frame Length 2，RFRLEN2 = 000 0000 1 word per frame//XWDLEN2 (bit 7-5) 010 Transmit Word Length 2，RWDLEN2 = 010 16 bits//XCOMPAND(bit 4-3) 00 No companding,//XFIG (bit 2) 0 Transmit Frame Ignore//XDATDLY (bit 1-0) 01 Transmit data delay，1-bit data delay//----- 0000 0000 0100 0001*(unsigned int*)McBSP0_SPSA=0x0006;//SRGR1//*(unsigned int*)McBSP0_SPSD=0x0063;*(unsigned int*)McBSP0_SPSD=0x0009;//FWID (bit 15-8) 00000000 Frame Width//CLKGDV (bit 7-0) 0110 0100 Sample Rate Generator Clock Divider//CLKG = CPUCLOCK/(CLKGDV+1)// WHEN CPUCLOCK=40MHZ，CLKG=4MHZ//---- 0000 0000 0110 0011*(unsigned int*)McBSP0_SPSA=0x0007;//SRGR2*(unsigned int*)McBSP0_SPSD=0x2000;//GSYNC (bit 15) 0 don't care//CLKSP (bit 14) 0 don't care//CLKSM (bit 13) 1 Sample rate generator clock derived from CPU clock//FSGM (bit 12) 0 Sample Rate Generator Transmit Frame-Synchronization Mode//in spi mode,must be =0//FPER (bit 11-0) 000000000000 Frame Period，this bits ignored//------- 0010 0000 0000 0000*(unsigned int*)McBSP0_SPSA=0x0001;//SPCR2*(unsigned int*)McBSP0_SPSD=(*(unsigned int*)McBSP0_SPSD)|0x0040;//GRST = 1 Sample rate generator is pulled out of reset//延迟Delay(0); //延迟4000*CPU 时钟周期//等待时钟稳定*(unsigned int*)McBSP0_SPSA=0x0000;//SPCR1*(unsigned int*)McBSP0_SPSD=(*(unsigned int*)McBSP0_SPSD)|0x0001;//RRST=1 enable McBSP1 receiver*(unsigned int*)McBSP0_SPSA=0x0001;//SPCR2*(unsigned int*)McBSP0_SPSD=(*(unsigned int*)McBSP0_SPSD)|0x0001;//XRST=1 enable McBSP1 transmitter*(unsigned int*)McBSP0_SPSA=0x0001;//SPCR2*(unsigned int*)McBSP0_SPSD=(*(unsigned int*)McBSP0_SPSD)|0x0080;//FRST = 1 Frame-sync signal FSG is generated//延迟Delay(0); //延迟4000*CPU 时钟周期//等待时钟稳定}void mcbsp0_close(){*(unsigned int*)McBSP0_SPSA=0x0000;//地址指针指向SPCR1*(unsigned int*)McBSP0_SPSD=*(unsigned int*)McBSP0_SPSD&0xFFFE;//SET SPCR1.0(RRST)=1,禁止MCBSP0接收*(unsigned int*)McBSP0_SPSA=0x0001;//地址指针指向SPCR2*(unsigned int*)McBSP0_SPSD=*(unsigned int*)McBSP0_SPSD&0xFFFE;//SET SPCR2.0(XRST)=1,禁止MCBSP0发送Delay(0);}/******************* 主函数********************/void main(){UINT16 i;//----------系统初始化---------------------------------------asm(" nop ");cpu_init(); //初始化CPU//-----------------------------------------------------------asm(" nop ");mcbsp0_init_SPI();//MCBSP0设置为SPI模式asm(" nop ");//-----------------------------------------------------------//----------产生正弦波的数据------------------------for(i=0; i<LEN;i++){data_buff[i] = 127 + (int)(127.0*sin(2*pi*i/(LEN-1)));data_buff[i] = data_buff[i] & 0x00ff;}asm(" nop ");//---------发送给AD7303-----------------------------for(;;){for(i=0; i<LEN;i++){//----------------------------------------------------------------mcbsp0_write_rdy(data_buff[i] & 0x00ff); //发送控制字、数据给AD7303asm(" nop ");delay_3us(); //延迟等待DA转换结束/****output high ******************/}}}4 输出结果实验二：1 实验设备计算机，CCS 2.0版软件，DSP仿真器，实验箱，示波器。