r0
r8
r1
r9
31
0
r2
r10
r3
r11
CPSR
r4
r12
r5
r13
r6
r14
NZCV
r7
r15 (PC)
Endianness
Relationship between bit and byte/word ordering defines endianness:
bit 31
bit 0 bit 0
first column). Instructions often start in later columns. Columns run to end of line.
ARM assembly language example
label1
ADR r4,c LDR r0,[r4] ; a comment ADR r4,d LDR r1,[r4] SUB r0,r0,r1 ; comment
by repeated addition?
Architecture & Organization 2
All Intel x86 family share the same basic architecture
The IBM System/370 family share the same basic architecture
bytes. ARM addresses can be 32 bits long. Address refers to byte.
Address 4 stபைடு நூலகம்rts at byte 4.
Can be configured at power-up as either little- or big-endian mode.