CD4066中文资料:CD4066是四双向模拟开关,主要用作模拟或数字信号的多路传输。
引出端排列与CC4016一致,但具有比较低的导通阻抗。
另外,导通阻抗在整个输入信号范围内基本不变。
CD4066由四个相互独立的双向开关组成,每个开关有一个控制信号,开关中的p和n器件在控制信号作用下同时开关。
这种结构消除了开关晶体管阈值电压随输入信号的变化,因此在整个工作信号范围内导通阻抗比较低。
与单通道开关相比,具有输入信号峰值电压范围等于电源电压以及在输入信号范围内导通阻抗比较稳定等优点。
但若应用于采保电路,仍推荐CD4016。
当模拟开关的电源电压采用双电源时,例如=﹢5V,=﹣5V(均对地0V而言),则输入电压对称于0V的正、负信号电压(﹢5V~﹣5V)均能传输。
这时要求控制信号C=“1”为+5V,C=“0”为-5V,否则只能传输正极性的信号电压。
CD4066引脚功能图内部方框图Absolute Maximum Ratings 绝对最大额定值:Supply V oltage电源电压(VDD)−0.5V to +18VInput V oltage输入电压(VIN)−0.5V to VCC+0.5V Storage Temperature Range储存温度范围(TS)−65℃ to +150℃Power Dissipation功耗(PD)Dual-In-Line 普通双列封装700 mWSmall Outline 小外形封装500 mWLead Temperature 焊接温度(TL)Soldering, 10 seconds)(焊接10秒)300℃Recommended Operating Conditions 建议操作条件:Supply V oltage电源电压(VDD)3V to 15V Input V oltage输入电压(VIN)0V to VDD Operating Temperature Range工作温度范围(TA)−55℃ to +125℃DC Electrical Characteristics 直流电气特性:Sym bol 符号Parameter 参数Conditions 条件−55℃+25℃+125℃Units 单位最小最大最小典型最大最小最大IDD QuiescentDevice Current静态电流VDD = 5V0.250.010.257.5μA VDD = 10V0.50.010.515VDD = 15V1.0.011.030SIGNAL INPUTS AND OUTPUTSRON“ON” RL = 10 kΩ to (VDD − VSS/2) VC = VDD, VSS to VDDResistanceVDD = 5V 802701051300ΩVDD = 10V 31120400550VDD = 15V 2080240320ΔRO N Δ“ON”ResistanceBetween Any 2of 4 SwitchesRL = 10kΩ to (VDD − VSS/2) VCC = VDD, VIS = VSS to VDDVDD = 10V10ΩVDD = 15V5IIS Input or OutputLeakage Switch“OFF”VC = 0±5±0.1±50±500nACONTROL INPUTSVIL C LOW LevelInput V oltage输入低电平电压VIS = V SS and VDD VOS = V DD and VSS IIS = ± 10μAVDD = 5V1.52.251.5 1.5V VDD = 10V3.4.5 3.0 3.0VDD = 15V4.6.754.0 4.0VIH C HIGH LevelInput V oltage输入高电平电压VDD = 5V 3.5 3.52.753.5V VDD=10V (Note7)7.07.0 5.57.VDD = 15V11.11.8.2511.IIN Input Current输入电流VDD−VSS = 15VVDD≥VIS≥VSSVDD≥VC≥VSS−0.1−10−5−0.1−0.1μA0.110−50.10.1AC Electrical Characteristics 交流电气特性:Symbol 符号Parameter 参数Conditions 条件最小典型最大Units单位tPHL , tPLH Propagation DelayTime Signal Inputto Signal Output信号输入到信号输出传递延迟时间VC = VDD, CL = 50 pF, (Figure 1)RL = 200kVDD = 5V2555nsVDD = 10V1535VDD = 15V125tPZH , tPZL Propagation DelayTime Control Inputto Signal OutputHigh Impedance toLogical LevelRL = 1.0kΩ, CL = 50pF, (Figure 2, Figure 3)VDD = 5V125nsVDD = 10V6VDD = 15V5tPHZ , tPLZ Propagation DelayTime Control Inputto Signal OutputLogical Level toHigh ImpedanceSine WaveDistortionFrequencyResponse-Switch“ON” (Frequencyat −3 dB)RL = 1.0kΩ, CL = 50pFVDD = 5V125nsVDD = 10V6VDD = 15V5VC = VDD = 5V, VSS = −5V RL = 10 kΩ,VIS = 5Vp-p, f= 1 kHz, (Figure 4)0.1%VC = VDD = 5V, VSS = −5V, RL = 1 kΩ,VIS = 5Vp-p, 20 Log10 VOS/VOS (1kHz)−dB,(Figure 4)4MHzFeedthrough —Switch “OFF”(Frequency at −50dB) CrosstalkBetween Any TwoSwitches(Fre quency at −50dB) Crosstalk;Control Input toSignal OutputMaximum ControlInputVDD = 5.0V, VCC = VSS = −5.0V, RL = 1kΩ, VIS = 5.0Vp-p, 20 Log10, VOS/VIS =−50 dB, (Figure 4)1.25VDD=VC(A) =5.0V; VSS = VC(B) = 5.0V,RL1kΩ, VIS(A) = 5.0Vp-p, 20 Log10,VOS(B)/VIS(A) = −50dB (Figure 5)0.9MHzVDD =10V,RL=10kΩ,RIN=1.0kΩ,VCC=10V Square Wave, CL=50pF(Figure 6)15mVp-p RL=1.0kΩ, CL=50pF, (Figure 7)VOS(f) = ½ VOS(1.0 kHz)VDD = 5.0V6.MHzVDD = 10V8.VDD = 15V8.5CIS Signal InputCapacitance信号输入电容8.pFCOS Signal OutputCapacitance信号输出电容VDD = 10V8.pFCIO S FeedthroughCapacitance馈电容VC = 0V0.5pFCIN Control InputCapacitance控制输入电容5.7.5pF图1 CD4066是四双向模拟开关驱动继电器应用电路CD4066是四双向模拟开关,集成块SCR1~SCR4为控制端,用于控制四双向模拟开关的通断。