1.Product profile1.1General descriptionA 20W LDMOS RF transistor for broadcast applications and industrial applications in the HF and VHF band.1.2FeaturesI Typical CW performance at frequency of 225MHz,a supply voltage of 50V and an I Dqof 50 mA:N Average output power =20W N Power gain =27.5dB N Efficiency =70%I Easy power controlI Integrated ESD protection I Excellent ruggedness I High efficiencyI Excellent thermal stabilityI Designed for broadband operation (10 MHz to 500 MHz)I Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS)1.3ApplicationsI Industrial, scientific and medical applications I Broadcast transmitter applicationsBLF571HF / VHF power LDMOS transistorRev. 01 — 11 December 2008Preliminary data sheetTable 1.Production test performanceMode of operationf V DS P L G p ηD(MHz)(V)(W)(dB)(%)CW225502027.570CAUTIONThis device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling.2.Pinning information[1]Connected to flange.3.Ordering information4.Limiting values5.Thermal characteristicsTable 2.PinningPin Description Simplified outlineGraphic symbol1drain 2gate 3source[1]123sym112132Table 3.Ordering informationType numberPackage NameDescriptionVersion BLF571-flanged LDMOST ceramic package; 2 mounting holes;2leadsSOT467CTable 4.Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).Symbol ParameterConditionsMin Max Unit V DS drain-source voltage -110V V GS gate-source voltage −0.5+11V I D drain current - 3.6A T stg storage temperature −65+150°C T jjunction temperature-225°CTable 5.Thermal characteristics Symbol ParameterConditionsTyp Unit R th(j-c)thermal resistance from junction to caseT case =80°C; P L =20W2.9K/W6.CharacteristicsTable 6.DC characteristicsT j = 25°C unless otherwise specifiedSymbol Parameter Conditions Min Typ Max UnitV(BR)DSS drain-source breakdownvoltageV GS=0V; I D=0.25mA110--V V GS(th)gate-source threshold voltage V DS=10 V; I D=25mA 1.25 1.7 2.25VV GSq gate-source quiescent voltage V DS=50 V; I D=50mA 1.25 1.75 2.25VI DSS drain leakage current V GS=0V; V DS=50V-- 1.4µAI DSX drain cut-off current V GS=V GS(th)+3.75 V;V DS=10V3.0 3.6-AI GSS gate leakage current V GS=11V; V DS=0V--140nAg fs forward transconductance V DS=10V; I D=1.25A- 1.8-SR DS(on)drain-source on-stateresistance V GS=V GS(th) + 3.75V;I D=833mA- 1.34-ΩC rs feedback capacitance V GS=0V; V DS=50V;f=1MHz-0.18-pFC iss input capacitance V GS=0V; V DS=50V;f=1MHz-22.9-pFC oss output capacitance V GS=0V; V DS=50V;f=1MHz-9.64-pFTable 7.RF characteristicsMode of operation: CW; f=225 MHz; RF performance at V DS=50V; I Dq=50mA; T case=25°C; unless otherwise specified; in a class-AB production test circuitSymbol Parameter Conditions Min Typ Max Unit G p power gain P L = 20 W25.527.529.5dB RL in input return loss P L = 20 W1013-dBηD drain efficiency P L = 20 W6770-%6.1Ruggedness in class-AB operationThe BLF571is capable of withstanding a load mismatch corresponding to VSWR =13:1through all phases under the following conditions: V DS =50V; I Dq =50 mA; P L =20 W;f =225MHz.7.Application information7.1Impedance informationV GS = 0 V; f = 1 MHz.Fig 1.Output capacitance as a function of drain-source voltage; capacitance value without internal matchingV DS (V)05040203010001aaj1722030104050C oss (pF)Table 8.Typical impedanceSimulated Z S and Z L test circuit impedances.f Z S Z L MHz ΩΩ2259.7 + j31.531.7 + j29.3Fig 2.Definition of transistor impedance001aaf059drain Z LZ Sgate7.2ReliabilityTTF (0.1 % failure fraction).(1)T j = 100°C (2)T j = 110°C (3)T j = 120°C (4)T j = 130°C (5)T j = 140°C (6)T j = 150°C (7)T j = 160°C (8)T j = 170°C (9)T j = 180°C (10)T j = 190°C (11)T j = 200°CFig 3.BLF571 electromigration001aaj17310210104103105Y ears 1I DS(DC) (A)0 1.61.20.80.4(1)(2)(3)(4)(5)(6)(7)(8)(9)(10)(11)8.Test information8.1RF performanceThe following figures are measured in a class-AB production test circuit.8.1.11-Tone CWV DS = 50 V; I Dq =50 mA; f = 225 MHz.V DS = 50 V; f =225MHz.(1)I Dq = 20 mA (2)I Dq = 40 mA (3)I Dq = 50 mA (4)I Dq = 60 mA (5)I Dq = 80 mAFig 4.Power gain and drain efficiency as function of load power; typical valuesFig 5.power gain as a function of load power;typical values001aaj174P L (W)03020102515526242830G p (dB)22402060800ηD (%)G pηD001aaj175P L (W)03020102515526242830G p (dB)22(4)(3)(2)(1)(5)8.1.22-Tone CWV DS = 50 V; I Dq =50 mA; f = 225 MHz.(1)P L(1dB) = 43.3 dBm (21.4 W)(2)P L(3dB) = 44 dBm (25.1 W)Fig 6.Load power as function of input power; typical valuesP i (dBm)1321191517001aaj1764446424850P L (dBm)40(1)(2)ideal P LP LV DS = 50 V; I Dq =50 mA; f 1 = 224.95 MHz;f 2=225.05MHz.V DS = 50 V; f 1 = 224.95 MHz; f 2=225.05MHz.(1)I Dq = 20 mA (2)I Dq = 40 mA (3)I Dq = 50 mA (4)I Dq = 60 mA (5)I Dq = 80 mAFig 7.Power gain and drain efficiency as function of peak envelope load power; typical valuesFig 8.Third order intermodulation distortion as a function of peak envelope load power; typical values001aaj177P L(PEP) (W)030201026242830G p (dB)ηD (%)22402060800G pηDP L(PEP) (W)0302010001aaj178−40−200IMD3(dBc)−60(2)(3)(4)(5)(1)8.2Test circuit[1]American Technical Ceramics type 100B or capacitor of same quality.[2]Printed-Circuit Board (PCB): Rogers 5880;εr = 2.2 F/m; height = 0.79 mm; Cu (top/bottom metallization);thickness copper plating =35µm.Table 9.List of componentsAll capacitors should be soldered vertically. For test circuit, see Figure 9 and Figure ponent DescriptionValueRemarksC1, C3, C4,C5, C14multilayer ceramic chip capacitor 100 pF [1]C2multilayer ceramic chip capacitor 39 pF [1]C6multilayer ceramic chip capacitor 68 pF [1]C7, C9multilayer ceramic chip capacitor 1 nF [1]C8multilayer ceramic chip capacitor 4.7 F TDK C4532X7R1E475MT020U or equivalentC10multilayer ceramic chip capacitor 8.2 pF [1]C11electrolytic capacitor470 FC12multilayer ceramic chip capacitor 33 pF [1]C13multilayer ceramic chip capacitor 15 pF [1]L11 turn enamelled copper wireD =5.5mm;d =1mm;length =1mm L2 2 turns enamelled copper wireD =3.5mm;d =1mm;length =3mm L3 5 turns enamelled copper wireD =6mm;d =1mm;length =5mm L4 3.3 turns enamelled copper wireD =3mm;d =1mm;length =4mm L5 3 turns enamelled copper wireD =3mm;d =1mm;length =3mm L6stripline-[2](L × W)16.5mm × 2.4mm L7, L8, L10,L11,L17,L19,L20stripline -[2](L × W)3.0mm × 5.0mmL9stripline -[2](L × W)43.0mm × 2.4mm L12, L15stripline -[2](L × W)3.5mm × 2.4mm L13, L14stripline -[2](L × W)8.0mm × 8.0mm L16stripline -[2](L × W)3.0mm × 5.9mm L18stripline -[2](L × W)27.0mm × 2.4mm L21stripline-[2](L × W)28.5mm × 2.4mmR1metal film resistor1000Ω; 0.6 WFig 9.Class-AB common-source production test circuitC1input50 ΩC14output 50 ΩC8C7V GGR1L13L11L12C6C5L10L2L17L16L4L20L19L5L8L7L1L9L18L21L6L14L3C11C9V DD001aaj179L15C4C3C2C12C13C10Fig ponent layout for class-AB production test circuit001aaj180C11C9C7C8C10C12C6C5C4C2C3C1C13C14L3R1L4L2L1L59 mm NXP BLF571 225 MHz INPUT PCB REV1NXP BLF571 225 MHz OUTPUT PCB REV25.5 mm6.5 mm 5 mm3 mm9.Package outlineFig 11.Package outline SOT467CREFERENCESOUTLINEVERSION EUROPEAN PROJECTIONISSUE DATE IECJEDECEIAJSOT467C99-12-0699-12-280510 mmscaleFlanged LDMOST ceramic package; 2 mounting holes; 2 leads0.150.105.595.339.259.041.651.4018.5417.02DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)3.433.184.673.942.211.96DD 1U 1132AU 2EE 1pbHQFcUNIT Q c D 9.279.02D 1 5.925.77E 5.975.72E 1F H p q mm 0.1840.155inchb 14.2720.4520.19U 2U 1 5.975.720.25w 10.510.0060.0040.2200.2100.3640.3560.0650.0550.730.670.1350.1250.0870.0770.3650.3550.2330.2270.2350.2250.5620.8050.7950.2350.2250.0100.020w 2A M MC CAw 1w 2A B M M MqBSOT467C10.AbbreviationsTable 10.AbbreviationsAcronym DescriptionCW Continuous WaveEDGE Enhanced Data rates for GSM EvolutionGSM Global System for Mobile communicationsHF High FrequencyLDMOS Laterally Diffused Metal-Oxide SemiconductorLDMOST Laterally Diffused Metal-Oxide Semiconductor TransistorRF Radio FrequencyTTF Time T o FailureVHF Very High FrequencyVSWR Voltage Standing-Wave Ratio11.Revision historyTable 11.Revision historyDocument ID Release date Data sheet status Change notice Supersedes BLF571_120081211Preliminary data sheet--12.Legal information12.1Data sheet status[1]Please consult the most recently issued document before initiating or completing a design.[2]The term ‘short data sheet’ is explained in section “Definitions”.[3]The product status of device(s)described in this document may have changed since this document was published and may differ in case of multiple devices.The latest product status information is available on the Internet at URL .12.2DefinitionsDraft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness ofinformation included herein and shall have no liability for the consequences of use of such information.Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s)and title.A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.12.3DisclaimersGeneral —Information in this document is believed to be accurate andreliable.However,NXP Semiconductors does not give any representations or warranties,expressed or implied,as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including withoutlimitation specifications and product descriptions, at any time and without notice.This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use —NXP Semiconductors products are not designed,authorized or warranted to be suitable for use in medical, military, aircraft,space or life support equipment, nor in applications where failure ormalfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmentaldamage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.Limiting values —Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134)may cause permanent damage to the device.Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in theCharacteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale,as published at /profile/terms , including those pertaining to warranty,intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant,conveyance or implication of any license under any copyrights,patents or other industrial or intellectual property rights.Quick reference data —The Quick reference data is an extract of theproduct data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.12.4TrademarksNotice:All referenced brands,product names,service names and trademarks are the property of their respective owners.13.Contact informationFor more information, please visit:For sales office addresses, please send an email to:salesaddresses@Document status [1][2]Product status [3]DefinitionObjective [short] data sheet Development This document contains data from the objective specification for product development.Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.Product [short] data sheetProductionThis document contains the product specification.14.Contents1Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 11.1General description. . . . . . . . . . . . . . . . . . . . . . 11.2Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.3Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Pinning information. . . . . . . . . . . . . . . . . . . . . . 23Ordering information. . . . . . . . . . . . . . . . . . . . . 24Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 25Thermal characteristics. . . . . . . . . . . . . . . . . . . 26Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 36.1Ruggedness in class-AB operation. . . . . . . . . . 47Application information. . . . . . . . . . . . . . . . . . . 47.1Impedance information. . . . . . . . . . . . . . . . . . . 47.2Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58Test information. . . . . . . . . . . . . . . . . . . . . . . . . 68.1RF performance . . . . . . . . . . . . . . . . . . . . . . . . 68.1.11-T one CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68.1.22-T one CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78.2T est circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89Package outline . . . . . . . . . . . . . . . . . . . . . . . . 1010Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 1111Revision history. . . . . . . . . . . . . . . . . . . . . . . . 1112Legal information. . . . . . . . . . . . . . . . . . . . . . . 1212.1Data sheet status . . . . . . . . . . . . . . . . . . . . . . 1212.2Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1212.3Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 1212.4T rademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 1213Contact information. . . . . . . . . . . . . . . . . . . . . 1214Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’.© NXP B.V.2008.All rights reserved.For more information, please visit: For sales office addresses, please send an email to: salesaddresses@Date of release: 11 December 2008。
