DS1610资料

DS1610Partitioned NV ControllerDS1610

022598 1/10FEATURES•Converts CMOS RAMs into nonvolatile memories•SOIC version is pin compatible with the Dallas Semi-conductor DS1210 NV Controller•Unconditionally write protects all of memory when Vccis out of tolerance•Write protects selected blocks of memory regardlessof VCC status when programmed•Automatically switches to battery backup supplywhen power fail occurs•Provides for multiple batteries•Consumes less than 100 nA of battery current•Test battery on power up by inhibiting the secondmemory cycle•Optional 5% or 10% Power Fail Detection•16-pin DIP or 16-pin SOIC Surface Mount Package•Low forward voltage drop on the VCC switch with cur-rents of up to 150 mA•Optional industrial temperature range of -40°C to +85°CPIN ASSIGNMENT12345678161514131211109AWVCCOAXVBAT1AYTOLDISGNDPF0VCCIAZVBAT2WEOCEOWEICEI16-Pin DIP and 16-Pin SOICPIN DESCRIPTIONVCCI–Input +5 Volt SupplyVBAT1–+ Battery 1 InputVBAT2–+ Battery 2 InputVCCO–RAM Power (VCC) SupplyGND–GroundCEI–Chip Enable InputCEO–Chip Enable OutputWEI–Write Enable InputWEO–Write Enable OutputTOL–Power Supply Tolerance SelectAW - AZ–Address InputsDIS–Memory Partition DisablePF0–Power Fail OutputDESCRIPTIONThe DS1610 is a low power CMOS circuit which solvesthe application problems of converting CMOS RAMSinto nonvolatile memories. In addition the device hasthe ability to unconditionally write protect blocks ofmemory so that inadvertent write cycles do not corruptprogram and special data space. The power supply in-coming voltage at the VCCI input pin is constantly moni-tored for an out of tolerance condition. When such acondition is detected, both the chip enable and write en-able outputs are inhibited to protect stored data. Thebattery inputs are used to supply VCCO with power whenVCCI is less than the battery input voltages. Special cir-cuitry uses a low leakage CMOS process which affordsprecise voltage detection at extremely low current con-sumption. By combining the DS1610 Partitioned NVController chip with a CMOS memory and batteries,nonvolatile RAM operation can be achieved.The DS1610 Partitioned NV Controller functions like theDallas Semiconductor DS1210 NV controller when the(DIS) disable pin is grounded. An internal pulldown re-sistor to ground on the DIS pin of the DS1610S allows itto retrofit into DS1210S applications. When the DIS pinis grounded the address inputs AW - AZ and the write en-able input WEI are ignored. Also the power fail outputPFO and the write enable output WEO are tristated.DS1610

022598 2/10OPERATION – DISABLE PIN CONNECTEDTO VCCOThe DS1610 performs five circuit functions required tobattery backup a RAM. First, a switch is provided to di-rect power from the battery or the incoming power sup-ply (VCCI) depending on which is greater. This switchhas a voltage drop of less than 0.2 volts. The secondfunction provided by the DS1610 is power fail detection.The incoming supply (VCCI) is constantly monitored.When the supply goes out of tolerance a precision com-parator detects power failure and inhibits both the chipenable output (CEO) and the write enable output(WEO). A third function of write protection is accom-plished by holding both the chip enable output CEO andwrite enable output WEO to within 0.2 volts of VCCOwhen VCCI is out of tolerance. If CEI is low at the timethat power fail detection occurs the CEO signal is keptlow until CEI is brought high again. However, CEO isforced high after 1.5 µsec regardless of the state of CEI.Similarly, if WEI is low at the time that power fail detec-tion occurs, the WEO is signal will remain low until WEIis brought high or 1.5 µsec elapses. The delay of writeprotection until the current memory cycle is completeprevents corrupted data. Power fail detection occurs inthe range of 4.75 to 4.5 volts with the tolerance pin TOLgrounded. If the tolerance pin is connected to VCCOthen power fail detection occurs in the range of 4.5 voltsto 4.25 volts. The PF0 signal is driven low and remainslow until VCCI returns to nominal conditions. Duringnominal supply conditions CEO will follow CEI andWEO will follow WEI. The fourth function which theDS1610 performs is a battery status warning so that po-tential data loss is avoided. Each time VCCI is applied tothe device battery status is checked with a precisioncomparator. If during battery backup, no switch oc-curred from one battery to the other, the voltage of thebattery supplying power when VCCI is applied ischecked. If this voltage is less than 2.0 volts the secondchip enable cycle after power is applied is inhibited. Ifany switch from one battery to another did occur thevoltage of both batteries is checked. If either voltage isless than 2.0 volts the second chip enable cycle will beinhibited. Battery status can therefore be determined byperforming a read cycle after power up to any location inmemory, verifying that memory location’s contents. Asubsequent write cycle can then be executed to thesame memory location altering the data. If the next readcycle fails to verify the written data then the data is indanger of being corrupted. The fifth function of theDS1610 provides for battery redundancy. When dataintegrity is extremely important it is wise to use two bat-teries to insure reliability. The DS1610 controller pro-vides an internal isolation switch which allows the con-nection of two batteries. When entering battery backupoperation, the battery with the highest voltage is se-lected for use. If one battery should fail, the other wouldthen supply energy to the connected load. The switch toa redundant battery is transparent to circuit operationand to the user. In applications where battery redundan-cy is not a major concern a single battery should be con-nected to the BAT1 pin. The BAT2 battery pin must begrounded. When batteries are first connected to one orboth of the VBAT pins VCCO will not show the battery po-tential until VCCI is applied and removed for the firsttime.OPERATION – WRITE PROTECTIONPROGRAMMING MODEWhen the disable pin is connected to VCCI or VCCO, theDS1610 performs all of the functions described earlierwith the addition of a partition switch which selectivelywrite protects blocks of memory. The state of the DISpin is strobed and latched as VCCI crosses the power failtrip point so that the DS1610 maintains its configurationduring power loss. If the strobed value of DIS is a highthe internal pulldown resistor on the DIS pin will be dis-connected in the power fail state to eliminate the possi-bility of battery discharge. The register controlling thepartition switch is selected by recognition of a specificbinary pattern which is sent on address lines AW-AZ.These address lines are normally the four upper orderaddress lines being sent to RAM. The pattern is sent by20 consecutive read cycles with the exact pattern asshown in Table 1. Pattern matching must be accom-plished using read cycles; any write cycles will reset thepattern matching circuitry. If this pattern is matched per-fectly, then the 21st through 24th read cycle will load thepartition switch. Since there are 16 possible write pro-tected partitions, the size of each partition is determinedby the size of the memory. For example, a 128K X 8memory would be divided into 16 partitions of 128K/16or 8K X 8. Each partition is represented by one of the 16bits contained in the 21st through 24th read cycle as de-fined by AW through AZ and shown in Table 2. A logical 1in a bit location sets that partition to write protect. A log-ical 0 in a bit location disables write protection. For ex-ample, if during the pattern match sequence bit 22 onaddress pin AX was a 1, this would cause the partitionregister location for partition 5 to be set to a 1. This inturn would cause the DS1610 to inhibit WEO from goinglow as WEI goes low whenever AZAYAXAW=0101. Notethat while setting the partition register, data which is be-