Trace32-ICD使用说明

trace32的使⽤培训TRACE32 Online HelpTRACE32 DirectoryTRACE32 IndexTRACE32 Documents ......................................................................................................................! ICD In-Circuit Debugger ................................................................................................................! ICD Quick Installation and Tutorial ...........................................................................................! ICD Tutorial (1)Tutorial (3)About the Tutorial3 Start TRACE32-ICD4 Setup the Application Properties6 The Online Help7 Setup the Debug Environment10 Batch Jobs13 The User Interface15 How to Display and Modify CPU Registers18 How to Display and Modify the Special Function Registers20 How to Display and Modify Memory21 How to Debug the Program25 How to Set Breakpoints34 Software Breakpoints34 Breakpoints in ROM, Flash, EEPROM38 Breakpoints on Data Accesses39 Onchip Breakpoints (Overview)41 Display and Modify HLL Variables43 Format HLL-Variables45 Exit TRACE3248Version July, 26 2004TutorialAbout the TutorialWhat is it about?This is a tutorial for all In-Circuit Debuggers (TRACE32-ICD), that are implemented using their onchip debug interface. T ypical examples for onchip debug interfaces are BDM, JT AG, ONCE …Preconditions:The tutorial assumes that the development system is already installed. Y ou should have basic knowledge of the C-programming language in order to be able to follow the example code found in this tutorial. In addition working with WINDOWS is assumed as known. Also some knowledge of the used processor andassembler/compiler is necessary to get your debug system running.Purpose of this tutorial:The purpose of this tutorial is to get your debug system running, to write the batch job that does the necessary startup procedure and to make you familiar with the main features of the In-Circuit Debugger.How to use this tutorial:The tutorial contains a guided debug session. It uses a simple C-program example to show you the most important debug features. Y ou should perform a number of exercises as you read this tutorial. Werecommend to go completely through all chapters, since besides the tour (written in normal text format) there are very helpful remarks (written in italics) which will not be repeated in other chapters.Where can I get more information:The common TRACE32 user interface contains a detailed Online-Help, that offers the most currentdescription of all debug features. Refer to The Online Help on how to start the Online Help system.How long does it take?60 minutes.Start TRACE32-ICDIf your debug tools are installed in accordance to Quick Installation for TRACE32-ICD, power up your debug system first and then the target.T o start the debugger software on your host open the TRACE32 folder in the start menu and start theTRACE32 user interface. If you have generated an icon on your desktop, double click there. In the example below the software for two processor families (PowerPC and 68HC12) is installed.Setup the Application PropertiesThe property window of your application allows some basic settings for the debugger.1.Definition of a user specific configuration file.By default the configuration file config.t32 in the system directory is used. The option -c allowsyou to define your own location and name for the configuration file. For more information on theconfiguration file refer to Quick Installation forTRACE32-ICD2. Definition of a working directory.It is recommended not to work in the system directory.3. Definition of the start-up size of the application window.123The Online HelpThe most current version of the TRACE32 books is available in the online help. Y ou can get access to the TRACE32 online help using:the Help Topics button in the toolbarthe Help Contents entry in the menu barenter “HELP” in the command linetoolbar command linehelp menuThe online help provides also a powerful context sensitive help .Click first on the Help Context button and then move the quotation mark cursor on the object you are interested in. A popup window is opened to display information about this object.Use the Help Context button on the tool barto activate the context sensitive helpThe About TRACE32… command in the Help menu provides version information for all parts of TRACE32-ICD.Setup the Debug EnvironmentIn order to set-up your debugger, you need some knowledge about your CPU and about your target configuration. T o be able to download your program including all symbol and debug information you also need some knowledge about your compiler.A basic start-up procedure and the CPU specific setting for the ICD-Debuggers are described in the ICD Target Manual .Look at the Reference ICE/FIRE/ICD book for a detailed description of all generic commands.A typical start-up procedure consists of:ICD Target Manual gives quick accessto the settings and additional features for your CPU1.The CPU specific settings.The SYStem Window provides all CPU specific settings. Use System Settings… in the CPU menu to open this window.Inform the debugger about the CPU type on your target, if an automatic detection of the CPU is not possible. Select the correct CPU type from the pull down menu in the field CPU.(Command: SYStem.CPU )Set the system options in the option field corresponding to your target configuration and application program. (Command: SYStem.OptionOn some processor types the special function registers can be moved. The command(SYStem.Option BASE) is used to inform the debugger about the new base address (address of the first SFR). If the debugger does not have the correct base address no or wrong data will bedisplayed and FLASH programming might not be possible.Set the transfer clock from the debug interface to your target. By default TRACE32-ICD uses a fixed clock, generated by the Debug Module, to run the debug interface. A clock range from 100KHz up to5 MHz can be used.(Command: SYStem.BdmClock)We also provide a clock cable to allow you the use of the divided CPU clock as clock for the debug interface. The relation between the CPU clock and the debug interface clock is specific for your CPU.Refer to your ICD Target Manual for detailed information. The use of the divided CPU clock has the following advantages: The max. speed for the debug interface can be used. However we recommend 10MHz as the max.speed.The clock for the debug interface is automatically adapted if the CPU clock is changed by your appli-cation program.2. Enter the debug mode.Select the Up button in the Mode field to restart the CPU with debug mode enable.(Command: SYStem.Up)The user interface establishes the communication to the target′s microprocessor. After this command you should be able to access the registers.3. Do the target specific settings.The CPU is active now and you can initialize the CPU by writing to the special function registers using the Data.Set command. E. g. some CPUs need to set the chip selects in order to access memory. 4. Load your application.Load your application by using the commandData.LOAD.The option required for your compiler can be found in the ICD Target Manual in the sectionCompiler.If the file should be loaded to an EEPROM, the memory class EEPROM must be used to generate the required programming sequence. Example: d.load.b epromdata EEPROM:For flash programming refer to the FLASH command group in the Reference ICE/FIRE/ICD book.T o display the source code the compiled program must be equipped with debug information(frequently: compiler option “debug”). Then TRACE32 can load the compiler output formats directly.5. Initialize program counter and stackpointer: Register.SetMany compilers add these settings in the startup code to the user program automatically.It is recommended to write a batch job to set up the debugger to guarantee a proper start-up sequence.Batch JobsCreate a new batch file start.cmm in your working directory by using the command PEDIT start.cmm.TRACE32 has its own command language for batch jobs. It is called PRACTICE and it is very powerful (see the PRACTICE User’s Guide and PRACTICE Reference for more information). All commands of the TRACE32 development tools, commands for program flow, conditional commands and I/O commands are allowed. The default extension for batch files is “.cmm”.Also debugging of a PRACTICE program is supported. Look at the description in the PRACTICE User’s Guide and PRACTICE Reference (commands: PLIST, PEDIT, PBREAK).Enter the required commands, finish the batchjob by ENDDO and click the Save button. The picture above shows a startup procedure for the PowerPC505.Start the startup procedure by using Batchfile… in the File pulldown menu.T o continue our tour take one of the example files you can find in the TRACE32 system directory under \demo\\compiler\...e.g. \demo\powerpc\compiler\Diab\Diabc.cmm.or use your own batch file, if you have already prepared one.The User InterfaceRegister ButtonPulldown MenuCommand LineOpen a window to display the CPU registers. Y ou can alternatively select Registers from the View pulldown menu, push the Register button or enter Register.view at the prompt B:: in the command line.Most features can alternatively be selected from a pulldown menu, from a button in the main tool bar or from the command line. Please remember this even if we use just one way in the following chapters.The TRACE32 commands are not case sensitive. In the TRACE32 books we use upper case letters for the characters that are significant for the command entry. E.g. Register.view can be shortened by r . Another example which shows the typical TRACE32 command structure. is Data.List that can be shortened to d.l .A good hint is to look at the soft keys. They provide a guided command entry . All possible commands and parameters are displayed. Instead of writing to the command line you can assemble the correct command by clicking on the soft keys. Example: Assembly of the Data dump command by using the softkeys.More detailed information about the TRACE32 user interface can be found in the Operating System User’s Guide .In the window header the TRACE32 command that was executed to open the window is displayed.Soft KeysHow to Display and Modify CPU RegistersWe want to inspect the CPU registers now.T ry to change a register value by double-clicking on the value you want to change. The Register.Set command for the selected register is displayed in the command line. Y ou only have to enter the new value and confirm it with return (see right picture above).If the registers changed by the last steps should be marked in the Register window:1.Click to the window header with the right mouse button.The command, that was used to open the window is displayed in the command line for modification.The window header becomes red.2. Set the option /SpotLight and confirm the modification with return.3. Execute a few single steps.The registers changed by the last step are marked in dark red. The registers changed by the step before the last step are marked a little bit lighter etc. This works up to a level of 4 steps.function registers:If you select the register contents the address, bit position and complete name of the special function register is displayed in the state line.Y ou can modify the contents of a special function register:By pressing the right mouse button and selecting one of the predefined logical values from the pull-down menu.By a double-click to numeric values. A Data.Set command to change the register contents is dis-played in the command line. Enter the new value and confirm it with return.How to Display and Modify MemoryT o inspect an address range in the memory use the Data.dump window.。

Trace32安装手册
软件简介：
Trace32是由德国Lauterbach公司研制开发的一款仿真测试工具。

Trace32作为一种真正集成化、通用性系统仿真器可以组合成多种方案，可以支持网络方案、实验室单机方案、异地光纤方案等，它具有全模块化、积木式结构、可支持JTAG 及BDM接口和所有CPU，能够提供软件分析、端口分析、波形分析以及软件测试等强大功能。

安装注意事项：
Trace32分为USB和Simulator两种安装方式，在安装前需要询问用户要安装哪种方式，需注意：有的时候用户可能直接会说要安装Simulator,我们要清楚Simulator就是Trace32。

安装方法：
一：USB安装方式：
Open=Bin\Setup64\Setup.exe
更改安装路径: C:\T32usb,然后下一步：
选择ICD In-Circuit-Debugger>>>>>>选项：
一直下一步，直至安装完成。

二：Simulator安装方式：Open=Bin\Setup64\Setup.exe
选择Software only>>>>>>选项：。

Trace32-ICD使用说明作者：***日期：2008-8-11版本：V-1.0一、编写目的通过对该文档的阅读，能够掌握Trace32-ICD的软、硬件安装，使用Trace32-ICD进行flash擦除，程序下载，并熟悉在线调试。

二、T RACE32硬件的连接Trace32的硬件连接如下图所示：图2.1注意事项：电源打开/关闭时的正确顺序：打开：先调试器，再目标机。

关闭：先目标机，再调试器。

三、TRACE32软件的安装3.1 TRACE32-ICD软件包安装1、首先获取安装软件包，包括：Trace32安装包和USB Driver。

2、安装Trace软件包，运行..\ trace32\setup.bat批处理文件或..\trace32\bin\setup\setup.exe文件，系统自动安装，在安装过程中进行如下选择。

图 3.1 图3.2图3.3其他选项基本默认。

3.2 USB驱动安装正确连接Trace后，系统会自动提示发现硬件需要进行驱动。

此时选择驱动程序所在目录。

路径为..\ trace32\bin。

如图3.4所示。

图3.4四、Flash的擦除与下载程序由于手机在下载版本过程中死机或掉电造成手机无法正常启动，并且使用我们单位的ZXPST与QPST都无法进行版本下载，并且QXDM和ZXPST通过COM1接口也无法找到手机，于是无法下载。

在这种情况下我们可以使用Trace32-ICD进行Flash的擦除和程序下载。

4.1 设置环境CPU环境设置在SYStem窗口，SYStem窗口提供所有CPU特定的设置。

使用CPU菜单中的System Settings…打开SYStem窗口如图4.1所示。

需要配置主要包括CPU、时钟和UP加电，CPU选择ARM926EJ，时钟JtagClock选择Ttck，然后进行加电UP，如果连接一切都正常，设置这几项就可以了。

如图4.1所示：图4.1注意事项：如果UP不上出现如下错误emulation debug port fail，说明硬件连接不正确。

目录1．系统组成1．1硬件1．1.1主机1．1.2调试电缆1．1.3通过USB与PC连接1．1.4通过JTAG与目标连接1．1.5对PC硬件的要求1．1.6对目标板硬件的要求1．1.7加电1．2软件1．2.1驱动程序的安装2．PowerView调试界面的使用3．1 打开调试界面3．2 JTAG连接设置3．3 运行脚本文件3．4 观察/修改寄存器3．5 观察/修改存储器3．6 下载程序3．7 观察符号表3．8 打开程序列表窗口3．9 单步执行程序3．10 设置软件断点3．11 设置Onchip硬件断点3．12 设置数据观察断点3．13 全速运行程序3．14 停止运行程序3．15 观察变量3．16 观察堆栈3．17 在线Flash编程1．系统组成TRACE-ICP调试系统由硬件和软件两部分组成，硬件是自行研发的，软件是第三方的。

下面分成硬件和软件两部分来介绍。

1．1硬件TRACE-ICP的硬件设计采用模块化的结构，分为主机和调试电缆两部分。

1．1.1主机下面三张照片是TRACE-ICP主机的顶视图和前视图以及后视图。

图一、TRACE-ICP顶视图图二、TRACE-ICP前视图图三、TRACE-ICP后视图在图二中的连接器是标准DB25/M连接器，用于连接调试电缆。

在图三中，有两个连接器和一个LED指示灯。

左边的连接器是USB接口，用于通过USB电缆和PC连接。

右边的连接器是TRACE-ICP的外接5VDC电源接口。

TRACE-ICP可以通过USB供电，在USB供电不足的情况下，使用外接电源。

LED指示灯是TRACE-ICP的电源指示灯。

1．1.2调试电缆下图是TRACE-ICP的调试电缆的照片。

图四、TRACE-ICP的调试电缆TRACE-ICP的调试电缆有两个连接端，一个是标准的DB25/F连接器，用于和TRACE-ICP主机相连，另一个是针距为2.54毫米的标准IDC20连接器，用于和目标板连接。

Blackfin Debugger Release 09.2023Blackfin DebuggerTRACE32 Online HelpTRACE32 DirectoryTRACE32 IndexTRACE32 Documents ......................................................................................................................ICD In-Circuit Debugger ................................................................................................................Processor Architecture Manuals ..............................................................................................Blackfin ....................................................................................................................................Blackfin Debugger (1)Introduction (4)Brief Overview of Documents for New Users4 Demo and Start-up Scripts5 Location of Debug Connector5Warning (5)Quick Start JTAG (6)Troubleshooting (8)SYStem.Up Errors8FAQ (8)Configuration (9)System Overview9Blackfin specific SYStem Commands (10)SYStem.CONFIG Configure debugger according to target topology10 Daisy-Chain Example13 TapStates14 SYStem.CONFIG.CORE Assign core to TRACE32 instance15 SYStem.CPU CPU type selection16 SYStem.JtagClock JTAG clock selection17 SYStem.LOCK Lock and tristate the debug port17 SYStem.MemAccess Real-time memory access (non-intrusive)18 SYStem.Mode System mode selection19 SYStem.Option.IMASKASM Interrupt disable19 SYStem.Option.IMASKHLL Interrupt disable20Breakpoints (21)Software Breakpoints21 On-chip Breakpoints21 Breakpoint in ROM21Example for Breakpoints22 Memory Classes (23)CPU specific TrOnchip Commands (24)JTAG Connector (25)Blackfin DebuggerVersion 10-Oct-2023 IntroductionThis document describes the processor specific settings and features for the Blackfin Embedded Media Processor. TRACE32-ICD supports all Blackfin devices which are equipped with the JT AG debug interface.Please keep in mind that only the Processor Architecture Manual (the document you are reading at the moment) is CPU specific, while all other parts of the online help are generic for all CPUs supported by Lauterbach. So if there are questions related to the CPU, the Processor Architecture Manual should be your first choice.If some of the described functions, options, signals or connections in this Processor Architecture Manual are only valid for a single CPU the name is added in brackets.Brief Overview of Documents for New UsersArchitecture-independent information:•“Training Basic Debugging” (training_debugger.pdf): Get familiar with the basic features of a TRACE32 debugger.•“T32Start” (app_t32start.pdf): T32Start assists you in starting TRACE32 PowerView instances for different configurations of the debugger. T32Start is only available for Windows.•“General Commands” (general_ref_<x>.pdf): Alphabetic list of debug commands.Architecture-specific information:•“Processor Architecture Manuals”: These manuals describe commands that are specific for the processor architecture supported by your Debug Cable. T o access the manual for your processorarchitecture, proceed as follows:-Choose Help menu > Processor Architecture Manual.•“OS Awareness Manuals” (rtos_<os>.pdf): TRACE32 PowerView can be extended for operating system-aware debugging. The appropriate OS Awareness manual informs you how to enable theOS-aware debugging.Demo and Start-up ScriptsLauterbach provides ready-to-run start-up scripts for known Blackfin based hardware.To search for PRACTICE scripts, do one of the following in TRACE32 PowerView:•Type at the command line: WELCOME.SCRIPTS•or choose File menu > Search for Script.Y ou can now search the demo folder and its subdirectories for PRACTICE start-up scripts(*.cmm) and other demo software.Y ou can also manually navigate in the ~~/demo/blackfin/ subfolder of the system directory ofTRACE32.Location of Debug ConnectorLocate the debug connector on your target board as close as possible to the processor to minimize the capacitive influence of the trace length and cross coupling of noise onto the JT AG signals. WarningSignal LevelThe debugger output voltage follows the target voltage level. It supports a voltage range of 0.4…5.2V. ESD ProtectionNOTE:T o prevent debugger and target from damage it is recommended to connect ordisconnect the debug cable only while the target power is OFF.Recommendation for the software start:•Disconnect the debug cable from the target while the target power is off.•Connect the host system, the TRACE32 hardware and the debug cable.•Start the TRACE32 software.•Connect the debug cable to the target.•Switch the target power ON.Power down:•Switch off the target power.•Disconnect the debug cable from the target.Quick Start JTAGStarting up the debugger is done as follows:1.Select the device prompt B: for the ICD Debugger, if the device prompt is not active after the TRACE32 software was started.2.Select the CPU type to load the CPU specific settings.3.Enter debug mode:This command resets the CPU and enters debug mode. After the execution of this command access to the registers and to memory is possible. Before performing the first access to external SDRAM or FLASH the External Bus Interface Unit (EBIU) must be configured.4.The following command sequence is for the BF537 processor and configures the SDRAM controller with default values that were derived for maximum flexibility. They work for a system clock frequency between 54MHz and 133MHz.In the example a ST M29W320DB flash device is used in 16-bit mode. All four memory banks and CLKOUT are enabled.B:SYStem.CPU BF537SYStem.Up; configure SDRAM controllerData.Set 0xFFC00A1sLONG 0x0091998D Data.Set 0xFFC00A14 %WORD 0x0025Data.Set 0xFFC00A1C %WORD 0x03A0; EBIU_SDGCTL ; EBIU_SDBCTL ; EBIU_SDRRC; enable all flash memory banks and clock outData.Set 0xFFC00A00 %WORD 0x00FF; EBIU_AMGCTL; ST M29W320DB flash device in 16-bit modeFLASH.Create 1. 0x20000000--0x20003FFF 0x4000 AM29LV100 Word FLASH.Create 1. 0x20004000--0x20007FFF 0x2000 AM29LV100 Word FLASH.Create 1. 0x20008000--0x2000FFFF 0x8000 AM29LV100 Word FLASH.Create 1. 0x20010000--0x203FFFFF 0x10000 AM29LV100 Word5.Load the program.Data.LOAD.Elf demo.dxe; The file demo.dxe is in ELF format The option of the Data.LOAD command depends on the file format generated by the compiler. A detailed description of the Data.LOAD command is given in the “General Commands Reference”. The start-up sequence can be automated using the programming language PRACTICE. A typical start sequence is shown below. This sequence can be written to a PRACTICE script file (*.cmm, ASCII format) and executed with the command DO<file>.B::; Select the ICD device promptWinClear; Delete all windowsSYStem.CPU BF537; select the processorSYStem.Up; Reset the target and enter debug modeData.Load.Elf sieve.dxe; Load the applicationRegister.Set PC main; Set the PC to function mainList.Mix; Open disassembly window *) Register.view; Open register window *) PER.view; Open window with peripheral register *) Break.Set sieve; Set breakpoint to function sieveBreak.Set 0x1000 /p; Set on-chip breakpoint to address 1000; Refer to the restrictions in; On-chip Breakpoints.*) These commands open windows on the screen. The window position can be specified with the WinPOS command.TroubleshootingSYStem.Up ErrorsThe SYStem.Up command is the first command of a debug session where communication with the target is required. If you receive error messages while executing this command this may have the following reasons.All The target has no power.All There are additional loads or capacities on the JTAG lines.All The JTAG clock is too fast.FAQPlease refer to https:///kb.Configuration System OverviewBlackfin specific SYStem CommandsSYStem.CONFIG Configure debugger according to target topologyThe four parameters IRPRE, IRPOST , DRPRE, DRPOST are required to inform the debugger about the T AP controller position in the JT AG chain, if there is more than one core in the JT AG chain (e.g. ARM + DSP). The information is required before the debugger can be activated e.g. by a SYStem.Up . See Daisy-chain Example .For some CPU selections (SYStem.CPU ) the above setting might be automatically included, since the required system configuration of these CPUs is known.T riState has to be used if several debuggers (“via separate cables”) are connected to a common JT AG port at the same time in order to ensure that always only one debugger drives the signal lines. T APState and TCKLevel define the T AP state and TCK level which is selected when the debugger switches to tristate mode. Please note: nTRST must have a pull-up resistor on the target, TCK can have a pull-up or pull-down resistor, other trigger inputs need to be kept in inactive state.Format:SYStem.CONFIG <parameter> <number_or_address>SYStem.MultiCore <parameter> <number_or_address> (deprecated)<parameter>:CORE <core><parameter>:(JTAG):DRPRE <bits>DRPOST <bits>IRPRE <bits>IRPOST <bits>DAPDRPOST <bits>DAPDRPRE <bits>DAPIRPOST <bits>DAPIRPRE <bits>TAPState <state>TCKLevel <level>TriState [ON | OFF ]Slave [ON | OFF ]DEBUGPORTTYPE [JTAG | SWD ]SWDPIDLEHIGH [ON | OFF ]SWDPTargetSel <value>CORE For multicore debugging one TRACE32 PowerView GUI has to be startedper core. To bundle several cores in one processor as required by thesystem this command has to be used to define core and processorcoordinates within the system topology.Further information can be found in SYStem.CONFIG.CORE.… DRPOST <bits>Defines the TAP position in a JT AG scan chain. Number of TAPs in theJTAG chain between the TDI signal and the TAP you are describing. InBYPASS mode, each TAP contributes one data register bit. See possibleTAP types and example below.Default: 0.… DRPRE <bits>Defines the TAP position in a JT AG scan chain. Number of TAPs in theJTAG chain between the TAP you are describing and the TDO signal. InBYPASS mode, each TAP contributes one data register bit. See possibleTAP types and example below.Default: 0.… IRPOST <bits>Defines the TAP position in a JT AG scan chain. Number of InstructionRegister (IR) bits of all TAPs in the JT AG chain between TDI signal andthe TAP you are describing. See possible T AP types and example below.Default: 0.… IRPRE <bits>Defines the TAP position in a JT AG scan chain. Number of InstructionRegister (IR) bits of all TAPs in the JTAG chain between the T AP you aredescribing and the TDO signal. See possible TAP types and examplebelow.Default: 0.TAPState(default: 7 = Select-DR-Scan) This is the state of the TAP controller whenthe debugger switches to tristate mode. All states of the JTAG T APcontroller are selectable.TCKLevel (default: 0) Level of TCK signal when all debuggers are tristated. TriState(default: OFF) If several debuggers share the same debug port, thisoption is required. The debugger switches to tristate mode after eachdebug port access. Then other debuggers can access the port. JT AG:This option must be used, if the JTAG line of multiple debug boxes areconnected by a JTAG joiner adapter to access a single JTAG chain. Slave(default: OFF) If more than one debugger share the same debug port, allexcept one must have this option active.JTAG: Only one debugger - the “master” - is allowed to control the signalsnTRST and nSRST (nRESET).DEBUGPORTTYPE [JTAG | SWD]It specifies the used debug port type “JT AG”, “SWD”. It assumes the selected type is supported by the target.Default: JT AG.SWDPIdleHigh [ON | OFF]Keep SWDIO line high when idle. Only for Serialwire Debug mode. Usually the debugger will pull the SWDIO data line low, when no operation is in progress, so while the clock on the SWCLK line is stopped (kept low).Y ou can configure the debugger to pull the SWDIO data linehigh, when no operation is in progress by usingSYStem.CONFIG SWDPIdleHigh ONDefault: OFF.SWDPTargetSel<value>Device address in case of a multidrop serial wire debug port.Default: none set (any address accepted).Daisy-Chain ExampleBelow, configuration for core C.Instruction register length of •Core A: 3 bit •Core B: 5 bit •Core D: 6 bitSYStem.CONFIG.IRPRE 6.; IR Core D SYStem.CONFIG.IRPOST 8.; IR Core A + B SYStem.CONFIG.DRPRE 1.; DR Core D SYStem.CONFIG.DRPOST 2.; DR Core A + BSYStem.CONFIG.CORE 0. 1.; Target Core C is Core 0 in Chip 1Core A Core B Core CCore D TDOTDI Chip 0Chip 1TapStates0Exit2-DR1Exit1-DR2Shift-DR3Pause-DR4Select-IR-Scan5Update-DR6Capture-DR7Select-DR-Scan8Exit2-IR9Exit1-IR10Shift-IR11Pause-IR12Run-Test/Idle13Update-IR14Capture-IR15Test-Logic-ResetSYStem.CONFIG.CORE Assign core to TRACE32 instance Format:SYStem.CONFIG.CORE<core_index><chip_index>SYStem.MultiCore.CORE<core_index><chip_index> (deprecated) <chip_index>:1 (i)<core_index>:1…kDefault core_index: depends on the CPU, usually 1. for generic chipsDefault chip_index: derived from CORE= parameter of the configuration file (config.t32). The COREparameter is defined according to the start order of the GUI in T32Start with ascending values.T o provide proper interaction between different parts of the debugger, the systems topology must bemapped to the debugger’s topology model. The debugger model abstracts chips and sub cores of these chips. Every GUI must be connect to one unused core entry in the debugger topology model. Once the SYStem.CPU is selected, a generic chip or non-generic chip is created at the default chip_index.Non-generic ChipsNon-generic chips have a fixed number of sub cores, each with a fixed CPU type.Initially, all GUIs are configured with different chip_index values. Therefore, you have to assign thecore_index and the chip_index for every core. Usually, the debugger does not need further information to access cores in non-generic chips, once the setup is correct.Generic ChipsGeneric chips can accommodate an arbitrary amount of sub-cores. The debugger still needs information how to connect to the individual cores e.g. by setting the JT AG chain coordinates.Start-up ProcessThe debug system must not have an invalid state where a GUI is connected to a wrong core type of a non-generic chip, two GUIs are connected to the same coordinate or a GUI is not connected to a core. The initial state of the system is valid since every new GUI uses a new chip_index according to its CORE= parameter of the configuration file (config.t32). If the system contains fewer chips than initially assumed, the chips must be merged by calling SYStem.CONFIG.CORE.SYStem.CPU CPU type selection Format:SYStem.CPU <cpu><cpu>:BF531 | BF532 | BF533 | BF534…Default selection: BF534.Selects the CPU type.SYStem.JtagClock JT AG clock selection Format:SYStem.JtagClock [<frequency>]SYStem.BdmClock<frequency>(deprecated)Default frequency: 1MHz.Selects the JT AG port frequency (TCK). Any frequency up to 50MHz can be entered, it will be generated by the debuggers internal PLL.For CPUs which come up with very low clock speeds it might be necessary to slow down the JT AGfrequency. After initialization of the CPUs PLL the JT AG clock can be increased.SYStem.LOCK Lock and tristate the debug port Format:SYStem.LOCK [ON | OFF]Default: OFF.If the system is locked, no access to the debug port will be performed by the debugger. While locked, the debug connector of the debugger is tristated. The main intention of the SYStem.LOCK command is to give debug access to another tool.SYStem.MemAccess Real-time memory access (non-intrusive) Format:SYStem.MemAccess Denied | StopAndGo | BTCBTC“BTC” allows a non-intrusive memory access while the core is running, if aBackground T elemetry Channel (BTC) is defined in your application. Anyinformation on how to create such a channel can be found in AnalogDevices’ VisualDSP++ user’s manual. The JT AG clock speed should be asfast as possible to get good performanceDenied Real-time memory access during program execution to target is disabled.StopAndGo Temporarily halts the core(s) to perform the memory access. Each stoptakes some time depending on the speed of the JT AG port, the number ofthe assigned cores, and the operations that should be performed.SYStem.Mode System mode selectionFormat:SYStem.Mode <mode>SYStem.Attach (alias for SYStem.Mode Attach)SYStem.Down (alias for SYStem.Mode Down)SYStem.Up (alias for SYStem.Mode Up)<mode>:DownGoAttachUpDown Disables the debugger.Go Resets the target with debug mode enabled and prepares the CPU fordebug mode entry. After this command the CPU is in the system.upmode and running. Now, the processor can be stopped with the breakcommand or if a break condition occurs.Attach User program remains running (no reset) and the debug interface isinitialized.Up Resets the target and sets the CPU to debug mode. After execution ofthis command the CPU is stopped and prepared for debugging.StandBy Not supported.NoDebug Not supported.SYStem.Option.IMASKASM Interrupt disable Format:SYStem.Option.IMASKASM [ON | OFF]Mask interrupts during assembler single steps. Useful to prevent interrupt disturbance during assembler single stepping.SYStem.Option.IMASKHLL Interrupt disable Format:SYStem.Option.IMASKHLL [ON | OFF]Mask interrupts during HLL single steps. Useful to prevent interrupt disturbance during HLL single stepping.BreakpointsThere are two types of breakpoints available: software breakpoints and on-chip breakpoints. Software BreakpointsSoftware breakpoints are the default breakpoints. A special breakcode is patched to memory so it only can be used in RAM or FLASH areas.There is no restriction in the number of software breakpoints.On-chip BreakpointsThe Blackfin processor has a total of six instruction and two data on-chip breakpoints.A pair of two breakpoints may be further grouped together to form a range breakpoint. A range breakpointcan be including or excluding. In the first case the core is stopped if an address in the range is detected, in the second case the core is stopped when an address outside of the range is observed.Breakpoint in ROMWith the command MAP.BOnchip<range> it is possible to inform the debugger about ROM(FLASH,EPROM) address ranges in target. If a breakpoint is set within the specified address range the debugger uses automatically the available on-chip breakpoints.Example for BreakpointsAssume you have a target with FLASH from 0x20000000 to 0x200FFFFF and RAM from 0x0 to 0x1000000. The command to configure TRACE32 correctly for this configuration is: Map.BOnchip 0x20000000--0x200FFFFFThe following breakpoint combinations are possible.Software breakpoints:Break.Set 0x0 /Program; Software Breakpoint 1Break.Set 0x1000 /Program; Software Breakpoint 2On-chip breakpoints:Break.Set 0x20000100 /Program; On-chip Breakpoint 1Break.Set 0x2000ff00 /Program; On-chip Breakpoint 2Memory ClassesThe following memory classes are available: Memory Class DescriptionP ProgramD DataCPU specific TrOnchip CommandsThe TrOnchip command group is not available for the Blackfin debugger.JTAG ConnectorSignal Pin Pin SignalGND12EMU-N/C34GNDVDDIO56TMSN/C78TCKN/C910TRST-N/C1112TDIGND1314TDOJTAG Connector Signal Description CPU Signal TMS JTAG-TMS,TMSoutput of debuggerTDI TDI JTAG-TDI,output of debuggerTCK TCK JTAG-TCK,output of debugger/TRST /TRST JTAG-TRST,output of debuggerTDO TDO JTAG-TDO,input for debugger/EMU JTAG Emulation Flag /EMUVDDIO VDDIO This pin is used by the debugger to sense the targetI/O voltage and to set the drive levels accordingly. Ifthe sensed voltage level is too low (e.g. target has nopower) the debugger powers down its drivers toprevent the target from damage.。

T race T utorial Release 02.2023TRACE32 Online HelpTRACE32 DirectoryTRACE32 IndexTRACE32 Debugger Getting Started ..............................................................................................Trace Tutorial (1)History (3)About the Tutorial (3)What is Trace? (3)Trace Use Cases4Trace Methods (5)Simulator Demo (6)Trace Configuration (7)Trace Recording (8)Displaying the Trace Results (10)Trace List10 Displaying Function Run-Times13 Graphical Charts13 Numerical Statistics and Function Tree14 Duration Analysis15 Distance Analysis16 Variable Display17 Track Option18Searching Trace Results (19)Trace Save and Load (20)Version 10-Feb-2023 History18-Jun-21New manual.About the TutorialThis tutorial is an introduction to the trace functionality in TRACE32. It shows how to perform a tracerecording and how to display the recorded trace information.For simplicity, we use in this tutorial a TRACE32 Instruction Set Simulator, which offers a full tracesimulation. The steps and features described in this document are however valid for all TRACE32 products with trace support.The tutorial assumes that the TRACE32 software is already installed. Please refer to “TRACE32Installation Guide” (installation.pdf) for information about the installation process.Please refer to “ICD Tutorial” (icd_tutorial.pdf) for an introduction to debugging in TRACE32 PowerView. What is Trace?T race is the continuous recording of runtime information for later analysis. In this tutorial, we use the term trace synonymously with core trace. A core trace generates information about program execution on a core,i.e. program flow and data trace. The TRACE32 Instruction Set Simulator used in this tutorial supports a fulltrace simulation including the full program flow as well as all read and write data accesses to the memory. A real core may not support all types of trace information. Please refer to your Processor Architecture Manual for more information.Trace Use CasesT race is mainly used in the following cases:1.Understand the program execution in detail in order to find complex runtime errors more quickly.2.Analysis of the code performance of the target code3.Verification of real-time requirements4.Code-coverage measurementsTrace MethodsTRACE32 supports various trace methods. The trace method can be selected in the Trace configuration window, which can be opened from the menu Trace > Configuration…If a trace method is not supported by the current hardware/software setup, it is greyed out in the trace configuration window. NONE means that no trace method is selected.We use in this tutorial the trace method Analyzer. Please refer to the description of the commandTrace.METHOD for more information about the different trace methods.Simulator DemoWe use in this tutorial a TRACE32 Simulator for Arm. The described steps are however valid for the TRACE32 Simulator for other core architectures.T o load a demo on the simulator, follow these steps:1.Start the script search dialog from the menu File > Search for scripts…2.Enter in the search field “compiler demo”3.Select a demo from the list with a double click, a PSTEP window will appear. Press the“Continue” button.We will use here the demo “GNU C Example for SRAM”.Trace ConfigurationIn order to set up the trace, follow these steps:1.Open the menu Trace > Configuration… The trace method Analyzer [A] should be selected perdefault. If this is not the case, select this trace method2.Clear the contents of the trace buffer by pressing the Init button [B].3.Select the trace operation mode [C].In mode Fifo , new trace records will overwrite older records. The trace buffer includes thus always the last trace cycles before stopping the recording.In Mode Stack , the recording is stopped if the trace buffer is full. The trace buffer always includes in this case the first cycles after starting the recording.Mode Leash is similar to mode Stack , the program execution is however stopped when the trace buffer is nearly full.TRACE32 supports other trace modes. Some of these modes depend on the core architecture. Please refer to the documentation of the command Trace.Mode for more information. We will keep here the default trace mode selection, which is Fifo .4.The SIZE field [D] indicates the size of the trace buffer. As we are using a TRACE32 Simulator, the trace buffer is reserved by the TRACE32 PowerView application on the host. It is thuspossible to increase the size of this buffer. If a TRACE32 trace hardware is used with a real chip, the size of the trace buffer is limited by the size of the memory available on the trace tool.In order to have a longer trace recording, we will set the trace buffer size to 10000000.BACDThe same configuration steps can be performed using the following PRACTICE script:Trace RecordingPress the Go button to start the program execution.The trace recording is automatically started with the program execution. The state in the Trace window changes from OFF to Arm [A]. The used field displays the fill state of the trace buffer [B].In order to stop the trace recording, stop the program execution with the Break button. The state in the trace window changes to OFF .Trace.METHOD Analyzer Trace.InitTrace.Mode FifoTrace.SIZE 10000000.BACThe trace recording is automatically started and stopped when starting and stopping the program execution because of the AutoArm[C] setting in the Trace window, which is per default enabled. The trace recording can also be started/stopped manually while the program execution is running using the radio buttons Armand OFF of the Trace window [A].Displaying the Trace ResultsTRACE32 offers different view for displaying the trace results. This document shows some examples.Please note that the trace results can only be displayed if the trace state in the Trace window is OFF. It is not possible to display the trace results while recording.The caption of a TRACE32 window includes the TRACE32 command that can be executed in the TRACE32 command line or in a PRACTICE script to open this window, e.g. here Trace.ListTrace ListA list view of the trace results can be opened from the menu T race > List > Default. The same window canbe opened from the Trace configuration window by pressing the List button.The Trace.List window displays the recorded trace packets together with the corresponding assembler and source code.In our case, trace packets are program fetches (cycle fetch) or data accesses (e.g. wr-long and rd-long for 32bit write and read accesses). Each trace packet has a record number displayed in the record column. The record number is a negative index for Fifo mode.As we are using a Simulator, each assembly instruction has an own trace packet. This is not the case with a real hardware trace.The displayed information can be reduced using the Less button. By pressing Less three times, only the high-level source code is displayed. This can be reverted using the More button.A double click on a line with an assembly instruction or high-level source code opens a List window showing the corresponding line in the code.Using the TRACE32 menu Trace > List > Tracing with Source , you get a Trace.List and a List /Track window. When doing a simple click on a line in the Trace.List window, the List window will automaticallydisplay the corresponding code line.The timing information (see ti.back column) is generated in this case by the TRACE32 Instruction Set Simulator. With a real core trace, timestamps are either generated by the TRACE32 trace hardware or by the onchip trace module.Double clickSimpleclickDisplaying Function Run-TimesTRACE32 supports nested and flat function run-time analysis based on the trace results. Please refer to the video “Flat vs. Nesting Function Runtime Analysis” for an introduction to function run-time analysis inTRACE32:/tut_profiling.htmlGraphical ChartsBy selecting the menu Trace > Chart > Symbols, you can get a graphical chart that shows the distribution of program execution time at different symbols. The displayed results are based on a flat analysis:The corresponding nesting analysis can be displayed using the menu Perf > Function Runtime > Show as Timing.The In and Out buttons can be used to zoom in/out. Alternatively, you can select a position in the window and then use the mouse wheel to zoom in/out.Numerical Statistics and Function TreeThe menu entry Perf > Function Runtime >Show Numerical displays numerical statistics for each function with various information as total run-time, minimum, maximum and average run-times, ratio, and number of function calls.ABParents [A] displays for example a caller tree for the selected function. By doing a right mouse click on func1 and selecting Parents, we see the run-times of the functions func2 and func9, which have called func1 in thetrace recording.Children [B] displays the run-times of the functions called by the selected function, for example here the function subst called by the function encode.A function call tree view of all function recorded in the trace can be displayed using the menu entries Perf >Function Runtime > Show as Tree or Perf > Function Runtime > Show Detailed Tree.Duration AnalysisBy doing a right mouse click on a function in the numerical statistics window (Trace.STATistic.Func) then selecting Duration Analysis, you get an analysis of the function run-times between function entry and exit including the time spent in called subroutines, e.g. here for the function subst (P:0x114C corresponds to the start address of the subst function):The time interval can be changed using the Zoom buttons.Distance AnalysisBy doing a right mouse click on a function in the numerical statistics window (Trace.STATistic.Func) then selecting Distance Analysis, you can get run-times between two consecutive calls of the selected function,e.g. here for the function subst (P:0x114C corresponds to the start address of the subst function):Variable DisplayThe Trace.ListVar command allows to list recorded variables in the trace. If the command is used without parameters all recorded variables are displayed:Y ou can optionally add one or multiple variables as parameters.Example: display all accesses to the variables plot1 and plot2The Draw button can then be used to plot the displayed variables graphically against time. This corresponds to the following TRACE32 command:Please refer for more information about the Trace.DRAW command to “Application Note forTrace.DRAW” (app_trace_draw.pdf).Trace.ListVar Trace.ListVar %DEFault plot1 plot2Trace.DRAW.Var %DEFault plot1 plot2Track OptionThe /Track options allows to track windows that display the trace results. Y ou just need to add the /Track option after the command that opens a trace window, e.g.Trace.List /TrackThe cursor will then follow the movement in other trace windows, e.g. Trace.Chart.Func. Default is time tracking. If no time information is available, tracking to record number is performed.TRACE32 windows that displays the trace results graphically, e.g. Trace.Chart.Func, additionally accept the /ZoomTrack option. If the tracking is performed with another graphical window, the same zoom factor is used in this case.Trace.Chart.Func /ZoomTrackSearching Trace ResultsThe Find button allows to search for specific information in the trace results.Example 1: find the first call of function func21.Enter “func2” under address / expression2.Select Program under cycle3.Press the Find First button. The next entries to func2 in the trace can then be found using theNext buttonExample 2: Find all write accesses to the variable mstatic1 with the value 0x01.Enter “mstatic1” under address / expression2.Select Write under cycle3.Enter 0x0 under Data4.Press the Find All buttonPlease refer to “Application Note for Trace.Find” (app_trace_find.pdf) for more information about Trace.Find.Trace Save and LoadThe recorded trace can be stored in a file using the command Trace.SAVE , e.g.The saved file can then be loaded in TRACE32 PowerView using the command Trace.LOADThe TRACE32 trace display windows will show in this case a LOAD message in the low left cornerPlease note that TRACE32 additionally allows to export/import the trace results in different formats. Refer to the documentation of the command groups Trace.EXPORT and Trace.IMPORT for more information. Trace.SAVE file.adTrace.LOAD file.ad。

TRACE32调试技巧1. 调试步骤l 连接好 TRACE32-ICD 和目标板，注意不要带电插拔 JTAG ，容易损坏 TRACE32 或目标板，然后依次打开 TRACE32-ICD 和目标板的电源。

l 开启调试软件 TRACE32l 设置 CPU 类型，状态等，可以通过命令或菜单，命令如下：sys.resetsys.CPU ARM7TDMI ; 这里设置 CPU 类型sys.up ; 启动调试，如果正常的话，状态为 system.ready; 否则会报错，需要检查 CPU 设置是否正确，TRACE32 和目标板的连接和电源是否正常如果调试正常启动后，就可以下载编译好的文件（可以是 .elf 、 .binary 等文件）到 RAM 或 FLASH 中调试了l 下载编译文件，命令如下：data.load.elf E:/source/test.elf /PATH E:/source这里的/PATH选项是用来指明源代码的路径，在调试时TRACE就可以查找到源代码了。

这里 TRACE会根据 .elf 文件里包含的目标代码起始地址加载到 RAM 的对应地址上，也可以指定加载到 RAM 的地址，但须和编译时的设置一致，否则程序不能正常运行。

注： TRACE 也可以把编译目标文件烧录到 flash 中进行调试，需要使用 flash 烧录相关命令，这里就不详述了。

l 然后就可以设置断点进行调试了，如：break.set 0x0c008000TRACE32 的断点有两种，一种是硬件断点（在 FLASH 中的断点），另一种是软断点（在 RAM 中的断点）；硬件断点需要 CPU 的支持，如 ARM7 最多只支持 2 个硬件断点，如果使用了软断点的话，就只能使用一个硬断点了；而软断点没有限制，可以设置很多个。

注：在TRACE32中，如果要使用硬件断点，需要先设置好FLASH内存映射范围，如下命令：Map.bonchip 0x0000--0xfffff ; 具体范围根据目标板 FLASH 的范围设置l 设置好断点就可以正常调试了。

FEATURE OVERVIEWUsing TRACE32 for IEC 62304TRACE32 for IEC 62304 at a Glance• TRACE32 Tool Qualification Support-Kit streamlines TRACE32 tool qualification effort and costs.• TRACE32 TQSK is fully featured, field proven and ready to cover new use casesand requirements.• TRACE32 TQSK Customer Interface provides full support and service around tool qualification.• All test suites run in the target environment and are fully multicore aware.• Test Suite Coverage includes statement, decision, condition, function and call coverage, as well as MC/DC.• TRACE32 Instruction Simulator, TRACE32 Debug and Trace Tools, USB Debug and Trace provide comprehensive tool support throughout all project phases.Website-LinksTRACE32 Trusted Tools for Functional Safety /trusted_tools.htmlTQSK Customer Portal /register_tqsk.htmlTRACE32 Code Coverage /coverage.htmlTRACE32 Instruction Set Simulator /sim.htmlThe TRACE32 Tool Qualification Support-Kit (TQSK) provides everything needed to qualify use in safety-related software projects.Figure 1: The 2-stage qualification processCertification ArtifactsDocumentsTest SuiteTool Verification and Validation Supplement for Integration toOperational EnvironmentTest Suite DocumentsTest ReportTesting in Operational EnvironmentTest Report Testing inTSSTCTest Suite Simulator TriCore(paid)DSMDeveloper SafetyManualTSCTest Suite Coverage(free)TSDTest Suite Debug(free)$$TSSATest Suite Simulator Arm(paid)Test Suite SimulatorUpon customer request, Lauterbach also provides test suites for its Arm and TriCore Instruction Set Simulators. A qualified instruction set simulator is an accepted test environment in the software module testing phase of the project (see also figure 3) and offers the following advantages:• Product software qualification can start before product hardware is available.• The qualification of the product software can be well organized even in a distributed team, becauseeverything necessary is purely software-based.• If bottlenecks occur during this phase due to a lack of development hardware or debug/trace tools, additional test benches can be easily equipped with simulators.Test Suite DebugThe Test Suite Debug includes all basic debugging functionality such as target configuration, programming onchip and NOR flashes, loading programs, setting breakpoints and reading/writing of memory and variables.Figure 3: TRACE32 tool use in code coverage qualification。

Application Note for t32cast Release 09.2023TRACE32 Online HelpTRACE32 DirectoryTRACE32 IndexTRACE32 Documents ......................................................................................................................Source Level Debugging ..............................................................................................................Application Note for t32cast (1)History (3)Introduction (4)Intended Audience4 Prerequisites5 Related Documents5 Restrictions5Installation (6)System Requirements6 License Requirements6 Installing t32cast6Command Line Parameters of t32cast (7)t32cast Usage (9)Version 09-Oct-2023 History18-Apr-23Added commands for source code instrumentation.11-Jun-18Initial version.IntroductionThere are TRACE32 features which require additional source code details that are not included in the debug infromation generated by the compiler. For example, several coverage metrics such as MC/DC or decision coverage need information about the locations of decisions and function calls in the source code.The task of the command line tool t32cast is to generate all the additional information. It analyzes the C/C++ source code and generates an Extended Code Analysis data file (.eca) per source file.The .eca files have to be loaded into TRACE32 if needed. The source code file and the .eca file must be located in the same directory. In this way, the assignment is simple and unambiguous.t32cast can be started via a PRACTICE script or a batch job. But to ensure that the .eca files always match the source code files, it is recommended to integrate their generation into the build process.Intended Audience•Developers who want to use one of the TRACE32 code coverage metrics that require additional details about the source code.•Persons in charge of the build system who want to integrate t32cast into their build process.PrerequisitesWindows users will need to ensure that the Microsoft Visual C++ Redistributable package is installed on their system. The latest one is always available as a free-of-charge download from the Microsoft download center.Linux users will need at least libncurses-5 or libncurses-compat. Depending upon the distribution used, other dependencies may be needed. Generally, running the t32cast tool will highlight any missingcomponents.Related Documents•“Application Note for Trace-Based Code Coverage” (app_code_coverage.pdf).•The description of the sYmbol.ECA command group in “General Commands Reference Guide S” (general_ref_s.pdf).RestrictionsCurrently, t32cast does not parse decisions within macros within macros correctly. The source file must be pre-processed by the compiler to expand these before running it against t32cast.InstallationSystem Requirements•64-bit Windows or Linux host computer.•The sYmbol.ECA command group was supported for the first time with TRACE32 build of 95748 (March 2018). The version of TRACE32 can be verified with the VERSION.SOFTWAREcommand.License RequirementsThe use of t32cast requires no additional licenses.Installing t32castThe command line tool t32cast is located under ~~/bin/<host_os>. An installation is not necessary.If you receive an error message about a missing *.dll, then install the Microsoft Visual C++ Redistributable package. See “Prerequisites”, page 5.Command Line Parameters of t32castThe command line tool t32cast is designed to be included as part of the build process.The examples below show how you can quickly display the help message (--help) and the version information (--version). They are independent of the t32cast integration into the build process.t32cast [subcommand] [options] <input>Available subcommands:eca Generate data for extended code analysis in TRACE32.This command generates additional information about theC/C++ code which is usually not included in the debugsymbols. The data includes the position of decisions,function calls and comments.instrument Instrument source file for MC/DC or Decision coveragemeasurement with TRACE32. Depending on the target andcompiler the source file may be partially or fullyinstrumented. Refer to “Application Note for Trace-BasedCode Coverage” (app_code_coverage.pdf) for moreinformation.vectors Generate MC/DC test vectors.This command will output all decisions together with testvectors to achieve full MC/DC coverage. The results may beused for developing test cases. They are not for use withTRACE32.Available options:--help Display the help message and exit.--version Display version information and exit.-o <output>Write output to file <output>.--comments List comments in output.-I <dir>Add directory to include search path.-D <macro[=value]>Define a macro.-imacros <file>Define macros from file before parsing.-m32Preprocess source code for 32-bit target.-m64Preprocess source code for 64-bit target.<input>Read input from file.-x <language>Set the language as which the file as parsed. The optionsare C and C++.--show-warnings Show additional warnings when parsing the C or C++ code --stop-on-error Stop on Clang parser errors--strict-mode Abort the parsing process on any warning--parse-const-expr Exports decisions where the expression can already beevaluated during compile-time--mode <value>Specify instrumentation mode.Allowed values:•MCDC--filter <file>Specify filter file for partial instrumentation--extra-arg=<string>Additional argument to append to the t32cast parseroptions. All options available to the Clang compiler areavailable.--extra-arg-before=<string>Additional argument to prepend to the t32cast parseroptions. All options available to the Clang compiler areavailable.The t32cast utility requires the output from the compiler’s pre-processing step. Most compilers generate these intermediary files but automatically remove them as part of the normal build process. These files contain the full source code, any included files and all compiler macros have been replaced or expanded. Please refer to your toolchain documentation to configure your compiler to generate and keep these files.The t32cast tool will generate an Extended Code Analysis (ECA) data file. These should be loaded into TRACE32 to be able to calculate coverage data for several coverage metrics.Examples for Arm and PowerArchitecture can be found under ~~/demo/t32cast/eca/ppc or~~/demo/t32cast/eca/arm. These contain a complete build environment showing how to adapt a Makefile for GNU make and GCC.t32cast UsageExamplesExample 1: This PRACTICE script (*.cmm) shows how to start t32cast from within TRACE32 and display the help message.OS.screen cmd /C c:/t32/demo/t32cast/bin/win-x64/t32cast.exe --help && pauseExample 2: This batch script (*.bat) displays the version number of t32cast in a shell window.@echo offC:cd c:\t32\demo\t32cast\bin\win-x64\t32cast.exe --version && pause。