Influence of Dopant Concentration on Electroluminescent Performance of Organic White-Light-

多晶硅技术英语词汇（原创）
English-Chinese Glossary List for PCS Technology
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聚吡咯涂层织物的介电性能研究刘元军;李卫斌;赵晓明;武翔【摘要】采用原位聚合法以棉机织物、尼龙为基布,以吡咯为单体,制备了具有良好介电性能的柔性聚吡咯涂层棉织物和聚吡咯涂层尼龙织物,探讨了掺杂剂种类、掺杂剂浓度对聚吡咯涂层棉织物、聚吡咯涂层尼龙织物介电性能和表面电阻的影响.结果表明,掺杂剂对聚吡咯复合材料的介电性能和表面电阻的影响较大.所制备的聚吡咯涂层棉织物、聚吡咯涂层尼龙织物均具备良好的介电性能和导电性,为最终开发出较为实用的多功能吸波复合材料奠定了基础.%Flexible polypyrrole coated cotton fabric and polypyrrole coated nylon fabric with good dielectric property was produced using pyrrole as monomer by in-situ polymerization on cotton fabric and nylon. The influence of the type and concentration of dopants on the dielectric property and surface resistance were discussed. The results showed that dopants have great influence on the dielectric property and surface resistance of polypyrrole coated cotton fabric and polypyrrole coated nylon fabric. The producedpolypyrrole/cotton composite materials and polypyrrole coated nylon fabric show excellent dielectric property and conductivity. This study laid solid foundation of developing more practical multi-function absorbing composite materials.【期刊名称】《材料科学与工艺》【年(卷),期】2018(026)002【总页数】7页(P41-47)【关键词】棉;尼龙;掺杂剂;聚吡咯;涂层;介电性能【作者】刘元军;李卫斌;赵晓明;武翔【作者单位】天津工业大学纺织学部,天津300387;天津工业大学纺织学部,天津300387;天津工业大学纺织学部,天津300387;天津工业大学纺织学部,天津300387【正文语种】中文【中图分类】TB322近年来，纺织物新特性(如导电性)的发展获得了极大的关注[1-3].导电纺织品因其潜在的应用价值引起人们极大的兴趣，例如能量储存、电荷储存(如电容器)、抗静电材料、加热装置、电磁屏蔽、发光二极管(LED)和传感器等[4-10].智能纺织材料可通过使用导电高聚物获得.织物可以简单地使用导电高聚物涂层，导电高聚物可由单体的水溶液使用原位氧化聚合法制得[11-14].涂层过程中氧化剂、单体和掺杂剂的浓度，聚合反应的温度及时间影响了结构次序和掺杂机理[15-19].不同的纺织材料被用于聚吡咯导电纺织品.最常用的化学聚合方法有原位聚合、两步聚合、乳化聚合和气相聚合等[20-22].吡咯单体的氧化电势相对较低，极易被氧化，相对于Ag/Ag+电势为+0.76 V[23-25].吡咯单体在棉、涤纶、尼龙纤维表面通过液体/固体界面吸附作用，使吡咯单体均匀吸附于纤维表面[26-27].本文探讨了掺杂剂对柔性聚吡咯涂层棉织物、聚吡咯涂层尼龙织物表面电阻和介电性能的影响.1 实验1.1 主要材料和试剂纯棉机织物、尼龙均为平纹织物；无水乙醇、三氯化铁、盐酸、硝酸、冰乙酸、对甲苯磺酸等均为分析纯.1.2 制备工艺过程第一步吸附阶段：将棉机织物、尼龙织物置入吡咯的水溶液中，使吡咯单体充分吸附到棉机织物、尼龙织物上.第二步反应阶段：将掺杂剂、氧化剂滴加到吡咯吸附液中，室温反应1.5 h，使吡咯在棉机织物、尼龙织物上发生原位聚合反应生成聚吡咯.第三步水洗阶段：乙醇的水溶液洗、水洗.1.3 测试指标和方法根据SJ 20512—1995《微波大损耗固体材料复介电常数和复磁导率测试方法》标准，在BDS50介电谱仪(该仪器低频只能测到微赫兹量级下的介电常数，频率为0 Hz时的介电常数为外推结果)上进行了介电常数测试.使用U3402A万用电表对聚吡咯涂层棉织物、聚吡咯涂层尼龙织物的表面电阻进行测试.2 结果与讨论2.1 掺杂剂种类对聚吡咯涂层棉织物介电性能的影响本组实验选用5种掺杂剂，固定吡咯浓度为0.3 mol/L，氧化剂三氯化铁与吡咯物质的量比为1∶2，室温反应1.5 h，掺杂剂工艺参数如表1所示.表1 掺杂剂工艺参数表Table 1 The process parameters ofdopantNo.DopantsThecontentofdopant/(mol·L-1)1Ferricchloride0.32Hydrochloricacid0.33Nitricacid0.34Aceticacidglacial0.3 5P-toluenesulfonicacid0.3吡咯是具有共扼结构、支架为C元素和N元素的五元杂环，其中双键由δ电子和π电子构成，如图1所示.π电子类似于金属导体中的自由电子，本征态聚吡咯导电高分子是无缺陷的共扼结构，其导电性较差；要增加聚吡咯导电性，可使共扼结构产生某种缺陷，可以理解为电子给体或受体与聚吡咯共扼高分子作用使导电性增加的过程.图1 聚吡咯结构中的δ键和π键Fig.1 δ bond and π bond of polypyrrole stucture图2～图4是不同种类掺杂剂对聚吡咯涂层棉织物介电常数实部、虚部和损耗角正切值的影响.1—Ferric chloride；2—Hydrochloric acid；3—Nitric acid；4—Acetic acid glacial；5—P-toluene sulfonic acid图2 掺杂剂种类对实部的影响Fig.2 Effect type on the real part of dopants1—Ferric chloride；2—Hydrochloric acid；3—Nitric acid；4—Acetic acid glacial；5—P-toluene sulfonic acid图3 掺杂剂种类对虚部的影响Fig.3 Effect of dopants type on the imaginary part1—Ferric chloride；2—Hydrochloric acid；3—Nitric acid；4—Acetic acid glacial；5—P-toluene sulfonic acid图4 掺杂剂种类对损耗角正切的影响Fig.4 Effect of dopants type on the loss tangent由图2可知：在0～106 Hz内，5种聚吡咯涂层棉织物对应的介电常数实部曲线随频率升高而降低；对甲苯磺酸作为掺杂剂制备的聚吡咯涂层棉织物实部最大，极化能力最强，在0～106 Hz内，介电常数实部的最低值为2.27×106，另外4种掺杂剂制备的聚吡咯涂层棉织物介电常数实部的最高值是1.32×106.由图3可知，随着频率的升高，5种掺杂剂的介电常数虚部值均呈现线性下降的趋势，但整体数值较高，说明聚吡咯涂层棉织物的损耗能力较强.由图4可知，5种掺杂剂所制备的聚吡咯涂层棉织物的微波耦合能力随频率增高而下降，其中对甲苯磺酸实验组数值相对较低，在106 Hz时损耗角正切值为0.408.上述现象可以表明，对甲苯磺酸作为聚吡咯涂层棉织物制备的掺杂剂掺杂效果较好.由图5可知，掺杂剂种类对聚吡咯/棉复合吸波材料的电阻影响较大.对甲苯磺酸和冰乙酸作为掺杂剂制备的聚吡咯/棉复合吸波材料的电阻相对较小，导电性较好；盐酸、硝酸作为掺杂剂制备的聚吡咯/棉复合吸波材料的电阻相对较大，导电性较差.这是因为盐酸、硝酸其酸性较强，聚合物聚吡咯共轭结构被部分破坏，导致聚吡咯链局部规整性较差，电子离域的长度缩短，最终导致导电性能降低.1—Ferric chloride；2—Hydrochloric acid；3—Nitric acid；4—Acetic acid glacial；5—P-toluene sulfonic acid图5 掺杂剂种类对电阻的影响Fig.5 Effect of dopants type on the resistance2.2 掺杂剂用量对聚吡咯涂层棉织物介电性能的影响为探究掺杂剂用量对聚吡咯涂层棉织物介电性能的影响，本组实验选用5种不同浓度的对甲苯磺酸作为掺杂剂，固定吡咯浓度为0.3 mol/L，氧化剂三氯化铁与吡咯物质的量比1∶2，室温反应1.5 h，按表2工艺处方制备样品.图6～图8是不同掺杂剂用量对聚吡咯涂层棉织物介电常数实部、虚部和损耗角正切的影响.由图6可知，掺杂剂用量对介电常数实部的影响较大，总体数值随频率升高而下降，其中掺杂剂用量为0.8 mol/L组的复合材料极化能力最强.由图7可知，掺杂剂浓度不同时，复合材料介电常数虚部随频率增高而不断降低.但当掺杂剂浓度达到1.0 mol/L时，介电常数虚部的数值反而比0.8 mol/L组小，这可能是由于这可能是因为过量质子酸掺杂形成了一些有结构缺陷的聚吡咯，而这种不规则结构的存在导致聚吡咯复合材料的微波损耗能力降低.由图8可知，复合材料的微波耦合能力随频率升高而降低，相对而言，掺杂剂浓度为0.8 mol/L的实验组数值较低，在频率为106 Hz时数值为0.852.表2 工艺参数表Table 2 The processparametersNo.DopantsThecontentofdopant/(mol·L-1)1P-toluenesulfonicacid02P-toluenesulfonicacid0.23P-toluenesulfonicacid0.44P-toluenesulfonicacid0.65P-toluenesulfonicacid0.86P-toluenesulfonicacid1.0图6 掺杂剂用量对实部的影响Fig.6 Effect of dopant content on the real part 图7 掺杂剂用量对虚部的影响Fig.7 Effect of dopant content on the imaginary part由图9可知，掺杂剂用量对电阻影响总体差别不大，随掺杂剂用量增加，复合材料表面电阻降低，复合材料导电性能增强，但数值差异不大.图8 掺杂剂用量对损耗角正切的影响Fig.8 Effect of dopant content on the loss tangent图9 掺杂剂用量对电阻的影响Fig.9 Effect of dopant content on the resistance2.3 掺杂剂种类对聚吡咯涂层尼龙织物介电性能的影响为探究掺杂剂种类对聚吡咯涂层尼龙织物介电性能的影响，本组实验选用5种掺杂剂，固定吡咯浓度为0.3 mol/L，氧化剂三氯化铁与吡咯物质的量比为1∶2，室温反应1.5 h，掺杂剂工艺参数如表1所示.图10～图12是不同掺杂剂对聚吡咯涂层尼龙织物试样介电常数的实部、虚部和损耗角正切值与频率的曲线.由图10可知，仅有对甲苯磺酸作为掺杂剂的复合材料介电常数实部随频率升高而升高，并且数值整体低于其他实验组.在所研究在频率范围内，对甲苯磺酸作为掺杂剂是实验组最大值为2.46.由图11可知，不同种掺杂剂制备复合材料的损耗能力都随频率上升而线性下降，其中对甲苯磺酸作为掺杂剂的实验组的介电常数虚部数值整理不如其他组高，但介电常数虚部最低点为116，说明复合材料仍具有较强的损耗能力.由图12可知，各实验复合材料的微波耦合能力都随频率增高而降低，但在不同频率时数值略有波动.在频率小于70 940 Hz时，对甲苯磺酸作为掺杂剂的复合材料耦合能力最强，而频率大于70 940 Hz 时，则盐酸作为掺杂剂的复合材料耦合能力最强.盐酸掺杂效果大于对甲苯磺酸可能是因为盐酸的解离常数大于对甲苯磺酸,而同时阴离子Cl-比对甲苯磺酸根离子小，因此空间位阻小，易于掺杂.1—Ferric chloride；2—Hydrochloric acid；3—Nitric acid；4—Acetic acid glacial；5—P-toluene sulfonic acid图10 掺杂剂种类对实部的影响Fig.10 Effect of dopants type on the real part1—Ferric chloride；2—Hydrochloric acid；3—Nitric acid；4—Acetic acid glacial；5—P-toluene sulfonic acid图11 掺杂剂种类对虚部的影响Fig.11 Effect of dopants type on the imaginary part1—Ferric chloride；2—Hydrochloric acid；3—Nitric acid；4—Acetic acid glacial；5—P-toluene sulfonic acid图12 掺杂剂种类对损耗角正切的影响Fig.12 Effect of dopants type on the loss tangent由图13可知，盐酸和硝酸作为掺杂剂所制得的样品表面电阻较小，这可能是因为这两种掺杂剂的阴离子较小，其空间位阻较低，易于掺杂，并且聚合得到的聚吡咯链结构缺陷较小，因此复合材料获得较好的导电效果.1—Ferric chloride；2—Hydrochloric acid；3—Nitric acid；4—Acetic acid glacial；5—P-toluene sulfonic acid图13 掺杂剂种类对电阻的影响Fig.13 Effect of dopants type on the resistance2.4 掺杂剂用量对聚吡咯涂层尼龙织物介电性能的影响为探究掺杂剂用量对聚吡咯涂层尼龙织物介电性能的影响，本组实验选用6种不同浓度的对甲苯磺酸作为掺杂剂，固定吡咯浓度为0.3 mol/L，氧化剂三氯化铁与吡咯物质的量比1∶2，室温反应1.5 h，按表2工艺处方制备样品进行各项指标测试.图14～图16是掺杂剂用量对聚吡咯涂层尼龙织物试样介电常数的实部、虚部和损耗角正切值与频率的曲线.图14 掺杂剂用量对实部的影响Fig.14 Effect of dopant content on the real part由图14可知，掺杂剂用量不同对于所制备的复合材料介电常数实部的影响差异较大.在所研究频率范围内，总体趋势随着频率升高而下降.用量最大时复合材料的极化能力相对最差.由图15可知，在在0～106 Hz内，除掺杂剂用量最少的一组，其余实验组对应的介电常数虚部数值都随频率升高而升高.其中用量相对较高的实验组复合材料损耗能力较强.由图16可知，除掺杂剂用量最少的一组外，其余实验组聚吡咯涂层尼龙织物微波耦合的能力影响差异不大，曲线随频率波动但比较靠近.以上现象可能是由于掺杂剂浓度较低时，对吡咯的掺杂不完全，而吡咯是因为掺杂后获得介电性能，因此导致聚合形成的聚吡咯介电性能差.由图17可知，随掺杂剂用量增加，聚吡咯涂层尼龙织物的表面电阻呈下降趋势，这说明掺杂效果较好，且对聚吡咯掺杂确实有利于改善聚吡咯涂层尼龙织物的导电性能.图15 掺杂剂用量对虚部的影响Fig.15 Effect of dopant content on the imaginary part图16 掺杂剂用量对损耗角正切的影响Fig.16 Effect of dopant content on the loss tangent图17 掺杂剂用量对电阻的影响Fig.17 Effect of dopant content on the resistance3 结论1)对甲苯磺酸作为掺杂剂制备的聚吡咯涂层棉织物实部最大，极化能力最强，在0～106 Hz内，介电常数实部最低值为2.27×106，另外4种掺杂剂制备的聚吡咯涂层棉织物介电常数实部最高值为1.32×106.随频率升高，5种复合材料的介电常数虚部值均呈现线性下降趋势，但整体数值较高.掺杂剂种类对聚吡咯涂层棉织物的电阻影响较大.对甲苯磺酸和冰乙酸作为掺杂剂制备的复合材料电阻相对较小，导电性较好.掺杂剂用量对复合材料介电常数实部影响较大，介电常数实部均随频率升高而下降；掺杂剂用量为0.8 mol/L时，介电常数实部最大，复合材料极化能力最强；在0～106 Hz内，复合材料介电常数虚部均随频率增高而降低.掺杂剂用量对电阻影响较小，随掺杂剂用量增加，复合材料表面电阻减小，导电性能增强.2)对甲苯磺酸作为掺杂剂制备的聚吡咯涂层尼龙织物的介电常数实部随频率升高而升高，并且数值整体低于其他实验组.不同种掺杂剂制备复合材料的损耗能力都随频率上升而线性下降.其中，对甲苯磺酸作为掺杂剂的实验组的介电常数虚部数值整理不如其他组高，但介电常数虚部最低点为116.盐酸和硝酸作为掺杂剂制得的聚吡咯涂层尼龙织物的表面电阻较小.掺杂剂用量不同对于所制备的复合材料介电常数实部的影响差异较大.在所研究频率范围内，总体趋势随着频率升高而下降.用量最大时,复合材料的极化能力相对最差.其中,用量相对较高的实验组复合材料损耗能力较强.随掺杂剂用量增加，聚吡咯涂层尼龙织物的表面电阻呈下降趋势.参考文献：[1] 刘亚赛，丁辛，刘连梅，等. 基于聚吡咯/棉织物电极的超级电容器固态电解质的研究[J]. 东华大学学报(自然科学版)，2014, 40(6): 706-711.LIU Yasai, DING Xin, LIU Lianmei, et al. Research on the solid electrolyte for supercapacitor with polypyrrole/cotton electrodes [J].Journal of Donghua University(Natural Science), 2014, 40(6): 706-711.[2] 朱航悦，赵亚萍，陈琛，等. 原位界面聚合法制备聚吡咯/棉织物导电复合材料[J]. 表面技术，2015, 44(2): 73-77.ZHU Hangyue, ZHAO Yaping, CHEN Zhen, et al. Preparation of polypyrrole/cotton flexible conductive composite materials by an in-situ interfacial polymerization method [J]. Surface Technology, 2015, 44(2): 73-77.DOI：10.16490/ki.issn.1001-3660.2015.02.014[3] 王秀昀，聂浩宇，阚丽丽，等. 聚吡咯导电薄膜原位聚合工艺的研究[J]. 化工新型材料，2014, 42(11): 184-185.WANG Xiujun, NIE Haoyu, KAN Lili, et al. Process of conductive polypyrrole film by in situ polymerization [J]. New Chemical Materials, 2014, 42(11): 184-185.[4] 刘元军,赵晓明,拓晓. 石墨/碳化硅/铁氧体涂层复合材料性能研究 [J]. 材料科学与工艺,2016,23(6):1-6.LIU Yuanjun, ZHAO Xiaoming, TUO Xiao. Study on the property of graphite/silicon carbide/ferrite composite coating materials[J].Materials Science & Technology, 2016,23(6)：1-6.DOI: 10.11951/j.issn.1005-0299.20160115[5] 刘元军，赵晓明，李卫斌. 吸波材料研究进展[J]. 成都纺织高等专科学校学报，2015,32(3):23-29.LIU Yuanjun, ZHAO Xiaoming, LI Weibin. The progress of the research on absorbing material [J].Journal of Chengdu Textile College, 2015,32(3):23-29.[6] 刘元军,赵晓明,梁腾隆. 聚苯胺复合材料的介电性能研究[J]. 材料导报,2016,30(增刊2):304-307.LIU Yuanjun, ZHAO Xiaoming, LIANG Tenglong. Research on the dielectric properties of the polyaniline composite material[J]. Materials Review, 2016,30(Suppl 2):304-307.[7] 刘顾，汪刘应，程建良，等. 碳纳米管吸波材料研究进展[J]. 材料工程，2015(1): 104-112.LIU Gu, WANG Liuying, CHENG Jianliang, et al. Progress in research on carbon nanotubes microwave absorbers [J].Journal of Materials Engineering, 2015(1): 104-112.DOI：10.11868/j.issn.1001-4381.2015.01.018[8] 苏艳丽，黄鹤. 巨介电陶瓷CaCu3Ti4O12/聚合物复合材料研究进展[J]. 材料工程，2014(2): 94-98.SU Yanli, HUANG He. Advances on the study of giant dielectric constantCaCu3Ti4O12/polymer composites [J]. Journal of Materials Engineering, 2014(2): 94-98.DOI：10.3969/j.issn.1001-4381.2014.02.018[9] 孙莉莉，钟艳莉. 碳纳米纤维/高密度聚乙烯复合材料结晶行为和介电性能的研究[J]. 材料工程，2014(4): 17-22.SUN Lili, ZHONG Yanli. Crystallization and dielectric properties of carbon nanofiber/high-density polyethylene composites [J]. Journal of Materials Engineering, 2014(4): 17-22.DOI：10.3969/j.issn.1001-4381.2013.04.004[10] 刘渊，刘祥萱，王煊军. 铁氧体基核壳结构复合吸波材料研究进展[J]. 材料工程，2014(7): 98-106.LIU Yuan, LIU Xiangxuan, WANG Xuanjun. Research progress in ferrite based core-shell structured composite microwave absorb materials [J].Journal of Materials Engineering, 2014(7): 98-106.DOI: 10.11868/j.issn.1001-4381.2014.07.018[11] 钟旭佳，高晓丁，李阳. 多壁碳纳米管/聚吡咯导电复合材料的制备及性能[J]. 机械工程材料，2015, 39(2): 30-33.ZHONG Xujia, GAO Xiaoding, LI Yang. Synthesis and properties of electrical multi-walled carbon nanotube/polypyrrole electrical conductive composites [J]. Materials for Mechanical Engineering, 2015, 39(2): 30-33. [12] 宋洪松，赵天宇，杨程. 表面处理对CCTO/PVDF复合材料介电性能的影响[J]. 材料工程，2014(8): 27-31.SONG Hongsong, ZHAO Tianyu, YANG Cheng. Effect of surface treatment on dielectric properties of CCTO/PVDF composites [J]. Journal of MaterialsEngineering, 2014(8): 27-31.DOI:10.11868/j.issn.1001-4381.2014.08.005[13] 李永舫. 导电聚吡咯的研究[J]. 高分子通报，2005(4): 51-57.LI Yongfang. Studies on conducting polypyrrole [J]. Polymer Bulletin, 2005(4): 51-57.DOI:10.14028/ki.1003-3726.2005.04.007[14] 吴小华，康秋红，钱方明，等. 聚吡咯/纳米SiO2复合材料的制备及氧化性能[J]. 高分子学报，2015(5): 596-601.WU Xiaohua, KANG Qiuhong, QIAN Fangming,et al. Preparation and oxidative property of polypyrrole/nano SiO2 composite [J]. Acta Polymerica Sinica, 2015(5): 596-601.DOI: 10.11777 /j.issn.1000-3304.2015.14401[15] 于波，徐学诚. 聚吡咯结构与导电性能的研究[J]. 华东师范大学学报(自然科学版)，2014(4): 77-87.YU Bo, XU Xuecheng. Structure-conductive property relationship of polypyrrole [J]. Journal of East China Normal University(Natural Science), 2014(4): 77-87.DOI: 10.3969/j.issn.1000-5641.2014.04.010[16] 孟婷婷. 掺杂聚吡咯的合成及其电化学性质研究[D]. 新乡：河南师范大学，2012.[17] 高敬伟. 多形态聚吡咯的制备与吸波性能研究[D]. 上海: 东华大学，2010.[18] 尹五生. 聚吡咯导电材料合成方法的进展[J]. 功能材料，1996(2): 2-7.YIN Wusheng. Progress in the synthetic methods of polypyrrole conducting materials [J].Journal of Functional Materials, 1996(2): 2-7.[19] XU J, WANG D X, YUAN Y, et al. Polypyrrole-coated cotton fabrics for flexible supercapacitor electrodes prepared using CuO nanoparticles as template [J]. Cellulose, 2015, 22 (2): 1355-1363.[20] 韩永芹，郭义，申明霞，等. 片状聚吡咯/氧化石墨烯复合材料的制备及电化学性能[J]. 功能材料，2015, 46(4): 4046-4050.HAN Yongqin, GUO Yi, SHEN Mingxia, et al. Preparation and electrochemical performances of mciro-sheet polypyrrole/graphene oxide composties [J]. Journal of Functional Materials, 2015, 46(4): 4046-4050. [21] 刘元军，赵晓明，拓晓，等. 聚吡咯吸波材料性能探讨[J]. 成都纺织高等专科学校学报，2015,32(4):60-64.LIU Yuanjun, ZHAO Xiaoming, TUO Xiao, et al. The discussion of the performance on the polypyrrole absorbing material[J].Journal of Chengdu Textile College, 2015,32(4):60-64.[22] 张国标，姚伯龙，齐家鹏，等. 纳米纤状聚吡咯导电涂料的制备与性能研究[J]. 涂料工业，2014, 44(1): 1-6.ZHANG Guobiao, YAO Bolong, QI Jiapeng,et al. Synthesis and properties of polypyrrole nanofibre conductive coating [J]. Paint & Coatings Industry, 2014, 44(1): 1-6.[23] 康永，黄英. 不同表面处理剂对M型掺杂锶铁氧体(SiLaxFe12-xO19(x=0.5))/聚吡咯(PPy)的吸波性能影响分析[J]. 材料导报，2014, 28(24): 1-4. KANG Yong, HUANG Ying. Analysis of wave absorbing performance of M-type SiLaxFe12-xO19(x=0.5)/PPy synthesized by different surfactants [J]. Materials Review, 2014, 28(24): 1-4.DOI: 10.11896/j.issn.1005-023X.2014.24.001[24] 赵海涛，刘瑞萍，李成吾，等. 聚吡咯/Ni0.5Zn0.5Fe2O4复合物的合成与表征[J]. 材料工程，2014(12): 18-22.ZHAO Haitao, LIU Ruiping, LI Chengwu, et al. Synthesis and characterization of polypyrrole/Ni0.5Zn0.5Fe2O4 composites [J]. Journal of Materials Engineering, 2014(12): 18-22.DOI:10.11868/j.issn.1001-4381.2014.12.003[25] 高敬伟，姚寅芳，黄梦龙，等. 十二烷基苯磺酸钠掺杂的聚吡咯吸波性能研究[J]. 材料导报，2010, 24(24): 9-12.GAO Jingwei, YAO Yanfang, HUANG Menglong, et al. Microwave absorption properties of doped polypyrrole with sodium dodecyl benzene sulfonate [J]. Materials Review, 2010, 24(24): 9-12.[26] 柯强，陈松，刘松，等. 石墨烯片/聚吡咯复合材料的制备与防护性能[J]. 腐蚀与防护，2014, 35(10): 997-1001.KE Qiang, CHEN Song, LIU Song, et al. Preparation and protection properties of graphene sheets/polypyrrole composites [J]. Corrosion & Protection, 2014, 35(10): 997-1001.[27] 王华. 聚吡咯涂层的制备及耐腐蚀性能研究[J]. 表面技术，2015, 44(3): 111-115.WANG Hua. Preparation and corrosion performance of polypyrrole film [J]. Surface Technology, 2015, 44(3): 111-115.DOI: 10.16490 /ki.issn.1001-3660.2015.03.019。

1.2. Assuming dopant atoms are uniformly distributed in a silicon crystal, how far apart arethese atoms when the doping concentration is a). 1015 cm -3, b). 1018 cm -3, c). 5x1020 cm -3.Answer:The average distance between the dopant atoms would just be one over the cube root of the dopant concentration:x =N A -1/3a)x =1x1015cm-3()-1/3=1x10-5cm =0.1μm =100nmb)x =1x1018cm-3()-1/3=1x10-6cm =0.01μm =10nmc)x =5x1020cm-3()-1/3=1.3x10-7cm =0.0013μm =1.3nm1.3. Consider a piece of pure silicon 100 µm long with a cross-sectional area of 1 µm2. Howmuch current would flow through this “resistor” at room temperature in response to an applied voltage of 1 volt?Answer: If the silicon is pure, then the carrier concentration will be simply n i . At room temperature, n i≈ 1.45 x 1010 cm -3. Under an applied field, the current will be due to drift and hence,I =I n +I p =qAn i μn +μp ()ε=1.6x10-19coul ()10-8cm 2()1.45x1010carrierscm -3()2000cm 2volt -1sec -1()1volt 10-2cm ⎛ ⎝ ⎫⎭=4.64x10-12amps or 4.64pA1.10. A state-of-the-art NMOS transistor might have a drain junction area of 0.5 x 0.5 µm.Calculate the junction capacitance associated with this junction at an applied reverse bias of 2 volts. Assume the drain region is very heavily doped and the substrate doping is 1 x 1016 cm -3. Answer:The capacitance of the junction is given by Eqn. 1.25.C A =εS x d =q εS 2N A ND N A +N D ⎛ ⎝ ⎫ ⎭ ⎪ 1φi ±V ()⎡ ⎣ ⎢⎤ ⎦ ⎥The junction built-in voltage is given by Eqn. 1.24. N D is not specified except that it is very large, so we take it to be 1020 cm -3 (roughly solid solubility). The exact choice for N D doesn't make much difference in the answer.φi =kT q ln N D N An i 2⎛ ⎝ ⎫ ⎭⎪ =.0259volt s ()ln 1020cm -3()1016cm -3()1.45x1010cm-3()2⎛ ⎝ ⎫⎭⎪ ⎪ =0.934 volt sSince N D >> N A in this structure, the capacitance expression simplifies toC A ≅εSW=qεS2N A()1φi±V()⎡⎣⎢⎤⎦⎥=1.6x10-19coul()11.7()1016cm-3()8.86x10-14Fcm-1()2()2.934volt s()⎡⎣⎢⎤⎦⎥ =1.68x10-8Fcm-2Given the area of the junction (0.25 x 10-8 cm2, the junction capacitance is thus 4.2 x 10-17 Farads.3.2. A boron-doped crystal pulled by the Czochralski technique is required to have aresistivity of 10 Ω cm when half the crystal is grown. Assuming that a 100 gm pure silicon charge is used, how much 0.01 Ω cm boron doped silicon must be added to the melt? For this crystal, plot resistivity as a function of the fraction of the melt solidified. Assume k 0 = 0.8 and the hole mobility µp = 550 cm 2 volt -1 sec -1.Answer:Using the mobility value given, and ρ=1q μN A we have:10 Ω cm ⇒ N A = 1.14 x 1015 cm -3 and 0.01 Ω cm ⇒ N A = 1.14 x 1018 cm -3From Eqn. 3.38, C S =C O k O 1-f ()k O -1and we want C S = 1.14 x 1015 cm -3 when f =0.5. Thus, solving for C 0 the initial doping concentration in the melt, we have:C 0=1.14x10150.81-0.5()0.2=1.24x1015cm -3But C 0=I 0V 0=# of impurities unit vol of melt =(Doping)(Vol. of 0.01 Ωcm)Vol 100 gm Si∴ Wgt added of 0.01 Ω cm S i = C 0Doping ⎛ ⎝ ⎫⎭ 100gm ()=0.109gmThe resistivity as a function of distance is plotted below and is given byρx ()=1q μN A x ()=1-f ()1-k 0q μC 0k 0=11.5Ωcm 1-f ()0.2R e s i s t i v i t y0.20.40.60.81Fraction Solidified - f3.3. A Czochralski crystal is pulled from a melt containing 1015 cm -3 boron and 2x1014 cm -3phosphorus. Initially the crystal will be P type but as it is pulled, more and more phosphorus will build up in the liquid because of segregation. At some point the crystal will become N type. Assuming k O = 0.32 for phosphorus and 0.8 for boron, calculate the distance along the pulled crystal at which the transition from P to N type takes place.Answer:We can calculate the point at which the crystal becomes N type from Eqn. 3.38 as follows:C S Phos ()=C 0k 01-f ()k 0-1=2x1014()0.32()1-f ()-0.68C S Boron ()=C 0k 01-f ()k 0-1=1015()0.8()1-f ()-0.2At the point where the cross-over occurs to N type, these two concentrations will be equal. Solving for f, we findf ≅0.995Thus only the last 0.5% of the crystal is N type.3.6. Suppose your company was in the business of producing silicon wafers for thesemiconductor industry by the CZ growth process. Suppose you had to produce the maximum number of wafers per boule that met a fairly tight resistivity specification. a). Would you prefer to grow N type or P type crystals? Why?b). What dopant would you use in growing N-type crystals? What dopant would you use in growing P type crystals? ExplainAnswer:a). Boron has the segregation coefficient closest to unity of all the dopants. Thus it produces the most uniform doping along the length of a CZ crystal. Thus P type would be the natural choice.b). For P type, the obvious (and only real choice) is boron as explained in part a). For N type crystals Fig. 3-18 shows that either P or As would be a reasonable choice since their segregation coefficients are quite close and are better than Sb. Table 3-2 indicates that P might be slightly preferred over As because its k O value is slightly closer to 1.4.1. An IC manufacturing plant produces 1000 wafers per week. Assume that each wafer contains 100 die, each of which can be sold for $50 if it works. The yield on these chips is currently running at 50%. If the yield can be increased, the incremental income is almost pure profit because all 100 chips on each wafer are manufactured whether they work or not. How much would the yield have to be increased to produce an annual profit increase of $10,000,000?Answer:At 1000 wafers per week, the plant produces 52,000 wafers per year. If each wafer has 50 good die each of which sells for $50, the plant gross income is simplyIncome = (52,000)(50)($50) = $130,000,000 per year.To increase this income by $10,000,000 requires that the yield increase by10130≅7.7%4.3. As MOS devices are scaled to smaller dimensions, gate oxides must bereduced in thickness.a. As the gate oxide thickness decreases, do MOS devices become more or lesssensitive to sodium contamination? Explain.b. As the gate oxide thickness decreases, what must be done to the substrate doping (oralternatively the channel V TH implant, to maintain the same V TH? Explain.Answer:a). From the text, Na+ contamination causes threshold voltage instabilities in MOS devices.Also from Eqn. 4.1, the threshold voltage is given byV TH=V FB+2φf+2εS qN A2φf()C OX+qQ MC OXAs the gate oxide thickness decreases, C OX increases, so the same amount of mobile charge Q M will have less effect on V TH as oxides get thinner. Therefore MOS devices are less sensitive to sodium contamination.b). Using the same expression for V TH as in part a), we observe that as the oxide thickness decreases, (C OX increases), to maintain the same V TH, N A will have to increase. N A willactually have to increase by the square root of the oxide thickness decrease to keep V TH constant.4.4. A new cleaning procedure has been proposed which is based on H2O saturated with O2as an oxidant. This has been suggested as a replacement for the H2O2 oxidizing solution used in the RCA clean. Suppose a Si wafer, contaminated with trace amounts of Au, Fe and Cu is cleaned in the new H2O/O2solution. Will this clean the wafer effectively?Why or why not? Explain.Answer:As described in the text, cleaning metal ions off of silicon wafers involves the following chemistry:M↔M z++ze-The cleaning solution must be chosen so that the reaction is driven to the right because this puts the metal ions in solution where they can be rinsed off. Since driving the reaction to the right corresponds to oxidation, we need an oxidizing solution to clean the wafer.H2O/O2 is certainly an oxidizing solution. But whether it cleans effectively or not depends on the standard oxidation potential of the various possible reactions. From Table 4-3 in the text, we have:The stronger reactions (dominating) are at the bottom.Thus the H2O/O2 reaction will clean Fe and Cu, but it will not clean Au off the wafer.4.5. Explain why it is important that the generation lifetime measurement illustrated inFigure 4-19 is done in the dark.Answer:The measurement depends on measuring carriers generated thermally in the silicon substrate (or at the surface). If light is shining on the sample, then absorbed photons can also generate the required carriers. As a result, the extracted generation lifetime with the light on would really be measuring the intensity of the incident light and not a basic property of the silicon material.5.1. Calculate and plot versus exposure wavelength the theoretical resolution and depth offocus for a projection exposure system with a NA of 0.6 (about the best that can be done today). Assume k 1 = 0.6 and k 2 = 0.5 (both typical values). Consider wavelengths between 100 nm and 1000 nm (DUV and visible light). ). Indicate the common exposure wavelengths being used or considered today on your plot (g-line, i-line, KrF and ArF). Will an ArF source be adequate for the 0.13 µm and 0.1 µm technology generations according to these simple calculations?Answer:The relevant equations are simply∴R =k 1λNA =0.6λ0.6 and DOF=±k 2λNA ()2=±0.5λ0.6()2These equations are plotted below. Note that the ArF (193 nm) will not reach 0.13 µm or 0.1 µm resolution according to these simple calculations. In fact, with more sophisticated techniques such as phase shift masks, off axis illumination etc., ArF is expected to reach 0.13 µm and perhaps the 0.1 µm generations.R e s o l u t i o n , D O F 祄20040060080010001200Exposure W avelength nm5.3. An X-ray exposure system uses photons with an energy of 1 keV. If the separation between the mask and wafer is 20 µm, estimate the diffraction limited resolution that is achievable by this system.Answer:The equivalent wavelength of 1 keV x-rays is given byE =h ν=hc λ∴ λ=hc E=4.14x10-15eVsec ()3x1010cmsec -1()103eV=1.24x10-7cm =1.24 nmX-ray systems operate in the proximity printing mode, so that the theoretical resolution is given by Eqn. 5.12:Resolut ion =λg =1.24x10-3μm ()20μm ()=0.15μm5.8. As described in this chapter, there are no clear choices for lithography systems beyondoptical projection tools based on 193-nm ArF eximer lasers. One possibility is an optical projection system using a 157-nm F 2 excimer laser.a. Assuming a numerical aperture of 0.8 and k 1 = 0.75, what is the expected resolution of such a system using a first order estimate of resolution?b. Actual projections for such systems suggest that they might be capable of resolving features suitable for the 2009 0.07 µm generation. Suggest three approaches to actually achieving this resolution with these systems.Answera). The simple formula for resolution isR =k 1λNA =0.750.157μm0.8=0.147μmb). The calculated resolution in part a is a factor of two larger than required for the 0.07 µm generation. Therefore some “tricks” will have to be used to act ually achieve such resolution. There are a number of possibilities:1. Use of phase-shift masks. This technique, discussed in this chapter, has the potential for significant resolution improvements. It works by designing a more sophisticated mask. Simple masks are digital - black or white. Phase shifting adds a second material to the mask features, usually at the edges which shifts the optical phase and sharpens up the aerial image. Sophisticated computer programs are required to design such masks.2. Use of optical proximity correction in the mask design. This is another approach to designing a better mask and as discussed in class, can also improve resolution significantly. The approach involves adding extra features to the mask, usually at corners where features are sharp, to compensate for the high frequency information lost to diffraction effects.3. Off-axis illumination. This allows the optical system to capture some of the higher order diffracted light and hence can improve resolution.5.9. Current optical projection lithography tools produce diffraction limited aerial images. A typical aerial image produced by such a system is shown in the simulation below where a square and rectangular mask regions produce the image shown. (The mask features are the black outlines, the calculated aerial image is the grayscale inside the black rectangles.) The major feature of the aerial image is its rounded corners compared to the sharp square corners of the desired pattern. Explain physically why these features look the way they do, using diffraction theory and the physical properties of modern projection optical lithography tools.Answer:Modern optical projection lithography systems are limited in the resolution they can achieve by diffraction effects. The finite size of the focusing lens means that the high order diffraction components are “lost” and are therefore not available to help in printing a replica of the mask image. But the high frequency spatial components are exactly the components that contain information about “sharp” features, i.e. corners etc. Thus the projected aerial image loses this information and corners become rounded. The only ways to improve the image are by using shorter wavelength light, or a higher NA lens.5.10. Future optical lithography systems will likely use shorter exposure wavelengths toachieve higher resolution and they will also likely use planarization techniques to provide “flat” substrates on which to expose the resist layers. Explain why “flat”substrates will be more important in the future than they have been in the past. Answer:As the wavelength of the exposure system decreases, the depth of focus of the exposure system also decreases. Thus it will be necessary to make sure that the resist in which the image is to be exposed, is flat and does not require much depth of focus. Planarization techniques will be required to accomplish this. This could mean CMP to planarize the substrate before the resist is applied, or it could mean using a spun on resist which planarizes the substrate and which is then covered with a thin, uniform imaging resist layer.6.4. Construct a HF CV plot for a P-type silicon sample, analogous to Fig. 6-9. Explain your plot based on the behavior of holes and electrons in the semiconductor in a similar manner to the discussion in the text for Fig. 6.9. Answer:C ODV GGQ GQ IQ DThe C-V plot looks basically the same as the N substrate example in the text, that we discussed in class, except that the horizontal axis is flipped. For negative applied gate voltages, the majority carrier holes in the substrate are attracted to the surface. This is the accumulation region a) above. We measure just C OX for the capacitance since there is no depletion in the substrate. For + V G, the holes are driven away from the surface creating first a depletion region as in b) and finally an inversion layer of electrons as in c). Themeasured capacitance drops as we move into depletion and finally reaches a minimum value after an inversion layer forms.The C-V curves shown are high frequency curves. As discussed in the text, the capacitance remains at its minimum value for + V G values greater than V TH because the inversion layer electrons cannot be created or destroyed as fast as the signal is changing. Hence the small AC signal must “wiggle” the bottom of the depletion region to balance ∆V G.6.6. In a small MOS device, there may be a statistical variation in V T due to differences inQ F from one device to another. In a 0.13 µm technology minimum device (gate oxide area = 0.1µm x 0.1µm) with a 2.5nm gate oxide, what would the difference in threshold voltage be for devices with 0 or 1 fixed charge in the gate oxide?Answer:The oxide capacitance isC ox=εAd=3.9⨯8.854⨯10-14()0.1⨯10-4()0.1⨯10-4()2.5⨯10-7=1.38⨯10-16The change in threshold voltage is given by∆V T=qQ FC ox=1.6⨯10-19()1()1.38⨯10-16=1.1mVThis shows that a single electron trap in a gate oxide will have a negligible effect on thethreshold voltage at this technology generation.6.12 A silicon wafer is covered by an SiO2 film 0.3 μm thick.a. What is the time required to increase the thickness by 0.5 μm by oxidation in H2Oat 1200˚C?b. Repeat for oxidation in dry O2at 1200˚C.Answer:We will perform the calculation for <111> silicon wafers. For <100> wafers, the linear rate constant should be divided by 1.68.a. At 1200˚C, in H2OB=3.86⨯102exp-0.78 kT⎛ ⎝ ⎫⎭ =0.829μm2/hrB A =1.63⨯108exp-2.05kT⎛⎝⎫⎭ =15.86μm/hrA=0.052μmThe initial oxide, if grown at 1200˚C would have taken this long to growτ=x i2+Ax iB=0.3()2+0.052()0.3()0.829=0.127hrThe time required to grow 0.8μm at 1200˚C isτ=x i 2+Ax i B =0.8()2+0.052()0.8()0.829=0.822hrThus, the time required to add 0.5μm to an existing 0.3μm film is0.822-0.127=0.695hr or 41.7 minutes.b. At 1200˚C, in dry oxygenB =7.72⨯102exp - 1.23k(1200+273)⎛ ⎝ ⎫ ⎭ =0.048μm 2/hrB A =6.23⨯106exp -2.0kT ⎛ ⎝ ⎫ ⎭ =0.899μm /hrA =0.053μmThe initial oxide would have taken 2.206 hours to grow in dry oxygen, it would require 14.217 hours to grow 0.8μm , thus would require an additional 12 hours to add 0.5μm to an existing 0.3μm film.6.13. Suppose an oxidation process is used in which (100) wafers are oxidized in O 2 for threehrs. at 1100˚C, followed by two hrs. in H 2O at 900˚C, followed by two hrs in O 2 at 1200˚C. Use Figs. 6-19 and 6-20 in the text to estimate the resulting final oxide thickness. Explain how you use these figures to calculate the results of a multi-step oxidation like this.Answer:We can use these figures to estimate the oxide thickness as follows. First, we use Fig. 6-19 for the first dry oxidation cycleA three hour oxidation at 1100˚C produces an oxide thickness of about 0.21 µm. We nextuse Fig. 6-20 for the wet oxidation as shown below. The oxidation is 2 hrs in H 2O at 90 ˚C. We start by finding the point on the 900˚C curve that corresponds to 0.21 µm since this is the starting oxide thickness. This is point A. We then move along the 900˚C curve by two hours to point B. This corresponds to a thickness of about 0.4 µm which is the thickness at the end of the wet oxidation.We now go back to Fig. 6-19 for the final dry O 2 cycle. This process is 2 hrs at 1200˚C. Westart by finding the point on the 1200˚C curve that corresponds to a starting oxide thickness of 0.4 µm. This is point A below. We then increment the time by 2 hrs along the 1200˚C curve, to arrive at a final oxide thickness of about 0.5 µm.6.18. Silicon on Insulator or SOI is a new substrate material that is being considered forfuture integrated circuits. The structure, shown below, consists of a thin single crystal silicon layer on an insulating (SiO 2) substrate. The silicon below the SiO 2 provides mechanical support for the structure. One of the reasons this type of material is being considered, is because junctions can be diffused completely through the thin silicon layer to the underlying SiO 2. This reduces junction capacitances and produces faster circuits. Isolation is also easy to achieve in this material, because the thin Si layer can be completely oxidized, resulting in devices completely surrounded by SiO 2. A LOCOS process is used to locally oxidize through the silicon as shown on the right below. Assuming the LOCOS oxidation is done in H 2O at 1000˚C, how long will it take to oxidize through the 0.3 µm silicon layer? Calculate a numerical answer using the Deal Grove model.Answer:To oxidize completely through a 0.3 µm silicon layer, we will need to grow (2.2)(0.3 µm) = 0.66 µm of SiO 2. At 1000˚C in H 2O, the Deal Grove rate constants are given by (Table 6-2):B =3.86x102exp -0.78eV kT ⎛ ⎝ ⎫ ⎭ =0.316μm 2hr-1B A =1.63x1081.68exp -2.05eV kT ⎛ ⎝ ⎫ ⎭ =0.747μmhr -1∴t =0.66()20.316+0.660.747≅2.25 hours6.23. As part of an IC process flow, a CVD SiO 2 layer 1.0 µm thick is deposited on a <100>silicon substrate. This structure is then oxidized at 900˚C for 60 minutes in an H 2O ambient. What is the final SiO 2 thickness after this oxidation? Calculate an answer, do not use the oxidation charts in the text .Answer:At 900˚C in H 2O, the oxidation rate constants are given by:B =3.86x102exp -0.788.62x10-5()1173()⎛ ⎝ ⎫ ⎭ ⎪ μm 2 hr -1=0.17 μm 2 hr -1B A =1.63x1081.68exp - 2.058.62x10-5()1173()⎛ ⎝ ⎫ ⎭ ⎪ μm hr -1=0.152 μm hr -1The initial oxide on the wafer is 1.0 µm thick. This corresponds to a τ ofτ=1()2+1()0.170.152⎛ ⎝⎫⎭ 0.17=12.46 hoursThus the final oxide thickness is given byx o =0.172()0.152()1+13.461.11()24()0.17()-1⎧ ⎨ ⎪ ⎩ ⎪ ⎫⎬ ⎪ ⎭ ⎪=1.064 μmThus not much additional oxide grows.Chapter 7 Problems7.1. A resistor for an analog integrated circuit is made using a layer of deposited polysilicon0.5 µm thick, as shown below.Polysilicon (a) (a) The doping the polysilicon is 1⨯10 cm -3. The carrier mobilityμ=100cm 2V -1sec -1is low because of scattering at grain boundaries. If the resistor has L=100µm, W=10µm, what is its resistance in Ohms?(b) (b) A thermal oxidation is performed on the polysilicon for 2 hours at 900˚C inH 2O . Assuming B/A for polysilicon is 2/3 that of <111> silicon, what is thepolysilicon thickness that remains.(c) (c) Assuming that all of the dopant remains in the polysilicon (i.e. does notsegregate to oxide), what is the new value of the resistor in (a). Assume the mobility does not change.Answer:(a)ρ=1nq μ=11⨯1016()1.6⨯10-19()100()=6.25ΩcmρS =ρx j = 6.250.5⨯10-4=125k ΩR =10010ρS =1.25M Ω(10squares)(b) The linear rate coefficient at 900˚C isB A ⎛ ⎝ ⎫ ⎭ poly =23 1.63⨯108exp -2.05kT ⎛ ⎝ ⎫ ⎭ ⎛ ⎝ ⎫ ⎭=0.170μm hr-1The parabolic rate constant for poly is unchanged:B pol y =3.86⨯102exp -0.78kT ⎛ ⎝ ⎫ ⎭ =0.172μm 2hr-1A poly =1.01μmThe oxide thickness isx o =A 21+tA 2/4B -1⎧ ⎨ ⎩ ⎫ ⎬⎭x o =1.0121+21.01()2/40.172()-1⎧ ⎨ ⎩ ⎫ ⎬ ⎭ =0.27μmThis oxide consumes a silicon thickness of 0.45*0.27=0.12 µm, leaving a remaining polysilicon thickness of 0.5-0.12=0.38 µm and contains all the dopant with a concentration of1⨯1016()0.50.38=1.31⨯1016cm -3(c) Since the concentration has gone up and the thickness has gone down by the same factor, the polysilicon restivity and hence the resistance of the line remains the same.7.4. Suppose we perform a solid solubility limited predeposition from a doped glass sourcewhich introduces a total of Q impurities / cm 2.(a) (a) If this predeposition was performed for a total of t minutes, how long would ittake (total time) to predeposit a total of 3Q impurities / cm 2 into a wafer if the predeposition temperature remained constant.(b) (b) Derive a simple expression for the Dt ()drive -in which would be required todrive the initial predeposition of Q impurities / cm 2 sufficiently deep so that the final surface concentration is equal to 1% of the solid solubility concentration. Thiscan be expressed in terms ofDt ()predep and the solid solubility concentrationC S .Answer:(a)Q =2C SπDt ⇒Q ∝t∴3Q ⇒9t(b)C 0,t ()drive -in =QπDt =0.01C SQ =2C SπDt ()predep∴2πDt ()predep Dt ()drive -in=0.01∴Dt ()drive -in =200π⎛ ⎝ ⎫⎭ 2Dt ()predep7.7. A boron diffusion is performed in silicon such that the maximum boron concentration is1 x 1018 cm -3. For what range of diffusion temperatures will electric field effects and concentration dependent diffusion coefficients be important?Answer:Electric field effects and concentration dependent diffusion are both important when the doping concentration exceeds the intrinsic electron (or hole) concentration. The intrinsic orbackground electron concentration is n i which increases with higher temperature. This provides a background sea of electrons or holes in the lattice at a given temperature. If the doping exceeds this concentration, then these extrinsic effects are important.When the temperature is below the temperature where n i =1⨯1018/cm 3, these effects will become dominant since they often depend on n /n i (where n =N A or n =N D to a first approximation).n i =3.9⨯1016T 32exp -0.605kT⎛ ⎝ ⎫ ⎭By trial and error, n i =1⨯1018/cm 3at T=720C.Therefore, extrinsic effects become important below 720˚C.7.15. A silicon wafer is uniformly doped with boron (2 x 1015 cm -3) and phosphorus (1 x 1015cm -3) so that it is net P type. This wafer is then thermally oxidized to grow about 1 µm of SiO 2. The oxide is then stripped and a measurement is made to determine the doping type of the wafer surface. Surprisingly it is found to be N type. Explain why the surface was converted from P to N type. Hint: Consider the segregation behavior of dopants when silicon is oxidized.Answer:The boron segregates preferentially into the growing oxide, thus depleting the surface concentration in the silicon. The phosphorus on the other hand preferentially segregates (piles-up) on the silicon side of the interface. Both of these effects act in the same direction and tend to make the surface of the silicon more N-type.It is for this reason that a P-type “channel stop” implant is almost always needed under a locally oxidized lightly doped P-type region, to prevent depletion of the P-type dopant in the substrate and in the worst case to prevent an N-type channel from forming.7.20. Fig. 7.38 shows that a wet oxidation produces a significantly higher C I /C I *than doesa dry O 2 oxidation. Explain quantitatively why this should be the case. Answer:BecauseC I ∝dx dta faster oxidation rate produces a higher interstitial supersaturation. Thus, wet oxidationproduces a higher C I /C I *than dry oxidation, for the same time at the same temperature.Chapter 8 Problems8.1. Arsenic is implanted into a lightly doped p-type Si substrate at an energy of 75keV . Thedose is 1⨯1014/cm 2. The Si substrate is tilted 7˚ with respect to the ion beam to make it appear amorphous. The implanted region is assumed to be rapidly annealed so that complete electrical activation is achieved. What is the peak electron concentration produced?Answer:From Fig. 8-3, the range and standard deviation for 75 keV arsenic areR P =0.05μm ∆R P =0.02μmThe peak concentration isC P =Q2π∆R P=1⨯10142π0.02⨯10-4()=2⨯1019cm -3Assuming all the dose is active, then the peak electron concentration is equal to the peak dopant concentration.8.4. How thick does a mask have to be to reduce the peak doping of an implantby a factor of 10,000 at the mask/substrate boundary. Provide an equation in terms of the Range and the Standard Deviation of the implant profile.Answer:We want to reduce the peak doping N P *in the mask at range R P *by 10,000 at the mask/substrate boundary. We will use the equation which describes the profile of an implant in a mask layerN *(d)=N P *exp -d -R P*()22∆R P *2⎡ ⎣ ⎢ ⎢ ⎤ ⎦⎥ ⎥WhenN *(d)N P *=10-4we haved =R P *+4.3∆R P *8.6. The equations below provide a reasonable analytical description for some of thediffusion processes indicated schematically in the diagrams on the following page. Put the equation number (a-f) on each figure that is the best match. Equations may be。

AZO薄膜的溶胶-凝胶制备与氮气热处理金巨江，靳正国天津大学材料学院，天津 (300072)E-mail：*****************℃摘要：本文通过Sol-Gel法制备了透明导电AZO薄膜，在氮气气氛下对薄膜进行了3001个小时的热处理。

XPS、XRD、SEM、UV-Vis和四探针仪表征了薄膜的结构与性能。

结果表明，适当增加掺杂量能提高薄膜的电导率，过多的掺杂反而会降低电导率。

掺杂量对薄膜在可见光范围内透射率影响不大，可见光透射率均大于80%。

低温氮气热处理可以显著提高薄膜电导率，方阻最低可达270Ω/□。

关键词：sol-gel法，AZO，透射率，电导率，方阻1.引言ZnO是一种直接带隙的宽禁带半导体材料，室温下的禁带宽度为3.25eV，激子束缚能高达60meV。

ZnO薄膜具有成本低廉、无毒、热稳定性高等优点，在短波长发光和激光器件等方面有着广泛的应用前景。

在氧化锌薄膜中掺入铝、锂、氟[4]等杂质，可以有效的提高薄膜的电导率，改善薄膜的性能[1]。

据报道，ZnO薄膜的制备方法很多，主要包括：溅射法[2]，脉冲激光沉积法[3]，喷雾热分解[4]，化学气相沉积法[5]，分子束外延法[6]和溶胶—凝胶法[7]等。

溶胶-凝胶方法具有方法简便、不需特殊设备，后处理温度低、对衬底要求比较宽，组成掺杂和厚度容易控制、廉价和适于制备大面积薄膜等优点，是ZnO薄膜制备研究方法的热点之一。

AZO薄膜是一种透明导电膜，在可见光范围内具有很高的透过性(T%>80)，近中红外光范围内具有很高的反射率(R%>60)及优良的导电性(p<l0-3Ω·cm)等。

因此该薄膜具有与ITO(In2O3：Sn)薄膜相比拟的光学和电学特性，而且制备工艺简单、价格低、无毒和稳定性好等性能特征，逐渐成为ITO 薄膜的最佳替代材料，并作为新一代透明导电材料引起广泛的关注。

本文主要研究了sol-gel法ZnO薄膜的Al掺杂改性，低温氮气气氛处理对薄膜性能的影响以及AZO薄膜空气下的性能-温度稳定性。

Abrupt junction 突变结Accelerated testing 加速实验Acceptor 受主Acceptor atom 受主原子Accumulation 积累、堆积Accumulating contact 积累接触Accumulation region 积累区Accumulation layer 积累层Active region 有源区Active component 有源元Active device 有源器件Activation 激活Activation energy 激活能Active region 有源（放大）区Admittance 导纳Allowed band 允带Alloy-junction device合金结器件Aluminum（Aluminium）铝Aluminum - oxide 铝氧化物Aluminum passivation 铝钝化Ambipolar 双极的Ambient temperature 环境温度Amorphous 无定形的，非晶体的Amplifier 功放扩音器放大器Analogue（Analog）comparator 模拟比较器Angstrom 埃Anneal 退火Anisotropic 各向异性的Anode 阳极Arsenic （AS）砷Auger 俄歇Auger process 俄歇过程Avalanche 雪崩Avalanche breakdown 雪崩击穿Avalanche excitation雪崩激发Background carrier 本底载流子Background doping 本底掺杂Backward 反向Backward bias 反向偏置Ballasting resistor 整流电阻Ball bond 球形键合Band 能带Band gap 能带间隙Barrier 势垒Barrier layer 势垒层Barrier width 势垒宽度Base 基极Base contact 基区接触Base stretching 基区扩展效应Base transit time 基区渡越时间Base transport efficiency基区输运系数Base-width modulation基区宽度调制Basis vector 基矢Bias 偏置Bilateral switch 双向开关Binary code 二进制代码Binary compound semiconductor 二元化合物半导体Bipolar 双极性的Bipolar Junction Transistor （BJT）双极晶体管Bloch 布洛赫Blocking band 阻挡能带Blocking contact 阻挡接触Body - centered 体心立方Body-centred cubic structure 体立心结构Boltzmann 波尔兹曼Bond 键、键合Bonding electron 价电子Bonding pad 键合点Bootstrap circuit 自举电路Bootstrapped emitter follower 自举射极跟随器Boron 硼Borosilicate glass 硼硅玻璃Boundary condition 边界条件Bound electron 束缚电子Breadboard 模拟板、实验板Break down 击穿Break over 转折Brillouin 布里渊Brillouin zone 布里渊区Built-in 内建的Build-in electric field 内建电场Bulk 体/体内Bulk absorption 体吸收Bulk generation 体产生Bulk recombination 体复合Burn - in 老化Burn out 烧毁Buried channel 埋沟Buried diffusion region 隐埋扩散区Can 外壳Capacitance 电容Capture cross section 俘获截面Capture carrier 俘获载流子Carrier 载流子、载波Carry bit 进位位Carry-in bit 进位输入Carry-out bit 进位输出Cascade 级联Case 管壳Cathode 阴极Center 中心Ceramic 陶瓷（的）Channel 沟道Channel breakdown 沟道击穿Channel current 沟道电流Channel doping 沟道掺杂Channel shortening 沟道缩短Channel width 沟道宽度Characteristic impedance 特征阻抗Charge 电荷、充电Charge-compensation effects 电荷补偿效应Charge conservation 电荷守恒Charge neutrality condition 电中性条件Charge drive/exchange/sharing/transfer/storage 电荷驱动/交换/共享/转移/存储Chemmical etching 化学腐蚀法Chemically-Polish 化学抛光Chemmically-Mechanically Polish （CMP）化学机械抛光Chip 芯片Chip yield 芯片成品率Clamped 箝位Clamping diode 箝位二极管Cleavage plane 解理面Clock rate 时钟频率Clock generator 时钟发生器Clock flip-flop 时钟触发器Close-packed structure 密堆积结构Close-loop gain 闭环增益Collector 集电极Collision 碰撞Compensated OP-AMP 补偿运放Common-base/collector/emitter connection 共基极/集电极/发射极连接Common-gate/drain/source connection 共栅/漏/源连接Common-mode gain 共模增益Common-mode input 共模输入Common-mode rejection ratio （CMRR）共模抑制比Compatibility 兼容性Compensation 补偿Compensated impurities 补偿杂质Compensated semiconductor 补偿半导体Complementary Darlington circuit 互补达林顿电路Complementary Metal-Oxide-Semiconductor Field-Effect-Transistor（CMOS）互补金属氧化物半导体场效应晶体管Complementary error function 余误差函数Computer-aided design （CAD）/test（CAT）/manufacture（CAM）计算机辅助设计/ 测试/制造Compound Semiconductor 化合物半导体Conductance 电导Conduction band （edge）导带（底）Conduction level/state 导带态Conductor 导体Conductivity 电导率Configuration 组态Conlomb 库仑Conpled Configuration Devices 结构组态Constants 物理常数Constant energy surface 等能面Constant-source diffusion恒定源扩散Contact 接触Contamination 治污Continuity equation 连续性方程Contact hole 接触孔Contact potential 接触电势Continuity condition 连续性条件Contra doping 反掺杂Controlled 受控的Converter 转换器Conveyer 传输器Copper interconnection system 铜互连系统Couping 耦合Covalent 共阶的Crossover 跨交Critical 临界的Crossunder 穿交Crucible坩埚Crystal defect/face/orientation/lattice 晶体缺陷/晶面/晶向/晶格Current density 电流密度Curvature 曲率Cut off 截止Current drift/dirve/sharing 电流漂移/驱动/共享Current Sense 电流取样Curvature 弯曲Custom integrated circuit 定制集成电路Cylindrical 柱面的Czochralshicrystal 直立单晶Czochralski technique 切克劳斯基技术（Cz法直拉晶体J）Dangling bonds 悬挂键Dark current 暗电流Dead time 空载时间Debye length 德拜长度De.broglie 德布洛意Decderate 减速Decibel （dB）分贝Decode 译码Deep acceptor level 深受主能级Deep donor level 深施主能级Deep impurity level 深度杂质能级Deep trap 深陷阱Defeat 缺陷Degenerate semiconductor 简并半导体Degeneracy 简并度Degradation 退化Degree Celsius（centigrade）/Kelvin 摄氏/开氏温度Delay 延迟Density 密度Density of states 态密度Depletion 耗尽Depletion approximation 耗尽近似Depletion contact 耗尽接触Depletion depth 耗尽深度Depletion effect 耗尽效应Depletion layer 耗尽层Depletion MOS 耗尽MOSDepletion region 耗尽区Deposited film 淀积薄膜Deposition process 淀积工艺Design rules 设计规则Die 芯片（复数dice）Diode 二极管Dielectric 介电的Dielectric isolation 介质隔离Difference-mode input 差模输入Differential amplifier 差分放大器Differential capacitance 微分电容Diffused junction 扩散结Diffusion 扩散Diffusion coefficient 扩散系数Diffusion constant 扩散常数Diffusivity 扩散率Diffusion capacitance/barrier/current/furnace 扩散电容/势垒/电流/炉Digital circuit 数字电路Dipole domain 偶极畴Dipole layer 偶极层Direct-coupling 直接耦合Direct-gap semiconductor 直接带隙半导体Direct transition 直接跃迁Discharge 放电Discrete component 分立元件Dissipation 耗散Distribution 分布Distributed capacitance 分布电容Distributed model 分布模型Displacement 位移Dislocation 位错Domain 畴Donor 施主Donor exhaustion 施主耗尽Dopant 掺杂剂Doped semiconductor 掺杂半导体Doping concentration 掺杂浓度Double-diffusive MOS（DMOS）双扩散MOS.Drift 漂移Drift field 漂移电场Drift mobility 迁移率Dry etching 干法腐蚀Dry/wet oxidation 干/湿法氧化Dose 剂量Duty cycle 工作周期Dual-in-line package （DIP）双列直插式封装Dynamics 动态Dynamic characteristics 动态属性Dynamic impedance 动态阻抗Early effect 厄利效应Early failure 早期失效Effective mass 有效质量Einstein relation（ship）爱因斯坦关系Electric Erase Programmable Read Only Memory（E2PROM）一次性电可擦除只读存储器Electrode 电极Electrominggratim 电迁移Electron affinity 电子亲和势Electronic -grade 电子能Electron-beam photo-resist exposure 光致抗蚀剂的电子束曝光Electron gas 电子气Electron-grade water 电子级纯水Electron trapping center 电子俘获中心Electron Volt （eV）电子伏Electrostatic 静电的Element 元素/元件/配件Elemental semiconductor 元素半导体Ellipse 椭圆Ellipsoid 椭球Emitter 发射极Emitter-coupled logic 发射极耦合逻辑Emitter-coupled pair 发射极耦合对Emitter follower 射随器Empty band 空带Emitter crowding effect 发射极集边（拥挤）效应Endurance test =life test 寿命测试Energy state 能态Energy momentum diagram 能量-动量（E-K）图Enhancement mode 增强型模式Enhancement MOS 增强性MOS Entefic （低）共溶的Environmental test 环境测试Epitaxial 外延的Epitaxial layer 外延层Epitaxial slice 外延片Expitaxy 外延Equivalent curcuit 等效电路Equilibrium majority /minority carriers 平衡多数/少数载流子Erasable Programmable ROM （EPROM）可搽取（编程）存储器Error function complement （erfc）余误差函数Etch 刻蚀Etchant 刻蚀剂Etching mask 抗蚀剂掩模Excess carrier 过剩载流子Excitation energy 激发能Excited state 激发态Exciton 激子Extrapolation 外推法Extrinsic 非本征的Extrinsic semiconductor 杂质半导体Face - centered 面心立方Fall time 下降时间Fan-in 扇入Fan-out 扇出Fast recovery 快恢复Fast surface states 快界面态Feedback 反馈Fermi level 费米能级Fermi-Dirac Distribution 费米-狄拉克分布Femi potential 费米势Fick equation 菲克方程（扩散）Field effect transistor 场效应晶体管Field oxide 场氧化层Filled band 满带Film 薄膜Flash memory 闪烁存储器Flat band 平带Flat pack 扁平封装Flicker noise 闪烁（变）噪声Flip-flop toggle 触发器翻转Floating gate 浮栅Fluoride etch 氟化氢刻蚀Forbidden band 禁带Forward bias 正向偏置Forward blocking /conducting正向阻断/导通Frequency deviation noise频率漂移噪声Frequency response 频率响应Function 函数Gain 增益Gallium-Arsenide（GaAs）砷化钾Gamy ray r 射线Gate 门、栅、控制极Gate oxide 栅氧化层Gauss（ian）高斯Gaussian distribution profile 高斯掺杂分布Generation-recombination 产生-复合Geometries 几何尺寸Germanium（Ge）锗Graded 缓变的Graded （gradual）channel 缓变沟道Graded junction 缓变结Grain 晶粒Gradient 梯度Grown junction 生长结Guard ring 保护环Gummel-Poom model 葛谋-潘模型Gunn - effect 狄氏效应Hardened device 辐射加固器件Heat of formation 形成热Heat sink 散热器、热沉Heavy/light hole band 重/轻空穴带Heavy saturation 重掺杂Hell - effect 霍尔效应Heterojunction 异质结Heterojunction structure 异质结结构Heterojunction Bipolar Transistor（HBT）异质结双极型晶体High field property 高场特性High-performance MOS.（H-MOS）高性能MOS. Hormalized 归一化Horizontal epitaxial reactor 卧式外延反应器Hot carrior 热载流子Hybrid integration 混合集成Image - force 镜象力Impact ionization 碰撞电离Impedance 阻抗Imperfect structure 不完整结构Implantation dose 注入剂量Implanted ion 注入离子Impurity 杂质Impurity scattering 杂质散射Incremental resistance 电阻增量（微分电阻）In-contact mask 接触式掩模Indium tin oxide （ITO）铟锡氧化物Induced channel 感应沟道Infrared 红外的Injection 注入Input offset voltage 输入失调电压Insulator 绝缘体Insulated Gate FET（IGFET）绝缘栅FET Integrated injection logic集成注入逻辑Integration 集成、积分Interconnection 互连Interconnection time delay 互连延时Interdigitated structure 交互式结构Interface 界面Interference 干涉International system of unions国际单位制Internally scattering 谷间散射Interpolation 内插法Intrinsic 本征的Intrinsic semiconductor 本征半导体Inverse operation 反向工作Inversion 反型Inverter 倒相器Ion 离子Ion beam 离子束Ion etching 离子刻蚀Ion implantation 离子注入Ionization 电离Ionization energy 电离能Irradiation 辐照Isolation land 隔离岛Isotropic 各向同性Junction FET（JFET）结型场效应管Junction isolation 结隔离Junction spacing 结间距Junction side-wall 结侧壁Latch up 闭锁Lateral 横向的Lattice 晶格Layout 版图Lattice binding/cell/constant/defect/distortion 晶格结合力/晶胞/晶格/晶格常熟/晶格缺陷/晶格畸变Leakage current （泄）漏电流Level shifting 电平移动Life time 寿命linearity 线性度Linked bond 共价键Liquid Nitrogen 液氮Liquid－phase epitaxial growth technique 液相外延生长技术Lithography 光刻Light Emitting Diode（LED）发光二极管Load line or Variable 负载线Locating and Wiring 布局布线Longitudinal 纵向的Logic swing 逻辑摆幅Lorentz 洛沦兹Lumped model 集总模型Majority carrier 多数载流子Mask 掩膜板，光刻板Mask level 掩模序号Mask set 掩模组Mass - action law质量守恒定律Master-slave D flip-flop主从D触发器Matching 匹配Maxwell 麦克斯韦Mean free path 平均自由程Meandered emitter junction梳状发射极结Mean time before failure （MTBF）平均工作时间Megeto - resistance 磁阻Mesa 台面MESFET-Metal Semiconductor金属半导体FETMetallization 金属化Microelectronic technique 微电子技术Microelectronics 微电子学Millen indices 密勒指数Minority carrier 少数载流子Misfit 失配Mismatching 失配Mobile ions 可动离子Mobility 迁移率Module 模块Modulate 调制Molecular crystal分子晶体Monolithic IC 单片IC MOSFET金属氧化物半导体场效应晶体管Mos. Transistor（MOST ）MOS. 晶体管Multiplication 倍增Modulator 调制Multi-chip IC 多芯片ICMulti-chip module（MCM）多芯片模块Multiplication coefficient倍增因子Naked chip 未封装的芯片（裸片）Negative feedback 负反馈Negative resistance 负阻Nesting 套刻Negative-temperature-coefficient 负温度系数Noise margin 噪声容限Nonequilibrium 非平衡Nonrolatile 非挥发（易失）性Normally off/on 常闭/开Numerical analysis 数值分析Occupied band 满带Officienay 功率Offset 偏移、失调On standby 待命状态Ohmic contact 欧姆接触Open circuit 开路Operating point 工作点Operating bias 工作偏置Operational amplifier （OPAMP）运算放大器Optical photon =photon 光子Optical quenching光猝灭Optical transition 光跃迁Optical-coupled isolator光耦合隔离器Organic semiconductor有机半导体Orientation 晶向、定向Outline 外形Out-of-contact mask非接触式掩模Output characteristic 输出特性Output voltage swing 输出电压摆幅Overcompensation 过补偿Over-current protection 过流保护Over shoot 过冲Over-voltage protection 过压保护Overlap 交迭Overload 过载Oscillator 振荡器Oxide 氧化物Oxidation 氧化Oxide passivation 氧化层钝化Package 封装Pad 压焊点Parameter 参数Parasitic effect 寄生效应Parasitic oscillation 寄生振荡Passination 钝化Passive component 无源元件Passive device 无源器件Passive surface 钝化界面Parasitic transistor 寄生晶体管Peak-point voltage 峰点电压Peak voltage 峰值电压Permanent-storage circuit 永久存储电路Period 周期Periodic table 周期表Permeable - base 可渗透基区Phase-lock loop 锁相环Phase drift 相移Phonon spectra 声子谱Photo conduction 光电导Photo diode 光电二极管Photoelectric cell 光电池Photoelectric effect 光电效应Photoenic devices 光子器件Photolithographic process 光刻工艺（photo）resist （光敏）抗腐蚀剂Pin 管脚Pinch off 夹断Pinning of Fermi level 费米能级的钉扎（效应）Planar process 平面工艺Planar transistor 平面晶体管Plasma 等离子体Plezoelectric effect 压电效应Poisson equation 泊松方程Point contact 点接触Polarity 极性Polycrystal 多晶Polymer semiconductor聚合物半导体Poly-silicon 多晶硅Potential （电）势Potential barrier 势垒Potential well 势阱Power dissipation 功耗Power transistor 功率晶体管Preamplifier 前置放大器Primary flat 主平面Principal axes 主轴Print-circuit board（PCB）印制电路板Probability 几率Probe 探针Process 工艺Propagation delay 传输延时Pseudopotential method 膺势发Punch through 穿通Pulse triggering/modulating 脉冲触发/调制Pulse Widen Modulator（PWM）脉冲宽度调制punchthrough 穿通Push-pull stage 推挽级Quality factor 品质因子Quantization 量子化Quantum 量子Quantum efficiency量子效应Quantum mechanics 量子力学Quasi - Fermi－level准费米能级Quartz 石英Radiation conductivity 辐射电导率Radiation damage 辐射损伤Radiation flux density 辐射通量密度Radiation hardening 辐射加固Radiation protection 辐射保护Radiative - recombination辐照复合Radioactive 放射性Reach through 穿通Reactive sputtering source 反应溅射源Read diode 里德二极管Recombination 复合Recovery diode 恢复二极管Reciprocal lattice 倒核子Recovery time 恢复时间Rectifier 整流器（管）Rectifying contact 整流接触Reference 基准点基准参考点Refractive index 折射率Register 寄存器Registration 对准Regulate 控制调整Relaxation lifetime 驰豫时间Reliability 可*性Resonance 谐振Resistance 电阻Resistor 电阻器Resistivity 电阻率Regulator 稳压管（器）Relaxation 驰豫Resonant frequency共射频率Response time 响应时间Reverse 反向的Reverse bias 反向偏置Sampling circuit 取样电路Sapphire 蓝宝石（Al2O3）Satellite valley 卫星谷Saturated current range电流饱和区Saturation region 饱和区Saturation 饱和的Scaled down 按比例缩小Scattering 散射Schockley diode 肖克莱二极管Schottky 肖特基Schottky barrier 肖特基势垒Schottky contact 肖特基接触Schrodingen 薛定厄Scribing grid 划片格Secondary flat 次平面Seed crystal 籽晶Segregation 分凝Selectivity 选择性Self aligned 自对准的Self diffusion 自扩散Semiconductor 半导体Semiconductor-controlled rectifier 可控硅Sendsitivity 灵敏度Serial 串行/串联Series inductance 串联电感Settle time 建立时间Sheet resistance 薄层电阻Shield 屏蔽Short circuit 短路Shot noise 散粒噪声Shunt 分流Sidewall capacitance 边墙电容Signal 信号Silica glass 石英玻璃Silicon 硅Silicon carbide 碳化硅Silicon dioxide （SiO2）二氧化硅Silicon Nitride（Si3N4）氮化硅Silicon On Insulator 绝缘硅Siliver whiskers 银须Simple cubic 简立方Single crystal 单晶Sink 沉Skin effect 趋肤效应Snap time 急变时间Sneak path 潜行通路Sulethreshold 亚阈的Solar battery/cell 太阳能电池Solid circuit 固体电路Solid Solubility 固溶度Sonband 子带Source 源极Source follower 源随器Space charge 空间电荷Specific heat（PT）热Speed-power product 速度功耗乘积Spherical 球面的Spin 自旋Split 分裂Spontaneous emission 自发发射Spreading resistance扩展电阻Sputter 溅射Stacking fault 层错Static characteristic 静态特性Stimulated emission 受激发射Stimulated recombination 受激复合Storage time 存储时间Stress 应力Straggle 偏差Sublimation 升华Substrate 衬底Substitutional 替位式的Superlattice 超晶格Supply 电源Surface 表面Surge capacity 浪涌能力Subscript 下标Switching time 开关时间Switch 开关Tailing 扩展Terminal 终端Tensor 张量Tensorial 张量的Thermal activation 热激发Thermal conductivity 热导率Thermal equilibrium 热平衡Thermal Oxidation 热氧化Thermal resistance 热阻Thermal sink 热沉Thermal velocity 热运动Thermoelectricpovoer 温差电动势率Thick-film technique 厚膜技术Thin-film hybrid IC薄膜混合集成电路Thin-Film Transistor（TFT）薄膜晶体Threshlod 阈值Thyistor 晶闸管Transconductance 跨导Transfer characteristic 转移特性Transfer electron 转移电子Transfer function 传输函数Transient 瞬态的Transistor aging（stress）晶体管老化Transit time 渡越时间Transition 跃迁Transition-metal silica 过度金属硅化物Transition probability 跃迁几率Transition region 过渡区Transport 输运Transverse 横向的Trap 陷阱Trapping 俘获Trapped charge 陷阱电荷Triangle generator 三角波发生器Triboelectricity 摩擦电Trigger 触发Trim 调配调整Triple diffusion 三重扩散Truth table 真值表Tolerahce 容差Tunnel（ing）隧道（穿）Tunnel current 隧道电流Turn over 转折Turn - off time 关断时间Ultraviolet 紫外的Unijunction 单结的Unipolar 单极的Unit cell 原（元）胞Unity-gain frequency 单位增益频率Unilateral-switch单向开关Vacancy 空位Vacuum 真空Valence（value）band 价带Value band edge 价带顶Valence bond 价键Vapour phase 汽相Varactor 变容管Varistor 变阻器Vibration 振动Voltage 电压Wafer 晶片Wave equation 波动方程Wave guide 波导Wave number 波数Wave-particle duality 波粒二相性Wear-out 烧毁Wire routing 布线Work function 功函数Worst-case device 最坏情况器件Yield 成品率Zener breakdown 齐纳击穿。

聚合物稳定胆甾相滤色液晶光阀的显示研究胡金良;徐超;吴少君;陆红波【摘要】本文研究了在平面态和场致向列相之间快速切换的聚合物稳定胆甾相(PSCT)液晶光阀的彩色显示.采用紫外光诱导相分离法(PIPS)制备具有染料掺杂的聚合物稳定胆甾相液晶光阀,通过3种染料在可见光区的吸收作用,对入射白光进行选择性吸收过滤,得到不同颜色的出射光.结果表明:当PSCT处在平面态下,分子螺旋排列,染料对入射光波的吸收不受光波偏振方向的影响,器件具有很强的吸收作用,呈现有色态;当处于场致向列相,染料的吸收作用微小,器件呈透明态,因此器件具有一定的对比度,且不需要偏振片;器件在平面态和场致向列相之间快速切换的响应时间短于7 ms. PSCT光阀可以用作滤色器,在多种染料的共同作用下,快速选择滤色得到多种彩色可见光,组成彩色显示平面.【期刊名称】《液晶与显示》【年(卷),期】2016(031)004【总页数】6页(P347-352)【关键词】聚合物稳定胆甾相液晶;滤色;快速响应【作者】胡金良;徐超;吴少君;陆红波【作者单位】特种显示技术教育部重点实验室特种显示技术国家工程实验室,现代特种显示技术省部共建重点实验室培育基地,安徽合肥230009;合肥工业大学化学与化工学院,安徽合肥230009;特种显示技术教育部重点实验室特种显示技术国家工程实验室,现代特种显示技术省部共建重点实验室培育基地,安徽合肥230009;特种显示技术教育部重点实验室特种显示技术国家工程实验室,现代特种显示技术省部共建重点实验室培育基地,安徽合肥230009;合肥工业大学化学与化工学院,安徽合肥230009;特种显示技术教育部重点实验室特种显示技术国家工程实验室,现代特种显示技术省部共建重点实验室培育基地,安徽合肥230009【正文语种】中文【中图分类】O753+.2宾主型液晶是少量二色性染料和向列相液晶的混合物，棒状染料分子会沿液晶指向矢取向排列，在电场的作用下，染料分子的取向会发生变化，从而颜色的改变，达到显示效果。

石墨炔的化学修饰及功能化李勇军;李玉良【摘要】石墨炔特殊的电子结构和孔洞结构使其在信息技术、电子、能源、催化以及光电等领域具有潜在、重要的应用前景.近几年石墨炔的基础和应用研究己取得了重要成果,并迅速成为了碳材料研究中的新领域.石墨炔中炔键单元的高活性为其化学修饰与掺杂提供了良好的平台.在这篇综述中,我们将重点介绍石墨炔的非金属杂原子掺杂、金属原子修饰以及表面改性,并深入探讨掺杂与衍生化对石墨炔材料的电子性质的影响及其对光电化学催化性能的协同增强.【期刊名称】《物理化学学报》【年(卷),期】2018(034)009【总页数】22页(P992-1013)【关键词】石墨炔;掺杂;非金属杂原子;金属原子;化学修饰【作者】李勇军;李玉良【作者单位】北京分子科学国家实验室,中国科学院分子科学科教融合卓越中心,中国科学院化学研究所有机固体院重点实验室,北京100190;中国科学院大学,北京100049;北京分子科学国家实验室,中国科学院分子科学科教融合卓越中心,中国科学院化学研究所有机固体院重点实验室,北京100190;中国科学院大学,北京100049【正文语种】中文【中图分类】O6491 引言石墨炔(graphdiyne，GDY，2010年第一次被李玉良等用汉语命名为石墨炔)，由sp和sp2杂化形成的一种新型碳的同素异形体，它是由 1,3-二炔键将苯环共轭连接形成二维平面网络结构，具有丰富的碳化学键，大的共轭体系、宽面间距、多孔、优良的化学和热稳定性和半导体性能、力学、催化和磁学等性能，是继富勒烯、碳纳米管、石墨烯之后，一种新的全碳二维平面结构材料1–5。

自2010年我们首次通过化学合成获得以来6，石墨炔吸引了来自化学、物理、材料、电子、微电子和半导体领域的科学家对其诱人的半导体、光学、储能、催化和机械性能进行了探索。

石墨炔特殊的电子结构和孔洞结构使其在信息技术、电子、能源、催化以及光电等领域具有潜在、重要的应用前景，近几年石墨炔的基础和应用研究已取得了重要成果，并迅速成为了碳材料研究中的新领域 7–14。

２０２０年１２月第３９卷第４期内蒙古科技大学学报ＪｏｕｒｎａｌｏｆＩｎｎｅｒＭｏｎｇｏｌｉａＵｎｉｖｅｒｓｉｔｙｏｆＳｃｉｅｎｃｅａｎｄＴｅｃｈｎｏｌｏｇｙＤｅｃｅｍｂｅｒ，２０２０Ｖｏｌ．３９，Ｎｏ．４中低温稀土氧化物固体电解质的研究进展刘媛媛１，２，３，安胜利１，３ ，李舒婷１，蔡长 １（１ 内蒙古科技大学材料与冶金学院，内蒙古包头　０１４０１０；２ 内蒙古科技大学化学与化工学院，内蒙古包头　０１４０１０；３ 内蒙古科技大学内蒙古先进陶瓷与器件重点实验室，内蒙古包头　０１４０１０）摘　要：中低温固体电解质是中低温固体氧化物燃料电池的关键组件，介绍了常用的中低温固体电解质的种类，较为全面地介绍了掺杂氧化铈固体电解质，对该电解质的优缺点和改进方式进行了较为全面的综述关键词：中低温固体氧化物燃料电池；中低温固体电解质；掺杂氧化铈固体电解质中图分类号：ＴＱ１７４．７５ 文献标识码：Ａ文章编号：２０９５－２２９５（２０２０）０４－０３８８－０５ ＤＯＩ：１０．１６５５９／ｊ．ｃｎｋｉ．２０９５－２２９５．２０２０．０４．０１６ 高效洁净能源逐渐成为未来能源的开发和利用方向 燃料电池是一种新型洁净的能量转换装置，可以直接利用生物质气将化学能转化为电能 因其具有燃料适应性强、环境友好、能量转换效率高等优点，受到了人们广泛关注氧化钇稳定的氧化锆（ＹＳＺ）是目前高温ＳＯＦＣ制备中使用最为寻常的电解质材料之一［１－４］ 然而，ＹＳＺ的电导率偏低，以该电解质组装的电池工作温度基本在９００～１１００℃高温 高温运行会要求ＳＯＦＣ各部件材料在高温下具有良好的性能，但这无疑增加了电池的工作成本，并且对电池内关键材料的化学稳定性、热稳定性、高温强度、热膨胀匹配等都有更高的要求 基于以上考虑，低温ＳＯＦＣ具有更高能量利用率，当使用不锈钢作为电池堆的封接材料时，ＳＯＦＣ的组装就具备了密封更容易、开启时间更短、开启耗能更低、电极团聚更少、热膨胀不匹配产生热应力更少等诸多优点ＳＯＦＣ工作温度的降低会直接导致电解质材料电导率的降低，而这势必引起Ｒｏｈｍ增加 保证ＳＯＦＣ在低温下高性能运行，首先是要保证ＳＯＦＣ内部欧姆电阻的降低，实现的途径通常有２个：第一种途径是适当减薄电解质的厚度 如采用电化学气相淀积（ＥＶＤ）成功制备了阴极支撑薄膜ＹＳＺ电池（１９９０年）［４］ 但高成本的ＥＶＤ方法限制了应用；成本较低的方法，诸如压片、流延、丝网印刷、悬涂、喷雾法被广泛应用于ＳＯＦＣ工业领域 当电解质厚度减少至１μｍ级别时就可以实现低温区域内ＳＯＦＣ的顺利运行［５－７］降低ＳＯＦＣ内部欧姆电阻的第二种途径是不断开发具有高离子电导率的电解质体系 针对第二种途径，ＳＯＦＣ关键基础材料主要目的是为了改善电解质的电导率，主要包括萤石和钙钛矿结构材料２类［８－１１］ 萤石结构材料主要有掺杂ＺｒＯ２基、掺杂Ｂｉ２Ｏ３基及掺杂ＣｅＯ２基电解质材料１　掺杂氧化锆体系电解质材料１９世纪９０年代，德国化学家能斯特（ＷＡＬＴＨＥＲＨＥＲＭＡＮＮＮＥＲＮＳＴ）首先发现了高氧离子电导率的ＹＳＺ电解质［１２］，其中８ｍｏｌ％Ｙ２Ｏ３ＺｒＯ２氧离子电导率高达０ １Ｓ·ｃｍ－１（１０００℃）［１３］，故ＹＳＺ一直作为高温ＳＯＦＣ的电解质材料 Ｓｃ２Ｏ３掺杂ＺｒＯ２（ＳｃＳＺ），在掺杂ＺｒＯ２基电解质中具有最高的电导率，当温度为７５０℃时，ＳｃＳＺ的电导率可达０ １Ｓ·ｃｍ－１，然而，ＳｃＳＺ电解质也存在一个显著的问题：温度变化会导致ＳｃＳＺ发生相的转变，实验证实由于相转变，ＳｃＳＺ在高温条件下电基金项目：国家自然科学基金资助项目（５１４７４１３３）；内蒙古自治区自然科学基金资助项目（２０１７ＭＳ０２２１） 作者简介：刘媛媛（１９８１－），女，内蒙古科技大学副教授、博士研究生，研究方向为固体氧化物燃料电解质 通信作者：ｅ ｍａｉｌ：ｓａｎ＠ｉｍｕｓｔ．ｅｄｕ．ｃｎ收稿日期：２０２０－０６－１９刘媛媛，等：中低温稀土氧化物固体电解质的研究进展导率会出现下降的趋势［１４］２　稳定Ｂｉ２Ｏ３体系电解质材料高温δ Ｂｉ２Ｏ３内含２５％氧空位晶格位点，是立方萤石相结构，因而δ Ｂｉ２Ｏ３具有极高的离子电导率 在已发现的Ｏ２－导体电解质中，δ Ｂｉ２Ｏ３稳定的相结构决定了它最高的Ｏ２－电导率［１５－１８］除最高电导率这一优势外，在３００～３５０℃温度区间，δ Ｂｉ２Ｏ３还具有良好的Ｏ２ Ｏ２－电催化活性 然而，δ Ｂｉ２Ｏ３在７３０～８０４℃保持立方相结构稳定，当温度低于７３０℃，δ Ｂｉ２Ｏ３立方相会转变为具有较差离子传导能力的α相单斜结构，电导率也会随之急剧下降［１９］ 采用Ｅｒ３＋，Ｌａ３＋，Ｙ３＋等价稀土金属元素掺杂时，很好地保持δ Ｂｉ２Ｏ３相结构，并且在室温下仍能保持稳定 这进一步说明，低温下δ Ｂｉ２Ｏ３仍具高电导率，从而成为极具潜力的低温ＳＯＦＣ电解质材料之一［２０－２２］与ＹＳＺ电解质相比ＥＳＢ电解质的欧姆损失可以降低１～２个数量级［２３］３　掺杂ＣｅＯ２体系电解质材料ＣｅＯ２为萤石型立方结构，晶格常数为５４ ０ｎｍ，比重７ ３ｇ·ｃｍ－３，熔点２７５０℃，ＣｅＯ２烧结体在０～８００℃的热膨胀系数为８ ６×１０－６℃－１ 氧化铈立方萤石相晶体结构如图１所示，４ａ（０，０，０）和８ｃ（１／４，１／４，１／４）Ｗｙｃｋｏｆｆ位点分别表示的是＋４价Ｃｅ和－２价Ｏ的位置，没有被元素占据的八面体位点可提供Ｏ２－快速扩散路径，并通过空位扩散机制实现Ｏ２－传导［２４］纯氧化铈并无足够氧空位来保持氧离子传导能力如图１（ａ）所示，因此使用低价离子取代Ｃｅ４＋来保证充足的氧空位含量如图１（ｂ）所示 Ｏ通过空位跳跃机制从四面体中心位置跳跃至相邻的氧空位位点来传导Ｏ２－如图１（ｃ）所示图１　氧化铈立方莹石相晶体结构图（ａ）ＣｅＯ２本征结构；（ｂ）ＣｅＯ２因掺杂产生氧空位示意图；（ｃ）ＣｅＯ２传导Ｏ２－跳跃机制示意图Ｏ２－与主位离子间键能、掺杂剂浓度及类型、温度及移动离子的迁移能影响Ｏ２－电导率［２５－２７］ＣｅＯ２基电解质中大部分三价掺杂离子在掺杂浓度１０～２０ｍｏｌ％时，会得到最大氧离子电导值 当掺杂离子半径近似等于主离子半径（Ｃｅ４＋）时，即可得到最高Ｏ２－电导率［２５－２８］ 掺杂ＣｅＯ２电导率温度在低于７００℃时比ＹＳＺ电解质材料高１～２个数量级，主要原因是在较为开放的空间结构中大离子半径会使Ｏ２－更容易迁移，而Ｃｅ４＋离子半径为０ ８７×１０－１０ｍ，Ｚｒ４＋离子半径为０ ８２×１０－１０ｍ，两者相比Ｃｅ４＋更占优势 Ｇｄ３＋与Ｃｅ４＋离子半径近似相等，因此导致Ｇｄ掺杂ＣｅＯ２材料在各种掺杂浓度下，在５００～７００℃温度范围内均具有高的离子电导率［２８－３０］，ＧＤＣ作为低温区域ＳＯＦＣ电解质材料一直是掺杂ＣｅＯ２电解质的研究热点ＷＡＣＨＳＭＡＮ课题组在ＡＮＤＥＲＳＳＯＮ等人［３１］前期理论的基础上，制备出了掺杂ＣｅＯ２基电解质材料，其电导率比５５０℃１０ＧＤＣ的电导率提高３０％［３２－３５］同时，在低温区域、阳极支撑单电池上，ＳＮＤＣ电解质材料显示出了高电性能输出结果［３６］，说明ＳＮＤＣ是优良的低温ＳＯＦＣ电解质材料当氧分压小于１０～１４ａｔｍ时，氧化铈基电解质材料的Ｃｅ４＋会被还原成Ｃｅ３＋，产生电子漏电 由于电子漏电主要发生在ＳＯＦＣ阳极侧，其还原过程将造成点阵体积膨胀进而削弱电解质力学性能，同时电子泄露会使ＳＯＦＣ电化学性能减弱 这样的结果会降低掺杂ＣｅＯ２基材料的离子迁移数，减小ＳＯＦＣ电池的开路电压（ＯＣＶ），这样会使掺杂ＣｅＯ２基材料作为ＳＯＦＣ电解质的效率降低［３７］为了提高电子泄露现象对氧化铈基电解质材料的效率，常增加一层电解质在阳极侧（或阴极侧），这样可以有效地阻隔ＣｅＯ２内部的电子电导，进而提升电池的ＯＣＶ及离子迁移数，如在阴极侧，Ｓｍ０ ２Ｃｅ０ ８Ｏ２－δ（ＳＤＣ）电解质层中间增加一层ＹＳＺ，起到电子阻隔的作用，发现电子电导阻隔效果明显，可获得高工作电压输出，或在ＳＤＣ与阳极层中间加入ＢａＺｒ０ １Ｃｅ０ ７Ｙ０ ２Ｏ３－δ，ＹＳＺ，其主要目的是避免ＳＤＣ裸露于还原气氛中［３８］，避免还原Ｃｅ４＋产生电子导电，制备的ＹＳＺ（２μｍ）／ＳＤＣ（６μｍ）双层电解质薄膜在７００℃时ＯＣＶ可达０ ９８Ｖ，输出功率为１ ０８Ｗ·ｃｍ－２ 除上述介绍，还可以将Ｂａ加入至阳极中，这样阳极侧、ＳＤＣ电解质层中间就形成了ＳＤＣ＠Ｂａ（Ｃｅ，Ｚｒ）１－ｘ（Ｓｍ，Ｙ）Ｏ３－δ电子阻隔层［３９］，电子阻隔层既保证离子传导，又可阻隔ＳＤＣ与还原气接９８３内蒙古科技大学学报２０２０年１２月　第３９卷第４期触，６５０℃ＯＣＶ可达１ ０３７Ｖ，输出功率为基材６３８ｍＷ·ｃｍ－２［４０］ 当温度高于６００℃，ＣｅＯ２料的电子泄露现象会削弱ＳＯＦＣ的电池性能，故不能忽略电子泄露现象带来的影响［４１］参考文献：［１］　ＬＡＷＲＥＮＣＥＳＪ，ＳＰＡＣＩＬＨＳ，ＳＣＨＲＯＥＤＥＲＤＬ．Ｔｈｅｓｏｌｉｄｅｌｅｃｔｒｏｌｙｔｅｏｘｙｇｅｎｓｅｎｓｏｒｔｈｅｏｒｙａｎｄａｐｐｌｉｃａｔｉｏｎｓ［Ｊ］．Ａｕｔｏｍａｔｉｃａ，１９６９，５（５）：６３３．［２］　ＫＷＯＮＣＷ，ＳＯＮＪＷ，ＬＥＥＪＨ，ｅｔａｌ．Ｈｉｇｈ ｐｅｒｆｏｒｍａｎｃｅｍｉｃｒｏ ｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｓｆａｂｒｉｃａｔｅｄｏｎｎａｎｏｐｏｒｏｕｓａｎｏｄｉｃａｌｕｍｉｎｕｍｏｘｉｄｅｔｅｍｐｌａｔｅｓ［Ｊ］．ＡｄｖａｎｃｅｄＦｕｎｃｔｉｏｎａｌＭａｔｅｒｉａｌｓ，２０１１，２１（６）：１１５４．［３］　ＥＶＡＮＳＡ，ＢＩＥＢＥＲＬＥＨＡ，ＲＵＰＰＪＬＭ，ｅｔａｌ．Ｒｅｖｉｅｗｏｎｍｉｃｒｏｆａｂｒｉｃａｔｅｄｍｉｃｒｏ ｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｍｅｍｂｒａｎｅｓ［Ｊ］．ＪｏｕｒｎａｌｏｆＰｏｗｅｒＳｏｕｒｃｅｓ，２００９，１９４（１）：１１９．［４］　ＳＵＰＣ，ＣＨＡＯＣＣ，ＳＨＩＭＪＨ，ｅｔａｌ．Ｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｗｉｔｈｃｏｒｒｕｇａｔｅｄｔｈｉｎｆｉｌｍｅｌｅｃｔｒｏｌｙｔｅ［Ｊ］．ＮａｎｏＬｅｔｔｅｒｓ，２００８，８（８）：２２８９．［５］　ＭＡＨＡＴＯＮ，ＢＡＮＥＲＪＥＥＡ，ＧＵＰＴＡＡ，ｅｔａｌ．Ｐｒｏｇｒｅｓｓｉｎｍａｔｅｒｉａｌｓｅｌｅｃｔｉｏｎｆｏｒｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｔｅｃｈｎｏｌｏｇｙ：Ａｒｅｖｉｅｗ［Ｊ］．ＰｒｏｇｒｅｓｓｉｎＭａｔｅｒｉａｌｓＳｃｉｅｎｃｅ，２０１５，４６（５１）：１４１．［６］　ＬＥＥＫＴ，ＹＯＯＮＨＳ，ＷＡＣＨＳＭＡＮＥＤ．Ｔｈｅｅｖｏｌｕｔｉｏｎｏｆｌｏｗｔｅｍｐｅｒａｔｕｒｅｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｓ［Ｊ］．ＪｏｕｒｎａｌｏｆＭａｔｅｒｉａｌｓＲｅｓｅａｒｃｈ，２０１２，２７（１６）：２０６３．［７］　ＷＩＮＣＥＷＩＣＺＫＣ，ＣＯＯＰＥＲＪＳ．ＴａｘｏｎｏｍｉｅｓｏｆＳＯＦＣｍａｔｅｒｉａｌａｎｄｍａｎｕｆａｃｔｕｒｉｎｇａｌｔｅｒｎａｔｉｖｅｓ［Ｊ］．ＪｏｕｒｎａｌｏｆＰｏｗｅｒｓｏｕｒｃｅｓ，２００５，１４０（２）：２８０．［８］　ＷＡＣＨＳＭＡＮＥ，ＩＳＨＩＨＡＲＡＴ，ＫＩＬＮＥＲＪ．Ｌｏｗ ｔｅｍｐｅｒａｔｕｒｅｓｏｌｉｄ－ｏｘｉｄｅｆｕｅｌｃｅｌｌｓ［Ｊ］．ＭｒｓＢｕｌｌｅｔｉｎ，２０１４，３９（９）：７７３．［９］　ＥＴＳＥＬＬＴＨ，ＦＬＥＮＧＡＳＳＮ．Ｅｌｅｃｔｒｉｃａｌｐｒｏｐｅｒｔｉｅｓｏｆｓｏｌｉｄｏｘｉｄｅｅｌｅｃｔｒｏｌｙｔｅｓ［Ｊ］．ＣｈｅｍｉｃａｌＲｅｖｉｅｗｓ，１９７０，７０（３）：３３９．［１０］　ＯＭＡＲＳ，ＮＡＪＩＢＷＢ，ＢＯＮＡＮＯＳＮ．Ｃｏｎｄｕｃｔｉｖｉｔｙａｇｅｉｎｇｓｔｕｄｉｅｓｏｎ１Ｍ１０ＳｃＳＺ（Ｍ４＋＝Ｃｅ，Ｈｆ）［Ｊ］．ＳｏｌｉｄＳｔａｔｅＩｏｎｉｃｓ，２０１１，１８９（１）：１００．［１１］　林祖刘媛媛，等：中低温稀土氧化物固体电解质的研究进展ｖｉｅｗ［Ｊ］．ＭａｔｅｒｉａｌｓａｔＨｉｇｈＴｅｍｐｅｒａｔｕｒｅｓ，２００３，２０（２）：１１５．［２６］　ＥＴＳＥＬＬＴＨ，ＦＬＥＮＧＡＳＳＮ．Ｅｌｅｃｔｒｉｃａｌｐｒｏｐｅｒｔｉｅｓｏｆｓｏｌｉｄｏｘｉｄｅｅｌｅｃｔｒｏｌｙｔｅｓ［Ｊ］．ＣｈｅｍｉｃａｌＲｅｖｉｅｗｓ，１９７０，７０：３３９．［２７］　ＢＲＥＴＴＤＪ，ＡＴＫＩＮＳＯＮＡ，ＢＲＡＮＤＯＮＮＰ，ｅｔａｌ．Ｉｎ ｔｅｒｍｅｄｉａｔｅｔｅｍｐｅｒａｔｕｒｅｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｓ［Ｊ］．ＣｈｅｍｉｃａｌＳｏｃｉｅｔｙＲｅｖｉｅｗｓ，２００８，３７：１５６８．［２８］　ＬＥＥＫＴ，ＹＯＯＮＨＳ，ＷＡＣＨＳＭＡＮＥＤ．Ｔｈｅｅｖｏｌｕ ｔｉｏｎｏｆｌｏｗｔｅｍｐｅｒａｔｕｒｅｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｓ［Ｊ］．ＪｏｕｒｎａｌｏｆＭａｔｅｒｉａｌｓＲｅｓｅａｒｃｈ，２０１２，２７：２０６３．［２９］　ＭＯＧＥＮＳＥＮＭ，ＳＡＭＭＥＳＮＭ，ＴＯＭＰＳＥＴＴＧＡ．Ｐｈｙｓｉｃａｌ，ｃｈｅｍｉｃａｌａｎｄｅｌｅｃｔｒｏｃｈｅｍｉｃａｌｐｒｏｐｅｒｔｉｅｓｏｆｐｕｒｅａｎｄｄｏｐｅｄｃｅｒｉａ［Ｊ］．ＳｏｌｉｄＳｔａｔｅＩｏｎｉｃｓ，２０００，１２９（１ ４）：６３．［３０］　ＭＡＨＡＴＯＮ，ＧＵＰＴＡＡ，ＢＡＬＡＮＩＫ．Ｄｏｐｅｄｚｉｒｃｏｎｉａａｎｄｃｅｒｉａ ｂａｓｅｄｅｌｅｃｔｒｏｌｙｔｅｓｆｏｒｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｓ：ａｒｅｖｉｅｗ［Ｊ］．ＮａｎｏｍａｔｅｒｉａｌｓａｎｄＥｎｅｒｇｙ，２０１２，１（１）：２７．［３１］　ＳＡＫＡＩＮ，ＹＵＥＰＸ，ＹＡＭＡＪＩＫ，ｅｔａｌ．Ａｎｏｍａｌｏｕｓｃｏｎｄｕｃｔｉｖｉｔｙａｎｄｍｉｃｒｏｓｔｒｕｃｔｕｒｅｉｎｇａｄｏｌｉｎｉｕｍｄｏｐｅｄｃｅｒｉａｐｒｅｐａｒｅｄｆｒｏｍｎａｎｏ ｓｉｚｅｄｐｏｗｄｅｒ［Ｊ］．ＳｏｌｉｄＳｔａｔｅＩｏｎｉｃｓ，２００６，１７７（２６ ３２）：２５０３．［３２］　ＡＮＤＥＲＳＳＯＮＤＡ，ＳＩＭＡＫＳＩ，ＳＫＯＲＯＤＵＭＯＶＡＮＶ，ｅｔａｌ．Ｏｐｔｉｍｉｚａｔｉｏｎｏｆｉｏｎｉｃｃｏｎｄｕｃｔｉｖｉｔｙｉｎｄｏｐｅｄｃｅｒｉａ［Ｊ］．ＰｒｏｃｅｅｄｉｎｇｓｏｆｔｈｅＮａｔｉｏｎａｌＡｃａｄｅｍｙｏｆＳｃｉｅｎｃｅｓ，２００６，１０３（１０）：３５１８．［３３］　ＯＭＡＲＳ，ＷＡＣＨＳＭＡＮＥＤ，ＮＩＮＯＪＣ．Ｈｉｇｈｅｒｃｏｎ ｄｕｃｔｉｖｉｔｙＳｍ３＋ａｎｄＮｄ３＋ｃｏ ｄｏｐｅｄｃｅｒｉａ ｂａｓｅｄｅｌｅｃｔｒｏｌｙｔｅｍａｔｅｒｉａｌｓ．［Ｊ］．ＳｏｌｉｄＳｔａｔｅＩｏｎｉｃｓ，２００８，１７８（３７３８）：１８９０．［３４］　ＯＭＡＲＳ，ＷＡＣＨＳＭＡＮＥＤ，ＮＩＮＯＪＣ．Ｈｉｇｈｅｒｉｏｎｉｃｃｏｎｄｕｃｔｉｖｅｃｅｒｉａ ｂａｓｅｄｅｌｅｃｔｒｏｌｙｔｅｓｆｏｒｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｓ［Ｊ］．ＡｐｐｌｉｅｄＰｈｙｓｉｃｓＬｅｔｔｅｒｓ，２００７，９１（１４）：１４４１０６．［３５］　ＯＭＡＲＳ，ＷＡＣＨＳＭＡＮＥＤ，ＮＩＮＯＪＣ．Ａｃｏ ｄｏｐｉｎｇａｐｐｒｏａｃｈｔｏｗａｒｄｓｅｎｈａｎｃｅｄｉｏｎｉｃｃｏｎｄｕｃｔｉｖｉｔｙｉｎｆｌｕｏｒｉｔｅｂａｓｅｄｅｌｅｃｔｒｏｌｙｔｅｓ［Ｊ］．ＳｏｌｉｄＳｔａｔｅＩｏｎｉｃｓ，２００６，１７７（３５ ３６）：３１９９．［３６］　ＡＨＮＪＳ，ＯＭＡＲＳ，ＹＯＯＮＨ，ｅｔａｌ．Ｐｅｒｆｏｒｍａｎｃｅｏｆａｎｏｄｅ ｓｕｐｐｏｒｔｅｄｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｕｓｉｎｇｎｏｖｅｌｃｅｒｉａｅｌｅｃｔｒｏｌｙｔｅ［Ｊ］．ＪｏｕｒｎａｌｏｆＰｏｗｅｒＳｏｕｒｃｅｓ，２０１０，１９５（８）：２１３１．［３７］　ＷＡＮＧＳ，ＩＮＡＢＡＨ，ＴＡＧＡＷＡＨ，ｅｔａｌ．Ｎｏｎｓｔｏｉｃｈｉ ｏｍｅｔｒｙｏｆＣｅ０．９Ｇｄ０．１Ｏ１．９５－ｘ［Ｊ］．ＳｏｌｉｄＳｔａｔｅＩｏｎｉｃｓ，１９９８，１０７（１ ２）：７３．［３８］　ＳＵＮＷ，ＳＨＩＺ，ＷＡＮＧＺ，ｅｔａｌ．ＢｉｌａｙｅｒｅｄＢａＺｒ０．１Ｃｅ０．７Ｙ０．２Ｏ３－δ／Ｃｅ０．８Ｓｍ０．２Ｏ２－δｅｌｅｃｔｒｏｌｙｔｅｍｅｍｂｒａｎｅｓｆｏｒｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｓｗｉｔｈｈｉｇｈｏｐｅｎｃｉｒｃｕｉｔｖｏｌｔａｇｅｓ［Ｊ］．ＪｏｕｒｎａｌｏｆＭｅｍｂｒａｎｅＳｃｉｅｎｃｅ，２０１５，４７６：３９４．［３９］　ＳＵＮＷ，ＬＩＵＷ．Ａｎｏｖｅｌｃｅｒｉａ ｂａｓｅｄｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｆｒｅｅｆｒｏｍｉｎｔｅｒｎａｌｓｈｏｒｔｃｉｒｃｕｉｔ［Ｊ］．ＪｏｕｒｎａｌｏｆＰｏｗｅｒＳｏｕｒｃｅｓ，２０１２，２１７：１１４．［４０］　ＧＯＮＧＺ，ＳＵＮＷ，ＣＡＯＪ，ｅｔａｌ．Ｃｅ０．８Ｓｍ０．２Ｏ１．９ｄｅｃｏｒａｔｅｄｗｉｔｈｅｌｅｃｔｒｏｎ ｂｌｏｃｋｉｎｇａｃｃｅｐｔｏｒ ｄｏｐｅｄＢａＣｅＯ３ａｓｅｌｅｃｔｒｏｌｙｔｅｆｏｒｌｏｗ ｔｅｍｐｅｒａｔｕｒｅｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌｓ［Ｊ］．ＥｌｅｃｔｒｏｃｈｉｍｉｃａＡｃｔａ，２０１７，２２８：２２６．［４１］　ＣＡＯＪ，ＧＯＮＧＺ，ＨＯＵＪ，ｅｔａｌ．Ｎｏｖｅｌｒｅｄｕｃｔｉｏｎ ｒｅｓｉｓｔａｎｔＢａ（Ｃｅ，Ｚｒ）１－ｘＧｄｘＯ３－δｅｌｅｃｔｒｏｎ ｂｌｏｃｋｉｎｇｌａｙｅｒｆｏｒＧｄ０．１Ｃｅ０．９Ｏ２－δｅｌｅｃｔｒｏｌｙｔｅｉｎＩＴ ＳＯＦＣｓ［Ｊ］．Ｃｅｒａｍ ｉｃｓＩｎｔｅｒｎａｔｉｏｎａｌ，２０１５，４１（５）：６８２４．（责任编辑：李波）ＲｅｓｅａｒｃｈｐｒｏｇｒｅｓｓｏｆｍｅｄｉｕｍａｎｄｌｏｗｔｅｍｐｅｒａｔｕｒｅｒａｒｅｅａｒｔｈｏｘｉｄｅｓｏｌｉｄｅｌｅｃｔｒｏｌｙｔｅＬＩＵＹｕａｎｙｕａｎ１，２，３，ＡＮＳｈｅｎｇｌｉ１，３ ，ＬＩＳｈｕｔｉｎｇ１，３，ＣＡＩＣｈａｎｇｋｕｎ１，３（１．ＭａｔｅｒｉａｌｓａｎｄＭｅｔａｌｌｕｒｇｙＳｃｈｏｏｌ，ＩｎｎｅｒＭｏｎｇｏｌｉａＵｎｉｖｅｒｓｉｔｙｏｆＳｃｉｅｎｃｅａｎｄＴｅｃｈｎｏｌｏｇｙ，Ｂａｏｔｏｕ０１４０１０，Ｃｈｉｎａ；２．ＣｈｅｍｉｓｔｒｙａｎｄＣｈｅｍｉｃａｌＥｎｇｉｎｅｅｒｉｎｇＳｃｈｏｏｌ，ＩｎｎｅｒＭｏｎｇｏｌｉａＵｎｉｖｅｒｓｉｔｙｏｆＳｃｉｅｎｃｅａｎｄＴｅｃｈｎｏｌｏｇｙ，Ｂａｏｔｏｕ０１４０１０，Ｃｈｉｎａ；３．ＩｎｎｅｒＭｏｎｇｏｌｉａＫｅｙＬａｂｏｒａｔｏｒｙｏｆＡｄｖａｎｃｅｄＣｅｒａｍｉｃｓａｎｄＤｅｖｉｃｅ，ＩｎｎｅｒＭｏｎｇｏｌｉａＵｎｉｖｅｒｓｉｔｙｏｆＳｃｉｅｎｃｅａｎｄＴｅｃｈｎｏｌｏｇｙ，Ｂａｏｔｏｕ０１４０１０，Ｃｈｉｎａ）Ａｂｓｔｒａｃｔ：Ｔｈｅｍｅｄｉｕｍａｎｄｌｏｗｔｅｍｐｅｒａｔｕｒｅｓｏｌｉｄｅｌｅｃｔｒｏｌｙｔｅｉｓｔｈｅｋｅｙｃｏｍｐｏｎｅｎｔｏｆｔｈｅｍｅｄｉｕｍａｎｄｌｏｗｔｅｍｐｅｒａｔｕｒｅｓｏｌｉｄｏｘｉｄｅｆｕｅｌｃｅｌｌ．Ｔｈｅｔｙｐｅｓｏｆｔｈｅｃｏｍｍｏｎｍｅｄｉｕｍａｎｄｌｏｗｔｅｍｐｅｒａｔｕｒｅｓｏｌｉｄｅｌｅｃｔｒｏｌｙｔｅｗｅｒｅｉｎｔｒｏｄｕｃｅｄ．Ａｎｄｔｈｅｄｏｐｅｄｃｅｒｉｕｍｏｘｉｄｅｓｏｌｉｄｅｌｅｃ ｔｒｏｌｙｔｅｗａｓｉｎｔｒｏｄｕｃｅｄｍｏｒｅｃｏｍｐｒｅｈｅｎｓｉｖｅｌｙ，ｇｉｖｉｎｇａｃｏｍｐｒｅｈｅｎｓｉｖｅｒｅｖｉｅｗｏｆｔｈｅａｄｖａｎｔａｇｅｓａｎｄｄｉｓａｄｖａｎｔａｇｅｓｏｆｔｈｅｅｌｅｃｔｒｏｌｙｔｅａｎｄｉｔｓｉｍｐｒｏｖｅｍｅｎｔｍｅｔｈｏｄｓ．Ｋｅｙｗｏｒｄｓ：ＩＴ ＳＯＦＣ；ＩＴ ｓｏｌｉｄｅｌｅｃｔｒｏｌｙｔｅ；ｄｏｐｅｄＣｅＯ２ｓｏｌｉｄｅｌｅｃｔｒｏｌｙｔｅ１９３。

Implant Process Modifications for Suppressing WPE抑制WPE之佈植製程改良Executive SummaryThe threshold voltages of CMOS transistors can vary significantly depending on their proximity to an implant well boundary. This well proximity effect (WPE) is caused by the well implant atoms that scatter laterally from the photoresist mask. From first principles of this scattering effect and detailed modeling, modifications to the mask were found that effectively suppress this induced variation in 90nm-node transistors. Consequently, circuit design can occur without having to create complex device models to account for WPE.互補金屬氧化半導體（CMOS）電晶體之threshold voltages (VT)可隨著佈植井（implant well）邊界的鄰近程度而有顯著的變化。

這種井鄰近效應（well proximity effect，WPE）的產生是由於井佈植的原子從光阻光罩（photoresist mask）向側邊散射的緣故。

從這些散射效應的主要法則與精細的模型化結果，我們發現針對光罩的各項改良能有效抑制這種效應，包括90奈米節點電晶體中的變化。

Concentration is a vital skill that can significantly enhance ones ability to learn, work,and achieve goals.In this essay,we will explore the importance of focus,the challenges that may hinder it,and strategies to improve concentration.Importance of Concentration1.Enhanced Learning:When students are focused,they can absorb information more effectively,leading to better understanding and retention of knowledge.2.Improved Productivity:In the workplace,concentration allows individuals to complete tasks more efficiently,reducing the time spent on each project and increasing overall output.3.Goal Achievement:Whether its a personal or professional goal,the ability to concentrate on the task at hand is crucial for achieving desired outcomes. Challenges to Concentration1.Distractions:In todays digital age,the constant presence of smartphones,social media, and other digital distractions can make it difficult to maintain focus.2.Stress and Anxiety:High levels of stress and anxiety can impair cognitive function, making it hard to concentrate on tasks.ck of Interest:A lack of interest in the task at hand can lead to a wandering mind, which is a significant barrier to concentration.Strategies to Improve Concentration1.Eliminate Distractions:Creating a distractionfree environment can help to maintain focus.This might involve turning off notifications on electronic devices or finding a quiet place to work.2.Time Management:Using techniques such as the Pomodoro Technique,which involves working for a set period e.g.,25minutes followed by a short break,can help to maintain concentration over longer periods.3.Mindfulness and Meditation:Practicing mindfulness and meditation can improve focus by training the mind to stay present and attentive.4.Physical Health:Regular exercise,a balanced diet,and adequate sleep are essential for maintaining the cognitive functions necessary for concentration.5.Break Tasks into Smaller Parts:Breaking down larger tasks into smaller,more manageable parts can make it easier to concentrate and make progress.6.Set Clear Goals:Having clear,achievable goals can provide motivation and help to maintain focus on the task at hand.e Tools and Techniques:Tools such as focus apps,white noise machines,or even simple techniques like deep breathing can aid in improving concentration.8.Regular Breaks:Taking regular breaks can prevent mental fatigue and help to maintaina high level of concentration over time.9.Stay Hydrated and Nourished:Dehydration and hunger can affect cognitive performance.Staying hydrated and eating nutritious foods can support concentration.10.Develop a Routine:Establishing a daily routine that includes dedicated time for focused work can train the mind to be more attentive during these periods.In conclusion,concentration is a skill that can be cultivated and improved with practice and the right strategies.By understanding the importance of focus and implementing techniques to enhance it,individuals can improve their learning,work performance,and overall quality of life.。