LT1963 芯片手册

3.20.126ASSEMBLED FRONT VIEWBOTTOM HEATSINK APPLICATION SEE NOTE 26123 CHIP SHOWN HERETHERMAL INTERFACE SEE NOTE 3(A) OR 3(B)OPTION:SCREW (40578)INSTALLED FROM BOTTOM SIDE OF PCB.TORQUE TO 3 IN-LBS.(2) PL.SEE NOTE 2OPTION:LOCATING/GROUNDINGPIN (40249)SOLDERED TO PCB(2) PL.SEE NOTE 2TOP HEATSINK APPLICATION SEE NOTES 2 & 3PUSH-PINS SEE NOTE 3,4AND SELECTION TABLEGROUNDING TABS SOLDERED TO PCB SEE NOTE 3NOTES:FOR PCB LAYOUT SEE VICOR APPLICATION DRAWING 40483.1.OPTION: SOLDERED LOCATING/GROUNDING PIN 40249 CAN BE USED IN CONJUNCTION OR2.AS ALTERNATIVE TO SCREW 40578 INSTALLED FROM BACK OF PCB.THE SOLDERING METHOD USED FOR CHIPS (AND OPTIONAL HEATSINK GROUNDING) 3.IS IMPORTANT WHEN SELECTING A THERMAL INTERFACE MATERIAL (TIM).THE PHASE-CHANGE TIM SHOWN IN THESE ILLUSTRATIONS MAY BE DAMAGED BYTEMPERATURES OVER 125C, SO TWO ASSEMBLY PROCEDURES ARE DESCRIBED BELOW: (A) FOR HAND-SOLDERING ONLY,(B) FOR WAVE-SOLDERING AND/OR HAND-SOLDERING.(A) PLACE BOTTOM-SIDE HEATSINK (WITH PRE-ATTACHED PHASE-CHANGE TIM) ON PCB.PLACE CHIP AND TOP-SIDE HEATSINK (WITH PRE-ATTACHED TIM AND GROUNDING TABS).WHILE SUPPORTING PCB, INSERT PLASTIC PUSH-PINS THROUGH BOTH HEATSINKS AND PCB.(SELECT PROPER PUSH-PIN LENGTH FROM TABLE ON THIS DRAWING.)IMPORTANT: TO SET FINAL THICKNESS OF PHASE-CHANGE TIM ENSURE THAT THE ENTIRE ASSEMBLY IS RAISED ABOVE 65C FOR SEVERAL MINUTES.HAND-SOLDER ALL CHIP AND GROUNDING PINS. ADDITIONAL SOLDERING IRON HEATMAY BE REQUIRED TO COMPENSATE FOR LOSSES TO THE HEATSINKS.(B) WAVE SOLDERING TEMPERATURES ARE UNSUITABLE FOR PLASTIC PUSH-PINS ANDPHASE-CHANGE TIM, SO VICOR TIM 40325 (PARKER CHOMERICS GEL8010) IS RECOMMENDED.APPLY A UNIFORM .003” (.076MM) LAYER OF TIM 40325 TO THE TOP AND BOTTOM SURFACE OF THE CHIP, OR TO THE CORRESPONDING HEATSINK SURFACES.PLACE BOTTOM-SIDE HEATSINK, CHIP, AND TOP-SIDE HEATSINK ON PCB.WITH A CUSTOM FIXTURE (OR VICOR WAVESOLDER FIXTURE 40416, 40417) APPLY APPROX. 10 LBS LOAD TO THE TOP-SIDE HEATSINK AND THEN WAVE-SOLDER ALL PINS.REMOVE FIXTURE AND INSERT PLASTIC PUSH-PINS THROUGH BOTH HEATSINKS AND PCB. (SELECT PROPER PUSH-PIN LENGTH FROM TABLE ON THIS DRAWING.)CARE SHOULD BE TAKEN TO AVOID FULLY COMPRESSING THE 4.PUSH-PIN SPRING DURING INSTALLATION AS THIS WOULD EXPOSE THE CHIP TO FORCES GREATER THAN THE RECOMMENDED LIMIT OF 3.1 LBF (13.8 N) PER PUSH-PIN.ROHS COMPLIANT PER CST-0001 LATEST REVISION.5.PUSH-PIN SELECTIONHEATSINK OPTIONSREV.DESCRIPTIONINTL DATE APVD 1RELEASE PER E140060REJH01/17/14REWPUSH-PINS W/ SPRINGS (100/BAG)COLORPCB THK NOMINALRANGE PCB THK MINIMUM PCB THK MAXIMUM 32436BLUE1.143 MM TO 1.854 MM[.045"] TO [.073"] 1.041 MM [.041"] 2.057 MM [.081"]32437GRAY1.880 MM TO2.438 MM[.074"] TO [.096"]1.676 MM [.066"]2.692 MM [.106"]HEATSINK TYPEP/N ASSY HEATSINKS, TIM AND GROUND TAB P/N ASSY HEATSINK W/GROUND TAB ONLY SOLDERING METHOD (SEE NOTE 2)-2(A) HAND SOLDERONLY2(B) WITH VICOR 40325THERMAL GEL4623DUAL 11MM 4051940526DUAL 19MM 40408-6123DUAL 11MM 4052040528DUAL 19MM40409-2F72F73B846C84A53CDAVICOR CONFIDENTIAL5ED6B1E1THIS DOCUMENT AND THE DATA DISCLOSED HEREIN OR HEREWITH IS NOT TO BE REPRODUCED, USED ORDISCLOSED IN WHOLE OR IN PART TO ANYONE WITHOUT THE PERMISSION OF VICOR CORP.SCALE TOLERANCES ARE:DECIMALS ANGLES X.XX [X.X] = ±0.01 [0.25] ±1°X.XXX [X.XX] = ±0.005 [0.127]SHEET OFSIZE67131CAGE CODE40191DWG NO1REVDRAWN BYDATE Robert Wasik7/12/2013APP DWG, DUAL HEATSINK,6123, 4623SWDVICORTHIRD ANGLE PROJECTIONDO NOT SCALE DRAWING113:1UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE : INCH / [MM]D。

SAM芯片手册芯片手册 (1)1. 一般描述 (3)1.1. 目录 (3)1.2. 芯片简介 (3)1.3. 芯片特征 (3)1.4. 芯片框架 (4)1.5. 管脚定义 (5)2. 控制模块 (7)2.1. 章节内容 (7)2.2. 简介 (7)2.3. 指令集说明 (7)2.4. 寄存器描述 (10)2.5. 状态机 (11)3. AES运算模块 (11)3.1. 章节内容 (11)3.2. 简介 (12)3.3. 特性 (12)3.4. 结构描述 (12)3.4.1. 接口单元 (13)3.4.2. 循环运算单元 (13)3.4.3. 密钥扩展单元 (13)3.4.4. 控制单元 (13)3.5. 寄存器描述 (13)3.6. 功能描述 (15)4. RSA运算模块 (16)4.1. 章节内容 (16)4.2. 简介 (16)4.3. 特性 (16)4.4. 结构描述 (17)4.4.1. 接口单元 (17)4.4.2. 模幂控制器 (17)4.4.3. 数据状态寄存器 (17)4.4.4. 模乘运算单元 (17)4.5. 寄存器描述 (18)4.6. 功能描述 (19)1.一般描述1.1. 目录1.2 芯片简介 (3)1.3 芯片特征 (3)1.4 芯片框架 (4)1.5 管脚定义 (5)1.2. 芯片简介基于可重构算法的SAM芯片，作为可信模块用于个人计算机或者其他嵌入式系统，以保证该系统信息安全。

该芯片包括RSA、AES运算模块，伪随机数产生模块，控制模块，分别用于加解密运算，指令译码和信号流的控制，内部用Wishbone作为总线，将各模块与控制模块相连。

运用可重构算法，可以用较少的资源实现不同长度的加解密处理，以适应不同程度的运用，同时节约资源，节省成本。

1.3. 芯片特征SAM芯片特征包括以下几点：1）、完备的控制指令集，通过从外部引脚CDIO，可以对芯片的运算方式、密钥长度和工作模式进行配置，已完成不同的加解密要求；2）、SAM包含一个控制器，该控制器的功能包括：指令译码，数据流控制，各运算模块选择，使各模块协调工作；3）、RSA模块，该模块可重构算法设计，可以通过指令配置，选择256、512、1024和2048位的密钥对明文进行加解密运算；4）、AES模块，该模块同样基于可重构算法，可以实现密钥长度为128、192和256位的加解密运算；5）、伪随机数产生模块，用于产生运算所需的密钥，利用随机数作为密钥，可以提高系统的安全性。

1LT1963 Series23LT1963 Series1963faPARAMETERCONDITIONS MIN TYP MAX UNITSLT1963-2.5V IN = 3V, I LOAD = 1mA2.462 2.500 2.538V3.5V < V IN < 20V, 1mA < I LOAD < 1.5A q 2.412 2.500 2.575V LT1963-3.3V IN = 3.8V, I LOAD = 1mA3.250 3.300 3.350V4.3V < V IN < 20V, 1mA < I LOAD < 1.5A q 3.200 3.300 3.400V ADJ Pin Voltage LT1963V IN = 2.21V, I LOAD = 1mA1.192 1.210 1.228V (Notes 4, 5)2.5V < V IN < 20V, 1mA < I LOAD < 1.5A q 1.1741.210 1.246V Line RegulationLT1963-1.5∆V IN = 2.21V to 20V, I LOAD = 1mA q 2.010mV LT1963-1.8∆V IN = 2.3V to 20V, I LOAD = 1mA q 2.510mV LT1963-2.5∆V IN = 3V to 20V, I LOAD = 1mA q 3.010mV LT1963-3.3∆V IN = 3.8V to 20V, I LOAD = 1mA q 3.510mV LT1963 (Note 4)∆V IN = 2.21V to 20V, I LOAD = 1mA q 1.510mV Load RegulationLT1963-1.5V IN = 2.5V, ∆I LOAD = 1mA to 1.5A 29mV V IN = 2.5V, ∆I LOAD = 1mA to 1.5A q18mV LT1963-1.8V IN = 2.8V, ∆I LOAD = 1mA to 1.5A 210mV V IN = 2.8V, ∆I LOAD = 1mA to 1.5A q20mV LT1963-2.5V IN = 3.5V, ∆I LOAD = 1mA to 1.5A 2.515mV V IN = 3.5V, ∆I LOAD = 1mA to 1.5A q30mV LT1963-3.3V IN = 4.3V, ∆I LOAD = 1mA to 1.5A 320mV V IN = 4.3V, ∆I LOAD = 1mA to 1.5Aq35mV LT1963 (Note 4)V IN = 2.5V, ∆I LOAD = 1mA to 1.5A28mV V IN = 2.5V, ∆I LOAD = 1mA to 1.5Aq15mV Dropout Voltage I LOAD = 1mA 0.020.06V V IN = V OUT(NOMINAL)I LOAD = 1mA q0.10V (Notes 6, 7, 12)I LOAD = 100mA 0.100.17V I LOAD = 100mA q0.22V I LOAD = 500mA 0.190.27V I LOAD = 500mA q0.35V I LOAD = 1.5A 0.340.45V I LOAD = 1.5Aq 0.55V GND Pin CurrentI LOAD = 0mA q 1.0 1.5mA V IN = V OUT(NOMINAL) + 1V I LOAD = 1mA q 1.1 1.6mA (Notes 6, 8)I LOAD = 100mA q 3.8 5.5mA I LOAD = 500mA q 1525mA I LOAD = 1.5Aq80120mA Output Voltage Noise C OUT = 10µF, I LOAD = 1.5A, BW = 10Hz to 100kHz 40µV RMSADJ Pin Bias Current (Notes 4, 9)310µA Shutdown Threshold V OUT = Off to On q 0.902V V OUT = On to Off q0.250.75V SHDN Pin Current V SHDN = 0V 0.011µA (Note 10)V SHDN = 20V 330µA Quiescent Current in Shutdown V IN = 6V, V SHDN = 0V0.011µA Ripple Rejection V IN – V OUT = 1.5V (Avg), V RIPPLE = 0.5V P-P ,5563dB f RIPPLE = 120Hz, I LOAD = 0.75ACurrent LimitV IN = 7V, V OUT = 0V2A V IN = V OUT(NOMINAL) + 1V, ∆V OUT = –0.1V q 1.6AInput Reverse Leakage Current (Note 13)Q, T, S8 Packages V IN = –20V, V OUT = 0V q 1mA ST Package V IN = –20V, V OUT = 0V q2mA Reverse Output Current (Note 11)LT1963-1.5V OUT = 1.5V, V IN < 1.5V 6001200µA LT1963-1.8V OUT = 1.8V, V IN < 1.8V 6001200µA LT1963-2.5V OUT = 2.5V, V IN < 2.5V 6001200µA LT1963-3.3V OUT = 3.3V, V IN < 3.3V 6001200µA LT1963 (Note 4)V OUT = 1.21V, V IN < 1.21V300600µAThe q denotes specifications which apply over the full operating temperature range, otherwise specifications are T A = 25°C. (Note 2)ELECTRICAL CHARACTERISTICSLT1963 Series45LT1963 Series678LT1963 Series1ms/DIVC OUT = 10µF I LOAD = 1.5A1963 G37TIME (µs)150100500–50–100–1501.51.00.50O U T P U T V O L T A G E D E V I A T I O N (m V )L O A D C U R R E N T (A )1963 G3950100150250300350400450500200V IN = 4.3VC IN = 33µF TANTALUM C OUT = 100µF TANTALUM +10 × 1µF CERAMICLT1963-3.3 Transient Response9LT1963 Series101112LT1963 Series1963faAPPLICATIO S I FOR ATIOW UUU Thermal ConsiderationsThe power handling capability of the device is limited by the maximum rated junction temperature (125°C). The power dissipated by the device is made up of two components:1.Output current multiplied by the input/output voltage differential: (I OUT )(V IN – V OUT ), and 2.GND pin current multiplied by the input voltage:(I GND )(V IN ).The GND pin current can be found using the GND Pin Current curves in the Typical Performance Characteris-tics. Power dissipation will be equal to the sum of the two components listed above.The LT1963 series regulators have internal thermal lim-iting designed to protect the device during overload conditions. For continuous normal conditions, the maxi-mum junction temperature rating of 125°C must not be exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambi-ent. Additional heat sources mounted nearby must also be considered.For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes can also be used to spread the heat gener-ated by power devices.The following tables list thermal resistance for several different board sizes and copper areas. All measurements were taken in still air on 1/16" FR-4 board with one ounce copper.Table 1. Q Package, 5-Lead DDCOPPER AREA THERMAL RESISTANCETOPSIDE*BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)2500mm 22500mm 22500mm 223°C/W 1000mm 22500mm 22500mm 225°C/W 125mm 22500mm 22500mm 233°C/W*Device is mounted on topsideTable 2. SO-8 Package, 8-Lead SOCOPPER AREA THERMAL RESISTANCETOPSIDE*BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)2500mm 22500mm 22500mm 255°C/W 1000mm 22500mm 22500mm 255°C/W 225mm 22500mm 22500mm 263°C/W 100mm 22500mm 22500mm 269°C/W*Device is mounted on topside.Table 3. SOT-223 Package, 3-Lead SOT-223COPPER AREA THERMAL RESISTANCETOPSIDE*BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)2500mm 22500mm 22500mm 242°C/W 1000mm 22500mm 22500mm 242°C/W 225mm 22500mm 22500mm 250°C/W 100mm 22500mm 22500mm 256°C/W 1000mm 21000mm 21000mm 249°C/W 1000mm 20mm 21000mm 252°C/W*Device is mounted on topside.T Package, 5-Lead TO-220Thermal Resistance (Junction-to-Case) = 4°C/WCalculating Junction TemperatureExample: Given an output voltage of 3.3V, an input voltage range of 4V to 6V, an output current range of 0mA to 500mA and a maximum ambient temperature of 50°C,what will the maximum junction temperature be?The power dissipated by the device will be equal to:I OUT(MAX)(V IN(MAX) – V OUT ) + I GND (V IN(MAX))where,I OUT(MAX) = 500mA V IN(MAX) = 6VI GND at (I OUT = 500mA, V IN = 6V) = 10mA So,P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W Using a DD package, the thermal resistance will be in the range of 23°C/W to 33°C/W depending on the copper area. So the junction temperature rise above ambient will be approximately equal to:1.41W(28°C/W) = 39.5°C13LT1963 Series14Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.1516LT1963 SeriesLT/TP 0602 1.5K REV A • PRINTED IN USA© LINEAR TECHNOLOGY CORPORA TION 20001630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 q FAX: (408) 434-0507 q Copyright © Each Manufacturing Company.All Datasheets cannot be modified without permission.This datasheet has been download from :100% Free DataSheet Search Site.Free Download.No Register.Fast Search System.。