信息检索综合检索报告级专业班学号姓名1、检索课题名称基于FPGA的数字图像处理The digital image processing based on FPGA2、检索策略2.1 选择检索工具中国期刊全文数据库（CNKI）美国工程索引（EI）中国专利信息中心Google搜索引擎2.2选择检索词从课题字面选从课题内涵选（同义词、近义词、上下位词）FPGA (Field－Programmable Gate Array)现场可编程门阵列、数字图像（thedigital image）视频（同义词）3. 检索步骤及检索结果3.1 中国期刊全文数据库(CNKI)3.1.1 检索式篇名=（FPGA+现场可编程门列阵）*主题词=（数字图像+视频）3.1.2 检索年限 2002-20123.1.3检索结果命中178篇，选择5篇如下：1、题名：基于FPGA的数字图像处理作者：李科唐波张玉出处：《科技资讯》-2012年2期摘要：随着数字多媒体技术的不断发展,数字图像处理技术被广泛应用于航空航天、通信、医学及工业生产等领域中。
图像处理系统一般包括两个部分：图像采集部分和图像处理部分。
图像采集部分由专用的视频处理器、图像缓存和控制接口电路组成。
图像处理部分可以是计算机,也可以是专用图像处理器件,或者是两者的结合。
由于底层图像处理的数据量很大,要求处理速度快,但运算结果相对比较简单,以FPGA作为主要处理芯片的图像处理系统非常适合于对图像进行处理。
2、题名：基于DSP+FPGA结构图像处理系统设计与实现作者：朱明鲁剑锋出处：《计算机测量与控制》ISTIC PKU -2004年9期摘要：为了实现视频图像的实时处理,采用基于DSP+FPGA的线性流水阵列结构,用现场可编程门阵列FPGA对采集的视频数字图像做预处理,并结合大规模可编程逻辑阵列CPLD进行逻辑控制,实现了视频图像的采集和目标提取的视频数字图像处理系统.介绍了该视频图像处理系统的硬件组成、工作原理和各种视频跟踪算法的应用.该系统与计算机联结,配以适当的图像处理软件和开发系统,即可形成一个通用的实时图像处理平台.3、题名：基于FPGA的视频采集及转换系统设计作者：郑华强[1]刘晓明[1]蔡飞[2]钟璐[2]高燕[1]出处：《计算机与数字工程》ISTIC -2010年6期摘要：基于数字图像处理技术和FPGA(现场可编程门阵列)技术,针对高精度单色CCD视频传感器1010_M的输出规范,结合高速视频接口标准的需求,设计并实现了一种视频采集及转换系统.系统重点介绍了视频采集及转换系统硬件电路结构,软件设计流程,主要相关电路设计和FPGA逻辑设计,并给出测试结果.4、题名：基于DSP+FPGA的双通道实时图像处理系统设计作者：干戈出处：《舰船电子工程》-2008年7期摘要：采用基于DSP + FPGA的线性流水阵列结构实现视频图像的实时处理,其中DSP作为系统埘视频图像数据进行处理的核心,现场可编程门阵列FPGA完成对采集的视频图像数据的预处理和交互实现了双通道视频图像的处理和目标提取的视频数字图像处理,介绍该视频图像处理系统的硬件组成、工作原理和视频跟踪算法的应用.5、题名：基于FPGA的视频图像采集处理与显示系统的研究作者：王立霞张斌蒋大林陆景鹏出处：2010 - 中国化工学会化工自动化及仪表专委会2010年学术年会摘要：针对目前停车场管理不完善的现象，提出了一种比较可行的智能停车场的开发的方案，目的在于提高停车场管理效率，能切实的改善停车难的实际问题。
主要研究内容是采用FPGA 开发平台，结合现有的车位检测技术，提出车位检测算法，并在实际测试中取得较高的识别率后，进行优化和硬件实现。
本文给出了FPGA在数字图像处理中的应用，并进一步研究了FPGA对视频图像的采集与处理，及控制VGA接口(VGA(视频图形阵列作为一种标准的显示接口在视频和计算机领域得到了广泛的应用)，实时的将处理后的视频图像在液晶显示屏上显示出来。
通过显示屏上显示的是停车场的利用情况，这方便车主准确及时的找到停车位，这具有很强的实用性。
3.2 美国工程索引（EI）3.2.1 检索式((The digital image FPGA) WN TI)3.2.2 检索年限 2002-20123.2.3 检索结果命中5篇，如下：1、【篇名】The design of a FPGA-based digital magnetic induction tomography (MIT) system for metallic object imaging【作者】Yin, Wuliang1 ; Chen, Guang1; Jiang, Jian1; Cui, Ziqiang1【出处】IEEE Computer Society, 445 Hoes Lane - P.O.Box 1331, Piscataway, NJ 08855-1331, United States【摘要】This paper presents the software and hardware designaspects of the first digital MIT system. Excitation signal generation, receiving signal demodulation and channel multiplexing control are all implemented inside a Xilinx FPGA (Spartan III). The image reconstruction software is written in VC++ and real time images up to 200 frames /second can be achieved for 50K Hz excitation. Fitted with an 8 coil MIT sensor, the digital system delivers a much higher signal to noise ratio (SNR) and image stability compared to the analog system previously designed. Metallic samples of different shapes and arrangements were imaged, which confirmsthe performance of the system. © 2010 IEEE.2、【篇名】The design for astronomical digital images' real-time data acquisition and processing system based on FPGA and PCI bus【作者】Tang, Qingshan1 ; Hou, Weiming2 ; Fei, Weiwei3 ; Cai, Huizhi1 ; Li, Yajie4【出处】IEEE Computer Society, 445 Hoes Lane - P.O.Box 1331, Piscataway, NJ 08855-1331, United States【摘要】In order to acquire high speed real-time astronomical image data and recognize the object planets, a kind of system based on FPGA and PCI bus is presented. In this system, logic design including Camera Link data interface, digital image data capture and data transmission to PC through PCI bus is completed in FPGA (Xilinx Virtex 4); and the final results can be verified in PC. The system can collect and process the digital image output from high speed CMOS camera which peak data rate is 660MB/s, average rate is 200 MB/s, and frame ratio is 2500fps. ©2009 IEEE3、【篇名】The image pretreatment based on the FPGA inside digital CCD camera 【作者】Tian, Rui2; Liu, Yan-Ying1【出处】SPIE, P.O. Box 10, Bellingham WA, WA 98227-0010, United States【摘要】In a space project, a digital CCD camera which can image more clearly in the 1 Lux light environment has been asked to design. The CCD sensor ICX285AL produced by SONY Co.Ltd has been used in the CCD camera. The FPGA (Field Programmable Gate Array) chip XQR2V1000 has been used as a timing generator and a signal processor inside the CCD camera. But in the low-light environment, two kinds of random noise become apparent because of the improving of CCD camera's variable gain, one is dark current noise in the image background, the other is vertical transfer noise. The real time method for eliminating noise based on FPGA inside the CCD camera would be introduced. The causes and characteristics of the random noise have been analyzed. First, several ideas for eliminating dark current noise had been motioned; then they were emulated by VC++ in order to compare their speed and effect; Gauss filter has been chosen because of the filtering effect. The vertical transfer vertical noise has the character that the vertical noise points have regular ordinate in the image two-dimensional coordinates; and the performance of the noise is fixed, the gray value of the noise points is 16-20 less than the surrounding pixels. According to these characters, local median filter has been used to clear up the vertical noise. Finally, these algorithms had been transplanted into the FPGA chip inside the CCD camera. A large number of experiments had proved that the pretreatment has better real-time features. The pretreatment makes the digital CCD camera improve the signal-to-noise ratio of 3-5dB in the low-light environment. © 2009 SPIE.4、【篇名】The design of CMOS digital image sensor's application based on FPGA 【作者】Lin, Hongyu1; Chen, Yan1【出处】Asian Association on Remote Sensing, 4-6-1 Komba Meguro-ku, Tokyo, 153-8505,Japan【摘要】The paper presents the design of the digital image sensor LUPA-4000's applications, and analyzes the drive time sequence of the sensor. The design chooses FPGA as the hardware platform and Verilog as the software design language, with which the drive time sequence design, function control design and signal output mode design are realized. The correctness of the design has been validated through the software emulating and hardware test. The design adapts to the development of miniaturization and universal of space cameras.5、【篇名】AVSynDEx: A rapid prototyping process dedicated to the implementation of digital image processing applications on multi-DSP and FPGA architectures 【作者】Fresse, Virginie1 ; Déforges, Olivier1 ; Nezan, Jean-François1【出处】Hindawi Publishing Corporation【摘要】We present AVSynDEx (concatenation of AVS + SynDEx), a rapid prototyping process aiming to the implementation of digital signal processing applications on mixed architectures (multi-DSP + FPGA). This process is based on the use of widely available and efficient CAD tools established along the design process so that most of the implementation tasks become automatic. These tools and architectures are judiciously selected and integrated during the implementation process to help a signal processing specialist without relevant hardware experience. We have automated the translation between the different levels of the process to increase and secure it. One main advantage is that only a signal processing designer is needed, all the other specialized manual tasks being transparent in this prototyping methodology, hereby reducing the implementation time.3.3 中国专利信息中心3.3.1 检索式检索式:'F XX (FPGA 数字图像处理/TX)'3.3.2 检索年限 2002-20123.3.3 检索结果命中60篇，选择5篇如下：1、篇名：一种基于ＧＰＲＳ和ＤＳＰ与ＦＰＧＡ的无线视频采集装置申请号： 201120538454 申请日： 2011年12月21日申请人：成都众询科技有限公司发明人：熊璞张磊张永恒摘要：本实用新型提供了一种基于ＧＰＲＳ和ＤＳＰ与ＦＰＧＡ的无线视频采集装置，包括均与ＦＰＧＡ芯片ＥＰＩＣ１２Ｑ２４０Ｃ８连接的ＣＯＭＳ数字图像传感器、帧存ＤＲＡＭ、视频Ｄ／Ａ输出芯片和数据存储ＳＤ卡，均与ＤＳＰ芯片ＴＭＳ３２０Ｖ５５０２连接的ＤＲＡＭ和ＦＬＡＳＨ；所述ＦＰＧＡ芯片ＥＰＩＣ１２Ｑ２４０Ｃ８连接与ＤＳＰ芯片ＴＭＳ３２０Ｖ５５０２通过双口ＲＡＭ连，ＧＰＲＳ模块与视频Ｄ／Ａ输出芯片连接。
