LM124ADR中文资料

PACKAGING INFORMATIONOrderable Device Status(1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)5962-87710012A ACTIVE LCCC FK 201None POST-PLATE Level-NC-NC-NC 5962-8771001PA ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC 5962-87710022A ACTIVE LCCC FK 201None POST-PLATE Level-NC-NC-NC 5962-8771002PA ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC LM158AFKB ACTIVE LCCC FK 201None POST-PLATE Level-NC-NC-NCLM158AJG ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC LM158AJGB ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC LM158FKB ACTIVE LCCC FK 201None POST-PLATE Level-NC-NC-NCLM158JG ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC LM158JGB ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC LM258AD ACTIVE SOIC D 875Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM LM258ADGKR ACTIVE MSOP DGK 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR LM258ADR ACTIVE SOIC D 82500Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM LM258AP ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC LM258D ACTIVE SOIC D 875Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM LM258DGKR ACTIVE MSOP DGK 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR LM258DR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM258P ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC LM2904AVQDR ACTIVE SOIC D 82500Pb-Free (RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIM LM2904AVQPWRACTIVE TSSOP PW 82000None CU NIPDAU Level-1-250C-UNLIM LM2904D ACTIVE SOIC D 875Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM LM2904DGKR ACTIVE MSOP DGK 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR LM2904DR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2904P ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC LM2904PSR ACTIVE SO PS 82000Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM LM2904PW ACTIVE TSSOP PW 8150Pb-Free (RoHS)CU NIPDAU Level-1-250C-UNLIM LM2904PWLE OBSOLETE TSSOP PW 8None Call TI Call TILM2904PWR ACTIVE TSSOP PW 82000Pb-Free (RoHS)CU NIPDAU Level-1-250C-UNLIM LM2904QD OBSOLETE SOIC D 8None Call TI Call TILM2904QDROBSOLETESOICD8Pb-Free (RoHS)CU NIPDAULevel-2-250C-1YEAR/Level-1-235C-UNLIMPACKAGE OPTION ADDENDUM4-Mar-2005Addendum-Page 1元器件交易网Orderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)LM2904QP OBSOLETE PDIP P8None Call TI Call TILM2904VQDR ACTIVE SOIC D82500Pb-Free(RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIMLM2904VQPWR ACTIVE TSSOP PW82000None CU NIPDAU Level-1-250C-UNLIMLM358AD ACTIVE SOIC D875Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMLM358ADGKR ACTIVE MSOP DGK82500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARLM358ADR ACTIVE SOIC D82500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM358AP ACTIVE PDIP P850Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCLM358APW ACTIVE TSSOP PW8150Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIMLM358APWR ACTIVE TSSOP PW82000Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIMLM358D ACTIVE SOIC D875Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM358DGKR ACTIVE MSOP DGK82500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARLM358DR ACTIVE SOIC D82500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM358P ACTIVE PDIP P850Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCLM358PSLE OBSOLETE SO PS8None Call TI Call TILM358PSR ACTIVE SO PS82000Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMLM358PW ACTIVE TSSOP PW8150Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIM LM358PWLE OBSOLETE TSSOP PW8None Call TI Call TILM358PWR ACTIVE TSSOP PW82000Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-May not be currently available-please check /productcontent for the latest availability information and additional product content details.None:Not yet available Lead(Pb-Free).Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green(RoHS&no Sb/Br):TI defines"Green"to mean"Pb-Free"and in addition,uses package materials that do not contain halogens, including bromine(Br)or antimony(Sb)above0.1%of total product weight.(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it isprovided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.元器件交易网IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvements, and other changes to its products and services at any time and to discontinueany product or service without notice. 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Advanced AMS124 Monolithic MICROPOWER SHUNT VOLTAGE REFERENCE SystemsRoHS compliantFEATURES APPLICATIONS• Low Temperature Coefficient • Battery Powered Systems • Low Output Noise • Instrumentation • Operating Current 50µA to 4mA • Energy Management • Low Dynamic Impedance • Product Testing • Tight Output Voltage Tolerance • Precision Audio Components • Available in the sub-miniature SOT-23 Package • Data Acquisition SystemsGENERAL DESCRIPTIONThe AMS124 is a two-terminal micropower band-gap voltage reference diode featuring low dynamic impedance and good temperature coefficient, operating over a 50µA to 4mA current range. On-chip trimming is used to provide tight voltage tolerance. Since the AMS124 band-gap reference uses only transistors and resistors, low noise and good long term stability result. The wide dynamic operating range allows its use with widely varying supplies with excellent regulation. These voltage references can be used to make portable meters, regulators or general purpose analog circuitry.The AMS124 is operational in the full industrial temperature range of -40°C to 85°C and is available in small space saving SOT-23 package.ORDERING INFORMATION :MAX. PACKAGE TYPE OPERATING TEMPCO 3 LEAD SOT-23 TEMP. RANGE 50ppm/°C AMS124AM -40 to +85°C 100ppm/°C AMS124BM -40 to +85°CPIN CONNECTIONS3L SOT-23(M)*This pin must be left floating or connected to pin 2Top ViewAMS124ABSOLUTE MAXIMUM RATINGS (Note 1)Reverse Current 5mA Storage temperature -65°C to +150°C Forward Current10mA Internal Power Dissipation (P D ) Lead Temperature (25 sec) 265°CSOT-23 Package 0.28WThermal Resistance (θJA )SOT-23 Package 410°C/WELECTRICAL CHARACTERISTICSElectrical Characteristics at I R =500 µA and T A = +25°C unless otherwise specified. Parameter ConditionsAMS124A Min. Typ. Max.AMS124BMin. Typ. Max.UnitsOutput Voltage1.220 1.235 1.250 1.220 1.235 1.250VOutput Impedance0.6 2 0.6 2 ΩRMS Noise Voltage 10Hz ≤ f ≤ 10kHz 5 5 µVrms Temperature Coefficient T A = Full Range50100ppm/°CTurn-On Settling 0.1% of V OUT 15 15 µsec Operating Current(Note 3)0.0540.054mANote1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. For guaranteed specifications and test conditions, see theElectrical Characteristics . The guaranteed specifications apply only for the test conditions listed.Note 2: Parameters identified with boldface type apply at temperature extremes. All other numbers apply at T A = T J = 25°C. Note 3: Optimum performance is obtained at currents below 500µA.TYPICAL APPLICATIONSShunt RegulatorPrecision 1µA to 1mA Current SourcesAMS124I OUT =1.2V/R2AMS124TYPICAL PERFORMANCE CHARACTERISTICS-0.5+0.50-0.1-0.2-0.3-0.4+0.4+0.3+0.2+0.1Temperature Drift for Different Average Temperature Coefficient V R C H A N G E (%)Reverse Characteristics and Minimum Operating Current FREQUENCY (Hz)FREQUENCY (Hz)Noise Voltage vs FrequencyAMS124 PACKAGE DIMENSIONS inches (millimeters) unless otherwise noted.3 LEAD SOT-23 PLASTIC PACKAGE (M)。

LM124A/LM124QMLLow Power Quad Operational AmplifiersGeneral DescriptionThe LM124/124A consists of four independent,high gain,internally frequency compensated operational amplifiers which were designed specifically to operate from a single power supply over a wide range of voltages.Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage.Application areas include transducer amplifiers,DC gain blocks and all the conventional op amp circuits which now can be more easily implemented in single power supply systems.For example,the LM124/124A can be directly op-erated off of the standard +5Vdc power supply voltage which is used in digital systems and will easily provide the required interface electronics without requiring the additional +15Vdc power supplies.Unique Characteristicsn In the linear mode the input common-mode voltage range includes ground and the output voltage can also swing to ground,even though operated from only a single power supply voltagen The unity gain cross frequency is temperature compensatedn The input bias current is also temperature compensatedAdvantagesn Eliminates need for dual suppliesn Four internally compensated op amps in a single packagen Allows directly sensing near GND and V OUT also goes to GNDn Compatible with all forms of logicn Power drain suitable for battery operationFeaturesn Internally frequency compensated for unity gain n Large DC voltage gain 100dBn Wide bandwidth (unity gain)1MHz (temperature compensated)n Wide power supply range:Single supply 3V to 32Vor dual supplies ±1.5V to ±16Vn Very low supply current drain (700µA)—essentially independent of supply voltage n Low input biasing current 45nA (temperature compensated)n Low input offset voltage 2mV and offset current:5nAn Input common-mode voltage range includes ground n Differential input voltage range equal to the power supply voltagen Large output voltage swing 0V to V +−1.5VOrdering InformationNS PART NUMBER SMD PART NUMBERNS PACKAGE NUMBERPACKAGE DISCRIPTION LM124J/8837704301CA J14A 14LD CERDIPLM124AE/88377043022A E20A 20LD LEADLESS CHIP CARRIER LM124AJ/8837704302CAJ14A 14LD CERDIP LM124AW/883W14B 14LD CERPACK LM124AWG/8837704302XA WG14A 14LD CERAMIC SOIC LM124AJLQMLV 5962L9950401VCA,50k rd(Si)J14A 14LD CERDIP LM124AJRQMLV 5962R9950401VCA,100k rd(Si)J14A 14LD CERDIP LM124AWGLQMLV 5962L9950401VZA,50k rd(Si)WG14A 14LD CERAMIC SOIC LM124AWGRQMLV 5962R9950401VZA,100k rd(Si)WG14A 14LD CERAMIC SOIC LM124AWLQMLV 5962L9950401VDA,50k rd(Si)W14B 14LD CERPACK LM124AWRQMLV5962R9950401VDA,100k rd(Si)W14B14LD CERPACKJanuary 2005LM124A/LM124QML Low Power Quad Operational Amplifiers©2005National Semiconductor Corporation Connection DiagramsLeadless Chip Carrier20108055See NS Package Number E20ADual-In-Line Package20108001Top ViewSee NS Package Number J14A20108033See NS Package Number W14B or WG14AL M 124A /L M 124Q M L 2LM124A/LM124QML Schematic Diagram(Each Amplifier)3Absolute Maximum Ratings (Note 1)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.Supply Voltage,V +32Vdc or +16VdcDifferential Input Voltage 32VdcInput Voltage −0.3Vdc to +32VdcInput Current(V IN <−0.3Vdc)(Note 4)50mAPower Dissipation (Note 2)CERDIP 1260mW CERPACK 700mW LCC1350mW CERAMIC SOIC700mW Output Short-Circuit to GND (One Amplifier)(Note 3)V +≤15Vdc and T A =25˚C ContinuousOperating Temperature Range −55˚C ≤T A ≤+125˚CMaximum Junction Temperature 150˚CStorage Temperature Range−65˚C ≤T A ≤+150˚CLead Temperature (Soldering,10seconds)260˚C Thermal Resistance ThetaJA CERDIP (Still Air)103C/W (500LF/Min Air flow)51C/W CERPACK (Still Air)176C/W (500LF/Min Air flow)116C/W LCC (Still Air)91C/W (500LF/Min Air flow)66C/W CERAMIC SOIC (Still Air)176C/W (500LF/Min Air flow)116C/W ThetaJC CERDIP 19C/W CERPACK 18C/W LCC24C/W CERAMIC SOIC 18C/W Package Weight (Typical)CERDIP TBD CERPACK TBD LCCTBD CERAMIC SOIC 410mg ESD Tolerance (Note 5)250V Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.Operating Ratings indicate conditions for which the device is functional,but do not guarantee specific performance limits.For guaranteed specifications and test conditions,see the Electrical Characteristics.The guaranteed specifications apply only for the test conditions listed.Some performance characteristics may degrade when the device is not operated under the listed test conditions.Note 2:The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature),ThetaJA (package junction to ambient thermal resistance),and TA (ambient temperature).The maximum allowable power dissipation at any temperature is Pdmax =(Tjmax -TA)/ThetaJA or the number given in the Absolute Maximum Ratings,whichever is lower.Note 3:Short circuits from the output to V+can cause excessive heating and eventual destruction.When considering short circuits to ground,the maximum output current is approximately 40mA independent of the magnitude of V+.At values of supply voltage in excess of +15Vdc,continuous short-circuits can exceed the power dissipation ratings and cause eventual destruction.Destructive dissipation can result from simultaneous shorts on all amplifiers.Note 4:This input current will only exist when the voltage at any of the input leads is driven negative.It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps.In addition to this diode action,there is also lateral NPN parasitic transistor action on the IC chip.This transistor action can cause the output voltages of the op amps to go to the V+voltage level (or to ground for a large overdrive)for the time duration that an input is driven negative.This is not destructive and normal output states will re-establish when the input voltage,which was negative,again returns to a value greater than -0.3Vdc (at 25C).Note 5:Human body model,1.5k Ωin series with 100pF.L M 124A /L M 124Q M L 4LM124A/LM124QML Quality Conformance InspectionMIL-STD-883,Method5005—Group ASubgroup Description Temp(˚C)1Static tests at+252Static tests at+1253Static tests at-554Dynamic tests at+255Dynamic tests at+1256Dynamic tests at-557Functional tests at+258A Functional tests at+1258B Functional tests at-559Switching tests at+2510Switching tests at+12511Switching tests at-555LM124A 883DC Electrical Characteristics(The following conditions apply to all the following parameters,unless otherwise specified.)All voltages referenced to device ground.SYMBOL PARAMETERCONDITIONSNOTESMINMAX UNIT SUB-GROUPS IccPower Supply Current V+=5V1.2mA 1,2,3V+=30V3.0mA 14.0mA 2,3IsinkOutput Sink CurrentV+=15V,Vout =200mV,+Vin =0mV,-Vin =+65mV 12uA 1V+=15V,Vout =2V,+Vin =0mV,-Vin =+65mV10mA 15mA 2,3Isource Output Source CurrentV+=15V,Vout =2V,+Vin =0mV,-Vin =-65mV -20mA 1-10mA 2,3Ios Short Circuit Current V+=5V,Vout =0V -60mA 1VioInput Offset VoltageV+=30V,Vcm =0V -22mV 1-44mV 2,3V+=30V,Vcm =28.5V -22mV 1V+=30V,Vcm =28V -44mV 2,3V+=5V,Vcm =0V-22mV 1-44mV 2,3CMRRCommon Mode Rejection Ratio V+=30V,Vin =0V to 28.5V 70dB 1±IibInput Bias Current V+=5V,Vcm =0V -5010nA 1-10010nA 2,3Iio Input Offset Current V+=5V,Vcm =0V -1010nA 1-3030nA 2,3PSRR Power Supply Rejection Ratio V+=5V to 30V,Vcm =0V 65dB 1Vcm Common Mode Voltage Range V+=30V(Note 6)28.5V 1(Note 6)28V 2,3Avs Large Signal Gain V+=15V,Rl =2K Ohms,Vo =1V to 11V(Note 7)50V/mV 4(Note 7)25V/mV 5,6VohOutput Voltage High V+=30V,Rl =2K Ohms 26V 4,5,6V+=30V,Rl =10K Ohms27V 4,5,6VolOutput Voltage LowV+=30V,Rl =10K Ohms 40mV 4,5,6V+=30V,Isink =1uA 40mV 4100mV 5,6V+=5V,Rl =10K Ohms20mV 4,5,6Channel Separation Amp to Amp Coupling1KHz,20KHz (Note 8)80dB4L M 124A /L M 124Q M L 6LM124883DC Electrical Characteristics(The following conditions apply to all the following parameters,unless otherwise specified.)All voltages referenced to device ground.SYMBOL PARAMETER CONDITIONS NOTES MIN MAX UNIT SUB-GROUPS Icc Power Supply Current V+=5V 1.2mA1,2,3V+=30V 3.0mA14.0mA2,3Isink Output Sink Current V+=15V,Vout=200mV,+Vin=0mV,-Vin=+65mV12uA1V+=15V,Vout=2V,+Vin=0mV,-Vin=+65mV 10mA15mA2,3Isource Output SourceCurrent V+=15V,Vout=2V,+Vin=0mV,-Vin=-65mV-20mA1-10mA2,3Ios Short Circuit Current V+=5V,Vout=0V-60mA1 Vio Input Offset Voltage V+=30V,Vcm=0V-55mV1-77mV2,3V+=30V,Vcm=28V-55mV1-77mV2,3V+=5V,Vcm=0V-55mV1-77mV2,3V+=30V,Vcm=28.5V-55mV1 CMRR Common ModeRejection RatioV+=30V,Vin=0V to28.5V70dB1 +Iib Input Bias Current V+=5V,Vcm=0V-15010nA1-30010nA2,3 Iio Input Offset Current V+=5V,Vcm=0V-3030nA1-100100nA2,3 PSRR Power SupplyRejection RatioV+=5V to30V,Vcm=0V65dB1Vcm Common ModeVoltage Range V+=30V(Note6)28.5V1(Note6)28V2,3Avs Large Signal Gain V+=15V,Rl=2K Ohms,Vo=1V to11V 50V/mV4 25V/mV5,6Voh Output Voltage High V+=30V,Rl=2K Ohms26V4,5,6V+=30V,Rl=10K Ohms27V4,5,6 Vol Output Voltage Low V+=30V,Rl=10K Ohms40mV4,5,6V+=30V,Isink=1uA40mV4100mV5,6V+=5V,Rl=10K Ohms20mV4,5,6Channel Separation (Amp to Amp Coupling)1KHz,20KHz(Note8)80dB4LM124A/LM124QML7LM124A RAD HARD DC Electrical Characteristics(Note 10)(The following conditions apply to all the following parameters,unless otherwise specified.)All voltages referenced to device ground.SYMBOL PARAMETER CONDITIONSNOTESMIN MAX UNIT SUB-GROUPS VioInput Offset VoltageVcc+=30V,Vcc-=Gnd,Vcm =-15V-22mV 1-44mV 2,3Vcc+=2V,Vcc-=-28V,Vcm =13V-22mV 1-44mV 2,3Vcc+=5V,Vcc-=Gnd,Vcm =-1.4V-22mV 1-44mV 2,3Vcc+=2.5V,Vcc-=-2.5,Vcm =1.1V-22mV 1-44mV 2,3IioInput Offset CurrentVcc+=30V,Vcc-=Gnd,Vcm =-15V-1010nA 1,2-3030nA 3Vcc+=2V,Vcc-=-28V,Vcm =13V-1010nA 1,2-3030nA 3Vcc+=5V,Vcc-=Gnd,Vcm =-1.4V-1010nA 1,2-3030nA 3Vcc+=2.5V,Vcc-=-2.5,Vcm =1.1V-1010nA 1,2-3030nA 3±IibInput Bias CurrentVcc+=30V,Vcc-=Gnd,Vcm =-15V-50+0.1nA 1,2-100+0.1nA 3Vcc+=2V,Vcc-=-28V,Vcm =13V-50+0.1nA 1,2-100+0.1nA 3Vcc+=5V,Vcc-=Gnd,Vcm =-1.4V-50+0.1nA 1,2-100+0.1nA 3Vcc+=2.5V,Vcc-=-2.5,Vcm =1.1V-50+0.1nA 1,2-100+0.1nA 3+PSRR Power Supply Rejection Ratio Vcc-=Gnd,Vcm =-1.4V,5V ≤Vcc ≤30V-100100uV/V 1,2,3CMRR Common Mode Rejection Ratio 76dB 1,2,3Ios+Output Short Circiut CurrentVcc+=30V,Vcc-=Gnd,Vo =25V-70mA 1,2,3IccPower Supply Current Vcc+=30V,Vcc-=Gnd3mA 1,24mA 3Delta Vio/Delta TInput Offset Voltage Temperature Sensitivity+25˚C ≤TA ≤+125˚C,+Vcc =5V,-Vcc =0V,Vcm =-1.4V(Note 9)-3030uV/˚C2-55˚C ≤TA ≤+25˚C,+Vcc =5V,-Vcc =0V,Vcm =-1.4V(Note 9)-3030uV/˚C 3Delta Iio/Delta TInput Offset Current Temperature Sensitivity+25˚C ≤TA ≤+125˚C,+Vcc =5V,-Vcc =0V,Vcm =-1.4V(Note 9)-400400pA/˚C2-55˚C ≤TA ≤+25˚C,+Vcc =5V,-Vcc =0V,Vcm =-1.4V(Note 9)-700700pA/˚C 3L M 124A /L M 124Q M L 8LM124A RAD HARD AC/DC Electrical Characteristics(Note10)(The following conditions apply to all the following parameters,unless otherwise specified.)All voltages referenced to device ground.SYMBOL PARAMETER CONDITIONS NOTES MIN MAX UNIT SUB-GROUPSVol Logical"0"OutputVoltage Vcc+=30V,Vcc-=Gnd,Rl=10K Ohms35mV4,5,6Vcc+=30V,Vcc-=Gnd,Iol=5mA1.5V4,5,6Vcc+=4.5V,Vcc-=Gnd,Iol=2uA0.4V4,5,6Voh Logical"1"OutputVoltage Vcc+=30V,Vcc-=Gnd,Ioh=-10mA27V4,5,6Vcc+=4.5V,Vcc-=Gnd,Ioh=-10mA2.4V4,5,6Avs+Voltage Gain Vcc+=30V,Vcc-=Gnd,1V≤Vo≤26V,Rl=10K Ohms50V/mV425V/mV5,6 Vcc+=30V,Vcc-=Gnd,5V≤Vo≤20V,Rl=2K Ohms50V/mV425V/mV5,6Avs Voltage Gain Vcc+=5V,Vcc-=Gnd,1V≤Vo≤2.5V,Rl=10K Ohms10V/mV4,5,6Vcc+=5V,Vcc-=Gnd,1V≤Vo≤2.5V,Rl=2K Ohms10V/mV4,5,6+Vop Maximum OutputVoltage Swing Vcc+=30V,Vcc-=Gnd,Vo=+30V,Rl=10K Ohms27V4,5,6Vcc+=30V,Vcc-=Gnd,Vo=+30V,Rl=2K Ohms26V4,5,6TR(tr)Transient Response:Rise TimeVcc+=30V,Vcc-=Gnd1uS7,8A,8BTR(os)Transient Response:OvershootVcc+=30V,Vcc-=Gnd50%7,8A,8B±Sr Slew Rate:Rise Vcc+=30V,Vcc-=Gnd0.1V/uS7,8A,8B Slew Rate:Fall Vcc+=30V,Vcc-=Gnd0.1V/uS7,8A,8BLM124A/LM124QML9LM124A RAD HARD —AC Electrical Characteristics(Note 10)(The following conditions apply to all the following parameters,unless otherwise specified.)AC:+Vcc =30V,-Vcc =0VSYMBOL PARAMETER CONDITIONSNOTESMINMAX UNIT SUB-GROUPS NI(BB)Noise Broadband +Vcc =15V,-Vcc =-15V,BW =10Hz to 5KHz 15uVrm s 7NI(PC)Noise Popcorn+Vcc =15V,-Vcc =-15V,Rs =20K Ohms,BW =10Hz to 5KHz 50uVpK7Cs Channel Separation +Vcc =30V,-Vcc =Gnd,Rl =2K Ohms80dB 7Rl =2K Ohms,Vin =1V and 16V,A to B 80dB 7Rl =2K Ohms,Vin =1V and 16V,A to C 80dB 7Rl =2K Ohms,Vin =1V and 16V,A to D 80dB 7Rl =2K Ohms,Vin =1V and 16V,B to A 80dB 7Rl =2K Ohms,Vin =1V and 16V,B to C 80dB 7Rl =2K Ohms,Vin =1V and 16V,B to D 80dB 7Rl =2K Ohms,Vin =1V and 16V,C to A 80dB 7Rl =2K Ohms,Vin =1V and 16V,C to B 80dB 7Rl =2K Ohms,Vin =1V and 16V,C to D 80dB 7Rl =2K Ohms,Vin =1V and 16V,D to A 80dB 7Rl =2K Ohms,Vin =1V and 16V,D to B 80dB 7Rl =2K Ohms,Vin =1V and 16V,D to C80dB7L M 124A /L M 124Q M L 10LM124A/LM124QML LM124A RAD HARD—DC Drift Values(Note10)(The following conditions apply to all the following parameters,unless otherwise specified.)DC:"Delta calculationsperformedon QMLV devices at group B,subgroup5only"SYMBOL PARAMETER CONDITIONS NOTES MIN MAX UNIT SUB-GROUPSVio Input Offset Voltage Vcc+=30V,Vcc-=Gnd,-0.50.5mV1Vcm=-15V±Iib Input Bias Current Vcc+=30V,Vcc-=Gnd,-1010nA1Vcm=-15VElectrical Characteristics—POST RADIATION LIMITS+25˚C(Note10)(The following conditions apply to all the following parameters,unless otherwise specified.)All voltages referenced to device ground.SYMBOL PARAMETER CONDITIONS NOTES MIN MAX UNIT SUB-GROUPS(Note10)-2.5 2.5mV1Vio Input Offset Voltage Vcc+=30V,Vcc-=Gnd,Vcm=-15VVcc+=2V,Vcc-=-28V,(Note10)-2.5 2.5mV1Vcm=13V(Note10)-2.5 2.5mV1Vcc+=5V,Vcc-=GND,Vcm=-1.4V(Note10)-2.5 2.5mV1Vcc+=2.5V,Vcc-=-2.5,Vcm=1.1VIio Input Offset Current Vcc+=30V,Vcc-=GND,(Note10)-1515nA1Vcm=-15V(Note10)-1515nA1Vcc+=2V,Vcc-=-28V,Vcm=13VVcc+=5V,Vcc-=GND,(Note10)-1515nA1Vcm=-1.4V(Note10)-1515nA1Vcc+=2.5V,Vcc-=-2.5V,Vcm=1.1V±Iib Input Bias Current Vcc+=30V,Vcc-=GND,(Note10)-75+0.1nA1Vcm=-15V(Note10)-75+0.1nA1Vcc+=2V,Vcc-=-28V,Vcm=13VVcc+=5V,Vcc-=GND,(Note10)-75+0.1nA1Vcm=-1.4V(Note10)-75+0.1nA1Vcc+=2.5V,Vcc-=-2.5V,Vcm=1.1VAvs+Voltage Gain Vcc+=30V,Vcc-=GND,(Note10)40V/mV41V≤Vo≤26V,Rl=10K Ohms(Note10)40V/mV4Vcc+=30V,Vcc-=GND,5V≤Vo≤20V,Rl=2K OhmsNote6:Guaranteed by Vio tests.Note7:Datalog reading in K=V/mVNote8:Guaranteed,not testedNote9:Calculated parametersNote10:Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table.These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect.Radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in MIL-STD-883,Method1019Typical Performance CharacteristicsInput Voltage RangeInput Current2010803420108035Supply Current Voltage Gain2010803620108037Open Loop FrequencyResponse Common Mode RejectionRatio2010803820108039L M 124A /L M 124Q M LTypical Performance Characteristics(Continued)Voltage Follower PulseResponseVoltage Follower PulseResponse(Small Signal) 2010804020108041Large Signal FrequencyResponseOutput CharacteristicsCurrent Sourcing 2010804220108043Output CharacteristicsCurrent Sinking Current Limiting2010804420108045LM124A/LM124QMLApplication HintsThe LM124series are op amps which operate with only a single power supply voltage,have true-differential inputs,and remain in the linear mode with an input common-mode voltage of 0V DC .These amplifiers operate over a wide range of power supply voltage with little change in performance characteristics.At 25˚C amplifier operation is possible down to a minimum supply voltage of 2.3V DC .The pinouts of the package have been designed to simplify PC board layouts.Inverting inputs are adjacent to outputs for all of the amplifiers and the outputs have also been placed at the corners of the package (pins 1,7,8,and 14).Precautions should be taken to insure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a test socket as an unlimited current surge through the result-ing forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit.Large differential input voltages can be easily accommo-dated and,as input differential voltage protection diodes are not needed,no large input currents result from large differ-ential input voltages.The differential input voltage may be larger than V +without damaging the device.Protection should be provided to prevent the input voltages from going negative more than −0.3V DC (at 25˚C).An input clamp diode with a resistor to the IC input terminal can be used.To reduce the power supply drain,the amplifiers have a class A output stage for small signal levels which converts to class B in a large signal mode.This allows the amplifiers to both source and sink large output currents.Therefore both NPN and PNP external current boost transistors can be used to extend the power capability of the basic amplifiers.The output voltage needs to raise approximately 1diode drop above ground to bias the on-chip vertical PNP transistor for output current sinking applications.For ac applications,where the load is capacitively coupled to the output of the amplifier,a resistor should be used,from the output of the amplifier to ground to increase the class A bias current and prevent crossover distortion.Where the load is directly coupled,as in dc applications,there is no crossover distortion.Capacitive loads which are applied directly to the output of the amplifier reduce the loop stability margin.Values of 50pF can be accommodated using the worst-case non-inverting unity gain rge closed loop gains or resistive isolation should be used if larger load capacitance must be driven by the amplifier.The bias network of the LM124establishes a drain current which is independent of the magnitude of the power supply voltage over the range of from 3V DC to 30V DC .Output short circuits either to ground or to the positive power supply should be of short time duration.Units can be de-stroyed,not as a result of the short circuit current causing metal fusing,but rather due to the large increase in IC chip dissipation which will cause eventual failure due to exces-sive junction temperatures.Putting direct short-circuits on more than one amplifier at a time will increase the total IC power dissipation to destructive levels,if not properly pro-tected with external dissipation limiting resistors in series with the output leads of the amplifiers.The larger value of output source current which is available at 25˚C provides a larger output current capability at elevated temperatures (see typical performance characteristics)than a standard IC op amp.The circuits presented in the section on typical applications emphasize operation on only a single power supply voltage.If complementary power supplies are available,all of the standard op amp circuits can be used.In general,introduc-ing a pseudo-ground (a bias voltage reference of V +/2)will allow operation above and below this value in single power supply systems.Many application circuits are shown which take advantage of the wide input common-mode voltage range which includes ground.In most cases,input biasing is not required and input voltages which range to ground can easily be accommodated.L M 124A /L M 124Q M LTypical Single-Supply Applications(V+=5.0V DC)Non-Inverting DC Gain(0V Input=0V Output)20108005 *R not needed due to temperature independent I INDC Summing Amplifier(V IN’S≥0V DC and V O≥V DC)Power Amplifier20108006 Where:V0=V1+V2−V3−V4(V1+V2)≥(V3+V4)to keep V O>0V DC20108007V0=0V DC for V IN=0V DCA V=10LM124A/LM124QMLTypical Single-Supply Applications (V +=5.0V DC )(Continued)LED Driver“BI-QUAD”RC Active Bandpass Filter2010800820108009f o =1kHz Q =50A V =100(40dB)Fixed Current Sources Lamp Driver2010801020108011L M 124A /L M 124Q M LTypical Single-Supply Applications(V+=5.0V DC)(Continued)Current Monitor20108012*(Increase R1for I L small)Driving TTL20108013Voltage Follower20108014Pulse Generator20108015Squarewave Oscillator20108016Pulse Generator20108017LM124A/LM124QMLTypical Single-Supply Applications (V +=5.0V DC )(Continued)High Compliance Current Sink20108018I O =1amp/volt V IN (Increase R E for I o small)Low Drift Peak Detector20108019L M 124A /L M 124Q M LTypical Single-Supply Applications (V +=5.0V DC )(Continued)Comparator with HysteresisGround Referencing a Differential Input Signal2010802020108021V O =V RVoltage Controlled Oscillator Circuit20108022*Wide control voltage range:0V DC ≤V C ≤2(V +−1.5V DC )Photo Voltaic-Cell Amplifier20108023LM124A/LM124QMLTypical Single-Supply Applications (V +=5.0V DC )(Continued)AC Coupled Inverting Amplifier20108024AC Coupled Non-Inverting Amplifier20108025L M 124A /L M 124Q M LTypical Single-Supply Applications (V +=5.0V DC )(Continued)DC Coupled Low-Pass RC Active Filter20108026f O =1kHz Q =1A V =2High Input Z,DC Differential Amplifier20108027LM124A/LM124QML21Typical Single-Supply Applications (V +=5.0V DC )(Continued)High Input Z Adjustable-Gain DC Instrumentation Amplifier20108028Using Symmetrical Amplifiers to Reduce Input Current (General Concept)20108029Bridge Current Amplifier20108030L M 124A /L M 124Q M L 22LM124A/LM124QMLTypical Single-Supply Applications(V+=5.0V)(Continued)DCBandpass Active Filter Array20108031f O=1kHzQ=2523Revision History SectionDateReleased RevisionSectionOriginator Changes9–2–04ANew Release,Corporate formatR.Malone3MDS data sheets converted into one Corp.data sheet format.MNLM124-X,Rev.1A2,MNLM124A-X,Rev.1A3and MRLM124A-X-RH,Rev.5A0.MDS data sheets will be archived.01/27/05BConnection Diagrams,Quality Conformance Inspection Section,and Physical Dimensions drawingsR.MaloneAdded E package Connection Diagram.Changed verbiage under Quality Conformance Title,and UpdatedRevisions for the Marketing Drawings.L M 124A /L M 124Q M L 24Physical Dimensionsinches (millimeters)unless otherwise notedSAMPLE TEXT Ceramic Dual-In-Line Package (J)NS Package Number J14ASAMPLE TEXT 20Pin Leadless Chip Carrier,Type C (E)NS Package Number E20ALM124A/LM124QML25Physical Dimensionsinches (millimeters)unless otherwise noted (Continued)SAMPLE TEXT Ceramic Flatpak PackageNS Package Number W14BSAMPLE TEXT 14-Pin Ceramic Package (WG)NS Package Number WG14AL M 124A /L M 124Q M L 26NotesNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.For the most current product information visit us at .LIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systemswhich,(a)are intended for surgical implant into the body,or(b)support or sustain life,and whose failure to perform whenproperly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life supportdevice or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.BANNED SUBSTANCE COMPLIANCENational Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification(CSP-9-111C2)and the Banned Substances and Materials of Interest Specification(CSP-9-111S2)and contain no‘‘Banned Substances’’as defined in CSP-9-111S2.National Semiconductor Americas CustomerSupport CenterEmail:new.feedback@ Tel:1-800-272-9959National SemiconductorEurope Customer Support CenterFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)6995086208English Tel:+44(0)8702402171Français Tel:+33(0)141918790National SemiconductorAsia Pacific CustomerSupport CenterEmail:ap.support@National SemiconductorJapan Customer Support CenterFax:81-3-5639-7507Email:jpn.feedback@Tel:81-3-5639-7560 LM124A/LM124QML Low Power Quad Operational Amplifiers。

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PACKAGING INFORMATIONOrderableDevice Status (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)5962-7704301VCAACTIVE CDIP J 141TBD A42SNPB N /A for Pkg Type 77043012A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type7704301CA ACTIVE CDIP J 141TBD A42SNPB N /A for Pkg Type 7704301DA ACTIVE CFP W 141TBD A42SNPB N /A for Pkg Type 77043022A ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type7704302CA ACTIVE CDIP J 141TBD A42SNPB N /A for Pkg Type JM38510/11005BCAACTIVE CDIP J 141TBD A42SNPB N /A for Pkg Type LM124ADR OBSOLETE SOIC D 14TBD Call TI Call TILM124AFKB ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg TypeLM124AJ ACTIVE CDIP J 141TBD A42SNPB N /A for Pkg Type LM124AJB ACTIVE CDIP J 141TBD A42SNPB N /A for Pkg Type LM124D ACTIVE SOIC D 1450TBD CU NIPDAU Level-3-245C-168HR LM124DG4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM124DR ACTIVE SOIC D 142500TBDCU NIPDAU Level-3-245C-168HR LM124DRG4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIMLM124FKB ACTIVE LCCC FK 201TBD POST-PLATE N /A for Pkg Type LM124J ACTIVE CDIP J 141TBD A42SNPB N /A for Pkg Type LM124JB ACTIVE CDIP J 141TBD A42SNPB N /A for Pkg Type LM124N OBSOLETE PDIP N 14TBD Call TI Call TILM124W ACTIVE CFP W 141TBD A42SNPB N /A for Pkg Type LM124WB ACTIVE CFP W 141TBD A42SNPB N /A for Pkg Type LM224AD ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224ADE4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224ADG4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224ADR ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224ADRE4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224ADRG4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224AN ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM224ANE4ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM224D ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224DE4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224DG4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224DRACTIVESOICD142500Green (RoHS &CU NIPDAULevel-1-260C-UNLIMPACKAGE OPTION ADDENDUM9-Oct-2007Addendum-Page 1OrderableDeviceStatus (1)Package Type Package DrawingPins Package QtyEco Plan (2)Lead/Ball FinishMSL Peak Temp (3)no Sb/Br)LM224DRE4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224DRG4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KAD ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KADE4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KADG4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KADR ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KADRE4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KADRG4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KAN ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM224KANE4ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM224KD ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KDE4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KDG4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KDR ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KDRE4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KDRG4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM224KN ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM224KNE4ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM224N ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM224NE4ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM2902D ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902DE4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902DG4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902DR ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902DRE4ACTIVESOICD142500Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIM9-Oct-2007OrderableDevice Status (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)LM2902DRG4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KAVQDR NRND SOIC D 142500Pb-Free (RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIM LM2902KAVQDRG4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KAVQPWR ACTIVE TSSOP PW 142000TBDCU NIPDAU Level-1-250C-UNLIM LM2902KAVQPWRG4ACTIVE TSSOP PW 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KD ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDB ACTIVE SSOP DB 1480Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDBE4ACTIVE SSOP DB 1480Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDBG4ACTIVE SSOP DB 1480Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDBR ACTIVE SSOP DB 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDBRE4ACTIVE SSOP DB 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDBRG4ACTIVE SSOP DB 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDE4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDG4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDR ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDRE4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KDRG4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KN ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM2902KNE4ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM2902KNSR ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KNSRE4ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KNSRG4ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KPW ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KPWE4ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KPWG4ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KPWRACTIVETSSOPPW142000Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIM9-Oct-2007OrderableDevice Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)LM2902KPWRE4ACTIVE TSSOP PW 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KPWRG4ACTIVE TSSOP PW 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KVQDR NRND SOIC D 142500Pb-Free (RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIM LM2902KVQDRG4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902KVQPWR ACTIVE TSSOP PW 142000TBDCU NIPDAU Level-1-250C-UNLIM LM2902KVQPWRG4ACTIVE TSSOP PW 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902N ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM2902NE4ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM2902NSR ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902NSRG4ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902PW ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902PWE4ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902PWG4ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902PWLE OBSOLETE TSSOP PW 14TBDCall TI Call TILM2902PWR ACTIVE TSSOP PW 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902PWRE4ACTIVE TSSOP PW 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902PWRG4ACTIVE TSSOP PW 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2902QN OBSOLETE PDIP N 14TBD Call TI Call TILM324AD ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324ADBLE OBSOLETE SSOP DB 14TBDCall TI Call TILM324ADBR ACTIVE SSOP DB 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324ADBRE4ACTIVE SSOP DB 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324ADBRG4ACTIVE SSOP DB 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324ADE4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324ADG4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324ADR ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324ADRE4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324ADRG4ACTIVESOICD142500Green (RoHS &CU NIPDAULevel-1-260C-UNLIM9-Oct-2007Orderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)no Sb/Br)LM324AN ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeLM324ANE4ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeLM324ANSR ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324ANSRE4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324ANSRG4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324APW ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324APWE4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324APWG4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324APWLE OBSOLETE TSSOP PW14TBD Call TI Call TILM324APWR ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324APWRE4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324APWRG4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324D ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324DE4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324DG4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324DR ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324DRE4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324DRG4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324KAD ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324KADE4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324KADG4ACTIVE SOIC D1450Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324KADR ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324KADRE4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324KADRG4ACTIVE SOIC D142500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324KAN ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeLM324KANE4ACTIVE PDIP N1425Pb-Free CU NIPDAU N/A for Pkg Type 9-Oct-2007OrderableDeviceStatus (1)Package Type Package Drawing Pins Package QtyEco Plan (2)Lead/Ball FinishMSL Peak Temp (3)(RoHS)LM324KANS PREVIEW SO NS 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KANSR ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KANSRE4ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KANSRG4ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KAPW ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KAPWE4ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KAPWG4ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KAPWR ACTIVE TSSOP PW 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KAPWRE4ACTIVE TSSOP PW 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KAPWRG4ACTIVE TSSOP PW 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KD ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KDE4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KDG4ACTIVE SOIC D 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KDR ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KDRE4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KDRG4ACTIVE SOIC D 142500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KN ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM324KNE4ACTIVE PDIP N 1425Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type LM324KNS PREVIEW SO NS 1450Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KNSR ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KNSRE4ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KNSRG4ACTIVE SO NS 142000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KPW ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KPWE4ACTIVE TSSOP PW 1490Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324KPWG4ACTIVETSSOPPW1490Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIM9-Oct-2007Orderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)LM324KPWR ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324KPWRE4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324KPWRG4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324N ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeLM324NE4ACTIVE PDIP N1425Pb-Free(RoHS)CU NIPDAU N/A for Pkg TypeLM324NSR ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324NSRE4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324NSRG4ACTIVE SO NS142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324PW ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324PWE4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324PWG4ACTIVE TSSOP PW1490Green(RoHS&no Sb/Br)CU NIPDAULevel-1-260C-UNLIMLM324PWLE OBSOLETE TSSOP PW14TBD Call TI Call TILM324PWR ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324PWRE4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM324PWRG4ACTIVE TSSOP PW142000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM324Y OBSOLETE DIESALE Y0TBD Call TI Call TI(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free(RoHS Exempt):This component has a RoHS exemption for either1)lead-based flip-chip solder bumps used between the die and package,or2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free(RoHS compatible)as defined above.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.9-Oct-2007Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annualbasis.9-Oct-2007TAPE AND REEL BOXINFORMATIONDevicePackage Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant LM224ADR D 14SITE 4133016 6.59.0 2.1816Q1LM224DR D 14SITE 4133016 6.59.0 2.1816Q1LM224KADR D 14SITE 4133016 6.59.0 2.1816Q1LM224KDR D 14SITE 4133016 6.59.0 2.1816Q1LM2902DR D 14SITE 2733016 6.59.0 2.1816Q1LM2902DR D 14SITE 4133016 6.59.0 2.1816Q1LM2902KDBR DB 14SITE 41330168.2 6.6 2.51216Q1LM2902KDR D 14SITE 4133016 6.59.0 2.1816Q1LM2902KNSR NS 14SITE 41330168.210.5 2.51216Q1LM2902KPWR PW 14SITE 41330127.0 5.6 1.6812Q1LM2902NSR NS 14SITE 41330168.210.5 2.51216Q1LM2902PWR PW 14SITE 41330127.0 5.6 1.6812Q1LM324ADBR DB 14SITE 41330168.2 6.6 2.51216Q1LM324ADR D 14SITE 4133016 6.59.0 2.1816Q1LM324ANSR NS 14SITE 41330168.210.5 2.51216Q1LM324APWR PW 14SITE 41330127.0 5.6 1.6812Q1LM324DR D 14SITE 2733016 6.59.0 2.1816Q1LM324DR D 14SITE 4133016 6.59.0 2.1816Q1LM324KADRD14SITE 41330166.59.02.1816Q14-Oct-2007DevicePackage Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant LM324KANSR NS 14SITE 41330168.210.5 2.51216Q1LM324KAPWR PW 14SITE 41330127.0 5.6 1.6812Q1LM324KDR D 14SITE 4133016 6.59.0 2.1816Q1LM324KNSR NS 14SITE 41330168.210.5 2.51216Q1LM324KPWR PW 14SITE 41330127.0 5.6 1.6812Q1LM324NSR NS 14SITE 41330168.210.52.51216Q1LM324PWRPW14SITE 41330127.05.61.6812Q1Device PackagePins Site Length (mm)Width (mm)Height (mm)LM224ADR D 14SITE 41346.0346.033.0LM224DR D 14SITE 41346.0346.033.0LM224KADR D 14SITE 41346.0346.033.0LM224KDR D 14SITE 41346.0346.033.0LM2902DR D 14SITE 27342.9336.628.58LM2902DR D 14SITE 41346.0346.033.0LM2902KDBR DB 14SITE 41346.0346.033.0LM2902KDR D 14SITE 41346.0346.033.0LM2902KNSR NS 14SITE 41346.0346.033.0LM2902KPWRPW14SITE 41346.0346.029.04-Oct-2007DevicePackage Pins Site Length (mm)Width (mm)Height (mm)LM2902NSR NS 14SITE 41346.0346.033.0LM2902PWR PW 14SITE 41346.0346.029.0LM324ADBR DB 14SITE 41346.0346.033.0LM324ADR D 14SITE 41346.0346.033.0LM324ANSR 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四运算放大器芯片的中文应用资料LM124/LM224/LM324是四运放集成电路，它采用14管脚双列直插塑料（陶瓷）封装，外形如图所示。

它的内部包含四组形式完全相同的运算放大器，除电源共用外，四组运放相互独立。

每一组运算放大器可用图1所示的符号来表示，它有5个引出脚，其中“+”、“-”为两个信号输入端，“V+”、“V-”为正、负电源端，“Vo”为输出端。

两个信号输入端中，Vi-（-）为反相输入端，表示运放输出端Vo的信号与该输入端的相位相反；Vi+（+）为同相输入端，表示运放输出端Vo的信号与该输入端的相位相同。

LM124/LM224/LM324的引脚排列见图2。

图一图二lm324功能引脚图图3 LM324/LM124/LM224集成电路内部电路图1/4主要参数：参数名称测试条件最小典型最大单位输入失调电压U0≈1.4V RS=0 - 2.07.0mV输入失调电流 - - 5.050nA输入偏置电流 - -45250nA大信号电压增益U+=15V，R L=5kΩ 88k100k --电源电流U+=30V，U o=0，R L=∞ 1.5 3.0 -mA 共模抑制比R s≤10kΩ6570 -dB极限参数：LM124为陶瓷封装符号参数LM124 LM224 LM324 单位Vcc Supply Voltage 电源电压±16 or 32 V Vi Input Voltage 输入电压-0.3 to +32 VVid Differential InputVoltage -(*) 差分输入电压+32 +32 +32 VPtot PowerDissipation功耗后缀NSuffix500 500 500mW后缀DSuffix-400 400-Output Short-circuitDuration -(note 1)Infinite-Iin Input Current (note 6)输入电流50 50 50 mAToper Operating Free AirTemperature Range 工作温度-55 to+125-40 to+1050 to +70 ℃Tstg Storage TemperatureRange 储存温度范围-65 to+150-65 to+150-65 to+150℃由于LM124/LM224/LM324四运放电路具有电源电压范围宽，静态功耗小，可单电源使用，价格低廉等优点，因此被广泛应用在各种电路中。

LM124应用原理
/d/file/jicu/changsi/2009-01-02/88be934461598563ff1bc07e5a09ac1f.jpg LM124/LM224/LM324四运算放大器芯片的中文应用资料
LM124/LM224/LM324是四运放集成电路，它采用14管脚双列直插塑料（陶瓷）封装，外形如图所示。

它的内部包含四组形式完全相同的运算放大器，除电源共用外，四组运放相互独立。

每一组运算放大器可用图1所示的符号来表示，它有5个引出脚，其中“+”、“-”为两个信号输入端，“V+”、“V-”为正、负电源端，“Vo”为输出端。

两个信号输入端中，Vi-（-）为反相输入端，表示运放输出端Vo的信号与该输入端的相位相反；Vi+（+）为同相输入端，表示运放输出端Vo的信号与该输入端的相位相同。

LM124/LM224/LM324的引脚排列见图2。

图一图二lm324功能引脚图
图3 LM324/LM124/LM224集成电路内部电路图1/4。

LM系列芯片大全：LM12 80W OPERATIONAL AMPLIFIER 80瓦运算放大器LM124 LM224 LM324 LM2902 Low Power Quad Operational Amplifier 低电压双路运算放大器LM324 Low Power Quad Operational Amplifier 低电压双路运算放大器LM129 LM329 Precision Reference 精密电压基准芯片LM135 LM235 LM335 精密温度传感器芯片LM1458 LM1558 Dual Operational Amplifier 双运算放大器LM158 LM258 LM358 LM2904 Low Power Dual Operational Amplifier 低压双运算放大器LM18293 Four Channel Push-Pull Driver 四通道推拉驱动器LM1868 AM/FM Radio System 调幅/调频收音机芯片LM1951 Solid State 1 Amp Switch 1安培固态开关LM2574 Simple Switcher 0.5A Step-Down Voltage Regulator 0.5A降阶式电压调节器LM1575 LM2575 1A Step-Down Voltage Regulator 1A 降阶式电压调节器LM2576 3A Step-Down Voltage Regulator 3A 降阶式电压调节器LM1577 LM2577 Simple Switch Step-Down Voltage Regulator 降阶式电压调节器LM2587 Simple Switch 5A Flyback Regulator 5A 返馈开关式电压调节器LM1893 LM2893 Carrier Current Transceiver 载体电流收发器LM193 LM293 LM393 LM2903 Low Power Low Offset Voltage Dual Comparator 双路低压低漂移比较器LM2907 LM2917 Frequency to Voltage Converter 频率电压转换器LM101A LM201A LM301A Operational Amplifiers 运算放大器芯片LM3045 LM3046 LM3086 Transistor Array 晶体管阵列LM111 LM211 LM311 Voltage Comparator 电压比较器LM117 LM317 3-Terminal Adjustable Regulator 三端可调式稳压器LM118 LM218 LM318 Operational Amplifier 运算放大器LM133 LM333 3A Adjustable Negative Regulator 3安培可调负电压调节器LM137 LM337 3-Terminal Adjustable Negative Regulator 可调式三端负压稳压器LM34 Precision Fahrenheit Temperature Sensor 精密华氏温度传感器LM342 3-Terminal Positive Regulator 三端正压稳压器LM148 LM248 LM348 / LM149 LM349 双LM741运算放大器LM35 Precision Centigrade Temperature Sensors 精密摄氏温度传感器LM158 LM258 LM358 LM2904 Low Power Dual Operational Amplifiers 低压双运算放大器LM150 LM350 3A Adjustable Regulator 3安培可调式电压调节器LM380 2.5W Audio Amplifier 2.5瓦音频放大器LM386 Low Voltage Audio Power Amplifier 低压音频功率放大器LM3886 High-Performance 68W Audio Power Amplifier With Mute 高性能68瓦音频功率放大器/带静音LM555 LM555C Timer Circuit 时基发生器电路LM556 LM556C Timer Circuit 双时基发生器电路LM565 Phase Locked Loop 相位跟随器LM567 Tone Decoder 音频译码器LM621 BrushLess Motor Commutator 无刷电机换向器LM628 LM629 Precision Motion Controller 精密位移控制器LM675 Power Operational Amplifier 功率运算放大器LM723 Voltage Regulator 电压调节器LM741 Operational Amplifier 运算放大器LM7805 LM78xx 系列稳压器LM7812 LM78xx 系列稳压器LM7815 LM78xx 系列稳压器LM78L00 3-Terminal Positive Voltage Regulator 三端正压调节器LM78L05 3-Terminal Positive Voltage Regulator 三端正压调节器LM78L09 3-Terminal Positive Voltage Regulator 三端正压调节器LM78L12 3-Terminal Positive Voltage Regulator 三端正压调节器LM78L15 3-Terminal Positive Voltage Regulator 三端正压调节器LM78L62 3-Terminal Positive Voltage Regulator 三端正压调节器LM78L82 3-Terminal Positive Voltage Regulator 三端正压调节器LM340 LM78Mxx Series 3-Terminal Positive Regulator 三端正压稳压器LM7905 3-Terminal Nagative Voltage Regulator 三端负压调节器LM7912 3-Terminal Nagative Voltage Regulator 三端负压调节器LM7915 3-Terminal Nagative Voltage Regulator 三端负压调节器LM79Mxx 3-Terminal Nagative Voltage Regulator 三端负压调节器LF147 LF347 Wide Bandwidth Quad JFET input operational amplifier 宽带J型场效应输入运算放大器LF351 Wide Bandwidth Quad JFET input operational amplifier 宽带J型场效应输入运算放大器LF353 Wide Bandwidth Quad JFET input operational amplifier 宽带J型场效应输入运算放大器LF444 Quad Low Power JFET input operational amplifier 双低压J型场效应输入运算放大器。

4路差分或7路单独24位ADC模块使用说明
ADS1248芯片支持3.3V或5V电平，所以模块使用了一颗5V 转3.3V芯片。

也可以直接使用5V或3.3V供电。

模块的模拟电压和数字电平通过右边的电压选择焊点决定。

芯片的7根数据控制线全部引出，其中模块的/CS引脚直接接地了。

/DRSY引脚必须接到单片机的外部中断口。

内部参考电压为2.040V，可通过REF点测量。

内部参考通过程序打开。

也可以使用外部参考电压芯片，模块配套的外部电压芯片可以使REF31XX系列的。

程控电流输出口是通过程序控制芯片输出固定大小的电流用于
外部传感器的供电，详见参考手册。

芯片供电分为模拟供电和数字供电。

通过焊点选择，不同的模拟供电所带来的测量范围是不同的，请看参考手册。

模块测试：我在测试模块时使用的方法是使用REF点输出的2.040V电压经过滑动变阻器分压送到相应ADC输入口。

测量的精度达到20位左右，也就是最后的4位数据是跳动的。

一般使用时可以直接作为16位ADC使用，这样测量的最小值也能达到0.03mV，足够使用了。

直流电机无级调整电路板的方法及原理图时间：2010-04-21 23:14:51 来源：电子发烧友作者：直流电机无级调速电路板很贵，作者在维修一台包装机时得到一块直流电机调速板，经测绘并制作成功。

这块电路板电路简单，成本不高，制作容易.直流电机调速板电路及原理分析：220V交流电经变压器T降压，P2整流，V5稳压得到9V直流电压，为四运放集成芯片LM324(点击查看:四运算放大器芯片LM124/LM224/LM324中文资料)提供工作电源。

P1整流输出是提供直流电机励磁电源。

P4整流由可控硅控制得到0－200V的直流，接电机电枢，实现电机无级调速。

R1，C2是阻容元件，保护V1可控硅。

R3是串在电枢电路中作电流取样，当电机过载时，R3上电压增大，经D1整流，C3稳压，W1调节后进入LM324的12脚，与13脚比较从14脚输出到1脚，触发V7可控硅，D4 LED红色发光管亮，6脚电压拉高使V1可控硅不能触发，保护电机。

电机过载电流大小由W1调节。

市电过零检测，移相控制是由R5、R6降压，P3整流，经4N35隔离得到一个脉动直流进入14脚，从8脚到5脚输出是脉冲波，调节W2电位器即调节6脚的电压大小，可以改变脉冲的宽度，脉冲的中心与交流电过零时刻重合，使得双向可控硅很好地过零导通，D4是过载指示，D3是工作指示，W2是电机速度无级调节电位器。

图直流电机无级调速板电路图PCB电路板器件清单电路制作好后只要元件合格，不用调整就可使用。

我从100W－1000W电机都试过，运行可靠，调节方便，性能优良继电器是一种使用在较低的电压或较小电流的电路上，用来接通或切断较高电压、较大电流的电路的电气元件，也许可以这样说：用来控制较高电压或较大功率的电路的电动开关：给继电器工作线圈一个控制电流，继电器就吸合，对应的触点就接通或断开。

<br>在供电电路中，继电器也被称为接触器。

<br>从驱动继电器工作的电源要求（驱动线包工作电压）来分，一般继电器分交流继电器与直流继电器，分别用于交流电路和直流电路，另外，依据其工作电压的高低，有6、9、12、24、36、110、220、380等不同的工作电压，使用于不同的控制电路上。

LM324中文资料大全LM324系列器件带有真差动输入的四运算放大器。

与单电源应用场合的标准运算放大器相比，它们有一些显著优点。

该四放大器可以工作在低到3.0伏或者高到32伏的电源下，静态电流为MC1741的静态电流的五分之一。

共模输入范围包括负电源，因而消除了在许多应用场合中采用外部偏置元件的必要性。

每一组运算放大器可用图1所示的符号来表示，它有5个引出脚，其中“+”、“-”为两个信号输入端，“V+”、“V-”为正、负电源端，“Vo”为输出端。

两个信号输入端中，Vi-(-)为反相输入端，表示运放输出端Vo的信号与该输入端的位相反;Vi+(+)为同相输入端，表示运放输出端Vo的信号与该输入端的相位相同。

LM324系列由四个独立的，高增益，内部频率补偿运算放大器，其中专为从单电源供电的电压范围经营。

从分裂电源的操作也有可能和低电源电流消耗是独立的电源电压的幅度。

应用领域包括传感器放大器，直流增益模块和所有传统的运算放大器现在可以更容易地在单电源系统中实现的电路。

例如，可直接操作的LM324系列，这是用来在数字系统中，轻松地将提供所需的接口电路，而无需额外的±15V电源标准的5V电源电压。

运放类型:低功率放大器数目:4带宽:1.2MHz针脚数:14工作温度范围:0°C to +70°C封装类型:SOIC3dB带宽增益乘积:1.2MHz变化斜率:0.5V/μs器件标号:324器件标记:LM324AD增益带宽:1.2MHz工作温度最低:0°C工作温度最高:70°C放大器类型:低功耗温度范围:商用电源电压最大:32V电源电压最小:3V芯片标号:324表面安装器件:表面安装输入偏移电压最大:7mV运放特点:高增益频率补偿运算逻辑功能号:324额定电源电压, +:15V1.短路保护输出2.真差动输入级3.可单电源工作：3V-32V4.低偏置电流：最大100nA5.每封装含四个运算放大器。

FEATURES12348765EMIT OUTIN+IN−V CC−V CC+COL OUT BAL/STRB BALANCED PACKAGE (TOP VIEW)DESCRIPTION/ORDERING INFORMATION•Controlled Baseline•Maximum Input Bias Current ...300nA –One Assembly/Test Site,One Fabrication •Maximum Input Offset Current ...70nA Site•Can Operate From Single 5-V Supply•Extended Temperature Performance of –55°C to 125°C•Enhanced Diminishing Manufacturing Sources (DMS)Support•Enhanced Product Change Notification •Qualification Pedigree (1)•Fast Response Times •Strobe Capability(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over anextended temperature range.This includes,but is not limited to,Highly Accelerated Stress Test (HAST)or biased 85/85,temperature cycle,autoclave or unbiased HAST,electromigration,bond intermetallic life,and mold-compound life.Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.The LM211-EP is a single high-speed voltage comparator.This device is designed to operate from a wide range of power-supply voltages,including ±15-V supplies for operational amplifiers and 5-V supplies for logic systems.The output levels are compatible with most TTL and MOS circuits.This comparator is capable of driving lamps or relays and switching voltages up to 50V at 50mA.All inputs and outputs can be isolated from system ground.The outputs can drive loads referenced to ground,V CC+or V CC–.Offset balancing and strobe capabilities are available,and the outputs can be wired-OR connected.If the strobe is low,the output is in the off state,regardless of the differential input.ORDERING INFORMATIONV IO max T APACKAGE (1)ORDERABLE PART NUMBER TOP-SIDE MARKING AT 25°C –40°C to 125°C 3mV SOIC –D Tape and reel LM211QDREP LM211E –55°C to 125°C 3mVSOIC –DTape and reelLM211MDREPLM211M(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at /sc/package.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PRODUCTION DATA information is current as of publication date.Copyright ©2002–2006,Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas Instruments standard warranty.Production processing does not necessarily include testing of all parameters.BAL/STRBCOL OUT IN−IN+BALANCE EMIT OUTAll resistor values shown are nominal.V CC+V CC−EMIT OUT COL OUTSLCS140A–DECEMBER 2002–REVISED MAY 2006FUNCTIONAL BLOCK DIAGRAMSCHEMATIC2Submit Documentation FeedbackAbsolute Maximum Ratings (1)Recommended Operating Conditionsover operating free-air temperature range (unless otherwise noted)MINMAX UNITV CC+18V CC–Supply voltage (2)–18V V CC+–V CC–36V ID Differential input voltage (3)±30V V IInput voltage,either input (2)(4)±15V Voltage from emitter output to V CC–30V Voltage from collector output to V CC–50V Duration of output short circuit (5)10s T J Junction temperature148°C θJA Package thermal impedance (6)97°C/W Lead temperature 1,6mm (1/16in)from case for 10s 260°C T stg Storage temperature range (7)–65150°C (1)Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)All voltage values,unless otherwise noted,are with respect to the midpoint between V CC+and V CC–.(3)Differential voltages are at IN+with respect to IN–.(4)The magnitude of the input voltage must never exceed the magnitude of the supply voltage or ±15V,whichever is less.(5)The output may be shorted to ground or either power supply.(6)The package thermal impedance is calculated in accordance with JESD 51-7.(7)Long-term high–temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction of overall device life.See /ep_quality for additional information on enhanced plastic packaging.MINMAX UNIT V CC+–V CC–Supply voltage3.530V V I Input voltage (|V CC+|≤15V)V CC–+0.5V CC+–1.5V T A Operating free-air temperature range for Q temp –40125°C T AOperating free-air temperature range for M temp–55125°C3Submit Documentation FeedbackElectrical CharacteristicsSwitching CharacteristicsSLCS140A–DECEMBER 2002–REVISED MAY 2006at specified free-air temperatures of Q and M temp ranges,V CC+=±15V (unless otherwise noted)PARAMETERTEST CONDITIONST A (1)MINTYP (2)MAXUNIT 25°C 0.73V IO Input offset voltage (3)mV Full range 425°C 410I IO Input offset current (3)nA Full range 2025°C 75100I IB Input bias current V O =1V to 14V nA Full range 150I IL(S)Low-level strobe current (4)V (strobe)=0.3V,V ID ≤–10mV25°C –3mA Common-mode input 13to 13.8to V ICR Full range V voltage range–14.5–14.7Large-signal differential A VD V O =5V to 35V,R L =1k Ω25°C 40200V/mV voltage amplification I (strobe)=–3mA,V OH =35V,25°C 0.210nA High-level (collector)I OHV ID =5mV output leakage current Full range 0.5µAI OL =50mA,V ID =–5mV 25°C 0.75 1.5Low-level (collector-to-emitter)V OL V V CC+=4.5V,V CC–=0,output voltageFull range 0.230.4I OL =8mA,V ID =–6mV I CC+Supply current from V CC+,output low V ID =–10mV,No load 25°C 5.16mA I CC–Supply current from V CC–,output highV ID =10mV,No load25°C–4.1–5mA(1)Unless otherwise noted,all characteristics are measured with BALANCE and BAL/STRB open and EMIT OUT grounded.Full range is –40°C to 125°C for Q temp and -55°C to 125°C for M temp.(2)All typical values are at T A =25°C.(3)The offset voltages and offset currents given are the maximum values required to drive the collector output up to 14V or down to 1V with a pullup resistor of 7.5k Ωto V CC+.These parameters actually define an error band and take into account the worst-case effects of voltage gain and input impedance.(4)The strobe should not be shorted to ground;it should be current driven at –3mA to –5mA (see Figure 13and Figure 27).V CC+=±15V,T A =25°CPARAMETERTEST CONDITIONSTYP UNIT Response time,low-to-high-level output R C =500Ωto 5V,C L =5pF (1)115ns Response time,high-to-low-level outputR C =500Ωto 5V,C L =5pF (1)165ns(1)The response time specified is for a 100-mV input step with 5-mV overdrive and is the interval between the input step function and the instant when the output crosses 1.4V.4Submit Documentation FeedbackTYPICAL CHARACTERISTICSNOTE A:Condition 1 is with BALANCE and BAL/STRB open.Condition 2 is with BALANCE and BAL/STRB connected to V CC+.−60−40−20204060− I n p u t B i a s C u r r e n t − n A80100120140I I B INPUT BIAS CURRENTvsT A − Free-Air Temperature − °CNOTE A:Condition 1 is with BALANCE and BAL/STRB open.Condition 2 is with BALANCE and BAL/STRB connected to V CC+.−60−40−20204060− I n p u t O f f s e t C u r r e n t − n AINPUT OFFSET CURRENTvsFREE-AIR TEMPERATURE80100120140T A − Free-Air Temperature − °CI I O Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.Figure 1.Figure 2.5Submit Documentation Feedback−1−0.5− O u t p u t V o l t a g e − VVOLTAGE TRANSFER CHARACTERISTICS0.51V O V ID − Differential Input Voltage − mVOutputΩOutput COLLECTOR OUTPUT TRANSFER CHARACTERISTICTEST CIRCUIT FOR FIGURE 3EMITTER OUTPUT TRANSFER CHARACTERISTICTEST CIRCUIT FOR FIGURE 3SLCS140A–DECEMBER 2002–REVISED MAY 2006TYPICAL CHARACTERISTICS (continued)Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.Figure 3.6Submit Documentation Feedbackt − Time − ns D i f f e r e n t i a l I n p u t V o l t a g e− O u t p u t V o l t a g e − VV O OUTPUT RESPONSE FORt − Time − nsOUTPUT RESPONSE FOR D i f f e r e n t i a l I n p u t V o l t a g e− O u t p u tV o l t a g e − VV O V ΩV OTEST CIRCUIT FOR FIGURES 4 AND 5TYPICAL CHARACTERISTICS (continued)Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.Figure 4.Figure 5.7Submit Documentation Feedbackt − Time − s D i f f e r e n t i a l I n p u t V o l t a g e− O u t p u t V o l t a g e − VV O OUTPUT RESPONSE FOR m t − Time − s OUTPUT RESPONSE FORD i f f e r e n t i a l I n p u t V o l t a g e− O u t p u t V o l t a g e − VVO mV V = 15 VΩV OV CC− = −15 VTEST CIRCUIT FOR FIGURES 6 AND 7SLCS140A–DECEMBER 2002–REVISED MAY 2006TYPICAL CHARACTERISTICS (continued)Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.Figure 6.Figure 7.8Submit Documentation FeedbackV O − Output Voltage − V− O u t p u t D i s s i p a t i o n − m WP O OUTPUT CURRENT AND DISSIPATIONvsI O − O u t p u t C u r r e n t a n d D i s s i p a t i on − m AV CC+ − Positive Supply Voltage − VPOSITIVE SUPPLY CURRENTvsI C C +− P o s i t i v e S u p p ly C u r r e n t − m ANEGATIVE SUPPLY CURRENTvsV CC− − Negative Supply Voltage − VI C C −− N e g a t i v e S u p p l y C u r r e n t − m ATYPICAL CHARACTERISTICS (continued)Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.Figure 8.Figure 9.Figure 10.9Submit Documentation FeedbackAPPLICATION INFORMATIONVΩSquare-Wave Output(fanout to two Series 54 gates,or equivalent)VNOTE:If offset balancing is not used, the BALANCE and BAL/STRB pins should be shorted together.SLCS140A–DECEMBER 2002–REVISED MAY 2006Figure 11through Figure 29show various applications for the LM211-EP comparator.Figure 11.100-kHz Free-Running MultivibratorFigure 12.Offset BalancingFigure 13.Strobing10Submit Documentation FeedbackVV CC−ΩOutputΩOutput to TTLInput(see Note A)5 VΩTransducerOutput to TTLLM211-EPDIFFERENTIAL COMPARATOR WITH STROBESSLCS140A–DECEMBER 2002–REVISED MAY 2006APPLICATION INFORMATION (continued)Figure 14.Zero-Crossing DetectorA.Resistor values shown are for a 0-to-30-V logic swing and a 15-V threshold.B.May be added to control speed and reduce susceptibility to noise spikesFigure 15.TTL Interface With High-Level LogicFigure 16.Detector for Magnetic TransducerΩV100 k OutputOutputV Analog Input (see Note A)LM211-EPDIFFERENTIAL COMPARATOR WITH STROBESSLCS140A–DECEMBER 2002–REVISED MAY 2006APPLICATION INFORMATION (continued)Figure 17.100-kHz Crystal OscillatorFigure parator and Solenoid DriverA.Typical input current is 50pA with inputs strobed off.Figure 19.Strobing Both Input and Output Stages SimultaneouslyµFV OutputΩOutput to MOSV CC+ = 5 VInput From TTLLM211-EPDIFFERENTIAL COMPARATOR WITH STROBESSLCS140A–DECEMBER 2002–REVISED MAY 2006APPLICATION INFORMATION (continued)Figure 20.Low-Voltage Adjustable Reference SupplyFigure 21.Zero-Crossing Detector Driving MOS LogicA.Adjust to set clamp levelFigure 22.Precision SquarerTTLOutputFromTTLGateOutput InputV= 15 VOutput InputLM211-EPDIFFERENTIAL COMPARATOR WITH STROBESSLCS140A–DECEMBER2002–REVISED MAY2006APPLICATION INFORMATION(continued)Figure23.Digital Transmission IsolatorFigure24.Positive-Peak DetectorFigure25.Negative-Peak DetectorOutputto TTLLM211-EPDIFFERENTIAL COMPARATOR WITH STROBESSLCS140A–DECEMBER2002–REVISED MAY2006 APPLICATION INFORMATION(continued)A.R1sets the comparison level.At comparison,the photodiode has less than5mV across it,decreasing dark currentby an order of magnitude.Figure26.Precision Photodiode ComparatorA.Transient voltage and inductive kickback protectionFigure27.Relay Driver With StrobeV CC+CC−Output InputCC+InputReferenceLM211-EPDIFFERENTIAL COMPARATOR WITH STROBESSLCS140A–DECEMBER2002–REVISED MAY2006APPLICATION INFORMATION(continued)Figure28.Switching Power AmplifierFigure29.Switching Power AmplifiersPACKAGING INFORMATIONOrderable Device Status (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)LM211MDREP ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM211QDREP ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM V62/03638-01XE ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM V62/03638-02XEACTIVESOICD82500Green (RoHS &no Sb/Br)CU NIPDAULevel-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues totake reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI 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LM124A/LM124QMLLow Power Quad Operational AmplifiersGeneral DescriptionThe LM124/124A consists of four independent,high gain,internally frequency compensated operational amplifiers which were designed specifically to operate from a single power supply over a wide range of voltages.Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage.Application areas include transducer amplifiers,DC gain blocks and all the conventional op amp circuits which now can be more easily implemented in single power supply systems.For example,the LM124/124A can be directly op-erated off of the standard +5Vdc power supply voltage which is used in digital systems and will easily provide the required interface electronics without requiring the additional +15Vdc power supplies.Unique Characteristicsn In the linear mode the input common-mode voltage range includes ground and the output voltage can also swing to ground,even though operated from only a single power supply voltagen The unity gain cross frequency is temperature compensatedn The input bias current is also temperature compensatedAdvantagesn Eliminates need for dual suppliesn Four internally compensated op amps in a single packagen Allows directly sensing near GND and V OUT also goes to GNDn Compatible with all forms of logicn Power drain suitable for battery operationFeaturesn Internally frequency compensated for unity gain n Large DC voltage gain 100dBn Wide bandwidth (unity gain)1MHz (temperature compensated)n Wide power supply range:Single supply 3V to 32Vor dual supplies ±1.5V to ±16Vn Very low supply current drain (700µA)—essentially independent of supply voltage n Low input biasing current 45nA (temperature compensated)n Low input offset voltage 2mV and offset current:5nAn Input common-mode voltage range includes ground n Differential input voltage range equal to the power supply voltagen Large output voltage swing 0V to V +−1.5VOrdering InformationNS PART NUMBER SMD PART NUMBERNS PACKAGE NUMBERPACKAGE DISCRIPTION LM124J/8837704301CA J14A 14LD CERDIPLM124AE/88377043022A E20A 20LD LEADLESS CHIP CARRIER LM124AJ/8837704302CAJ14A 14LD CERDIP LM124AW/883W14B 14LD CERPACK LM124AWG/8837704302XA WG14A 14LD CERAMIC SOIC LM124AJLQMLV 5962L9950401VCA,50k rd(Si)J14A 14LD CERDIP LM124AJRQMLV 5962R9950401VCA,100k rd(Si)J14A 14LD CERDIP LM124AWGLQMLV 5962L9950401VZA,50k rd(Si)WG14A 14LD CERAMIC SOIC LM124AWGRQMLV 5962R9950401VZA,100k rd(Si)WG14A 14LD CERAMIC SOIC LM124AWLQMLV 5962L9950401VDA,50k rd(Si)W14B 14LD CERPACK LM124AWRQMLV5962R9950401VDA,100k rd(Si)W14B14LD CERPACKJanuary 2005LM124A/LM124QML Low Power Quad Operational Amplifiers©2005National Semiconductor Corporation Connection DiagramsLeadless Chip Carrier20108055See NS Package Number E20ADual-In-Line Package20108001Top ViewSee NS Package Number J14A20108033See NS Package Number W14B or WG14AL M 124A /L M 124Q M L 2LM124A/LM124QML Schematic Diagram(Each Amplifier)3Absolute Maximum Ratings (Note 1)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.Supply Voltage,V +32Vdc or +16VdcDifferential Input Voltage 32VdcInput Voltage −0.3Vdc to +32VdcInput Current(V IN <−0.3Vdc)(Note 4)50mAPower Dissipation (Note 2)CERDIP 1260mW CERPACK 700mW LCC1350mW CERAMIC SOIC700mW Output Short-Circuit to GND (One Amplifier)(Note 3)V +≤15Vdc and T A =25˚C ContinuousOperating Temperature Range −55˚C ≤T A ≤+125˚CMaximum Junction Temperature 150˚CStorage Temperature Range−65˚C ≤T A ≤+150˚CLead Temperature (Soldering,10seconds)260˚C Thermal Resistance ThetaJA CERDIP (Still Air)103C/W (500LF/Min Air flow)51C/W CERPACK (Still Air)176C/W (500LF/Min Air flow)116C/W LCC (Still Air)91C/W (500LF/Min Air flow)66C/W CERAMIC SOIC (Still Air)176C/W (500LF/Min Air flow)116C/W ThetaJC CERDIP 19C/W CERPACK 18C/W LCC24C/W CERAMIC SOIC 18C/W Package Weight (Typical)CERDIP TBD CERPACK TBD LCCTBD CERAMIC SOIC 410mg ESD Tolerance (Note 5)250V Note 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.Operating Ratings indicate conditions for which the device is functional,but do not guarantee specific performance limits.For guaranteed specifications and test conditions,see the Electrical Characteristics.The guaranteed specifications apply only for the test conditions listed.Some performance characteristics may degrade when the device is not operated under the listed test conditions.Note 2:The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature),ThetaJA (package junction to ambient thermal resistance),and TA (ambient temperature).The maximum allowable power dissipation at any temperature is Pdmax =(Tjmax -TA)/ThetaJA or the number given in the Absolute Maximum Ratings,whichever is lower.Note 3:Short circuits from the output to V+can cause excessive heating and eventual destruction.When considering short circuits to ground,the maximum output current is approximately 40mA independent of the magnitude of V+.At values of supply voltage in excess of +15Vdc,continuous short-circuits can exceed the power dissipation ratings and cause eventual destruction.Destructive dissipation can result from simultaneous shorts on all amplifiers.Note 4:This input current will only exist when the voltage at any of the input leads is driven negative.It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps.In addition to this diode action,there is also lateral NPN parasitic transistor action on the IC chip.This transistor action can cause the output voltages of the op amps to go to the V+voltage level (or to ground for a large overdrive)for the time duration that an input is driven negative.This is not destructive and normal output states will re-establish when the input voltage,which was negative,again returns to a value greater than -0.3Vdc (at 25C).Note 5:Human body model,1.5k Ωin series with 100pF.L M 124A /L M 124Q M L 4LM124A/LM124QML Quality Conformance InspectionMIL-STD-883,Method5005—Group ASubgroup Description Temp(˚C)1Static tests at+252Static tests at+1253Static tests at-554Dynamic tests at+255Dynamic tests at+1256Dynamic tests at-557Functional tests at+258A Functional tests at+1258B Functional tests at-559Switching tests at+2510Switching tests at+12511Switching tests at-555LM124A 883DC Electrical Characteristics(The following conditions apply to all the following parameters,unless otherwise specified.)All voltages referenced to device ground.SYMBOL PARAMETERCONDITIONSNOTESMINMAX UNIT SUB-GROUPS IccPower Supply Current V+=5V1.2mA 1,2,3V+=30V3.0mA 14.0mA 2,3IsinkOutput Sink CurrentV+=15V,Vout =200mV,+Vin =0mV,-Vin =+65mV 12uA 1V+=15V,Vout =2V,+Vin =0mV,-Vin =+65mV10mA 15mA 2,3Isource Output Source CurrentV+=15V,Vout =2V,+Vin =0mV,-Vin =-65mV -20mA 1-10mA 2,3Ios Short Circuit Current V+=5V,Vout =0V -60mA 1VioInput Offset VoltageV+=30V,Vcm =0V -22mV 1-44mV 2,3V+=30V,Vcm =28.5V -22mV 1V+=30V,Vcm =28V -44mV 2,3V+=5V,Vcm =0V-22mV 1-44mV 2,3CMRRCommon Mode Rejection Ratio V+=30V,Vin =0V to 28.5V 70dB 1±IibInput Bias Current V+=5V,Vcm =0V -5010nA 1-10010nA 2,3Iio Input Offset Current V+=5V,Vcm =0V -1010nA 1-3030nA 2,3PSRR Power Supply Rejection Ratio V+=5V to 30V,Vcm =0V 65dB 1Vcm Common Mode Voltage Range V+=30V(Note 6)28.5V 1(Note 6)28V 2,3Avs Large Signal Gain V+=15V,Rl =2K Ohms,Vo =1V to 11V(Note 7)50V/mV 4(Note 7)25V/mV 5,6VohOutput Voltage High V+=30V,Rl =2K Ohms 26V 4,5,6V+=30V,Rl =10K Ohms27V 4,5,6VolOutput Voltage LowV+=30V,Rl =10K Ohms 40mV 4,5,6V+=30V,Isink =1uA 40mV 4100mV 5,6V+=5V,Rl =10K Ohms20mV 4,5,6Channel Separation Amp to Amp Coupling1KHz,20KHz (Note 8)80dB4L M 124A /L M 124Q M L 6LM124883DC Electrical Characteristics(The following conditions apply to all the following parameters,unless otherwise specified.)All voltages referenced to device ground.SYMBOL PARAMETER CONDITIONS NOTES MIN MAX UNIT SUB-GROUPS Icc Power Supply Current V+=5V 1.2mA1,2,3V+=30V 3.0mA14.0mA2,3Isink Output Sink Current V+=15V,Vout=200mV,+Vin=0mV,-Vin=+65mV12uA1V+=15V,Vout=2V,+Vin=0mV,-Vin=+65mV 10mA15mA2,3Isource Output SourceCurrent V+=15V,Vout=2V,+Vin=0mV,-Vin=-65mV-20mA1-10mA2,3Ios Short Circuit Current V+=5V,Vout=0V-60mA1 Vio Input Offset Voltage V+=30V,Vcm=0V-55mV1-77mV2,3V+=30V,Vcm=28V-55mV1-77mV2,3V+=5V,Vcm=0V-55mV1-77mV2,3V+=30V,Vcm=28.5V-55mV1 CMRR Common ModeRejection RatioV+=30V,Vin=0V to28.5V70dB1 +Iib Input Bias Current V+=5V,Vcm=0V-15010nA1-30010nA2,3 Iio Input Offset Current V+=5V,Vcm=0V-3030nA1-100100nA2,3 PSRR Power SupplyRejection RatioV+=5V to30V,Vcm=0V65dB1Vcm Common ModeVoltage Range V+=30V(Note6)28.5V1(Note6)28V2,3Avs Large Signal Gain V+=15V,Rl=2K Ohms,Vo=1V to11V 50V/mV4 25V/mV5,6Voh Output Voltage High V+=30V,Rl=2K Ohms26V4,5,6V+=30V,Rl=10K Ohms27V4,5,6 Vol Output Voltage Low V+=30V,Rl=10K Ohms40mV4,5,6V+=30V,Isink=1uA40mV4100mV5,6V+=5V,Rl=10K Ohms20mV4,5,6Channel Separation (Amp to Amp Coupling)1KHz,20KHz(Note8)80dB4LM124A/LM124QML7LM124A RAD HARD DC Electrical Characteristics(Note 10)(The following conditions apply to all the following parameters,unless otherwise specified.)All voltages referenced to device ground.SYMBOL PARAMETER CONDITIONSNOTESMIN MAX UNIT SUB-GROUPS VioInput Offset VoltageVcc+=30V,Vcc-=Gnd,Vcm =-15V-22mV 1-44mV 2,3Vcc+=2V,Vcc-=-28V,Vcm =13V-22mV 1-44mV 2,3Vcc+=5V,Vcc-=Gnd,Vcm =-1.4V-22mV 1-44mV 2,3Vcc+=2.5V,Vcc-=-2.5,Vcm =1.1V-22mV 1-44mV 2,3IioInput Offset CurrentVcc+=30V,Vcc-=Gnd,Vcm =-15V-1010nA 1,2-3030nA 3Vcc+=2V,Vcc-=-28V,Vcm =13V-1010nA 1,2-3030nA 3Vcc+=5V,Vcc-=Gnd,Vcm =-1.4V-1010nA 1,2-3030nA 3Vcc+=2.5V,Vcc-=-2.5,Vcm =1.1V-1010nA 1,2-3030nA 3±IibInput Bias CurrentVcc+=30V,Vcc-=Gnd,Vcm =-15V-50+0.1nA 1,2-100+0.1nA 3Vcc+=2V,Vcc-=-28V,Vcm =13V-50+0.1nA 1,2-100+0.1nA 3Vcc+=5V,Vcc-=Gnd,Vcm =-1.4V-50+0.1nA 1,2-100+0.1nA 3Vcc+=2.5V,Vcc-=-2.5,Vcm =1.1V-50+0.1nA 1,2-100+0.1nA 3+PSRR Power Supply Rejection Ratio Vcc-=Gnd,Vcm =-1.4V,5V ≤Vcc ≤30V-100100uV/V 1,2,3CMRR Common Mode Rejection Ratio 76dB 1,2,3Ios+Output Short Circiut CurrentVcc+=30V,Vcc-=Gnd,Vo =25V-70mA 1,2,3IccPower Supply Current Vcc+=30V,Vcc-=Gnd3mA 1,24mA 3Delta Vio/Delta TInput Offset Voltage Temperature Sensitivity+25˚C ≤TA ≤+125˚C,+Vcc =5V,-Vcc =0V,Vcm =-1.4V(Note 9)-3030uV/˚C2-55˚C ≤TA ≤+25˚C,+Vcc =5V,-Vcc =0V,Vcm =-1.4V(Note 9)-3030uV/˚C 3Delta Iio/Delta TInput Offset Current Temperature Sensitivity+25˚C ≤TA ≤+125˚C,+Vcc =5V,-Vcc =0V,Vcm =-1.4V(Note 9)-400400pA/˚C2-55˚C ≤TA ≤+25˚C,+Vcc =5V,-Vcc =0V,Vcm =-1.4V(Note 9)-700700pA/˚C 3L M 124A /L M 124Q M L 8LM124A RAD HARD AC/DC Electrical Characteristics(Note10)(The following conditions apply to all the following parameters,unless otherwise specified.)All voltages referenced to device ground.SYMBOL PARAMETER CONDITIONS NOTES MIN MAX UNIT SUB-GROUPSVol Logical"0"OutputVoltage Vcc+=30V,Vcc-=Gnd,Rl=10K Ohms35mV4,5,6Vcc+=30V,Vcc-=Gnd,Iol=5mA1.5V4,5,6Vcc+=4.5V,Vcc-=Gnd,Iol=2uA0.4V4,5,6Voh Logical"1"OutputVoltage Vcc+=30V,Vcc-=Gnd,Ioh=-10mA27V4,5,6Vcc+=4.5V,Vcc-=Gnd,Ioh=-10mA2.4V4,5,6Avs+Voltage Gain Vcc+=30V,Vcc-=Gnd,1V≤Vo≤26V,Rl=10K Ohms50V/mV425V/mV5,6 Vcc+=30V,Vcc-=Gnd,5V≤Vo≤20V,Rl=2K Ohms50V/mV425V/mV5,6Avs Voltage Gain Vcc+=5V,Vcc-=Gnd,1V≤Vo≤2.5V,Rl=10K Ohms10V/mV4,5,6Vcc+=5V,Vcc-=Gnd,1V≤Vo≤2.5V,Rl=2K Ohms10V/mV4,5,6+Vop Maximum OutputVoltage Swing Vcc+=30V,Vcc-=Gnd,Vo=+30V,Rl=10K Ohms27V4,5,6Vcc+=30V,Vcc-=Gnd,Vo=+30V,Rl=2K Ohms26V4,5,6TR(tr)Transient Response:Rise TimeVcc+=30V,Vcc-=Gnd1uS7,8A,8BTR(os)Transient Response:OvershootVcc+=30V,Vcc-=Gnd50%7,8A,8B±Sr Slew Rate:Rise Vcc+=30V,Vcc-=Gnd0.1V/uS7,8A,8B Slew Rate:Fall Vcc+=30V,Vcc-=Gnd0.1V/uS7,8A,8BLM124A/LM124QML9LM124A RAD HARD —AC Electrical Characteristics(Note 10)(The following conditions apply to all the following parameters,unless otherwise specified.)AC:+Vcc =30V,-Vcc =0VSYMBOL PARAMETER CONDITIONSNOTESMINMAX UNIT SUB-GROUPS NI(BB)Noise Broadband +Vcc =15V,-Vcc =-15V,BW =10Hz to 5KHz 15uVrm s 7NI(PC)Noise Popcorn+Vcc =15V,-Vcc =-15V,Rs =20K Ohms,BW =10Hz to 5KHz 50uVpK7Cs Channel Separation +Vcc =30V,-Vcc =Gnd,Rl =2K Ohms80dB 7Rl =2K Ohms,Vin =1V and 16V,A to B 80dB 7Rl =2K Ohms,Vin =1V and 16V,A to C 80dB 7Rl =2K Ohms,Vin =1V and 16V,A to D 80dB 7Rl =2K Ohms,Vin =1V and 16V,B to A 80dB 7Rl =2K Ohms,Vin =1V and 16V,B to C 80dB 7Rl =2K Ohms,Vin =1V and 16V,B to D 80dB 7Rl =2K Ohms,Vin =1V and 16V,C to A 80dB 7Rl =2K Ohms,Vin =1V and 16V,C to B 80dB 7Rl =2K Ohms,Vin =1V and 16V,C to D 80dB 7Rl =2K Ohms,Vin =1V and 16V,D to A 80dB 7Rl =2K Ohms,Vin =1V and 16V,D to B 80dB 7Rl =2K Ohms,Vin =1V and 16V,D to C80dB7L M 124A /L M 124Q M L 10LM124A/LM124QML LM124A RAD HARD—DC Drift Values(Note10)(The following conditions apply to all the following parameters,unless otherwise specified.)DC:"Delta calculationsperformedon QMLV devices at group B,subgroup5only"SYMBOL PARAMETER CONDITIONS NOTES MIN MAX UNIT SUB-GROUPSVio Input Offset Voltage Vcc+=30V,Vcc-=Gnd,-0.50.5mV1Vcm=-15V±Iib Input Bias Current Vcc+=30V,Vcc-=Gnd,-1010nA1Vcm=-15VElectrical Characteristics—POST RADIATION LIMITS+25˚C(Note10)(The following conditions apply to all the following parameters,unless otherwise specified.)All voltages referenced to device ground.SYMBOL PARAMETER CONDITIONS NOTES MIN MAX UNIT SUB-GROUPS(Note10)-2.5 2.5mV1Vio Input Offset Voltage Vcc+=30V,Vcc-=Gnd,Vcm=-15VVcc+=2V,Vcc-=-28V,(Note10)-2.5 2.5mV1Vcm=13V(Note10)-2.5 2.5mV1Vcc+=5V,Vcc-=GND,Vcm=-1.4V(Note10)-2.5 2.5mV1Vcc+=2.5V,Vcc-=-2.5,Vcm=1.1VIio Input Offset Current Vcc+=30V,Vcc-=GND,(Note10)-1515nA1Vcm=-15V(Note10)-1515nA1Vcc+=2V,Vcc-=-28V,Vcm=13VVcc+=5V,Vcc-=GND,(Note10)-1515nA1Vcm=-1.4V(Note10)-1515nA1Vcc+=2.5V,Vcc-=-2.5V,Vcm=1.1V±Iib Input Bias Current Vcc+=30V,Vcc-=GND,(Note10)-75+0.1nA1Vcm=-15V(Note10)-75+0.1nA1Vcc+=2V,Vcc-=-28V,Vcm=13VVcc+=5V,Vcc-=GND,(Note10)-75+0.1nA1Vcm=-1.4V(Note10)-75+0.1nA1Vcc+=2.5V,Vcc-=-2.5V,Vcm=1.1VAvs+Voltage Gain Vcc+=30V,Vcc-=GND,(Note10)40V/mV41V≤Vo≤26V,Rl=10K Ohms(Note10)40V/mV4Vcc+=30V,Vcc-=GND,5V≤Vo≤20V,Rl=2K OhmsNote6:Guaranteed by Vio tests.Note7:Datalog reading in K=V/mVNote8:Guaranteed,not testedNote9:Calculated parametersNote10:Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table.These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect.Radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in MIL-STD-883,Method1019Typical Performance CharacteristicsInput Voltage RangeInput Current2010803420108035Supply Current Voltage Gain2010803620108037Open Loop FrequencyResponse Common Mode RejectionRatio2010803820108039L M 124A /L M 124Q M LTypical Performance Characteristics(Continued)Voltage Follower PulseResponseVoltage Follower PulseResponse(Small Signal) 2010804020108041Large Signal FrequencyResponseOutput CharacteristicsCurrent Sourcing 2010804220108043Output CharacteristicsCurrent Sinking Current Limiting2010804420108045LM124A/LM124QMLApplication HintsThe LM124series are op amps which operate with only a single power supply voltage,have true-differential inputs,and remain in the linear mode with an input common-mode voltage of 0V DC .These amplifiers operate over a wide range of power supply voltage with little change in performance characteristics.At 25˚C amplifier operation is possible down to a minimum supply voltage of 2.3V DC .The pinouts of the package have been designed to simplify PC board layouts.Inverting inputs are adjacent to outputs for all of the amplifiers and the outputs have also been placed at the corners of the package (pins 1,7,8,and 14).Precautions should be taken to insure that the power supply for the integrated circuit never becomes reversed in polarity or that the unit is not inadvertently installed backwards in a test socket as an unlimited current surge through the result-ing forward diode within the IC could cause fusing of the internal conductors and result in a destroyed unit.Large differential input voltages can be easily accommo-dated and,as input differential voltage protection diodes are not needed,no large input currents result from large differ-ential input voltages.The differential input voltage may be larger than V +without damaging the device.Protection should be provided to prevent the input voltages from going negative more than −0.3V DC (at 25˚C).An input clamp diode with a resistor to the IC input terminal can be used.To reduce the power supply drain,the amplifiers have a class A output stage for small signal levels which converts to class B in a large signal mode.This allows the amplifiers to both source and sink large output currents.Therefore both NPN and PNP external current boost transistors can be used to extend the power capability of the basic amplifiers.The output voltage needs to raise approximately 1diode drop above ground to bias the on-chip vertical PNP transistor for output current sinking applications.For ac applications,where the load is capacitively coupled to the output of the amplifier,a resistor should be used,from the output of the amplifier to ground to increase the class A bias current and prevent crossover distortion.Where the load is directly coupled,as in dc applications,there is no crossover distortion.Capacitive loads which are applied directly to the output of the amplifier reduce the loop stability margin.Values of 50pF can be accommodated using the worst-case non-inverting unity gain rge closed loop gains or resistive isolation should be used if larger load capacitance must be driven by the amplifier.The bias network of the LM124establishes a drain current which is independent of the magnitude of the power supply voltage over the range of from 3V DC to 30V DC .Output short circuits either to ground or to the positive power supply should be of short time duration.Units can be de-stroyed,not as a result of the short circuit current causing metal fusing,but rather due to the large increase in IC chip dissipation which will cause eventual failure due to exces-sive junction temperatures.Putting direct short-circuits on more than one amplifier at a time will increase the total IC power dissipation to destructive levels,if not properly pro-tected with external dissipation limiting resistors in series with the output leads of the amplifiers.The larger value of output source current which is available at 25˚C provides a larger output current capability at elevated temperatures (see typical performance characteristics)than a standard IC op amp.The circuits presented in the section on typical applications emphasize operation on only a single power supply voltage.If complementary power supplies are available,all of the standard op amp circuits can be used.In general,introduc-ing a pseudo-ground (a bias voltage reference of V +/2)will allow operation above and below this value in single power supply systems.Many application circuits are shown which take advantage of the wide input common-mode voltage range which includes ground.In most cases,input biasing is not required and input voltages which range to ground can easily be accommodated.L M 124A /L M 124Q M LTypical Single-Supply Applications(V+=5.0V DC)Non-Inverting DC Gain(0V Input=0V Output)20108005 *R not needed due to temperature independent I INDC Summing Amplifier(V IN’S≥0V DC and V O≥V DC)Power Amplifier20108006 Where:V0=V1+V2−V3−V4(V1+V2)≥(V3+V4)to keep V O>0V DC20108007V0=0V DC for V IN=0V DCA V=10LM124A/LM124QMLTypical Single-Supply Applications (V +=5.0V DC )(Continued)LED Driver“BI-QUAD”RC Active Bandpass Filter2010800820108009f o =1kHz Q =50A V =100(40dB)Fixed Current Sources Lamp Driver2010801020108011L M 124A /L M 124Q M LTypical Single-Supply Applications(V+=5.0V DC)(Continued)Current Monitor20108012*(Increase R1for I L small)Driving TTL20108013Voltage Follower20108014Pulse Generator20108015Squarewave Oscillator20108016Pulse Generator20108017LM124A/LM124QMLTypical Single-Supply Applications (V +=5.0V DC )(Continued)High Compliance Current Sink20108018I O =1amp/volt V IN (Increase R E for I o small)Low Drift Peak Detector20108019L M 124A /L M 124Q M LTypical Single-Supply Applications (V +=5.0V DC )(Continued)Comparator with HysteresisGround Referencing a Differential Input Signal2010802020108021V O =V RVoltage Controlled Oscillator Circuit20108022*Wide control voltage range:0V DC ≤V C ≤2(V +−1.5V DC )Photo Voltaic-Cell Amplifier20108023LM124A/LM124QMLTypical Single-Supply Applications (V +=5.0V DC )(Continued)AC Coupled Inverting Amplifier20108024AC Coupled Non-Inverting Amplifier20108025L M 124A /L M 124Q M LTypical Single-Supply Applications (V +=5.0V DC )(Continued)DC Coupled Low-Pass RC Active Filter20108026f O =1kHz Q =1A V =2High Input Z,DC Differential Amplifier20108027LM124A/LM124QML21Typical Single-Supply Applications (V +=5.0V DC )(Continued)High Input Z Adjustable-Gain DC Instrumentation Amplifier20108028Using Symmetrical Amplifiers to Reduce Input Current (General Concept)20108029Bridge Current Amplifier20108030L M 124A /L M 124Q M L 22LM124A/LM124QMLTypical Single-Supply Applications(V+=5.0V)(Continued)DCBandpass Active Filter Array20108031f O=1kHzQ=2523Revision History SectionDateReleased RevisionSectionOriginator Changes9–2–04ANew Release,Corporate formatR.Malone3MDS data sheets converted into one Corp.data sheet format.MNLM124-X,Rev.1A2,MNLM124A-X,Rev.1A3and MRLM124A-X-RH,Rev.5A0.MDS data sheets will be archived.01/27/05BConnection Diagrams,Quality Conformance Inspection Section,and Physical Dimensions drawingsR.MaloneAdded E package Connection Diagram.Changed verbiage under Quality Conformance Title,and UpdatedRevisions for the Marketing Drawings.L M 124A /L M 124Q M L 24Physical Dimensionsinches (millimeters)unless otherwise notedSAMPLE TEXT Ceramic Dual-In-Line Package (J)NS Package Number J14ASAMPLE TEXT 20Pin Leadless Chip Carrier,Type C (E)NS Package Number E20ALM124A/LM124QML25Physical Dimensionsinches (millimeters)unless otherwise noted (Continued)SAMPLE TEXT Ceramic Flatpak PackageNS Package Number W14BSAMPLE TEXT 14-Pin Ceramic Package (WG)NS Package Number WG14AL M 124A /L M 124Q M L 26NotesNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.For the most current product information visit us at .LIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systemswhich,(a)are intended for surgical implant into the body,or(b)support or sustain life,and whose failure to perform whenproperly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life supportdevice or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.BANNED SUBSTANCE COMPLIANCENational Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification(CSP-9-111C2)and the Banned Substances and Materials of Interest Specification(CSP-9-111S2)and contain no‘‘Banned Substances’’as defined in CSP-9-111S2.National Semiconductor Americas CustomerSupport CenterEmail:new.feedback@ Tel:1-800-272-9959National SemiconductorEurope Customer Support CenterFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)6995086208English Tel:+44(0)8702402171Français Tel:+33(0)141918790National SemiconductorAsia Pacific CustomerSupport CenterEmail:ap.support@National SemiconductorJapan Customer Support CenterFax:81-3-5639-7507Email:jpn.feedback@Tel:81-3-5639-7560 LM124A/LM124QML Low Power Quad Operational Amplifiers。

July 31, 2008 ADC121S051Single Channel, 200 to 500 ksps, 12-Bit A/D ConverterGeneral DescriptionThe ADC121S051 is a low-power, single channel CMOS 12-bit analog-to-digital converter with a high-speed serial inter-face. Unlike the conventional practice of specifying perfor-mance at a single sample rate only, the ADC121S051 is fully specified over a sample rate range of 200 ksps to 500 ksps. The converter is based upon a successive-approximation register architecture with an internal track-and-hold circuit. The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE, and many common DSP serial interfaces.The ADC121S051 operates with a single supply that can range from +2.7V to +5.25V. Normal power consumption us-ing a +3.6V or +5.25V supply is 1.7 mW and 8.7 mW, respec-tively. The power-down feature reduces the power consump-tion to as low as 2.6 µW using a +5.25V supply.The ADC121S051 is packaged in 6-lead LLP and SOT-23 packages. Operation over the industrial temperature range of −40°C to +85°C is guaranteed.Features■Specified over a range of sample rates.■6-lead LLP and SOT-23 packages■Variable power management■Single power supply with 2.7V - 5.25V range■SPI™/QSPI™/MICROWIRE/DSP compatibleKey Specifications■DNL+0.5/-0.25 LSB (typ)■INL+0.45/-0.40 LSB (typ)■SNR72.0 dB (typ)■Power Consumption■—3.6V Supply 1.7 mW (typ)—5.25V Supply8.7 mW (typ) Applications■Portable Systems■Remote Data Acquisition■Instrumentation and Control SystemsPin-Compatible Alternatives by Resolution and SpeedAll devices are fully pin and function compatible.Resolution Specified for Sample Rate Range of:50 to 200 ksps200 to 500 ksps500 ksps to 1 Msps12-bit ADC121S021ADC121S051ADC121S10110-bit ADC101S021ADC101S051ADC101S1018-bit ADC081S021ADC081S051ADC081S101 Connection Diagram20144605Ordering InformationOrder Code Temperature Range Description Top Mark ADC121S051CISD−40°C to +85°C6-Lead LLP Package X4CADC121S051CISDX−40°C to +85°C6-Lead LLP Package, Tape and Reel X4CADC121S051CIMF−40°C to +85°C6-Lead SOT-23 Package X13C ADC121S051CIMFX−40°C to +85°C6-Lead SOT-23 Package, Tape & Reel X13C ADC121S051EVAL SOT-23 Evaluation BoardTRI-STATE® is a registered trademark of National Semiconductor Corporation.© 2008 National Semiconductor ADC121S051 Single Channel, 200 to 500 ksps, 12-Bit A/D ConverterBlock Diagram20144607Pin Descriptions and Equivalent CircuitsPin No.SymbolDescriptionANALOG I/O3V INAnalog input. This signal can range from 0V to V A .DIGITAL I/O4SCLK Digital clock input. This clock directly controls the conversion and readout processes.5SDATA Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin.6CSChip select. On the falling edge of CS, a conversion process begins.POWER SUPPLY1V A Positive supply pin. This pin should be connected to a quiet +2.7V to +5.25V source and bypassed to GND with a 1 µF capacitor and a 0.1 µF monolithic capacitor located within 1 cm of the power pin.2GND The ground return for the supply and signals.PADGNDFor package suffix CISD(X) only, it is recommended that the center pad should be connected to ground. 2A D C 121S 051Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.Analog Supply Voltage VA−0.3V to 6.5VVoltage on Any Digital Pin to GND−0.3V to 6.5VVoltage on Any Analog Pin to GND−0.3V to (VA+0.3V) Input Current at Any Pin (Note 3)±10 mA Package Input Current (Note 3)±20 mAPower Consumption at TA= 25°C See (Note 4)ESD Susceptibility (Note 5) Human Body ModelMachine Model 3500V 300VJunction Temperature+150°C Storage Temperature−65°C to +150°C Operating Ratings (Notes 1, 2)Operating Temperature Range−40°C ≤ T A≤ +85°C VASupply Voltage+2.7V to +5.25V Digital Input Pins Voltage Range(regardless of supply voltage)−0.3V to +5.25V Analog Input Pins Voltage Range0V to V A Clock Frequency 1 MHz to 10 MHz Sample Rate up to 500 ksps Package Thermal ResistancePackageθJA6-lead LLP94°C / W6-lead SOT-23265°C / WSoldering proces smust comply with National Semiconductor's Reflow Temperature Profile specifications. Refer to /packaging. (Note 6)ADC121S051 Converter Electrical Characteristics (Notes 7, 9)The following specifications apply for VA = +2.7V to 5.25V, fSCLK= 4 MHz to 10 MHz, fSAMPLE= 200 ksps to 500 ksps,C L = 15 pF, unless otherwise noted. Boldface limits apply for TA= TMINto TMAX: all other limits TA= 25°C.Symbol Parameter Conditions TypicalLimits(Note 9)UnitsSTATIC CONVERTER CHARACTERISTICSResolution with No Missing Codes12BitsINL Integral Non-Linearity VA= +2.7V to +3.6V+0.45±1.0LSB (max)−0.40LSB (min)VA= +4.75 to +5.25V+0.75LSB (max)−0.45LSB (min)DNL Differential Non-Linearity VA= +2.7V to +3.6V+0.50+1.0LSB (max)−0.25−0.9LSB (min)VA= +4.75 to +5.25V+0.80LSB (max)−0.50LSB (min)V OFF Offset ErrorVA= +2.7V to +3.6V−0.18±1.2LSB (max)VA= +4.75 to +5.25V+1.9GE Gain Error VA= +2.7V to +3.6V−0.62±1.5LSB (max) VA= +4.75 to +5.25V−1.50DYNAMIC CONVERTER CHARACTERISTICSSINAD Signal-to-Noise Plus Distortion Ratio VA= +2.7V to 5.25VfIN= 100 kHz, −0.02 dBFS7270dB (min)SNR Signal-to-Noise Ratio VA= +2.7V to 5.25VfIN= 100 kHz, −0.02 dBFS7270.8dB (min)THD Total Harmonic Distortion VA= +2.7V to 5.25VfIN= 100 kHz, −0.02 dBFS−83dBSFDR Spurious-Free Dynamic Range VA= +2.7V to 5.25VfIN= 100 kHz, −0.02 dBFS84dBENOB Effective Number of Bits VA= +2.7V to 5.25VfIN= 100 kHz, −0.02 dBFS11.711.3Bits (min)IMD Intermodulation Distortion, SecondOrder TermsVA= +5.25Vfa= 103.5 kHz, fb= 113.5 kHz−83dB Intermodulation Distortion, Third OrderTermsVA= +5.25Vfa= 103.5 kHz, fb= 113.5 kHz−82dBFPBW-3 dB Full Power Bandwidth VA= +5V11MHzVA= +3V8MHzADC121S051SymbolParameterConditionsTypicalLimits (Note 9)UnitsANALOG INPUT CHARACTERISTICS V IN Input Range 0 to V AV I DCL DC Leakage Current±1µA (max)C INAInput CapacitanceTrack Mode 30pF Hold Mode 4 pF DIGITAL INPUT CHARACTERISTICS V IH Input High Voltage V A = +5.25V 2.4 V (min)V A = +3.6V 2.1V (min)V IL Input Low Voltage V A = +5V 0.8 V (max)V A = +3V 0.4V (max)I IN Input CurrentV IN = 0V or V A ±0.1±1µA (max)C INDDigital Input Capacitance24pF (max)DIGITAL OUTPUT CHARACTERISTICS V OH Output High Voltage I SOURCE = 200 µA V A − 0.07V A − 0.2V (min)I SOURCE = 1 mA V A − 0.1 V V OL Output Low VoltageI SINK = 200 µA 0.030.4V (max)I SINK = 1 mA 0.1 V I OZH , I OZL TRI-STATE® Leakage Current ±0.1±10µA (max)C OUT TRI-STATE® Output Capacitance 24pF (max)Output CodingStraight (Natural) BinaryPOWER SUPPLY CHARACTERISTICS V ASupply Voltage2.7V (min)5.25V (max)I ASupply Current, Normal Mode (Operational, CS low)V A = +5.25V,f SAMPLE = 200 ksps 1.66 3.0mA (max)V A = +3.6V,f SAMPLE = 200 ksps0.46 1.3mA (max)Supply Current, Shutdown (CS high)V A = +5.25V, f SCLK = 0 MHz,f SAMPLE = 0 ksps500nA V A = +5.25V, f SCLK = 10 MHz,f SAMPLE = 0 ksps 60µAP DPower Consumption, Normal Mode (Operational, CS low)V A = +5.25V 8.715.8mW (max)V A = +3.6V1.7 4.7mW (max)Power Consumption, Shutdown (CS high)V A = +5.25V, f SCLK = 0 MHz,f SAMPLE = 0 ksps2.6µW V A = +5.25V, f SCLK = 10 MHz,f SAMPLE = 0 ksps315µWAC ELECTRICAL CHARACTERISTICS f SCLK Clock Frequency (Note 8) 4MHz (min)10MHz (max)f S Sample Rate (Note 8) 200ksps (min)500ksps (max)t CONV Conversion Time16SCLK cycles DC SCLK Duty Cyclef SCLK = 10 MHz 5040% (min)60% (max)t ACQ Track/Hold Acquisition Time400ns (max) Throughput Time Acquisition Time + Conversion Time 20SCLK cycles t QUIET(Note 10)50ns (min) 4A D C 121S 051Symbol ParameterConditionsTypical Limits (Note 9)Units t AD Aperture Delay 3 ns t AJAperture Jitter30psADC121S051 Timing SpecificationsThe following specifications apply for V A = +2.7V to 5.25V, GND = 0V, f SCLK = 4.0 MHz to 10.0 MHz, C L = 25 pF,f SAMPLE = 200 ksps to 500 ksps, Boldface limits apply for T A = T MIN to T MAX : all other limits T A = 25°C.Symbol ParameterConditionsTypicalLimits Units t CS Minimum CS Pulse Width 10 ns (min)t SU CS to SCLK Setup Time10 ns (min)t EN Delay from CS Until SDATA TRI-STATE ® Disabled (Note 11)20ns (max)t ACC Data Access Time after SCLK Falling Edge (Note 12)V A = +2.7V to +3.6V 40ns (max)V A = +4.75V to +5.25V 20ns (max)t CL SCLK Low Pulse Width 0.4 x t SCLK ns (min)t CH SCLK High Pulse Width0.4 x t SCLKns (min)t HSCLK to Data Valid Hold TimeV A = +2.7V to +3.6V 7ns (min)V A = +4.75V to +5.25V 5ns (min)t DISSCLK Falling Edge to SDATA High Impedance (Note 13)V A = +2.7V to +3.6V 25ns (max)6ns (min)V A = +4.75V to +5.25V 25ns (max)5ns (min)t POWER-UP Power-Up Time from Full Power-Down1µsNote 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.Note 2:All voltages are measured with respect to GND = 0V, unless otherwise specified.Note 3:When the input voltage at any pin exceeds the power supply (that is, V IN < GND or V IN > V A ), the current at that pin should be limited to 10 mA. The 20mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two. The Absolute Maximum Rating specification does not apply to the V A pin. The current into the V A pin is limited by the Analog Supply Voltage specification.Note 4:The absolute maximum junction temperature (T J max) for this device is 150°C. The maximum allowable power dissipation is dictated by T J max, the junction-to-ambient thermal resistance (θJA ), and the ambient temperature (T A ), and can be calculated using the formula P D max = (T J max − T A ) / θJA . The values for maximum power dissipation listed above will be reached only when the device is operated in a severe fault condition (e.g. when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.Note 5:Human body model is 100 pF capacitor discharged through a 1.5 k Ω resistor. Machine model is 220 pF discharged through zero ohms.Note 6:Reflow temperature profiles are different for lead-free and non-lead-free packages.Note 7:Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).Note 8:This is the frequency range over which the electrical performance is guaranteed. The device is functional over a wider range which is specified under Operating Ratings.Note 9:Data sheet min/max specification limits are guaranteed by design, test, or statistical analysis.Note 10:Minimum Quiet Time required by bus relinquish and the start of the next conversion.Note 11:Measured with the timing test circuit shown in Figure 1 and defined as the time taken by the output signal to cross 1.0V.Note 12:Measured with the timing test circuit shown in Figure 1 and defined as the time taken by the output signal to cross 1.0V or 2.0V.Note 13:t DIS is derived from the time taken by the outputs to change by 0.5V with the timing test circuit shown in Figure 1. The measured number is then adjusted to remove the effects of charging or discharging the output capacitance. This means that t DIS is the true bus relinquish time, independent of the bus loading.ADC121S051Timing Diagrams20144608FIGURE 1. Timing Test Circuit20144606FIGURE 2. ADC121S051 Serial Timing Diagram 6A D C 121S 051Specification DefinitionsACQUISITION TIME is the time required to acquire the input voltage. That is, it is time required for the hold capacitor to charge up to the input voltage.APERTURE DEL AY is the time between the fourth falling SCLK edge of a conversion and the time when the input signal is acquired or held for conversion.APERTURE JITTER (APERTURE UNCERTAINTY) is the variation in aperture delay from sample to sample. Aperturejitter manifests itself as noise in the output.CONVERSION TIME is the time required, after the input volt-age is acquired, for the ADC to convert the input voltage to a digital word.DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1 LSB.DUTY CYCLE is the ratio of the time that a repetitive digital waveform is high to the total time of one period. The specifi-cation here refers to the SCLK.EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE BITS) is another method of specifying Signal-to-Noise and Distortion or SINAD. E NOB is defined as (SINAD − 1.76) / 6.02 and says that the converter is equiva-lent to a perfect ADC of this (ENOB) number of bits.FULL POWER BANDWIDTH is a measure of the frequency at which the reconstructed output fundamental drops 3 dB below its low frequency value for a full scale input.GAIN ERROR is the deviation of the last code transition (111...110) to (111...111) from the ideal (V REF − 1.5 LSB), af-ter adjusting for offset error.INTEGRAL NON-LINEARITY (INL) is a measure of the de-viation of each individual code from a line drawn from negative full scale (½ LSB below the first code transition) through pos-itive full scale (½ LSB above the last code transition). The deviation of any given code from this straight line is measured from the center of that code value.INTERMODULATION DISTORTION (IMD) is the creation of additional spectral components as a result of two sinusoidal frequencies being applied to the ADC input at the same time.It is defined as the ratio of the power in the second and third order intermodulation products to the sum of the power in both of the original frequencies. IMD is usually expressed in dB.MISSING CODES are those output codes that will never ap-pear at the ADC outputs. The ADC121S051 is guaranteed not to have any missing codes.OFFSET ERROR is the deviation of the first code transition (000...000) to (000...001) from the ideal (i.e. GND + 0.5 LSB).SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in dB, of the rms value of the input signal to the rms value of the sum of all other spectral components below one-half the sam-pling frequency, not including harmonics or d.c.SIGNAL TO NOISE PL US DISTORTION (S/N+D or SINAD) Is the ratio, expressed in dB, of the rms value of the input signal to the rms value of all of the other spectral com-ponents below half the clock frequency, including harmonics but excluding d.c.SPURIOUS FREE DYNAMIC RANGE (SFDR) is the differ-ence, expressed in dB, between the desired signal amplitude to the amplitude of the peak spurious spectral component,where a spurious spectral component is any signal present in the output spectrum that is not present at the input and may or may not be a harmonic.TOTAL HARMONIC DISTORTION (THD) is the ratio, ex-pressed in dB or dBc, of the rms total of the first five harmonic components at the output to the rms level of the input signal frequency as seen at the output. THD is calculated aswhere A f1 is the RMS power of the input frequency at the out-put and A f2 through A f6 are the RMS power in the first 5harmonic frequencies.THROUGHPUT TIME is the minimum time required between the start of two successive conversion. It is the acquisition time plus the conversion time.ADC121S051Typical Performance CharacteristicsT A = +25°C, f SAMPLE = 200 ksps to 500 ksps,f SCLK = 4 MHz to 10 MHz, f IN = 100 kHz unless otherwise stated.DNLf SCLK = 4 MHz20144620INLf SCLK = 4 MHz20144621DNLf SCLK = 10 MHz 20144660INLf SCLK = 10 MHz20144661DNL vs. Clock Frequency 20144665INL vs. Clock Frequency20144666 8A D C 121S 051SNR vs. Clock Frequency20144663SINAD vs. Clock Frequency20144664SFDR vs. Clock Frequency20144667THD vs. Clock Frequency20144668Spectral Response, VA = 5.25VfSCLK= 4 MHz20144669Spectral Response, VA= 5.25VfSCLK= 10 MHz20144670ADC121S051Power Consumption vs. Throughput,f SCLK = 10 MHz20144655 10A D C 121S 051Applications Information1.0 ADC121S051 OPERATIONThe ADC121S051 is a successive-approximation analog-to-digital converters designed around a charge-redistribution digital-to-analog converter core. Simplified schematics of the ADC121S051 in both track and hold modes are shown in Figure 3 and Figure 4, respectively. In Figure 3, the device is in track mode: switch SW1 connects the sampling capacitor to the input, and SW2 balances the comparator inputs. The device is in this state until CS is brought low, at which point the device moves to the hold mode.Figure 4 shows the device in hold mode: switch SW1 con-nects the sampling capacitor to ground, maintaining the sam-pled voltage, and switch SW2 unbalances the comparator. The control logic then instructs the charge-redistribution DAC to add or subtract fixed amounts of charge from the sampling capacitor until the comparator is balanced. When the com-parator is balanced, the digital word supplied to the DAC is the digital representation of the analog input voltage. The de-vice moves from hold mode to track mode on the 13th rising edge of SCLK.20144609FIGURE 3. ADC121S051 in Track Mode20144610 FIGURE 4. ADC121S051 in Hold Mode2.0 USING THE ADC121S051The serial interface timing diagram for the ADC121S051 is shown in Figure 2. CS is chip select, which initiates conver-sions on the ADC121S051 and frames the serial data trans-fers. SCLK (serial clock) controls both the conversion process and the timing of serial data. SDATA is the serial data out pin, where a conversion result is found as a serial data stream. Basic operation of the ADC121S051 begins with CS going low, which initiates a conversion process and data transfer. Subsequent rising and falling edges of SCLK will be labelled with reference to the falling edge of CS; for example, "the third falling edge of SCLK" shall refer to the third falling edge of SCLK after CS goes low.At the fall of CS, the SDATA pin comes out of TRI-STATE, and the converter moves from track mode to hold mode. The input signal is sampled and held for conversion on the falling edge of CS. The converter moves from hold mode to trackmode on the 13th rising edge of SCLK (see Figure 2). TheSDATA pin will be placed back into TRI-STATE after the 16thfalling edge of SCLK, or at the rising edge of CS, whicheveroccurs first. After a conversion is completed, the quiet time(tQUIET) must be satisfied before bringing CS low again to be-gin another conversion.Sixteen SCLK cycles are required to read a complete samplefrom the ADC121S051. The sample bits (including leadingzeroes) are clocked out on falling edges of SCLK, and areintended to be clocked in by a receiver on subsequent fallingedges of SCLK. The ADC121S051 will produce three leadingzero bits on SDATA, followed by twelve data bits, most sig-nificant first.If CS goes low before the rising edge of SCLK, an additional(fourth) zero bit may be captured by the next falling edge ofSCLK.ADC121S0513.0 ADC121S051 TRANSFER FUNCTIONThe output format of the ADC121S051 is straight binary.Code transitions occur midway between successive integer LSB values. The LSB width for the ADC121S051 is V A /4096.The ideal transfer characteristic is shown in Figure 5. The transition from an output code of 0000 0000 0000 to a code of 0000 0000 0001 is at 1/2 LSB, or a voltage of V A /8192.Other code transitions occur at steps of one LSB.20144611FIGURE 5. Ideal Transfer Characteristic4.0 TYPICAL APPLICATION CIRCUITA typical application of the ADC121S051 is shown in Figure 6. Power is provided in this example by the National Semiconductor LP2950 low-dropout voltage regulator, avail-able in a variety of fixed and adjustable output voltages. The power supply pin is bypassed with a capacitor network locat-ed close to the ADC121S051. Because the reference for the ADC121S051 is the supply voltage, any noise on the supply will degrade device noise performance. To keep noise off the supply, use a dedicated linear regulator for this device, or provide sufficient decoupling from other circuitry to keep noise off the ADC121S051 supply pin. Because of the ADC121S051's low power requirements, it is also possible to use a precision reference as a power supply to maximize per-formance. The three-wire interface is shown connected to a microprocessor or DSP.20144613FIGURE 6. Typical Application Circuit5.0 ANALOG INPUTSAn equivalent circuit for the ADC121S051's input is shown in Figure 7. Diodes D1 and D2 provide ESD protection for the analog inputs. At no time should the analog input go beyond(V A + 300 mV) or (GND − 300 mV), as these ESD diodes will begin conducting, which could result in erratic operation. For this reason, the ESD diodes should not be used to clamp the input signal.The capacitor C1 in Figure 7 has a typical value of 4 pF, and is mainly the package pin capacitance. Resistor R1 is the on resistance of the track / hold switch, and is typically 500 ohms.Capacitor C2 is the ADC121S051 sampling capacitor and is typically 26 pF. The ADC121S051 will deliver best perfor-mance when driven by a low-impedance source to eliminate distortion caused by the charging of the sampling capaci-tance. This is especially important when using the AD-C121S051 to sample AC signals. Also important when sampling dynamic signals is an anti-aliasing filter.20144614FIGURE 7. Equivalent Input Circuit6.0 DIGITAL INPUTS AND OUTPUTSThe ADC121S051 digital inputs (SCLK and CS) are not lim-ited by the same maximum ratings as the analog inputs. The digital input pins are instead limited to +5.25V with respect to GND, regardless of V A , the supply voltage. This allows the ADC121S051 to be interfaced with a wide range of logic lev-els, independent of the supply voltage.7.0 MODES OF OPERATIONThe ADC121S051 has two possible modes of operation: nor-mal mode, and shutdown mode. The ADC121S051 enters normal mode (and a conversion process is begun) when CS is pulled low. The device will enter shutdown mode if CS is pulled high before the tenth falling edge of SCLK after CS is pulled low, or will stay in normal mode if CS remains low.Once in shutdown mode, the device will stay there until CS is brought low again. By varying the ratio of time spent in the normal and shutdown modes, a system may trade-off throughput for power consumption, with a sample rate as low as zero.7.1 Normal ModeThe fastest possible throughput is obtained by leaving the ADC121S051 in normal mode at all times, so there are no power-up delays. To keep the device in normal mode contin-uously, CS must be kept low until after the 10th falling edge of SCLK after the start of a conversion (remember that a con-version is initiated by bringing CS low).If CS is brought high after the 10th falling edge, but before the 16th falling edge, the device will remain in normal mode, but the current conversion will be aborted, and SDATA will return to TRI-STATE (truncating the output word).Sixteen SCLK cycles are required to read all of a conversion word from the device. After sixteen SCLK cycles have elapsed, CS may be idled either high or low until the next conversion. If CS is idled low, it must be brought high again 12A D C 121S 051before the start of the next conversion, which begins when CS is again brought low.After sixteen SCLK cycles, SDATA returns to TRI-STATE.Another conversion may be started, after t QUIET has elapsed,by bringing CS low again.7.2 Shutdown ModeShutdown mode is appropriate for applications that either do not sample continuously, or it is acceptable to trade through-put for power consumption. When the ADC121S051 is in shutdown mode, all of the analog circuitry is turned off.To enter shutdown mode, a conversion must be interrupted by bringing CS high anytime between the second and tenth falling edges of SCLK, as shown in Figure 8. Once CS has been brought high in this manner, the device will enter shut-down mode; the current conversion will be aborted and SDA-TA will enter TRI-STATE. If CS is brought high before the second falling edge of SCLK, the device will not change mode; this is to avoid accidentally changing mode as a result of noise on the CS line.20144616FIGURE 8. Entering Shutdown Mode20144617FIGURE 9. Entering Normal ModeTo exit shutdown mode, bring CS back low. Upon bringing CS low, the ADC121S051 will begin powering up (power-up time is specified in the Timing Specifications table). This pow-er-up delay results in the first conversion result being unus-able. The second conversion performed after power-up,however, is valid, as shown in Figure 9.If CS is brought back high before the 10th falling edge of SCLK, the device will return to shutdown mode. This is done to avoid accidentally entering normal mode as a result of noise on the CS line. To exit shutdown mode and remain in normal mode, CS must be kept low until after the 10th falling edge of SCLK. The ADC121S051 will be fully powered-up af-ter 16 SCLK cycles.8.0 POWER MANAGEMENTThe ADC121S051 takes time to power-up, either after first applying V A , or after returning to normal mode from shutdown mode. This corresponds to one "dummy" conversion for any SCLK frequency within the specifications in this document.After this first dummy conversion, the ADC121S051 will per-form conversions properly. Note that the t QUIET time must still be included between the first dummy conversion and the sec-ond valid conversion.When the V A supply is first applied, the ADC121S051 may power up in either of the two modes: normal or shutdown. As such, one dummy conversion should be performed after start-up, as described in the previous paragraph. The part may thenbe placed into either normal mode or the shutdown mode, as described in Sections 7.1 and 7.2.When the ADC121S051 is operated continuously in normal mode, the maximum throughput is f SCLK / 20. Throughput may be traded for power consumption by running f SCLK at its max-imum specified rate and performing fewer conversions per unit time, raising the ADC121S051 CS line after the 10th and before the 15th fall of SCLK of each conversion. A plot of typ-ical power consumption versus throughput is shown in the Typical Performance Curves section. To calculate the power consumption for a given throughput, multiply the fraction of time spent in the normal mode by the normal mode power consumption and add the fraction of time spent in shutdown mode multiplied by the shutdown mode power consumption.Note that the curve of power consumption vs. throughput is essentially linear. This is because the power consumption in the shutdown mode is so small that it can be ignored for all practical purposes.9.0 POWER SUPPLY NOISE CONSIDERATIONSThe charging of any output load capacitance requires current from the power supply, V A . The current pulses required from the supply to charge the output capacitance will cause voltage variations on the supply. If these variations are large enough,they could degrade SNR and SINAD performance of the ADC.Furthermore, discharging the output capacitance when the digital output goes from a logic high to a logic low will dumpADC121S051。

四运算放大器芯片LM124LM224LM324中文资料
四运算放大器芯片LM124/LM224/LM324中文资料
LM124/LM224/LM324是四运放集成电路，它采用14管脚双列直插塑料（陶瓷）封装，外形如图所示。

它的内部包含四组形式完全相同的运算放大器，除电源共用外，四组运放相互独立。

每一组运算放大器可用图1所示的符号来表示，它有5个引出脚，其中“ ”、“-”为两个信号输入端，“V ”、“V-”为正、负电源端，“Vo”为输出端。

两个信号输入端中，Vi-（-）为反相输入端，表示运放输出端Vo的信号与该输入端的相位相反；Vi （）为同相输入端，表示运放输出端Vo的信号与该输入端的相位相同。

LM124/LM224/LM324的引脚排列见图2。

图一图二lm324功能引脚图图3 LM324/LM124/LM224集成电路内部电路图1/4主要参数：参数名称测试条件最小典型最大单位输入失调电压
U0≈1.4V RS=0 -2.07.0mV输入失调电流- -5.050nA输入偏置电流- -45250nA大信号电压增益U =15V，
RL=5kΩ88k100k --电源电流U =30V，Uo=0，RL=∞1.53.0 -mA共模抑制比Rs≤10kΩ6570 -dB。