中文资料TL494CN

TL494的应用TL494是功能非常完善的PWM驱动电路,对于一般的应用已经绰绰有余了.我现在简单的说说两种应用电路.新手可以对照电路自己选简单应用或带保护功能的应用方案.看下面的图:这个算是最简单的应用了:屏蔽了两个误差放大器的功能,但缓启动,死区功能还是保留的.一般应用效率最高,非常稳定.1:按手册要求两个误差放大器屏蔽的话要求误差放大器输入端正极要求接地(图中1脚和16脚通过1K的电阻接地了),误差放大器输入端负极要求接高电位(2脚和15脚是接入了14脚的5V基准端了).注意下TL494的14脚是个5V输出的精密稳压电源,好多应用都是从这个基准端取样的.这样TL494的1脚2脚15脚16脚再加上3脚(3脚是两个误差放大器的输出汇总端,因为屏蔽了两个误差放大器就不去考虑3脚了)的功能就不去用它了.2:TL494的4脚是死区控制端,电压输入0-4V的话可使占空比从最大到关闭是为止(45%-0%).4脚直接接地的话占空比是最大了(不过放心厂家已经在集成电路内部做好了合适的死区电路,4脚就是直接接地也留有死区).在上图种就是利用4脚接入C1和R1的中间,电容正极接14脚的5V基准电位,通过R1给电容充电,这样开机后4脚开始是5V的电位到电容充满电后4脚变0V(真好完成占空比从0%到最大)整个缓启动的时间长短就C1和R1的时间常数决定(加大电阻或电容缓启动时间变长反之就短了).3:5脚6脚是决定振荡频率的,公式是F=1.1/(R*C)注意下整个频率算出来是单端应用的频率,如果推挽应用的话还要除以二.这里一起把TL494单端应用和推挽应用的方式也讲下:TL494的13脚决定了工作方式,13脚接地的话是单端应用如果接14脚5V输出端就是推挽应用了.上图接的是14脚就是推挽应用.4:TL494的7脚是电源地,12脚是正极电源输入端接7-40V均可.5:TL494的8脚,9脚,10脚,11脚是内部的三极管输出脚,因为TL494的输出电流比较大,驱动场管的话直接加外接释放管后就可以驱动比较大电流的场管了,所以像上图那样做几百到上千瓦功率均可.这样TL494的最简单的应用电路就讲完了,搭这个电路才几个元件.但主要的功能已经都涵盖了.明天接着说TL494两个误差放大器的应用使TL494能完成限流,稳压和防反接功能. 接着看下面的图:这是个带稳压和限流的图纸,只是在第一幅图上增加了两个两个误差放大器的应用(一个限流保护用,一个稳压用).TL494两个误差放大器允许独立使用,但独立使用时要和tl494的3脚接好RC网络,上图中的c6和c7就起这个作用.1:上图中稳压功能的实现是利用其中一个误差放大器的1脚和2脚实现的(两个误差放大器可以互换使用).因为误差放大器的2脚是通过R3接入TL494的14脚(5V基准电压端)那么2脚电位就固定在5V了,那么1脚电位也必须要5V保持稳定状态.上图中WR1就是根据设定高压输出电压的需要,电阻分压后微调分压使TL494的1脚保持5V电位.这样输出电压出现变化时必然使TL494的1脚电位发生变化,1脚的电位微小变化就使误差放大器控制PWM自动调整脉宽,在线性范围内把TL494的1脚拉回到5V(也就是高压回到原先设定的电压上),这样就完成稳压的要求了.2:限流保护功能的实现.上图中基准电压通过R4和R6分压,使15脚的电位在(5V*R6)/R4=0.4v ,但另一个误差放大器因为16脚接地了.这路误差放大器在核定的电流工作时不起作用.只有当上图的取样电阻R10电流到20A时,R10的左端电位相对地电位变成20A*0.02欧姆=-0.4V.这时TL494的15脚电位就升高到和16脚电位相同(同时变0伏)误差放大器开始工作,如果R10上的电流继续增加就通过PWM减少占空比直到完全关闭输出,正常工作的条件必须维持15脚的电位大于0伏.这样两个误差放大器分别完成了过流和稳压功能,保证了电路的安全稳定状态.自己可以按自己手头的元件通过调整R3,R4,R6,R10,和TL494一脚的分压电阻设定自己需要的高压和设定的保护电流(只需计算到上面的两个公式就行了).另外TL494的误差端有非常高的阻抗和灵敏度(只要误差端输入相差几个MV就可以使脉宽从0%变化到45%),误差输入端的电阻可以大范围的选择.接着讲取样电阻R10的代替,这个电阻比较难找(不过电瓶车电机控制器上基本都带有一个这样的电阻,直径1.5MM长15MM左右,阻值在0.01欧姆左右).应用场管驱动的功率电路中防止电源反接是非常重要的一环.现在的场管只要是低耐压的内阻都很小.这是网上下的一幅截图,设计的比较巧妙:R3提供场管的开启电压,R4和C1起到电流缓冲作用.网上介绍很多了,电瓶输入电压接反的话几乎不会有电流通过.接入正确的话,等效一个小内阻的电阻串联其中.内阻由所选的场管决定,比如IRF3025是0.008欧姆两个并联就等效一个0.004欧姆的电阻了.将这个电路的S.D两极代替电阻R10这样就变成限流100A的电路了.考虑不需要这么大的电流就把R4和R6的分压取在0.2V,(4.7k和220)这样限制电流在50A左右.实际做二图时,L1可以取消,并且在电瓶正负极可以不接滤波电容,有极性的电解万一反接还是要爆的,但R10后必须按10A电流并一个2000UF的电解的要求并些高频电解(细高形状的电解).第二图只要1脚直接接地就变成开环应用电路了(最大脉宽工作).附个PCB的图样尺寸35X35MM: (20和19两个焊盘要连接起来)接下来会继续介绍第二图高压隔离的光电稳压应用,最终让高压稳定在数百至上千伏,整机的空载电流70MA 左右.续:前辈“思思”发过SG3525高压光电隔离稳压的图,其实这种稳压已经可以很好的满足PWM的稳压要求了.我前面提到过TL494的误差端是非常灵敏的,如果所有元件都工作在线性状态,误差端只要检测到几MV到数10MV的变化,就可以控制输出高压从0V变化到最高电压.简单应用是:利用高压直接串联电阻使光耦发射端工作在合适的线性电流范围内就可以在光耦接受端取到合适的反馈电压供误差端比较了.有点麻烦的是,输出端电压如果不高的话相对电压变化反应迅速些,并且串联光耦的电阻也不必消耗很大的功耗(一般的光耦必须在数MA到数10MA才会进入线性态).假如在比较高的输出电压下还是用电阻限流的话哪限流电阻上消耗功率会比较大(输出1000v,光耦电流3MA就的3W左右了).解决的途径有好多种可以用晶体管基极取样驱动光耦,也可以用常用的TL431比较输入端取样驱动光耦.这样高压端只要输入几UA或几十UA就可以了.续:下面这部分就笼统的解说下,PWM电路稳压比较麻烦.一般原则能不用就不用,要用的话可以采取下面的方案: TL431和PC817的应用在网上介绍的比较详细.对于特别高的电压取样,可以把TL431的输入端(1脚)分压取样和TL431阴极(3脚)光耦驱动端的供电分开处理(这里另加个隔离的12V绕组简单稳压供电).取样端地和12V绕组共地接TL431的阳极(2脚).通过光耦隔离的信号变化反馈给TL494的稳压误差端就完成隔离稳压功能了.我自己的稳压反馈处理是没用到TL494的误差输入端,而是利用TL494的3脚处理PWM的.因为有资料查到用3脚处理稳压反馈信号比误差端处理更稳定.下面有好多朋友搭电路会碰到各种奇怪的问题,简单说下注意的地方:一:TL494电源滤波很重要,二:尽量和功率地分开走线.TL494的地线走线最好也是以下列方法走线8550地-TL494地(7脚)-振荡地-误差地这么走线.另外驱动功率场管的连线越短越好.做好这些细节一般就不会出什么问题了.如果还出现推挽两边发热不一致就是变压器没绕好.关注下84帖,在三脚上加个接地电容试下容量0.1U就行了.有这个电容似乎能大大改善波形管子热得厉害试着把1脚接地让TL494工作在开环状态,看发热有无改善,如果发热改善的话那就是反馈稳压有自激.发热和滤波电解有很大的关系.开环可以做到静态电流100MA-200MA左右,闭环可以做到静态电流40-70MA,一对60A的场管不接散热器在开环状态也可以点100W的灯泡(输出电压220V).按一图做无妨,做好后不要接入场管.494电路通电后静态电流在20MA左右,必须R6,R7对地电压是电源的一半不到点,并且两个输出电压基本相等就正确了.两个8550和二极管相连起什么作用? 有二极管提供信号给场效应管不就可以了干吗还要接8550PNP 啊? 电源一定要接二极管?觉得有的时候甚至可以不接？场管是压控元件并且栅极电容比较大,当一个驱动电压给栅极供电时同时也给栅极电容冲上了电.当栅极驱动信号消失后,栅极电容没放电回路这个电压还会维持场管导通的,这样的话会出现推挽两管同时导通(等效电源短路了).8550的作用就是没驱动信号时迅速把栅极电容的电场泄放掉.由于初级采用分流电阻的方式有众多缺点:电阻不好找,有一定压降.我下步的494结合过流保护准备采用下图电路,采用磁环检测高压输出电流,经整流,分压,分流,再控制494的16脚,简单办法代替R10.你先用一段有一定长度的漆包线作连接电瓶负极的连接线,然后用数字万用表MV档量漆包线两端的压降,然后用电流档量通过的电流就可以算出导线的电阻.然后选合适长度的漆包线代替R10. 其实好多应用都是利用接到电瓶负极的哪段负极线的电阻(记住所有的导线都有电阻)代替R10的最大输出约500W,空载330V,带500W太阳灯电压230V.我刚才按照上面我发的图,分流分压参数都没有任何改动,用内直径10MM的铁氧体磁环绕32T,12V正极母线直接从铁氧体环中穿过,实验过了很灵敏,带500W 可以直接启动,再并个200W启动瞬间灯丝只红了一下,保护起作用了,说明这个电路只要参数选的好,还是有效的对于限流电路楼主提到了R10的选择,确实这是个难题,选择不好这个电阻,所作的工作都是枉然,康铜丝在电流不是十分大时可以选择,像电动车上的那段,但对于家庭作坊制作很少,康铜并不是是非容易找到,并且流过太大电流时也不是最佳选择,用两个3205虽然可以实现100a的大电流限流,但是不同的厂家还有水货3205的内阻不一定都是0.008欧姆电阻,一致性没有分流器那种国标标准,流过100以上的电阻还需要单独给3205加装散热片.我个人认为分流器是不错的选择,但也有它的缺点,就是如果电路比较精巧,加分流器体积大增加成本,如果这点缺点不计,加上分流器和适当的放大电路,配合494内部的15/16脚就可以完成很好的限流.这时TL494的15脚电位就降低到和16脚电位相同(同时变0伏)误差放大器开始工作,如果R10上的电流继续增加必然使15脚电位继续降低到低于16脚的电位,这时通过内部电路调节PWM减少占空比直到完全关闭输出,正常工作的条件必须维持15脚的电位大于16脚电位.这样更改后更容易理解15与16脚的逻辑关系,也就是说外部电路可以控制15脚,也可以控制16脚来实现对限流电路的控制.下边我就说一下我用分流器实现对大于100a电流,元件的选择和配合外部放大电路来实现对于限流电路的实现. 我选择的分流器是100安的,现以100安分流器为例来说明,分流器在流过100安电流时国标标准是两端产生75mV的电压,直接用于494的15或者16脚信号太微弱,容易受到干扰而出现失灵或者误动作.所以我把该信号放大10倍或者20倍后在来控制15或者16脚,由于该信号被放大后呈现的是正信号,所以电路设计15脚电压固定在一个值上并且大于16脚电位,以流过100a电流为保护值来设定,我把该信号放大20倍*0.075=1.5伏. 把15脚电位用431稳定在1.5伏的电位上,或者从基准5伏端用分压电阻得到1.5伏电压,16脚接一个下拉20k的下拉电阻防止来自外界的干扰信号加到16脚,把来自放大后的信号和16脚相连.硬件部分就这样搭接.下边分析原理.当电流在低于100a时PWM工作在最大开度(1脚接地,2脚接5伏时),电流达到100安时,分流器两端产生的微弱电压放大20倍后达到1.5伏使15/16脚电位相等,如果电流继续增加,放大后加到16脚的电压将跟着增加,通过内部电路PWM电路的调节减少占空比直到关闭,达到限流的目的推挽电路一般还是由磁芯质量决定圈数，计算公式比较复杂。

Anderson Power Products®HEADQUARTERS: 13 Pratts Junction Road, Sterling, MA 01564-2305 USA T:978-422-3600 F:978-422-3700EUROPE: Rathealy Road, Fermoy Co. Cork, Ireland T:353-(0)25-32277 F:353-(0)25-32296ASIA/PACIFIC: IDEAL Anderson Asia Pacific Ltd., Unit 922-928 Topsail Plaza, 11 On Sum Street, Shatin N.T., Hong Kong T:852-2636-0836 F:852-2635-9036CHINA: IDEAL Anderson T echnologies (Shenzhen) Ltd., Block A8 T antou W. Ind. Par, Songgang Baoan District, Shenzhen, PR. China 51810 T: 86-755-2768-2118 F: 86-755-2768-2218TAIWAN: IDEAL Anderson Asia Pacific Ltd., Taiwan Branch, 4F.-2, No.116, Dadun 20th St., Situn District, Taichung City 407, Taiwan (R.O.C.) T: 886-4-2310-6451 F:886-4-2310-6460SB ®175ConnectorPRODUCT SPECIFICATIONSThe innovative SB ® connectors provide cost-effective reliability, design flexibility and safety for your products' manufacture, installation and maintenance.APP's 2 & 3 pole connectors are availablewith a 175 amp rating, 600 Volts continuousAC or DC operation. There are SB ®connectors for many applications and wire sizes, #4 to 1/0 AWG (21.1 to 53.5mm²). Mechanical keys ensure connectors will only mate with connectors of the same color. Different color housings are selected to identify voltages, thus preventingmismatching of the power supply system.11111111116325G6 Gray #4 21.16326G6 Blue #4 21.16327G6 Orange #4 21.16328G6 Yellow #4 21.16329G6 Red #4 21.1111382 Individual 1/0 53.5947 Contact set (2) #2 33.61383 Individual #2 33.6948 Contact set (2) #4 21.11384 Individual #4 21.2948G 1* Contact set (2) #6 13.31348* Individual #6 13.3944G 1Contact set (2) #142.41347 Individual #1 42.4180BBS Bus bar contact N/A N/AFEATURES• Mechanical keyed housingsPrevents accidental mating of componentsoperating at different voltage levels • Flat wiping contact systemAllows for minimal contact resistance at high current, wiping action cleans contact surface during disconnection• Genderless designMakes assembly quick and easy and reduces number of parts stocked11* Thin wallNote: For additional colors please contact customer serviceAnderson Power Products®HEADQUARTERS: 13 Pratts Junction Road, Sterling, MA 01564-2305 USA T:978-422-3600 F:978-422-3700EUROPE: Rathealy Road, Fermoy Co. Cork, Ireland T:353-(0)25-32277 F:353-(0)25-32296ASIA/PACIFIC: IDEAL Anderson Asia Pacific Ltd., Unit 922-928 Topsail Plaza, 11 On Sum Street, Shatin N.T., Hong Kong T:852-2636-0836 F:852-2635-9036CHINA: IDEAL Anderson Technologies (Shenzhen) Ltd., Block A8 T antou W. Ind. Par, Songgang Baoan District, Shenzhen, PR. China 51810 T : 86-755-2768-2118 F: 86-755-2768-2218TAIWAN: IDEAL Anderson Asia Pacific Ltd., Taiwan Branch, 4F.-2, No.116, Dadun 20th St., Situn District, Taichung City 407, Taiwan (R.O.C.) T: 886-4-2310-6451 F:886-4-2310-6460SB ®175 ConnectorORDERING INFORMATION & DIMENSIONSTEMPERATURE RISE CHARTAccessoriesPartNumber Description 995G1 Handle, hardware & lock washers - Gray 995G3 Handle, hardware & lock washers - Red 923 Manual release, locking half with clamps and hardware 924 Manual release, mounting half with clamps and hardware110G56 Lock nut for use with Bus bar contact SB175-lockout Safety lockout 111197G1 Charger key 134G2 Dust cover945 Cable clamps 945G3 Cable clamps-2 single conductor with hardware. Use with "A" frame only.946G1 Cable clamps-1 twin conductor with hardware. Use with "A" frame only.BushingsPart WireNumber Description AWG sq. mm 5648 Use with 944 1/0 to #10 53.5 to 5.15663 Use with 944 1/0 to #6 53.5 to 13.35687 Use with 944 1/0 to #1 53.5 to 42.45690 Use with 944 1/0 to #2 53.5 to 33.65693Use with 944 1/0 to #4 53.5 to 21.2ToolingPartNumber Description 1368 Hand tool for 1/0 to #1 (53.5/42.4)1387G 1Pneumatic tool1388G3 - die for 1/0 to #1 (53.5/42.4)1388G5 - die for #41389G5 - locator for #41389G3 - locator for 1/0 to #1 (53.5/42.4)1303G4 - die for 1/0 to #4 (53.5/21.1)1304G4- locator for 1/0 to #4 (53.5/21.1)020*******800100012000.528321285122048SB175Pulse Current CapabilityDuration of Current (seconds)A m p e r e s01020304040801201602001/01 AWG 2 AWG 4 AWGSB175Temperature Rise at Constant CurrentAmperes AppliedT e m p e r a t u r e (°C)1/01 AWG 2 AWG 4 AWGContactsPart -A--B- -C- -D- Bus Bar LayoutPart - J - - K - - L- - M -Number mm in. mm in. mm in. mm in.180BBS26.8 1.05 26.8(min) 1.05(min) 9.53 0.375 3.43 0.135Mounting DimensionsHousingBus Bar Mounting TablePart - E - - F - Number mm in. mm in. 180BBS88.9 3.50 10.2 0.40Part - J -Number mm in.[53.1]2.09[25.4]1.0DS-SB175 REV05。

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AO4924Asymmetric Dual N-Channel Enhancement Mode Field Effect TransistorAO4924SymbolMin TypMaxUnits BV DSS 30V V DS =24V, V GS =0V0.010.1T J =125°C510I GSS 0.1µA V GS(th)Gate Threshold Voltage 1.5 1.852.4V I D(ON)40A 1315.8T J =125°C20.025.015.719.5m Ωg FS 64S V SD 0.40.6V I S4.5A C iss 14501885pF C oss 224pF C rss92pF R g 1.6 3 ΩQ g (10V)24.031Q g (4.5V)12.0nC Q gs 3.9nC Q gd 4.2nC t D(on) 5.5ns t r 4.7ns t D(off)24.0ns t f 4.0ns t rr 1013ns Q rr6.8nCTHIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE.Body Diode Reverse Recovery Time Body Diode Reverse Recovery ChargeI F =9A, dI/dt=300A/µsDrain-Source Breakdown Voltage On state drain currentI D =1mA, V GS =0V V GS =4.5V, V DS =5V V GS =10V, I D =9AReverse Transfer CapacitanceI F =9A, dI/dt=300A/µs V DS =V GS I D =250µA FET1 Electrical Characteristics (T J =25°C unless otherwise noted)STATIC PARAMETERS Parameter Conditions I DSS Zero Gate Voltage Drain Current mA V DS =0V, V GS = ±12V Gate-Body leakage current R DS(ON)Static Drain-Source On-ResistanceForward TransconductanceDiode Forward VoltageMaximum Body-Diode + Schottky Continuous CurrentInput Capacitance Output Capacitance DYNAMIC PARAMETERS m ΩV GS =4.5V, I D =7AI S =1A,V GS =0V V DS =5V, I D =9ATurn-On Rise Time Turn-Off DelayTime V GS =10V, V DS =15V, R L =1.7Ω, R GEN =3ΩTurn-Off Fall TimeTurn-On DelayTime Total Gate Charge V GS =10V, V DS =15V, I D =9AGate Drain Charge V GS =0V, V DS =15V, f=1MHzSWITCHING PARAMETERS Total Gate Charge Gate Source Charge Gate resistance V GS =0V, V DS =0V, f=1MHz A: The value of R θJA is measured with the device in a still air environment with T A =25°C. The power dissipation P DSM and current rating I DSM are based on T (J(MAX)=150°C, using t ≤ 10s junction-to-ambient thermal resistance.B: Repetitive rating, pulse width limited by junction temperature T J(MAX)=150°C.C. The R θJA is the sum of the thermal impedence from junction to lead R θJL and lead to ambient.D. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.E. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The SOA curve provides a single pulse rating. Rev0:Sept. 2006AO4924AO4924AO4924AO4924SymbolMin TypMaxUnits BV DSS 30V 1T J =55°C5I GSS 100nA V GS(th)0.711.5V I D(ON)40A 2024T J =125°C283423.529m Ωg FS 26S V SD 0.711V I S4.5A C iss 9001100pF C oss 88pF C rss 65pF R g0.95 1.5ΩQ g 1012nC Q gs 1.8nC Q gd 3.75nC t D(on) 3.2ns t r 3.5ns t D(off)21.5ns t f 2.7ns t rr 16.820ns Q rr812nCTHIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE.Body Diode Reverse Recovery TimeBody Diode Reverse Recovery Charge I F =7.3A, dI/dt=100A/µsDrain-Source Breakdown Voltage On state drain currentI D =250µA, V GS =0V V GS =4.5V, V DS =5V V GS =10V, I D =7.3AReverse Transfer Capacitance FET2 Electrical Characteristics (T J =25°C unless otherwise noted)STATIC PARAMETERS ParameterConditions I DSS µA Gate Threshold Voltage V DS =V GS I D =250µA V DS =24V, V GS =0VV DS =0V, V GS = ±12V Zero Gate Voltage Drain Current Gate-Body leakage current R DS(ON)Static Drain-Source On-ResistanceForward TransconductanceDiode Forward Voltage I F =7.3A, dI/dt=100A/µsV GS =0V, V DS =15V, f=1MHz SWITCHING PARAMETERS Total Gate Charge V GS =4.5V, V DS =15V, I D =7.3AGate Source Charge Gate Drain Charge Turn-On Rise Time Turn-Off DelayTime V GS =10V, V DS =15V, R L =2Ω, R GEN =6ΩTurn-Off Fall TimeMaximum Body-Diode Continuous CurrentInput Capacitance Output Capacitance Turn-On DelayTime DYNAMIC PARAMETERS Gate resistanceV GS =0V, V DS =0V, f=1MHzm ΩV GS =4.5V, I D =6AI S =1A,V GS =0V V DS =5V, I D =7.3AA: The value of R θJA is measured with the device mounted on 1in 2FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The value in any given application depends on the user's specific board design. The current rating is based on the t ≤ 10s thermal resistance rating.B: Repetitive rating, pulse width limited by junction temperature.C. The R θJA is the sum of the thermal impedence from junction to lead R θJL and lead to ambient.D. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.E. These tests are performed with the device mounted on 1 in 2FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The SOA curve provides a single pulse rating. Rev 0 : Sept. 2006AO4924AO4924。

LM49242Cell Battery,40mW Per Channel Output Capacitor-Less (OCL)Stereo Headphone Audio AmplifierGeneral DescriptionThe LM4924is a Output Capacitor-Less (OCL)stereo head-phone amplifier,which when connected to a 3.0V supply,delivers 40mW per channel to a 16Ωload with less than 1%THD+N.With the LM4924packaged in the MM and SD packages,the customer benefits include low profile and small size.These packages minimizes PCB area and maximizes output power.The LM4924features circuitry that reduces output transients (“clicks”and “pops”)during device turn-on and turn-off,and Mute On and Off.An externally controlled,low-power con-sumption,active-low shutdown mode is also included in the LM4924.Boomer audio power amplifiers are designed spe-cifically to use few external components and provide high quality output power in a surface mount packages.Key Specificationsn OCL output powern (R L =16Ω,V DD =3.0V,THD+N =1%)40mW (typ)n Micropower shutdown current 0.1µA (typ)n Supply voltage operating range 1.5V <V DD <3.6V nPSRR 100Hz,V DD =3.0V,A V =2.566dB (typ)Featuresn 2-cell 1.5V to 3.6V battery operationn OCL mode for stereo headphone operation n Unity-gain stablen“Click and pop”suppression circuitry for shutdown On and Off transientsn Active low micropower shutdownn Thermal shutdown protection circuitry Applicationsn Portable two-cell audio products n Portable two-cell electronic devicesTypical ApplicationBoomer ®is a registered trademark of National Semiconductor Corporation.20121057FIGURE 1.Block DiagramOctober 2004LM49242Cell Battery,40mW Per Channel Output Capacitor-Less (OCL)Stereo Headphone Audio Amplifier©2004National Semiconductor Corporation Connection DiagramsMSOP PackageMSOP Marking20121058Top ViewOrder Number LM4924MMSee NS Package Number MUB10A for MSOP20121006Z-Plant Code X -Date Code T -Die Traceability G -Boomer Family B7-LM4924MMSD PackageSD Marking20121052Top ViewOrder Number LM4924SDSee NS Package Number SDA10A20121007Z -Plant Code X -Date Code T -Die Traceability Bottom Line -Part NumberL M 4924 2LM4924 Typical Connections20121059FIGURE2.Typical OCL Output Configuration Circuit3Absolute Maximum Ratings (Note 1)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.Supply Voltage 3.8VStorage Temperature −65˚C to +150˚C Input Voltage−0.3V to V DD +0.3VPower Dissipation (Note 2)Internally limitedESD Susceptibility(Note 3)2000V ESD Susceptibility on pin 7,8,and 9(Note 3)2kV ESD Susceptibility (Note 4)200V Junction Temperature 150˚CSolder InformationSmall Outline Package Vapor Phase (60sec)215˚C Infrared (15sec)220˚CSee AN-450“Surface Mounting and their Effects on Product Reliablilty”for other methods of soldering surface mount devices.Thermal Resistance θJA (typ)MUB10A 175˚C/W θJA (typ)SDA10A73˚C/WOperating RatingsTemperature Range T MIN ≤T A ≤T MAX −40˚C ≤T A ≤+85˚C Supply Voltage1.5V ≤V DD ≤3.6VElectrical Characteristics V DD =3.0V (Notes 1,5)The following specifications apply for the circuit shown in Figure 2,unless otherwise specified.A V =2.5,R L =16Ω.Limits apply for T A =25˚C.SymbolParameterConditionsLM4924Units (Limits)Typical Limit (Note 6)(Note 7)I DD Quiescent Power Supply Current V IN =0V,I O =0A,R L =∞(Note 8) 1.5 1.9mA (max)I SD Shutdown Current V SHUTDOWN =GND0.11µA (max)V OS Output Offset Voltage 110mV (max)P O Output Power (Note 9)f =1kHz,per channel OCL (Figure 2),THD+N =1%4030mW (min)V NO Output Voltage Noise20Hz to 20kHz,A-weighted,Figure 213µV RMSTHD P O =10mW 0.10.5%Crosstalk Freq =1kHz4535dB (min)PSRR Power Supply Rejection Ratio V RIPPLE =200mV P-P sine wave Freq =100Hz,OCL 6658dB (min)T WAKE-UP Wake-Up Time 1.5V ≤V DD ≤3.6V,Fig 2230msec V IH Control Logic High 1.5V ≤V DD ≤3.6V 0.7V DD V (min)V ILControl Logic Low1.5V ≤V DD ≤3.6V0.3V DDV (max)MuteAttenuation1V PP Reference,R IN =20k,R FB =50k9070dBElectrical Characteristics V DD =1.8V (Notes 1,5)The following specifications apply for the circuit shown in Figure 2,unless otherwise specified.A V =2.5,R L =16Ω.Limits apply for T A =25˚C.SymbolParameterConditionsLM4924Units (Limits)Typical Limit (Note 6)(Note 7)I DD Quiescent Power Supply Current V IN =0V,I O =0A,R L =∞(Note 8) 1.4mA (max)I SD Shutdown Current V SHUTDOWN =GND0.1µA (max)V OS Output Offset Voltage1mV (max)P O Output Power (Note 9)f =1kHzOCL Per channel,Fig.2,Freq =1kHz THD+N =1%10mW V NOOutput Voltage Noise20Hz to 20kHz,A-weighted,Figure 210µV RMSL M 4924 4Electrical Characteristics VDD =1.8V(Notes1,5)(Continued)The following specifications apply for the circuit shown in Figure2,unless otherwise specified.A V=2.5,R L=16Ω. Limits apply for T A=25˚C.Symbol Parameter Conditions LM4924Units(Limits)Typical Limit(Note6)(Note7)THD P O=5mW0.1% Crosstalk Freq=1kHz45dB(min)PSRR Power Supply Rejection Ratio V RIPPLE=200mV P-P sine waveFreq=100Hz,OCL66dBNote1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.Operating Ratings indicate conditions for which the device is functional,but do not guarantee specific performance limits.Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guarantee specific performance limits.This assumes that the device is within the Operating Ratings.Specifications are not guaranteed for parameters where no limitis given,however,the typical value is a good indication of device performance.Note2:The maximum power dissipation is dictated by T JMAX,θJA,and the ambient temperature T A and must be derated at elevated temperatures.The maximum allowable power dissipation is P DMAX=(T JMAX−T A)/θJA.For the LM4924,T JMAX=150˚C.For theθJA s,please see the Application Information section or theAbsolute Maximum Ratings section.Note3:Human body model,100pF discharged through a1.5kΩresistor.Note4:Machine model,220pF–240pF discharged through all pins.Note5:All voltages are measured with respect to the ground(GND)pins unless otherwise specified.Note6:Typicals are measured at25˚C and represent the parametric norm.Note7:Datasheet min/max specification limits are guaranteed by design,test,or statistical analysis.Note8:The quiescent power supply current depends on the offset voltage when a practical load is connected to the amplifier.Note9:Output power is measured at the device terminals.LM49245Typical Performance CharacteristicsTHD+N vs FrequencyV DD =1.8V,P O =5mW,R L =16ΩTHD+N vs FrequencyV DD =1.8V,P O =5mW,R L =32Ω2012101320121014THD+N vs FrequencyV DD=3.0V,P O =10mW,R L =16ΩTHD+N vs FrequencyV DD=3.0V,P O =10mW,R L =32Ω2012101520121016THD+N vs Output Power V DD =1.8V,R L =16Ω,f =1kHz THD+N vs Output Power V DD =1.8V,R L =32Ω,f =1kHz2012101720121018L M 4924 6Typical Performance Characteristics(Continued)THD+N vs Output PowerV DD=3.0V,R L=16Ω,f=1kHzTHD+N vs Output PowerV DD=3.0V,R L=32Ω,f=1kHz2012101920121020Power Supply Rejection RatioV DD=1.8V,R L=16Ω,Vripple=200mVp-p,Input Terminated into10ΩloadPower Supply Rejection RatioV DD=3.0V,R L=16Ω,Vripple=200mVp-p,Input Terminated into10Ωload2012101120121012Noise FloorV DD=1.8V,R L=16ΩNoise FloorV DD=3.0V,R L=16Ω2012100920121010LM4924 7Typical Performance Characteristics(Continued)Channel SeprationR L =16ΩOutput Power vs Load Resistance f =1kHz.from top to bottom:V DD =3.0V,10%THD+N;V DD =3.0V,1%THD+N V DD=1.8V,10%THD+N;V DD =1.8V,1%THD+N2012100820121021Output Power vs Supply Voltage R L =16Ω,from top to bottom:THD+N =10%;THD+N =1%Output Power vs Supply Voltage R L =32Ω,from top to bottom:THD+N =10%;THD+N =1%2012102220121023Power Dissipation vs Output Power V DD =1.8V,f =1kHz,from top to bottom:R L =16Ω;R L =32ΩPower Dissipation vs Output Power V DD =3.0V,f =1kHz,from top to bottom:R L =16Ω;R L =32Ω2012102420121025L M 4924 8LM4924 Typical Performance Characteristics(Continued)Supply Current vs Supply Voltage Array 201210269Application InformationELIMINATING OUTPUT COUPLING CAPACITORS Typical single-supply audio amplifiers that drive single-ended (SE)headphones use a coupling capacitor on each SE output.This output coupling capacitor blocks the half-supply voltage to which the output amplifiers are typically biased and couples the audio signal to the headphones.The signal return to circuit ground is through the headphone jack’s sleeve.The LM4924eliminates these output coupling capacitors.V o C is internally configured to apply a 1/2V DD bias voltage to a stereo headphone jack’s sleeve.This voltage matches the quiescent voltage present on the V o A and V o B outputs that drive the headphones.The headphones operate in a manner similar to a bridge-tied-load (BTL).The same DC voltage is applied to both headphone speaker terminals.This results in no net DC current flow through the speaker.AC current flows through a headphone speaker as an audio signal’s output amplitude increases on the speaker’s terminal.The headphone jack’s sleeve is not connected to circuit ing the headphone output jack as a line-level output will place the LM4924’s bandgap 1/2V DD bias on a plug’s sleeve connection.This presents no difficulty when the external equipment uses capacitively coupled inputs.For the very small minority of equipment that is DC-coupled,the LM4924monitors the current supplied by the amplifier that drives the headphone jack’s sleeve.If this current exceeds 500mA PK ,the amplifier is shutdown,protecting the LM4924and the external equipment.BYPASS CAPACITOR VALUE SELECTIONBesides minimizing the input capacitor size,careful consid-eration should be paid to value of C BYPASS ,the capacitor connected to the BYPASS pin.Since C BYPASS determines how fast the LM4924settles to quiescent operation,its value is critical when minimizing turn-on pops.The slower the LM4924’s outputs ramp to their quiescent DC voltage (nomi-nally V DD /2),the smaller the turn-on pop.Choosing C B equal to 4.7µF along with a small value of C i (in the range of 0.1µF to 0.47µF),produces a click-less and pop-less shutdown function.As discussed above,choosing C i no larger than necessary for the desired bandwidth helps minimize clicks and pops.This ensures that output transients are eliminated when power is first applied or the LM4924resumes opera-tion after shutdown.OPTIMIZING CLICK AND POP REDUCTION PERFORMANCEThe LM4924contains circuitry that eliminates turn-on and shutdown transients ("clicks and pops").For this discussion,turn-on refers to either applying the power supply voltage or when the micro-power shutdown mode is deactivated.As the V DD /2voltage present at the BYPASS pin ramps to its final value,the LM4924’s internal amplifiers are configured as unity gain buffers.An internal current source charges the capacitor connected between the BYPASS pin and GND in a controlled,linear manner.Ideally,the input and outputs track the voltage applied to the BYPASS pin.The gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches V DD /2.As soon as the voltage on the bypass pin is stable,the device becomes fully operational and the amplifier outputs are reconnected to their respective output pins.Although the BYPASS pin current cannot be modified,changing the size of C BYPASS alters the device’s turn-on time.There is a linear relationship between the sizeof C BYPASS and the turn-on time.Here are some typical turn-on times for various values of C BYPASS .AMPLIFIER CONFIGURATION EXPLANATIONAs shown in Figure 1,the LM4924has three operational amplifiers internally.Two of the amplifier’s have externally configurable gain while the other amplifier is internally fixed at the bias point acting as a unity-gain buffer.The closed-loop gain of the two configurable amplifiers is set by select-ing the ratio of R f to R i .Consequently,the gain for each channel of the IC isA V =-(R f /R i )By driving the loads through outputs V O1and V O2with V O3acting as a buffered bias voltage the LM4924does not require output coupling capacitors.The typical single-ended amplifier configuration where one side of the load is con-nected to ground requires large,expensive output coupling capacitors.A configuration such as the one used in the LM4924has a major advantage over single supply,single-ended amplifiers.Since the outputs V O1,V O2,and V O3are all biased at 1/2V DD ,no net DC voltage exists across each load.This elimi-nates the need for output coupling capacitors that are re-quired in a single-supply,single-ended amplifier configura-tion.Without output coupling capacitors in a typical single-supply,single-ended amplifier,the bias voltage is placed across the load resulting in both increased internal IC power dissipation and possible loudspeaker damage.POWER DISSIPATIONPower dissipation is a major concern when designing a successful amplifier.A direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal power dissipation.The maximum power dissipation for a given application can be derived from the power dissipation graphs or from Equation 1.P DMAX =4(V DD )2/(π2R L )(1)It is critical that the maximum junction temperature T JMAX of 150˚C is not exceeded.Since the typical application is for headphone operation (16Ωimpedance)using a 3.3V supply the maximum power dissipation is only 138mW.Therefore,power dissipation is not a major concern.POWER SUPPLY BYPASSINGAs with any amplifier,proper supply bypassing is important for low noise performance and high power supply rejection.The capacitor location on the power supply pins should be as close to the device as possible.Typical applications employ a 3.0V regulator with 10µF tan-talum or electrolytic capacitor and a ceramic bypass capaci-tor which aid in supply stability.This does not eliminate the need for bypassing the supply nodes of the LM4924.A bypass capacitor value in the range of 0.1µF to 1µF is recommended for C S .MICRO POWER SHUTDOWNThe voltage applied to the SHUTDOWN pin controls the LM4924’s shutdown function.Activate micro-power shut-down by applying a logic-low voltage to the SHUTDOWNL M 492410Application Information(Continued)pin.When active,the LM4924’s micro-power shutdown fea-ture turns off the amplifier’s bias circuitry,reducing the sup-ply current.The trigger point is 0.4V (max)for a logic-low level,and 1.5V (min)for a logic-high level.The low 0.1µA (typ)shutdown current is achieved by applying a voltage that is as near as ground as possible to the SHUTDOWN pin.A voltage that is higher than ground may increase the shut-down current.There are a few ways to control the micro-power shutdown.These include using a single-pole,single-throw switch,a microprocessor,or a microcontroller.When using a switch,connect an external 100k Ωpull-up resistor between the SHUTDOWN pin and V DD .Connect the switch between the SHUTDOWN pin and ground.Select normal amplifier opera-tion by opening the switch.Closing the switch connects the SHUTDOWN pin to ground,activating micro-power shut-down.The switch and resistor guarantee that the SHUT-DOWN pin will not float.This prevents unwanted state changes.In a system with a microprocessor or microcontrol-ler,use a digital output to apply the control voltage to the SHUTDOWN pin.Driving the SHUTDOWN pin with active circuitry eliminates the pull-up resistor.SELECTING EXTERNAL COMPONENTSSelecting proper external components in applications using integrated power amplifiers is critical to optimize device and system performance.While the LM4924is tolerant of exter-nal component combinations,consideration to component values must be used to maximize overall system quality.The LM4924is unity-gain stable which gives the designer maximum system flexibility.The LM4924should be used in low gain configurations to minimize THD+N values,and maximize the signal to noise ratio.Low gain configurations require large input signals to obtain a given output power.Input signals equal to or greater than 1V rms are available from sources such as audio codecs.Very large values should not be used for the gain-setting resistors.Values for R i and R f should be less than 1M Ω.Please refer to the section,Audio Power Amplifier Design ,for a more com-plete explanation of proper gain selectionBesides gain,one of the major considerations is the closed-loop bandwidth of the amplifier.The input coupling capacitor,C i ,forms a first order high pass filter which limits low fre-quency response.This value should be chosen based on needed frequency response and turn-on time.SELECTION OF INPUT CAPACITOR SIZEAmplifiying the lowest audio frequencies requires a high value input coupling capacitor,C i .A high value capacitor can be expensive and may compromise space efficiency in por-table designs.In many cases,however,the headphones used in portable systems have little ability to reproduce signals below 60Hz.Applications using headphones with this limited frequency response reap little improvement by using a high value input capacitor.In addition to system cost and size,turn-on time is affected by the size of the input coupling capacitor Ci.A larger input coupling capacitor requires more charge to reach its quies-cent DC voltage.This charge comes from the output via the feedback Thus,by minimizing the capacitor size based on necessary low frequency response,turn-on time can be minimized.A small value of Ci (in the range of 0.1µF to 0.39µF),is recommended.USING EXTERNAL POWERED SPEAKERSThe LM4924is designed specifically for headphone opera-tion.Often the headphone output of a device will be used to drive external powered speakers.The LM4924has a differ-ential output to eliminate the output coupling capacitors.The result is a headphone jack sleeve that is connected to V O3instead of GND.For powered speakers that are designed to have single-ended signals at the input,the click and pop circuitry will not be able to eliminate the turn-on/turn-off click and pop.Unless the inputs to the powered speakers are fully differential the turn-on/turn-off click and pop will be very large.AUDIO POWER AMPLIFIER DESIGN A 30mW/32ΩAudio Amplifier Given:Power Output 30mWrmsLoad Impedance 32ΩInput Level1VrmsInput Impedance 20k ΩA designer must first determine the minimum supply rail to obtain the specified output power.By extrapolating from the Output Power vs Supply Voltage graphs in the Typical Per-formance Characteristics section,the supply rail can be easily found.Since 3.3V is a standard supply voltage in most applications,it is chosen for the supply rail in this example.Extra supply voltage creates headroom that allows the LM4924to repro-duce peaks in excess of 30mW without producing audible distortion.At this time,the designer must make sure that the power supply choice along with the output impedance does no violate the conditions explained in the Power Dissipa-tion section.Once the power dissipation equations have been addressed,the required differential gain can be determined from Equa-tion 2.(2)From Equation 2,the minimum A V is 0.98;use A V =1.Since the desired input impedance is 20k Ω,and with A V equal to 1,a ratio of 1:1results from Equation 1for R f to R i .The values are chosen with R i =20k Ωand R f =20k Ω.The last step in this design example is setting the amplifier’s −3dB frequency bandwidth.To achieve the desired ±0.25dB pass band magnitude variation limit,the low frequency re-sponse must extend to at least one-fifth the lower bandwidth limit and the high frequency response must extend to at least five times the upper bandwidth limit.The gain variation for both response limits is 0.17dB,well within the ±0.25dB desired limit.The results are anf L =100Hz/5=20Hz(3)and anf H =20kHz x 5=100kHz(4)LM492411Application Information(Continued)As mentioned in the Selecting Proper External Compo-nents section,R i and C i create a highpass filter that sets the amplifier’s lower bandpass frequency limit.Find the coupling capacitor’s value using Equation (3).C i ≥1/(2πR i f L )(5)The result is1/(2π*20k Ω*20Hz)=0.397µFUse a 0.39µF capacitor,the closest standard value.The high frequency pole is determined by the product of the desired frequency pole,f H ,and the differential gain,A V .With an A V =1and f H =100kHz,the resulting GBWP =100kHz which is much smaller than the LM4924GBWP of 11MHz.This figure displays that if a designer has a need to design an amplifier with higher differential gain,the LM4924can still be used without running into bandwidth limitations.HIGHER GAIN AUDIO AMPLIFIER20121029FIGURE 3.L M 4924 12Application Information(Continued)The LM4924is unity-gain stable and requires no external components besides gain-setting resistors,input coupling capacitors,and proper supply bypassing in the typical appli-cation.However,if a very large closed-loop differential gain is required,a feedback capacitor(C f)may be needed to bandwidth limit the amplifier.This feedback capacitor cre-ates a low pass filter that eliminates possible high frequency oscillations.Care should be taken when calculating the-3dB frequency in that an incorrect combination of R f and C f will cause frequency response roll off before20kHz.A typical combination of feedback resistor and capacitor that will not produce audio band high frequency roll off is Rf=20kΩand C f=25pF.These components result in a-3dB point of approximately320kHz.REFERENCE DESIGN BOARD and LAYOUT GUIDELINES MSOP&SD BOARDS(Note:R PU2is not required.It is used for test measurement purposes only.)20121030FIGURE4.LM4924 13Application Information(Continued)PCB LAYOUT GUIDELINESThis section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power and ground traces.Designers should note that these are only "rule-of-thumb"recommendations and the actual results will depend heavily on the final layout.Minimization of THDPCB trace impedance on the power,ground,and all output traces should be minimized to achieve optimal THD perfor-mance.Therefore,use PCB traces that are as wide as possible for these connections.As the gain of the amplifier is increased,the trace impedance will have an ever increasing adverse affect on THD performance.At unity-gain (0dB)the parasitic trace impedance effect on THD performance is reduced but still a negative factor in the THD performance of the LM4924in a given application.GENERAL MIXED SIGNAL LAYOUT RECOMMENDATIONPower and Ground CircuitsFor two layer mixed signal design,it is important to isolate the digital power and ground trace paths from the analog power and ground trace paths.Star trace routing techniques (bringing individual traces back to a central point rather thandaisy chaining traces together in a serial manner)can greatly enhance low level signal performance.Star trace routing refers to using individual traces to feed power and ground to each circuit or even device.This technique will require a greater amount of design time but will not increase the final price of the board.The only extra parts required may be some jumpers.Single-Point Power /Ground ConnectionsThe analog power traces should be connected to the digital traces through a single point (link).A "PI-filter"can be helpful in minimizing high frequency noise coupling between the analog and digital sections.Further,place digital and analog power traces over the corresponding digital and analog ground traces to minimize noise coupling.Placement of Digital and Analog ComponentsAll digital components and high-speed digital signal traces should be located as far away as possible from analog components and circuit traces.Avoiding Typical Design /Layout ProblemsAvoid ground loops or running digital and analog traces parallel to each other (side-by-side)on the same PCB layer.When traces must cross over each other do it at 90degrees.Running digital and analog traces at 90degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise coupling and cross talk.L M 4924 14Physical Dimensionsinches (millimeters)unless otherwise notedMSOP PackageOrder Number LM4924MM NS Package Number MUB10ASD PackageOrder Number LM4924SD NS Package Number SDA10ALM492415NotesNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.For the most current product information visit us at .LIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body,or (b)support or sustain life,and whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.BANNED SUBSTANCE COMPLIANCENational Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2)and the Banned Substances and Materials of Interest Specification (CSP-9-111S2)and contain no ‘‘Banned Substances’’as defined in CSP-9-111S2.National Semiconductor Americas Customer Support CenterEmail:new.feedback@ Tel:1-800-272-9959National SemiconductorEurope Customer Support CenterFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)6995086208English Tel:+44(0)8702402171Français Tel:+33(0)141918790National Semiconductor Asia Pacific Customer Support CenterEmail:ap.support@National SemiconductorJapan Customer Support Center Fax:81-3-5639-7507Email:jpn.feedback@ Tel:81-3-5639-7560L M 49242C e l l B a t t e r y ,40m W P e r C h a n n e l O u t p u t C a p a c i t o r -L e s s (O C L )S t e r e o H e a d p h o n e A u d i o A m p l i f i e r。

FEATURES1 2 3 4 5 6 7 816 15 14 13 12 11 10 91IN+1IN−FEEDBACKDTCCTRTGNDC12IN+2IN−REFOUTPUT CTRL V CCC2E2E1D, DB, N, NS, OR PW PACKAGE(TOP VIEW) DESCRIPTION TL494PULSE-WIDTH-MODULATION CONTROL CIRCUITSSLVS074E–JANUARY1983–REVISED FEBRUARY2005•Complete PWM Power-Control Circuitry•Uncommitted Outputs for200-mA Sink orSource Current•Output Control Selects Single-Ended orPush-Pull Operation•Internal Circuitry Prohibits Double Pulse atEither Output•Variable Dead Time Provides Control OverTotal Range•Internal Regulator Provides a Stable5-VReference Supply With5%Tolerance•Circuit Architecture Allows EasySynchronizationThe TL494incorporates all the functions required in the construction of a pulse-width-modulation(PWM)control circuit on a single chip.Designed primarily for power-supply control,this device offers the flexibility to tailor the power-supply control circuitry to a specific application.The TL494contains two error amplifiers,an on-chip adjustable oscillator,a dead-time control(DTC)comparator, a pulse-steering control flip-flop,a5-V,5%-precision regulator,and output-control circuits.The error amplifiers exhibit a common-mode voltage range from–0.3V to V CC–2V.The dead-time control comparator has a fixed offset that provides approximately5%dead time.The on-chip oscillator can be bypassed by terminating RT to the reference output and providing a sawtooth input to CT,or it can drive the common circuits in synchronous multiple-rail power supplies.The uncommitted output transistors provide either common-emitter or emitter-follower output capability.The TL494provides for push-pull or single-ended output operation,which can be selected through the output-control function.The architecture of this device prohibits the possibility of either output being pulsed twice during push-pull operation.The TL494C is characterized for operation from0°C to70°C.The TL494I is characterized for operation from –40°C to85°C.AVAILABLE OPTIONSPACKAGED DEVICES(1)SHRINK SMALL THIN SHRINK T A SMALL OUTLINE PLASTIC DIP SMALL OUTLINEOUTLINE SMALL OUTLINE(D)(N)(NS)(DB)(PW) 0°C to70°C TL494CD TL494CN TL494CNS TL494CDB TL494CPW –40°C to85°C TL494ID TL494IN———(1)The D,DB,NS,and PW packages are available taped and reeled.Add the suffix R to device type(e.g.,TL494CDR).Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.GNDV CCC1E1C2E2FEEDBACKREFTL494PULSE-WIDTH-MODULATION CONTROL CIRCUITSSLVS074E–JANUARY 1983–REVISED FEBRUARY 2005FUNCTION TABLEINPUT TO OUTPUT FUNCTION OUTPUT CTRL V I =GND Single-ended or parallel output V I =V refNormal push-pull operationFUNCTIONAL BLOCK DIAGRAMAbsolute Maximum Ratings(1) Recommended Operating ConditionsTL494 PULSE-WIDTH-MODULATION CONTROL CIRCUITSSLVS074E–JANUARY1983–REVISED FEBRUARY2005over operating free-air temperature range(unless otherwise noted)MIN MAX UNIT V CC Supply voltage(2)41VV I Amplifier input voltage V CC+0.3VV O Collector output voltage41VI O Collector output current250mAD package73DB package82θJA Package thermal impedance(3)(4)N package67°C/WNS package64PW package108 Lead temperature1,6mm(1/16inch)from case for10seconds260°CT stg Storage temperature range–65150°C (1)Stresses beyond those listed under"absolute maximum ratings"may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under"recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)All voltages are with respect to the network ground terminal.(3)Maximum power disipation is a function of T J(max),θJA,and T A.The maximum allowable power dissipation at any allowable ambienttemperatire is P D=(T J(max)–T A)/θJA.Operating at the absolute maximum T J of150°C can affect reliability.(4)The package thermal impedance is calculated in accordance with JESD51-7.MIN MAX UNIT V CC Supply voltage740VV I Amplifier input voltage–0.3V CC–2VV O Collector output voltage40V Collector output current(each transistor)200mACurrent into feedback terminal0.3mA f OSC Oscillator frequency1300kHz C T Timing capacitor0.4710000nFR T Timing resistor 1.8500kΩTL494C070T A Operating free-air temperature°CTL494I–4085s +ȍNn +1(x n *X)2N *1ǸElectrical CharacteristicsReference SectionOscillator SectionError-Amplifier SectionTL494PULSE-WIDTH-MODULATION CONTROL CIRCUITSSLVS074E–JANUARY 1983–REVISED FEBRUARY 2005over recommended operating free-air temperature range,V CC =15V,f =10kHz (unless otherwise noted)TL494C,TL494I PARAMETERTEST CONDITIONS (1)UNIT MIN TYP (2)MAX Output voltage (REF)I O =1mA 4.755 5.25V Input regulation V CC =7V to 40V 225mV Output regulationI O =1mA to 10mA 115mV Output voltage change with temperature ∆T A =MIN to MAX 210mV/V Short-circuit output current (3)REF =0V25mA(1)For conditions shown as MIN or MAX,use the appropriate value specified under recommended operating conditions.(2)All typical values,except for parameter changes with temperature,are at T A =25°C.(3)Duration of short circuit should not exceed one second.C T =0.01µF,R T =12k Ω(see Figure 1)TL494C,TL494I PARAMETERTEST CONDITIONS (1)UNIT MIN TYP (2)MAXFrequency10kHz Standard deviation of frequency (3)All values of V CC ,C T ,R T ,and T A constant 100Hz/kHz Frequency change with voltage V CC =7V to 40V,T A =25°C 1Hz/kHz Frequency change with temperature (4)∆T A =MIN to MAX10Hz/kHz(1)For conditions shown as MIN or MAX,use the appropriate value specified under recommended operating conditions.(2)All typical values,except for parameter changes with temperature,are at T A =25°C.(3)Standard deviation is a measure of the statistical distribution about the mean as derived from the formula:(4)Temperature coefficient of timing capacitor and timing resistor are not taken into account.See Figure 2TL494C,TL494I PARAMETERTEST CONDITIONSUNIT MIN TYP (1)MAX Input offset voltage V O (FEEDBACK)=2.5V 210mV Input offset current V O (FEEDBACK)=2.5V 25250nA Input bias currentV O (FEEDBACK)=2.5V 0.21µA –0.3to Common-mode input voltage range V CC =7V to 40VV V CC –2Open-loop voltage amplification ∆V O =3V,V O =0.5V to 3.5V,R L =2k Ω7095dB Unity-gain bandwidth V O =0.5V to 3.5V,R L =2k Ω800kHz Common-mode rejection ratio ∆V O =40V,T A =25°C6580dB Output sink current (FEEDBACK)V ID =–15mV to –5V,V (FEEDBACK)=0.7V 0.30.7mA Output source current (FEEDBACK)V ID =15mV to 5V,V (FEEDBACK)=3.5V–2mA(1)All typical values,except for parameter changes with temperature,are at T A =25°C.Electrical Characteristics Output SectionDead-Time Control Section PWM Comparator Section Total DeviceSwitching CharacteristicsTL494 PULSE-WIDTH-MODULATION CONTROL CIRCUITSSLVS074E–JANUARY1983–REVISED FEBRUARY2005over recommended operating free-air temperature range,V CC=15V,f=10kHz(unless otherwise noted)PARAMETER TEST CONDITIONS MIN TYP(1)MAX UNIT Collector off-state current V CE=40V,V CC=40V2100µA Emitter off-state current V CC=V C=40V,V E=0–100µACommon emitter V E=0,I C=200mA 1.1 1.3 Collector-emitter saturation voltage VEmitter follower V O(C1or C2)=15V,I E=–200mA 1.5 2.5Output control input current V I=V ref 3.5mA (1)All typical values,except for temperature coefficient,are at T A=25°C.See Figure1PARAMETER TEST CONDITIONS MIN TYP(1)MAX UNIT Input bias current(DEAD-TIME CTRL)V I=0to5.25V–2–10µAV I(DEAD-TIME CTRL)=0,C T=0.01µF,Maximum duty cycle,each output45%R T=12kΩZero duty cycle3 3.3Input threshold voltage(DEAD-TIME CTRL)VMaximum duty cycle0(1)All typical values,except for temperature coefficient,are at T A=25°C.See Figure1PARAMETER TEST CONDITIONS MIN TYP(1)MAX UNIT Input threshold voltage(FEEDBACK)Zero duty cyle4 4.5V Input sink current(FEEDBACK)V(FEEDBACK)=0.7V0.30.7mA (1)All typical values,except for temperature coefficient,are at T A=25°C.PARAMETER TEST CONDITIONS MIN TYP(1)MAX UNITV CC=15V610R T=V ref,Standby supply current mAAll other inputs and outputs open VCC=40V915Average supply current V I(DEAD-TIME CTRL)=2V,See Figure17.5mA (1)All typical values,except for temperature coefficient,are at T A=25°C.TA=25°CPARAMETER TEST CONDITIONS MIN TYP(1)MAX UNIT Rise time100200nsCommon-emitter configuration,See Figure3Fall time25100nsRise time100200nsEmitter-follower configuration,See Figure4Fall time40100ns(1)All typical values,except for temperature coefficient,are at T A=25°C.PARAMETER MEASUREMENT INFORMATIONTest InputsOutput 1Output 2ΩTEST CIRCUITV CC V CC 0 V 0 VVoltage at C1Voltage at C2Voltage at CTDTC FEEDBACK0 V0.7 V VOLTAGE WAVEFORMSDuty CycleTL494PULSE-WIDTH-MODULATION CONTROL CIRCUITSSLVS074E–JANUARY 1983–REVISED FEBRUARY 2005Figure 1.Operational Test Circuit and WaveformsPARAMETER MEASUREMENT INFORMATIONV IFEEDBACKOutput= 15 pF TEST CIRCUITOUTPUT VOLTAGE WAVEFORMNOTE A:C Lincludes probe and jig capacitance.Output TEST CIRCUITOUTPUT VOLTAGE WAVEFORMNOTE A:C L includes probe and jig capacitance.TL494PULSE-WIDTH-MODULATION CONTROL CIRCUITSSLVS074E–JANUARY 1983–REVISED FEBRUARY 2005Figure 2.Amplifier CharacteristicsFigure mon-Emitter ConfigurationFigure 4.Emitter-Follower ConfigurationTYPICAL CHARACTERISTICS1 k4 k 10 k 40 k 100 k 400 k 1 Mf − O s c i l l a t o r F r e q u e n c y a n d F r e q u e n c y V a r i a t i o n − H zOSCILLATOR FREQUENCY ANDFREQUENCY VARIATION †vsR T − Timing Resistance − Ω†Frequency variation (∆f) is the change in oscillator frequency that occurs over the full temperature range.A − A m p l i f i e r V o l t a g e A m p l i f i c a t i o n − d Bf − Frequency − HzAMPLIFIER VOLTAGE AMPLIFICATIONvsFREQUENCYTL494PULSE-WIDTH-MODULATION CONTROL CIRCUITSSLVS074E–JANUARY 1983–REVISED FEBRUARY 2005Figure 5.Figure 6.PACKAGING INFORMATIONOrderableDeviceStatus (1)Package Type Package DrawingPins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)TL494CD ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CDBR ACTIVE SSOP DB 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CDBRE4ACTIVE SSOP DB 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CDBRG4ACTIVE SSOP DB 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CDE4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CDG4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CDR ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CDRE4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CDRG4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CJ OBSOLETE CDIP J 16TBD Call TI Call TITL494CN ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TL494CNE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TL494CNSR ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CNSRG4ACTIVE SO NS 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CPW ACTIVE TSSOP PW 1690Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CPWE4ACTIVE TSSOP PW 1690Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CPWG4ACTIVE TSSOP PW 1690Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CPWLE OBSOLETE TSSOP PW 16TBDCall TI Call TITL494CPWR ACTIVE TSSOP PW 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CPWRE4ACTIVE TSSOP PW 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494CPWRG4ACTIVE TSSOP PW 162000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494ID ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494IDE4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494IDG4ACTIVE SOIC D 1640Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494IDR ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494IDRE4ACTIVESOICD162500Green (RoHS &CU NIPDAULevel-1-260C-UNLIM28-May-2007Orderable DeviceStatus (1)Package Type Package DrawingPins Package QtyEco Plan (2)Lead/Ball FinishMSL Peak Temp (3)no Sb/Br)TL494IDRG4ACTIVE SOIC D 162500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM TL494IN ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TL494INE4ACTIVE PDIP N 1625Pb-Free (RoHS)CU NIPDAU N /A for Pkg Type TL494MJ OBSOLETE CDIP J 16TBD Call TI Call TI TL494MJBOBSOLETECDIPJ16TBDCall TICall TI(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peaksolder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.28-May-2007TAPE AND REEL BOXINFORMATIONDevicePackage Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant TL494CDBR DB 16SITE 41330168.2 6.6 2.51216Q1TL494CDR D 16SITE 2733016 6.510.3 2.1816Q1TL494CDR D 16SITE 4133016 6.510.3 2.1816Q1TL494CNSR NS 16SITE 41330168.210.5 2.51216Q1TL494CPWR PW 16SITE 41330127.0 5.6 1.6812Q1TL494IDRD16SITE 27330166.510.32.1816Q15-Oct-2007DevicePackage Pins Site Length (mm)Width (mm)Height (mm)TL494CDBR DB 16SITE 41346.0346.033.0TL494CDR D 16SITE 27342.9336.628.58TL494CDR D 16SITE 41346.0346.033.0TL494CNSR NS 16SITE 41346.0346.033.0TL494CPWR PW 16SITE 41346.0346.029.0TL494IDRD16SITE 27342.9336.628.585-Oct-2007IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or 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C 既4伏时，定时时间已到，555等效电路触发器的输入为：R=1、S=1，于是输出又翻转成低电平：V0=0。

继电器KA 释放，曝光灯HL 熄灭。

暂稳态结束，有恢复到稳态。

曝光时间计算公式为：T=1.1RT*CT 。

本电路提供参数的延时时间约为1秒~2分钟，可由电位器RP 调整和设置。

电路中的继电器必需选用吸合电流不应大于30mA 的产品，并应根据负载（HL ）的容量大小选择继电器触点容量。

单电源变双电源电路附图电路中，时基电路555接成无稳态电路，3脚输出频率为20KHz 、占空比为1：1的方波。

3脚为高电平时，C4被充电；低电平时，C3被充电。

由于VD1、VD2的存在，C3、C4在电路中只充电不放电，充电最大值为EC ，将B 端接地，在A 、C 两端就得到+/-EC 的双电源。

本电路输出电流超过50mA 。

简易催眠器时基电路555构成一个极低频振荡器，输出一个个短的脉冲，使扬声器发出类似雨滴的声音（见附图）。

扬声器采用2英寸、8欧姆小型动圈式。

雨滴声的速度可以通过100K 电位器来调节到合适的程度。

如果在电源端增加一简单的定时开关，则可以在使用者进入梦乡后及时切断电源。

直流电机调速控制电路这是一个占空比可调的脉冲振荡器。

电机M 是用它的输出脉冲驱动的，脉冲占空比越大，电机电驱电流就越小，转速减慢；脉冲占空比越小，电机电驱电流就越大，转速加快。

因此调节电位器RP 的数值可以调整电机的速度。

如电极电驱电流不大于200mA 时，可用CB555直接驱动；如电流大于200mA ，应增加驱动级和功放级。

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VOLTAGE RANGE 50 to 1000 Volts 1G1 THRU 1G7CURRENT1.0 AmpereFEATURES• Glass passivated chip junction • Low forward voltage drop • Low reverse leakage• High forward surge current capability •High temperature soldering guaranteed:260℃/10 secods,0.375”(9.5mm)lead length at 5 lbs(2.3kg) tensionMECHANICAL DATA• Case: Transfer molded plastic• Epoxy: UL94V-0 rate flame retardant • Polarity: Color band denotes cathode end• Lead: Plated axial lead, solderable per MIL-STD-202E method 208C • Mounting position: Any•Weight: 0.007ounce, 0.20 gramsMAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS• Ratings at 25O C ambient temperature unless otherwise specified • Single Phase, half wave, 60Hz, resistive or inductive load • For capacitive load derate current by 20%SYMBOLS1G1 1G2 1G3 1G4 1G5 1G6 1G7 UNITMaximum Repetitive Peak Reverse Voltage V RRM 50 100 200 400 600 800 1000 Volts Maximum RMS Voltage V RMS 35 70 140 280 420 560 700 Volts Maximum DC Blocking VoltageV DC 50100200400 6008001000Volts Maximum Average Forward Rectified Current 0.375”(9.5mm) lead length at T A = 25℃ I (AV) 1.0 Amp Peak Forward Surge Current8.3mS single half sine wave superimposed on rated load (JEDEC method)I FSM 25 Amps Maximum Instantaneous Forward Voltage @ 1.0A V F 1.1 Volts T A = 25℃ 5.0 Maximum DC Reverse Current at Rated DC Blocking VoltageT A = 125℃I R 50 µA Maximum DC Reverse Current, full cycleAverage 0.375(9.5mm) lead length at T L =75℃ I R(AV) 30µA Typical Junction Capacitance (NOTE 1) C J 15 pF Typical Thermal Resistance (NOTE 2) R θJA 50℃/WOperating Temperature Range T J (-55 to +150) Storage Temperature RangeT STG(-55 to +150)℃Notes:1.Measured at 1.0MHz and a]pplied Reverse voltage of 4.0Volits.2. Thermal Resistance from Junction to Ambient at. 375”(9.5mm)lead length, P.C. board mounted.VOLTAGE RANGE 50 to 1000 Volts 1G1 THRU 1G7CURRENT1.0 Ampere2020I N S T A N T A N E O U S R E V E R S EC U R R E N T ,I N S T A N T A N E O U S F O R W A RD C U R RE N T ,C A P A C I T A N C E ,(p F )REVERSE VOLTAGE,(V)10.14.01.010.0FIG.5-TYPICAL JUNCTION CAPACITANCEINSTANTANEOUS FORWARD VOLTAGE,(V)10100(A )0.11100PERCENT OF RATED PEAKREVERSE VOLTAGE,(%)(μA )0.010.11.0AMBIENT TEMPERATURE, (°C)FORWARD CHARACTERISTICSFIG.3-TYPICAL INSTANTANEOUS(A )A V E R A G E F O R W A R D C U R R E N T ,2500.4500.60.810075125150FIG.1-TYPICAL FORWARD CURRENTDERATING CURVEFIG.4-TYPICAL REVERSE FORWARD SURGE CURRENTNUMBER OF CYCLES AT 60 Hz10P E A K F O R W A R D S U R G EC U R R E N T , (A )10252030CHARACTERISTICSFIG.2-MAXIMUM NON-REPETITIVE PEAKRATING AND CHRACTERISTIC CURVES 1G1 THRU 1G70.21.01.2。

彩电常用IC的代换 [转帖 2008-05-18 14:13:37]字号：大中小海尔CPULC863324A-5T32可用LC863324A-5T51代换,不用换存储器.小信号处理LA76810=LA76820.TDA8305=TDA4501.TDA3566=TDA3562AN5265是伴音功放,可代换的有CD5265CS.-SK9876.-NIE1789TL494CN.-TL494C.-ECG1789.33A17056..................... ..........AN5195K是中频.色度.扫描信号处理可代换有AN5195-B.-AN5192K.-AN5292K-A.......................AN5071是波段切换开关可代换的有AN5071P.-AN5070.-SK9725.-ECG1688.-EW84X315.-NTE1688.1027.4264................... AN5534是场输出可用TEA2661代换............场输出AN5521可代换的有IXO238CE.-IXO355CE.-IXO640CE.-LA7830.-TA8403K.-UPC1378H................CTV 222SPRC11微处理器电路可代换的有LH84C640P.-PCA84C444.-PC84C641....CTV 5915G W3微处理器电路可代换有CTV 591SG W3.-P83C266B DR/100.-P87C766BDR/C...............CD4052音频转换开关电路可代换有CD4052BE.-CD4052BD.-B U4052B .-99195-3C D4052B CN.-34052PC.-4052BDC.-B O470522................CD7630是双声道音量/音调/高.低音平衡控制电路可代换有TA7630.-TA7630P.-RH-IX0214CEZZ.-D7630.-CD7630GP.-D7630P.-IX0214CE.MC13301P..... ...........康佳彩电部分IC代换康佳彩电微处理器的代换一、康佳彩电微处理器的代换1．康佳“B”系列彩电CPU的代换1．M37210M3-902SP可代换M37210M3—800SP。

TL494常应用于电源电路当中,在本站的文章中,除了本文TL494中文资料及应用电路,还有一个电路是应用了TL494资料的,具体的电路图,请参考本站文章:200W的ATX电源线路图,本文已经提供了比较丰富的TL494中文资料了TL494是一种固定频率脉宽调制电路，它包含了开关电源控制所需的全部功能，广泛应用于单端正激双管式、半桥式、全桥式开关电源。

TL494有SO-16和PDIP-16两种封装形式，以适应不同场合的要求。

其主要特性如下：TL494主要特征集成了全部的脉宽调制电路。

片内置线性锯齿波振荡器，外置振荡元件仅两个（一个电阻和一个电容）。

内置误差放大器。

内止5V参考基准电压源。

可调整死区时间。

内置功率晶体管可提供500mA的驱动能力。

推或拉两种输出方式。

TL494外形图TL494引脚图TL494工作原理简述TL494是一个固定频率的脉冲宽度调制电路，内置了线性锯齿波振荡器，振荡频率可通过外部的一个电阻和一个电容进行调节，其振荡频率如下：输出脉冲的宽度是通过电容CT上的正极性锯齿波电压与另外两个控制信号进行比较来实现。

功率输出管Q1和Q2受控于或非门。

当双稳触发器的时钟信号为低电平时才会被选通，即只有在锯齿波电压大于控制信号期间才会被选通。

当控制信号增大，输出脉冲的宽度将减小。

参见图2。

TL494脉冲控制波形图控制信号由集成电路外部输入，一路送至死区时间比较器，一路送往误差放大器的输入端。

死区时间比较器具有120mV的输入补偿电压，它限制了最小输出死区时间约等于锯齿波周期的4%，当输出端接地，最大输出占空比为96%，而输出端接参考电平时，占空比为48%。

当把死区时间控制输入端接上固定的电压（范围在0—3.3V之间）即能在输出脉冲上产生附加的死区时间。

脉冲宽度调制比较器为误差放大器调节输出脉宽提供了一个手段：当反馈电压从0.5V变化到3.5时，输出的脉冲宽度从被死区确定的最大导通百分比时间中下降到零。