MC74LCX245DWR2中文资料

74HC245详细中文资料74HC245是一款高速CMOS器件，74HC245引脚兼容低功耗肖特基TTL（LSTTL）系列。

74HC245译码器可接受3位二进制加权地址输入（A0, A1和A2），并当使能时，提供8个互斥的低有效输出（Y0至Y7）。

74HC245特有3个使能输入端：两个低有效（E1和E2）和一个高有效（E3）。

除非E1和E2置低且E3置高，否则74HC138将保持所有输出为高。

利用这种复合使能特性，仅需4片74HC245芯片和1个反相器，即可轻松实现并行扩展，组合成为一个1-32（5线到32线）译码器。

任选一个低有效使能输入端作为数据输入，而把其余的使能输入端作为选通端，则74HC245亦可充当一个8输出多路分配器，未使用的使能输入端必须保持绑定在各自合适的高有效或低有效状态。

74HC245与74HC238逻辑功能一致，只不过74HC138为反相输出。

功能CD74HC245 ，CD74HC238和CD74HCT245， CD74HCT238是高速硅栅CMOS解码器，适合内存地址解码或数据路由应用。

74HC245作用原理于高性能的存贮译码或要求传输延迟时间短的数据传输系统,在高性能存贮器系统中,用这种译码器可以提高译码系统的效率。

将快速赋能电路用于高速存贮器时,译码器的延迟时间和存贮器的赋能时间通常小于存贮器的典型存取时间,这就是说由肖特基钳位的系统译码器所引起的有效系统延迟可以忽略不计。

HC138 按照三位二进制输入码和赋能输入条件,从8 个输出端中译出一个低电平输出。

两个低电平有效的赋能输入端和一个高电平有效的赋能输入端减少了扩展所需要的外接门或倒相器,扩展成24 线译码器不需外接门;扩展成32 线译码器,只需要接一个外接倒相器。

在解调器应用中,赋能输入端可用作数据输入端。

特性复合使能输入，轻松实现扩展兼容JEDEC标准no.7A 存储器芯片译码选择的理想选择低有效互斥输出 ESD保护 HBM EIA/JESD22-A114-C超过2000 V MM EIA/JESD22-A115-A超过200 V 温度范围 -40～+85 ℃ -40～+125 ℃多路分配功能74HC245是一款高速CMOS器件，74HC245引脚兼容低功耗肖特基TTL（L STTL）系列。

MC74LVX245Octal Bus TransceiverWith 5 V−Tolerant InputsThe MC74LVX245 is an advanced high speed CMOS octal bus transceiver.It is intended for two−way asynchronous communication between data buses. The direction of data transmission is determined by the level of the T/R input. The output enable pin (OE) can be used to disable the device, so that the buses are effectively isolated.All inputs are equipped with protection circuits against static discharge.Features•High Speed: t PD = 4.7 ns (Typ) at V CC = 3.3 V•Low Power Dissipation: I CC = 4 m A (Max) at T A = 25°C •Power Down Protection Provided on Inputs •Balanced Propagation Delays •Low Noise: V OLP = 0.8 V (Max)•Pin and Function Compatible with Other Standard Logic Families •Latchup Performance Exceeds 300 mA•ESD Performance:Human Body Model > 2000 V;Machine Model > 200 V•These Devices are Pb−Free and are RoHS CompliantApplication Notes•Do Not Force a Signal on an I/O Pin when it is an Active Output,Damage May Occur•All Floating (High Impedance) Input or I/O Pins must be Fixed by Means of Pullup or Pulldown Resistors or Bus Terminator ICs •A Parasitic Diode is Formed between the Bus and V CC Terminals Therefore, the LVX245 cannot be Used to Interface 5.0 V to 3.0 VSystems DirectlySee detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.ORDERING INFORMATION120MARKING DIAGRAMSSOIC−20DW SUFFIX CASE 751DTSSOP−20DT SUFFIX CASE 948ELVX245= Specific Device Code A = Assembly Location WL, L = Wafer Lot Y= YearWW, W = Work WeekG or G= Pb−Free Package(Note: Microdot may be in either location)LVX 245ALYW G GSOIC−20TSSOP−20PIN ASSIGNMENT20−Lead (Top View)192018171615142134567V CC 1381291110OE B0B1B2B3B4B5B6B7T/R A0A1A2A3A4A5A6A7GNDB0OE 19T/R 1A0B1A1B2A2B3A3B4A4B5A5B6A6B7A7Figure 1. Logic DiagramTable 1. PIN NAMESPins FunctionOE T/R A0−A7Bo−B7Output Enable Input Transmit/Receive InputSide A 3−State Inputs or 3−State Outputs Side B 3−State Inputs or 3−State OutputsINPUTS OPERATING MODE Non−Inverting OE T/R L L B Data to A Bus L H A Data to B Bus HXZH = High Voltage Level; L = Low Voltage Level; Z = High Impedance State;X = High or Low Voltage Level and Transitions are Acceptable; For I CC reasons, Do Not Float InputsMAXIMUM RATINGSSymbol Parameter Value Unit V CC DC Supply Voltage–0.5 to +7.0V V in DC Input Voltage (T/R, OE)–0.5 to +7.0V V I/O DC Output Voltage–0.5 to V CC +0.5VI IK Input Diode Current−20mAI OK Output Diode Current±20mAI out DC Output Current, per Pin±25mAI CC DC Supply Current, V CC and GND Pins±75mAP D Power Dissipation180mW T stg Storage Temperature–65 to +150°C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Max Unit V CC DC Supply Voltage 2.0 3.6V V in DC Input Voltage (T/R, OE)0 5.5V V I/O DC Output Voltage0V CC V T A Operating Temperature, All Package Types−40+85°CD t/D V Input Rise and Fall Time0100ns/V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.DC ELECTRICAL CHARACTERISTICSSymbol Parameter Test Conditions V CCVT A = 25°C T A = −40 to 85°CUnit Min Typ Max Min MaxV IH High−Level Input Voltage 2.03.03.61.52.02.41.52.02.4VV IL Low−Level Input Voltage 2.03.03.60.50.80.80.50.80.8VV OH High−Level Output Voltage(V in = V IH or V IL)I OH = −50 m AI OH = −50 m AI OH = −4 mA2.03.03.01.92.92.582.03.01.92.92.48VV OL Low−Level Output Voltage(V in = V IH or V IL)I OL = 50 m AI OL = 50 m AI OL = 4 mA2.03.03.00.00.00.10.10.360.10.10.44VI in Input Leakage Current V in = 5.5 V or GND(T/R, OE)3.6±0.1±1.0m AI OZ Maximum 3−State Leakage Current V in = V IL or V IHV out = V CC or GND 3.6±0.25±2.5m AI CC Quiescent Supply Current V in = V CC or GND 3.6 4.040.0m A Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.AC ELECTRICAL CHARACTERISTICS (Input t r = t f= 3.0 ns)Symbol Parameter Test ConditionsT A = 25°C T A = −40 to 85°CUnit Min Typ Max Min Maxt PLH, t PHL Propagation DelayInput to OutputV CC = 2.7 V C L = 15 pFC L = 50 pF6.18.610.714.21.01.013.517.0nsV CC = 3.3 ± 0.3 V C L = 15 pFC L = 50 pF4.77.26.610.11.01.08.011.5t PZL, t PZH Output Enable Time toHigh and Low LevelV CC = 2.7 V C L = 15 pFR L = 1 k W C L = 50 pF9.011.516.920.41.01.020.524.0nsV CC = 3.3 ± 0.3 V C L = 15 pFR L = 1 k W C L = 50 pF7.19.611.014.51.01.013.016.5t PLZ, t PHZ Output Disable Time FromHigh and Low LevelV CC = 2.7 V C L = 50 pFR L = 1 k W11.518.0 1.021.0nsV CC = 3.3 ± 0.3 V C L = 50 pFR L = 1 k W9.612.8 1.014.5t OSHL t OSLH Output−to−Output Skew(Note 1)V CC = 2.7 V C L = 50 pFV CC = 3.3 ±0.3 V C L = 50 pF1.51.51.51.5ns1.Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t OSHL) or LOW−to−HIGH (t OSLH); parameter guaranteed by design.CAPACITIVE CHARACTERISTICSSymbol ParameterT A = 25°C T A = −40 to 85°CUnit Min Typ Max Min MaxC in Input Capacitance (T/R, OE)41010pFC I/O Maximum 3−State I/O Capacitance8pFC PD Power Dissipation Capacitance (Note 2)21pF2.C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.Average operating current can be obtained by the equation: I CC(OPR) = C PD V CC f in + I CC/8 (per bit). C PD is used to determine the no−load dynamic power consumption; P D = C PD V CC2 f in + I CC V CC.NOISE CHARACTERISTICS (Input t r = t f = 3.0ns, C L = 50pF, V CC = 3.3V, Measured in SOIC Package)Symbol CharacteristicT A = 25°CUnit Typ MaxV OLP Quiet Output Maximum Dynamic V OL0.50.8V V OLV Quiet Output Minimum Dynamic V OL−0.5−0.8V V IHD Minimum High Level Dynamic Input Voltage 2.0V V ILD Maximum Low Level Dynamic Input Voltage0.8VFigure 2. Figure 3.V CCGNDSWITCHING WAVEFORMSOEA or BA or BV CCGND HIGHIMPEDANCE V OL +0.3V V OH -0.3V HIGHIMPEDANCEV CC GNDT/R*Includes all probe and jig capacitance C L *TEST POINT *Includes all probe and jig capacitanceTEST POINT CONNECT TO V CC WHEN TESTING t PLZ AND t PZL .CONNECT TO GND WHEN TESTING t PHZ AND t PZH .TEST CIRCUITSFigure 4. Propagation Delay Test Circuit Figure 5. 3−State Test CircuitORDERING INFORMATIONDevicePackage Shipping †MC74LVX245DWR2G SOIC−20(Pb−Free)1000 / Tape & Reel MC74LVX245DTR2GTSSOP−20(Pb−Free)2500 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.CASE 948E−02ISSUE CDIM A MIN MAX MIN MAX INCHES 6.600.260MILLIMETERS B 4.30 4.500.1690.177C 1.200.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.270.370.0110.015J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSCM0 8 0 8 ____NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION:MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSIONSHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.DETAIL E6.400.252------16X0.360.65PITCHSOLDERING FOOTPRINT**For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.CASE 751D−05ISSUE GM0.25SA SBTDIM MIN MAXMILLIMETERSA 2.35 2.65A10.100.25B0.350.49C0.230.32D12.6512.95E7.407.60e 1.27 BSCH10.0510.55h0.250.75L0.500.90q0 7NOTES:1.DIMENSIONS ARE IN MILLIMETERS.2.INTERPRET DIMENSIONS AND TOLERANCESPER ASME Y14.5M, 1994.3.DIMENSIONS D AND E DO NOT INCLUDE MOLDPROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.5.DIMENSION B DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE PROTRUSIONSHALL BE 0.13 TOTAL IN EXCESS OF BDIMENSION AT MAXIMUM MATERIALCONDITION.__ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at /site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATIONMouser ElectronicsAuthorized DistributorClick to View Pricing, Inventory, Delivery & Lifecycle Information:O N Semiconductor:MC74LVX245MELG MC74LVX245MG MC74LVX245DTR2MC74LVX245DTR2G MC74LVX245DWR2 MC74LVX245DWR2G。

© 2002 Fairchild Semiconductor Corporation DS500648September 2001Revised February 200274ALVCH245 Low Voltage Bidirectional Transceiver with Bushold74ALVCH245Low Voltage Bidirectional Transceiver with BusholdGeneral DescriptionThe ALVCH245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus ori-ented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B Ports by placing them in a high impedance state. The ALVCH245data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or float-ing data inputs at a valid logic level.The 74ALVCH245 is designed for low voltage (1.65V to 3.6V) V CC applications.The 74ALVCH245 is fabricated with an advanced CMOS technology to achieve high-speed operation while main-taining low CMOS power dissipation.Featuress 1.65V to 3.6V V CC supply operations Bushold on data inputs eliminates the need for external pull-up/pull-down resistors s t PD3.6 ns max for 3.0V to 3.6V V CC4.2 ns max for 2.3V to 2.7V V CC 6 ns max for 1.65V to 1.95V V CCs Uses patented Quiet Series noise/EMI reductioncircuitry s Latchup conforms to JEDEC JED78s ESD performance:Human body model > 2000V Machine model > 200VOrdering Code:Devices also available in T ape and Reel. Specify by appending the suffix letter “X” to the ordering code.Logic Symbol Pin DescriptionsQuiet Series is a trademark of Fairchild Semiconductor Corporation.Order Number Package NumberPackage Description74ALVCH245WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ALVCH245MTCMTC2020-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePin NamesDescriptionOE Output Enable Input (Active LOW)T/R Transmit/Receive InputA 0–A 7Side A Bushold Inputs or 3-STATE OutputsB 0–B 7Side B Bushold Inputs or 3-STATE Outputs 274A L V C H 245Connection DiagramTruth TableH = HIGH Voltage Level L = LOW Voltage Level X = ImmaterialZ = High ImpedanceLogic DiagramInputs OutputsOE T/R L L Bus B 0–B 7 Data to Bus A 0–A 7L H Bus A 0–A 7 Data to Bus B 0–B 7HXHIGH Z State on A 0–A 7, B 0–B 774ALVCH245Absolute Maximum Ratings (Note 1)Recommended Operating Conditions (Note 3)Note 1: The Absolute Maximum Ratings are those values beyond whichthe safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Rat-ings. The “Recommended Operating Conditions ” table will define the condi-tions for actual device operation.Note 2: I O Absolute Maximum Rating must be observed, limited to 4.6V.Note 3: Floating or unused control inputs must be held HIGH or LOW.DC Electrical CharacteristicsSupply Voltage (V CC )−0.5V to +4.6V DC Input Voltage (V I )−0.5V to 4.6V Output Voltage (V O ) (Note 2)−0.5V to V CC +0.5VDC Input Diode Current (I IK ) V I < 0V−50 mA DC Output Diode Current (I OK )V O < 0V−50 mA DC Output Source/Sink Current (I OH /I OL )±50 mA DC V CC or GND Current per Supply Pin (I CC or GND)±100 mAStorage Temperature Range (T STG )−65°C to +150°CPower Supply Operating 1.65V to 3.6VInput Voltage (V I )0V to V CCOutput Voltage (V O )0V to V CCFree Air Operating Temperature (T A )−40°C to +85°CMinimum Input Edge Rate (∆t/∆V)V IN = 0.8V to 2.0V, V CC = 3.0V10 ns/VSymbol ParameterConditionsV CC Min MaxUnits(V)V IHHIGH Level Input Voltage1.65 - 1.950.65 x V CCV2.3 - 2.7 1.72.7 -3.62.0V ILLOW Level Input Voltage1.65 - 1.950.35 x V CCV 2.3 - 2.70.72.7 - 3.60.8V OHHIGH Level Output VoltageI OH = −100 µA 1.65 - 3.6V CC - 0.2VI OH = −4 mA 1.65 1.2I OH = −6 mA 2.3 2.0I OH = −12 mA2.3 1.72.7 2.23.02.4I OH = −24 mA3.02V OLLOW Level Output VoltageI OL = 100 µA 1.65 - 3.60.2V I OL = 4 mA 1.650.45I OL = 6 mA 2.30.4I OL = 12 mA 2.30.72.70.4I OL = 24 mA3.0I I Input Leakage Current 0 ≤ V I ≤ 3.6V 3.6±5.0µAI I(HOLD)Bushold Input Minimum V IN = 0.58V 1.6525µADrive Hold CurrentV IN = 1.07V 1.65−25V IN = 0.7V 2.345V IN = 1.7V 2.3−45V IN = 0.8V 3.075V IN = 2.0V 3.0−750 < V O ≤ 3.6V3.6±500I OZ 3-STATE Output Leakage 0 ≤ V O ≤ 3.6V3.6±10µA I CC Quiescent Supply Current V I = V CC or GND, I O = 0 3.610µA ∆I CCIncrease in I CC per InputV IH = V CC − 0.6V3 - 3.6750µA 474A L V C H 245AC Electrical CharacteristicsCapacitanceSymbolParameterT A = −40°C to +85°C, R L = 500ΩUnitsC L = 50 pFC L = 30 pFV CC = 3.3V ± 0.3V V CC = 2.7V V CC = 2.5V ± 0.2VV CC = 1.8V ± 0.15V MinMax MinMax Min Max Min Max t PHL , t PLH Propagation Delay 1.3 3.6 4.2 1.0 3.7 1.5 6.0ns t PZL , t PZH Output Enable Time 1.6 5.5 6.3 2.0 6.0 2.98.6ns t PLZ , t PHZOutput Disable Time1.75.55.30.84.81.58.0ns Symbol ParameterConditionsT A = +25°C Units V CC Typical C IN Input Capacitance Control V I = 0V or V CC 3.3 4.5pF C I/O Input/Output Capacitance A or B PortsV I = 0V or V CC3.312pFC PDPower Dissipation CapacitanceOutputs Enabled f = 10 MHz, C L = 0 pF3.331pF 2.5281.825Outputs Disabled f = 10 MHz, C L = 50 pF3.302.501.874ALVCH245AC Loading and WaveformsFIGURE 1. AC Test CircuitTABLE 1. Values for Figure 1TABLE 2. Variable Matrix(Input Characteristics: f = 1MHz; t r = t f = 2ns; Z 0 = 50Ω)FIGURE 2. Waveform for Inverting and Non-inverting FunctionsFIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage LogicFIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage LogicTEST SWITCH t PLH , t PHL Open t PZL , t PLZ V L t PZH , t PHZGNDSymbol V CC3.3V ± 0.3V2.7V 2.5V ± 0.2V 1.8V ± 0.15VV mi 1.5V 1.5V V CC /2V CC /2V mo 1.5V 1.5V V CC /2V CC /2V x V OL + 0.3V V OL + 0.3V V OL + 0.15V V OL + 0.15V V y V OH − 0.3VV OH − 0.3VV OH − 0.15V V OH − 0.15V V L6V6VV CC *2V CC *2 674A L V C H 245Physical Dimensionsinches (millimeters) unless otherwise noted20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" WidePackage Number M20B774ALVCH245 Low Voltage Bidirectional Transceiver with BusholdPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage Number MTC20Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。

© 2005 Fairchild Semiconductor Corporation DS500167June 1999Revised April 200574VCX245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs74VCX245Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and OutputsGeneral DescriptionThe VCX245 contains eight non-inverting bidirectional buff-ers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B ports by plac-ing them in a high impedance state.The 74VCX245 is designed for low voltage (1.4V to 3.6V)V CC applications with I/O compatibility up to 3.6V.The 74VCX245 is fabricated with an advanced CMOS technology to achieve high-speed operation while main-taining low CMOS power dissipation.Featuress 1.4V to 3.6V V CC supply operation s 3.6V tolerant inputs and outputss Power-off high impedance inputs and outputs s Supports Live Insertion and Withdrawal (Note 1)s t PD3.5 ns max for 3.0V to 3.6V V CC s Static Drive (I OH /I OL )r 24 mA @ 3.0V V CCs Uses patented noise/EMI reduction circuitry s Latchup performance exceeds 300 mA s ESD performance:Human body model ! 2000V Machine model ! 200Vs Leadless DQFN Pb-Free packageNote 1: To ensure the high impedance state during power up and power down, OE n should be tied to V CC through a pull up resistor. The minimum value of the resistor is determined by the current sourcing capability of the driver.Ordering Code:Pb-Free package per JEDEC J-STD-020B.Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.Note 3: DQFN package available in Tape and Reel only,Logic Symbol Pin DescriptionsOrder Number Package Number Package Description74VCX245WM (Note 2)M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide74VCX245BQX (Note 3)MLP020B Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm74VCX245MTC (Note 2)MTC2020-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePin Names DescriptionOE Output Enable Input (Active LOW)T/R Transmit/Receive InputA 0–A 7Side A Inputs or 3-STATE OutputsB 0–B 7Side B Inputs or 3-STATE Outputs 274V C X 245Connection DiagramsPin Assignments for SOIC and TSSOPPin Assignment for DQFN(Top Through View)Truth TableH HIGH Voltage Level L LOW Voltage Level X ImmaterialZ High ImpedanceNote 4: Unused bus terminals during HIGH Z State must be held HIGH or LOW.Logic DiagramInputs OutputsOE T/R L L BusB 0–B 7 Data to Bus A 0–A 7L H Bus A 0–A 7 Data to Bus B 0–B 7HXHIGH Z State on A 0–A 7, B 0–B 7 (Note 4)74VCX245Absolute Maximum Ratings (Note 5)Recommended Operating Conditions (Note 7)Note 5: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Rat-ings. The “Recommended Operating Conditions ” table will define the condi-tions for actual device operation.Note 6: I O Absolute Maximum Rating must be observed.Note 7: Floating or unused inputs must be held HIGH or LOW.DC Electrical CharacteristicsSupply Voltage (V CC ) 0.5V to 4.6V DC Input Voltage (V I ) 0.5V to 4.6V DC Output Voltage (V O )Outputs 3-STATE 0.5V to 4.6V Outputs Active (Note 6)0.5V to V CC 0.5VDC Input Diode Current (I IK ) V I 0V 50 mADC Output Diode Current (I OK ) V O 0V 50 mA V O ! V CC50 mADC Output Source/Sink Current (I OH /I OL )r 50 mA DC V CC or Ground Current r 100 mAStorage Temperature (T STG )65q C to 150q CPower Supply Operating 1.4V to 3.6VInput Voltage 0.3V to 3.6VOutput Voltage (V O )Output in Active States 0V to V CC Output in 3-STATE 0V to 3.6VOutput Current in I OH /I OL V CC 3.0V to 3.6V r 24 mA V CC 2.3V to 2.7V r 18 mA V CC 1.65V to 2.3V r 6 mA V CC 1.4V to 1.6Vr 2 mAFree Air Operating Temperature (T A ) 40q C to 85q CMinimum Input Edge Rate ('t/'V)V IN 0.8V to 2.0V, V CC 3.0V10 ns/VSymbol ParameterConditionsV CC Min MaxUnits(V)V IHHIGH Level Input Voltage2.7 to3.6 2.0V2.3 to 2.7 1.61.65 to 2.30.65 u V CC 1.4 to 1.60.65 u V CCV ILLOW Level Input Voltage2.7 to3.60.8V 2.3 to 2.70.71.65 to 2.30.35 u V CC 1.4 to 1.60.35 u V CCV OHHIGH Level Output VoltageI OH 100 P A 2.7 to 3.6V CC 0.2VI OH 12 mA 2.7 2.2I OH 18 mA 3.0 2.4I OH 24 mA 3.0 2.2I OH 100 P A 2.3 to 2.7V CC 0.2I OH 6 mA 2.3 2.0I OH 12 mA 2.3 1.8I OH 18 mA 2.3 1.7I OH 100 P A 1.65 to 2.3V CC 0.2I OH 6 mA 1.65 1.25I OH 100 P A 1.4 to 1.6V CC 0.2I OH 2 mA1.41.05 474V C X 245DC Electrical Characteristics (Continued)Note 8: Outputs disabled or 3-STATE only.AC Electrical Characteristics (Note 9)Note 9: For C L 50P F, add approximately 300 ps to the AC maximum specification.Note 10: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t OSHL ) or LOW-to-HIGH (t OSLH ).Symbol ParameterConditionsV CC Min Max Units(V)V OLLOW Level Output VoltageI OL 100 P A 2.7 to 3.60.2VI OL 12 mA 2.70.4I OL 18 mA 3.00.4I OL 24 mA 3.00.55I OL 100 P A 2.3 to 2.70.2I OL 12 mA 2.30.4I OL 18 mA 2.30.6I OL 100 P A 1.65 to 2.30.2I OL 6 mA 1.650.3I OL 100 P A 1.4 to 1.60.2I OL 2 mA1.40.35I I Input Leakage Current 0 d V I d 3.6V 1.4 to 3.6r 5.0P A I OZ 3-STATE Output Leakage 0 d V O d 3.6V 1.4 to 3.6r 10P A V I V IH or V IL I OFF I Power-OFF Leakage Current 0 d (V I , V O ) d 3.6V 010P A I CC Quiescent Supply Current V I V CC or GND1.4 to 3.620P A V CC d (V I , V O ) d 3.6V (Note 8) 1.4 to 3.6r 20'I CCIncrease in I CC per InputV IH V CC 0.6V2.7 to3.6750P ASymbol ParameterConditionsV CC T A 40q C to 85q C UnitsFigure (V)Min Max Number t PHL , t PLHPropagation Delay C L 30 pF, R L 500:3.3 r 0.30.6 3.5nsFigures 1, 2A n to B n or B n to A n2.5 r 0.20.8 4.21.8 r 0.15 1.58.4C L 15 pF, R L 2k :1.5 r 0.1 1.016.8Figures 5, 6t PZL , t PZHOutput Enable TimeC L 30 pF, R L 500:3.3 r 0.30.64.5nsFigures 1, 3, 42.5 r 0.20.8 5.61.8 r 0.151.59.8C L 15 pF, R L 2k :1.5 r 0.1 1.019.6Figures 5, 7, 8t PLZ , t PHZOutput Disable TimeC L 30 pF, R L 500:3.3 r 0.30.6 3.6nsFigures 1, 3, 42.5 r 0.20.8 4.01.8 r 0.151.57.2C L 15 pF, R L 2k :1.5 r 0.1 1.014.4Figures 5, 7, 8t OSHL Output to Output Skew C L 30 pF, R L 500:3.3 r 0.30.5nst OSLH(Note 10)2.5 r 0.20.51.8 r 0.150.75C L 15 pF, R L 2k :1.5 r 0.11.574VCX245Dynamic Switching CharacteristicsCapacitanceSymbol ParameterConditionsV CC (V)T A 25q C UnitsTypical V OLPQuiet Output Dynamic Peak V OLC L 30 pF, V IH V CC , V IL 0V1.80.3V2.50.73.31.0V OLVQuiet Output Dynamic Valley V OLC L 30 pF, V IH V CC , V IL 0V1.8 0.3V2.5 0.73.31.0V OHVQuiet Output Dynamic Valley V OHC L 30 pF, V IH V CC , V IL 0V1.8 1.3V2.5 1.73.32.0Symbol ParameterConditionsT A 25q C Units Typical C IN Input Capacitance V I 0V or V CC , V CC 1.8V, 2.5V or 3.3V 6.0pF C I/O Input/Output Capacitance V I 0V or V CC , V CC 1.8V, 2.5V or 3.3V7.0pF C PDPower Dissipation CapacitanceV I 0V or V CC , f 10 MHz, V CC 1.8V, 2.5V or 3.3V20.0pF 674V C X 245AC Loading and Waveforms (VCC 3.3V r 0.3V to 1.8V r 0.15V)FIGURE 1. AC Test CircuitFIGURE 2. Waveform for Inverting and Non-Inverting FunctionsFIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage LogicFIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage LogicTEST SWITCH t PLH , t PHL Opent PZL , t PLZ 6V at V CC 3.3V r 0.3V;V CC x 2 at V CC 2.5V r 0.2V; 1.8V r 0.15Vt PZH , t PHZGNDSymbol V CC3.3V r 0.3V2.5V r 0.2V 1.8V r 0.15VV mi 1.5V V CC /2V CC /2V mo 1.5V V CC /2V CC /2V X V OL 0.3V V OL 0.15V V OL 0.15V V YV OH 0.3VV OH 0.15VV OH 0.15V74VCX245AC Loading and Waveforms (VCC 1.5 r 0.1V)FIGURE 5. AC Test CircuitFIGURE 6. Waveform for Inverting and Non-Inverting FunctionsFIGURE 7. 3-STATE Output High Enable and Disable Times for Low Voltage LogicFIGURE 8. 3-STATE Output Low Enable and Disable Times for Low Voltage LogicTEST SWITCH t PLH , t PHL Opent PZL , t PLZ V CC x 2 at V CC 1.5V r 0.1Vt PZH , t PHZGNDSymbol V CC 1.5V r 0.1V V mi V CC /2V mo V CC /2V X V OL 0.1V V YV OH 0.1V 874V C X 245Tape and Reel SpecificationTape Format for DQFNTAPE DIMENSIONS inches (millimeters)REEL DIMENSIONS inches (millimeters)PackageTape Number Cavity Cover Tape DesignatorSection Cavities Status Status Leader (Start End)125 (typ)Empty Sealed BQXCarrier 3000Filled Sealed Trailer (Hub End)75 (typ)EmptySealedTapeSize A B C D N W1W212 mm13.00.0590.5120.795 2.1650.4880.724(330.0)(1.50)(13.00)(20.20)(55.00)(12.4)(18.4) 74VCX245Physical Dimensions inches (millimeters) unless otherwise noted20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" WidePackage Number M20B 1074V C X 245Physical Dimensionsinches (millimeters) unless otherwise noted (Continued)Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mmPackage Number MLP020BPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage Number MTC20Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systemswhich, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user.2. A critical component in any component of a life supportdevice or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.元器件交易网 74VCX245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs。

1/9February 2002s 5V TOLERANT INPUTSs HIGH SPEED: t PD = 6.3ns (MAX.) at V CC = 3V sPOWER DOWN PROTECTION ON INPUTS AND OUTPUTSsSYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 24mA (MIN) at V CC = 3Vs PCI BUS LEVELS GUARANTEED AT 24 mA sBALANCED PROPAGATION DELAYS:t PLH ≅ t PHLsOPERATING VOLTAGE RANGE:V CC (OPR) = 1.65V to 3.6V (1.2V Data Retention)sPIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245sLATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17)sESD PERFORMANCE:HBM > 2000V (MIL STD 883 method 3015); MM > 200VDESCRIPTIONThe 74LVC245A is a low voltage CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. It is ideal for 1.65 to 3.6V CC operations and low power and low noise applications.This IC is intended for two-way asynchronous communication between data buses and the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated.It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption.All inputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.All floating bus terminals during High Z State must be held HIGH or LOW.74LVC245ALOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER(NOT INVERTED) HIGH PERFORMANCE.ORDER CODESPACKAGE TUBE T & R SOP 74LVC245AM74LVC245AMTR TSSOP74LVC245ATTR74LVC245A2/9INPUT AND OUTPUT EQUIVALENT CIRCUITPIN DESCRIPTIONTRUTH TABLEX : Don’t CareZ : High ImpedanceABSOLUTE MAXIMUM RATINGSAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied1) I O absolute maximum rating must be observed 2) V O < GNDPIN No SYMBOL NAME AND FUNCTION 1DIR Directional Control 2, 3, 4, 5, 6, 7, 8, 9A1 to A8Data Inputs/Outputs 18, 17, 16, 15, 14, 13, 12, 11B1 to B8Data Inputs/Outputs19GOutput Enable Input 10GND Ground (0V)20V CCPositive Supply VoltageINPUTS FUNCTION OUTPUT G DIR A BUSB BUSYn L L OUTPUT INPUT A = B L H INPUT OUTPUT B = A HXZ ZZSymbol ParameterValue Unit V CC Supply Voltage -0.5 to +7.0V V I DC Input Voltage-0.5 to +7.0V V O DC Output Voltage (High Impedance or V CC = 0V)-0.5 to +7.0V V O DC Output Voltage (High or Low State) (note 1)-0.5 to V CC + 0.5V I IK DC Input Diode Current- 50mA I OK DC Output Diode Current (note 2)- 50mA I ODC Output Current± 50mA I CC or I GND DC V CC or Ground Current per Supply Pin± 100mA T stg Storage Temperature-65 to +150°C T LLead Temperature (10 sec)300°C74LVC245A3/9RECOMMENDED OPERATING CONDITIONS1) Truth Table guaranteed: 1.2V to 3.6V 2) V IN from 0.8V to 2V at V CC = 3.0VDC SPECIFICATIONSSymbol ParameterValue Unit V CC Supply Voltage (note 1) 1.65 to 3.6V V I Input Voltage0 to 5.5V V O Output Voltage (High Impedance or V CC = 0V)0 to 5.5V V O Output Voltage (High or Low State)0 to V CC V I OH , I OL High or Low Level Output Current (V CC = 3.0 to 3.6V)± 24mA I OH , I OL High or Low Level Output Current (V CC = 2.7 to 3.0V)± 12mA I OH , I OL High or Low Level Output Current (V CC = 2.3 to 2.7V)± 8mA I OH , I OL High or Low Level Output Current (V CC = 1.65 to 2.3V)± 4mA T op Operating Temperature-55 to 125°C dt/dvInput Rise and Fall Time (note 2)0 to 10ns/VSymbolParameterTest ConditionValueUnitV CC (V)-40 to 85 °C -55 to 125 °C Min.Max.Min.Max.V IHHigh Level Input Voltage 1.65 to 1.950.65V CC 0.65V CC V 2.3 to 2.7 1.7 1.72.7 to3.622V ILLow Level Input Voltage1.65 to 1.950.35V CC 0.35V CCV2.3 to 2.70.70.72.7 to3.60.80.8V OHHigh Level Output Voltage1.65 to 3.6I O =-100 µA V CC -0.2V CC -0.2V1.65I O =-4 mA 1.2 1.22.3I O =-8 mA 1.7 1.72.7I O =-12 mA 2.2 2.23.0I O =-18 mA 2.4 2.43.0I O =-24 mA 2.22.2V OLLow Level Output Voltage1.65 to 3.6I O =100 µA 0.20.2V1.65I O =4 mA 0.450.452.3I O =8 mA 0.70.72.7I O =12 mA 0.40.43.0I O =24 mA 0.550.55I I Input Leakage Current3.6V I = 0 to 5.5V ± 5± 5µA I off Power Off Leakage Current0V I or V O = 5.5V 1010µA I OZHigh Impedance Output Leakage Current3.6V I = V IH orV IL V O = 0 to 5.5V ± 10± 10µAI CCQuiescent Supply Current3.6V I = V CC or GND1010µA V I or V O = 3.6 to5.5V± 10± 10∆I CCI CC incr. per Input2.7 to3.6V IH = V CC -0.6V500500µA74LVC245A4/9DYNAMIC SWITCHING CHARACTERISTICS1) Number of output defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state.AC ELECTRICAL CHARACTERISTICS1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-ing in the same direction, either HIGH or LOW (t OSLH = | t PLHm - t PLHn |, t OSHL = | t PHLm - t PHLn |2) Parameter guaranteed by designCAPACITIVE CHARACTERISTICS1) C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC /n (per circuit)SymbolParameterTest ConditionValue UnitV CC (V)T A = 25 °C Min.Typ.Max.V OLP Dynamic Low Level Quiet Output (note 1)3.3C L = 50pFV IL = 0V, V IH = 3.3V0.8V V OLV-0.8SymbolParameterTest ConditionValueUnitV CC (V)C L (pF)R L (Ω)t s = t r (ns)-40 to 85 °C -55 to 125 °C Min.Max.Min.Max.t PLH t PHLPropagation Delay Time1.65 to 1.953010002.0 2.09.0 2.012ns2.3 to 2.730500 2.0 2.08.0 2.010.52.750500 2.5 1.57.3 1.58.83.0 to 3.650500 2.5 1.0 6.3 1.07.6t PZL t PZHOutput Enable Time 1.65 to 1.95301000 2.0 2.012 2.016ns2.3 to 2.730500 2.0 2.09.5 2.012.52.750500 2.5 1.09.0 1.0113.0 to 3.650500 2.5 1.08.5 1.010t PLZ t PHZOutput Disable Time 1.65 to 1.95301000 2.0 2.011 2.014ns2.3 to 2.730500 2.0 2.09.0 2.0122.750500 2.5 2.08.5 2.0103.0 to 3.6505002.52.07.5 2.09.0t OSLH t OSHLOutput To Output Skew Time (note1, 2)2.7 to3.611nsSymbolParameterTest ConditionValue UnitV CC (V)T A = 25 °C Min.Typ.Max.C IN Input Capacitance4pF C PDPower Dissipation Capacitance (note 1)1.8f IN = 10MHz28pF 2.5303.33474LVC245A TEST CIRCUITT OUTTEST CIRCUIT AND WAVEFORM SYMBOL VALUEV CCSymbol1.65 to 1.95V2.3 to 2.7V 2.7V3.0 to 3.6VC L30pF30pF50pF50pFR L =R11000Ω500Ω500Ω500ΩV S 2 x V CC 2 x V CC6V6VV IH V CC V CC 2.7V 2.7VV M V CC/2V CC/2 1.5V 1.5VV OH V CC V CC 3.0V 3.0VV X V OL + 0.15V V OL + 0.15V V OL + 0.3V V OL + 0.3VV Y V OH - 0.15V V OH - 0.15V V OH - 0.3V V OH - 0.3Vt r = t r<2.0ns<2.0ns<2.5ns<2.5ns5/974LVC245A6/9WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME(f=1MHz; 50% duty cycle)74LVC245A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.© The ST logo is a registered trademark of STMicroelectronics© 2002 STMicroelectronics - Printed in Italy - All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.© 9/9。

MC74AC245, MC74ACT245Octal BidirectionalTransceiver with 3-State Inputs/OutputsThe MC74AC245/74ACT245 contains eight non−inverting bidirectional buffers with 3−state outputs and is intended for bus−oriented applications. Current sinking capability is 24 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active−HIGH) enables data from A ports to B ports; Receive (active−LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a High Z condition.Features•Noninverting Buffers •Bidirectional Data Path•A and B Outputs Source/Sink 24 mA •′ACT245 has TTL Compatible Inputs •These are Pb−Free DevicesPIN ASSIGNMENTPIN FUNCTION OE Output Enable Input T/R Transmit/Receive InputA 0−A 7Side A 3−State Inputs or 3−State OutputsB 0−B 7Side B 3−State Inputs or 3−State OutputsTRUTH TABLESInputs Outputs OE T/R L L Bus B Data to Bus A L H Bus A Data to Bus B HXHigh Z StateH = HIGH Voltage Level L = LOW Voltage Level X = ImmaterialFigure 1.V CC OE B 0B 1B 2B 3B 4B 5B 6B 7T/RA 0A 1A 2A 3A 4A 5A 6A 7GNDSOIC−20W DW SUFFIX CASE 751DTSSOP−20DT SUFFIX CASE 948E1See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.ORDERING INFORMATIONSee general marking information in the device marking section on page 7 of this data sheet.DEVICE MARKING INFORMATIONMAXIMUM RATINGSSymbol Parameter Value Unit V CC DC Supply Voltage (Referenced to GND)−0.5 to +7.0V V IN DC Input Voltage (Referenced to GND)−0.5 to V CC +0.5V V OUT DC Output Voltage (Referenced to GND) (Note 1)−0.5 to V CC +0.5VI IK DC Input Diode Current±20mAI OK DC Output Diode Current±50mAI OUT DC Output Sink/Source Current±50mAI CC DC Supply Current, per Output Pin±50mA I GND DC Ground Current, per Output Pin±100mA T STG Storage Temperature Range*65 to )150_C T L Lead temperature, 1 mm from Case for 10 Seconds260_C T J Junction Temperature Under Bias140_Cq JA Thermal Resistance (Note 2)SOICTSSOP 65.8110.7_C/WMSL Moisture Sensitivity Level 1F R Flammability Rating Oxygen Index: 30% − 35%UL94V−*********V ESD ESD Withstand Voltage Human Body Model (Note 3)Machine Model (Note 4)Charged Device Model (Note 5)> 2000> 200> 1000VI Latchup Latchup Performance Above V CC and Below GND at 85_C (Note 6)±100mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.1.I OUT absolute maximum rating must be observed.2.The package thermal impedance is calculated in accordance with JESD 51−7.3.Tested to EIA/JESD22−A114−A.4.Tested to EIA/JESD22−A115−A.5.Tested to JESD22−C101−A.6.Tested to EIA/JESD78.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Typ Max UnitV CC Supply Voltage ′AC 2.0 5.0 6.0V ′ACT 4.5 5.0 5.5V IN, V OUT DC Input Voltage, Output Voltage (Ref. to GND)0−V CC Vt r, t f Input Rise and Fall Time (Note 7)′AC Devices except Schmitt InputsV CC @ 3.0 V−150−V CC @ 4.5 V−40−ns/VV CC @ 5.5 V−25−t r, t f Input Rise and Fall Time (Note 8)′ACT Devices except Schmitt InputsV CC @ 4.5 V−10−ns/VV CC @ 5.5 V−8.0−T A Operating Ambient Temperature Range−402585°CI OH Output Current − High−−−24mAI OL Output Current − Low−−24mA Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.7.V IN from 30% to 70% V CC; see individual Data Sheets for devices that differ from the typical input rise and fall times.8.V IN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.DC CHARACTERISTICSSymbol Parameter V CC(V)74AC74ACUnit Conditions T A = +25°CT A =−40°C to+85°CTyp Guaranteed LimitsV IH Minimum High LevelInput Voltage 3.0 1.5 2.1 2.1V OUT = 0.1 V4.5 2.25 3.15 3.15V or V CC − 0.1 V5.5 2.75 3.85 3.85V IL Maximum Low LevelInput Voltage 3.0 1.50.90.9V OUT = 0.1 V4.5 2.25 1.35 1.35V or V CC − 0.1 V5.5 2.75 1.65 1.65V OH Minimum High LevelOutput Voltage 3.0 2.99 2.9 2.9I OUT = −50 m A4.5 4.49 4.4 4.4V5.5 5.49 5.4 5.4V*V IN = V IL or V IH3.0− 2.56 2.46−12 mA4.5− 3.86 3.76I OH−24 mA5.5− 4.86 4.76−24 mAV OL Maximum Low LevelOutput Voltage 3.00.0020.10.1I OUT = 50 m A4.50.0010.10.1V5.50.0010.10.1V*V IN = V IL or V IH3.0−0.360.4412 mA4.5−0.360.44I OL24 mA5.5−0.360.4424 mAI IN Maximum InputLeakage Current5.5−±0.1±1.0m A V I = V CC, GNDI OZT Maximum3-StateCurrentV I(OE) = V IL, V IH 5.5−±0.6±6.0m A V I = V CC, GNDV O = V CC, GNDI OLD†Minimum DynamicOutput Current 5.5−−75mA V OLD = 1.65 V MaxI OHD 5.5−−−75mA V OHD = 3.85 V MinI CC Maximum QuiescentSupply Current5.5−8.080.0m A V IN = V CC or GND*All outputs loaded; thresholds on input associated with output under test.†Maximum test duration 2.0 ms, one output loaded at a time.NOTE:I IN and I CC@**************************************************************CC.Symbol Parameter V CC*(V)UnitFig.No.T A = +25°CC L = 50 pFT A = −40°Cto +85°CC L = 50 pFMin Typ Max Min Maxt PLH Propagation Delay 3.3 1.5 5.08.5 1.09.0ns3−5 A n to B n or B n to A n 5.0 1.5 3.5 6.5 1.07.0t PHL Propagation Delay 3.3 1.5 5.08.5 1.09.0ns3−5 A n to B n or B n to A n 5.0 1.5 3.5 6.0 1.07.0t PZH Output Enable Time 3.3 2.57.011.5 2.012.5ns3−7 5.0 1.5 5.08.5 1.09.0t PZL Output Enable Time 3.3 2.57.512.0 2.013.5ns3−8 5.0 1.5 5.59.0 1.09.5t PHZ Output Disable Time 3.3 2.0 6.512.0 1.012.5ns3−7 5.0 1.5 5.59.0 1.010.0t PLZ Output Disable Time 3.3 2.07.011.5 1.513.0ns3−8 5.0 1.5 5.59.0 1.010.0*Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. DC CHARACTERISTICSSymbol Parameter V CC(V)74ACT74ACTUnit Conditions T A = +25°CT A =−40°C to+85°CTyp Guaranteed LimitsV IH Minimum High LevelInput Voltage 4.5 1.5 2.0 2.0VV OUT = 0.1 V 5.5 1.5 2.0 2.0or V CC − 0.1 VV IL Maximum Low LevelInput Voltage 4.5 1.50.80.8VV OUT = 0.1 V 5.5 1.50.80.8or V CC − 0.1 VV OH Minimum High LevelOutput Voltage 4.5 4.49 4.4 4.4VI OUT = −50 m A5.5 5.49 5.4 5.4*V IN = V IL or V IH4.5− 3.86 3.76V I OH−24 mA5.5− 4.86 4.76−24 mAV OL Maximum Low LevelOutput Voltage 4.50.0010.10.1VI OUT = 50 m A5.50.0010.10.1*V IN = V IL or V IH4.5−0.360.44VI OL24 mA 5.5−0.360.4424 mAI IN Maximum InputLeakage Current5.5−±0.1±1.0m A V I = V CC, GNDD I CCT Additional Max. I CC/Input 5.50.6− 1.5mA V I = V CC −2.1 VI OZT Maximum3−StateCurrentV I(OE) = V IL, V IH 5.5−±0.6±6.0m A V I = V CC, GNDV O = V CC, GNDI OLD†Minimum DynamicOutput Current 5.5−−75mA V OLD = 1.65 V MaxI OHD 5.5−−−75mA V OHD = 3.85 V MinI CC Maximum QuiescentSupply Current5.5−8.080.0m A V IN = V CC or GND*All outputs loaded; thresholds on input associated with output under test.†Maximum test duration 2.0 ms, one output loaded at a time.Symbol Parameter V CC*(V)UnitFig.No.T A = +25°CC L = 50 pFT A = −40°Cto +85°CC L = 50 pFMin Typ Max Min Maxt PLH Propagation Delay, A n to B n or B n to A n 5.0 1.5 4.07.5 1.58.0ns3−5 t PHL Propagation Delay, A n to B n or B n to A n 5.0 1.5 4.08.0 1.09.0ns3−5 t PZH Output Enable Time 5.0 1.5 5.010 1.511.0ns3−7 t PZL Output Enable Time 5.0 1.5 5.510 1.512.0ns3−8 t PHZ Output Disable Time 5.0 1.5 5.510 1.011.0ns3−7 t PLZ Output Disable Time 5.0 2.0 5.010 1.511.0ns3−8 *Voltage Range 5.0 V is 5.0 V ±0.5 V.CAPACITANCESymbol Parameter ValueTypUnit Test ConditionsC IN Input Capacitance 4.5pF V CC = 5.0 V C I/O Input/Output Capacitance15pF V CC = 5.0 V C PD Power Dissipation Capacitance45pF V CC = 5.0 VORDERING INFORMATIONDevicePackage Shipping †MC74AC245DWG SOIC−20(Pb−Free)38 Units / Rail MC74AC245DWR2G SOIC−20(Pb−Free)1000 / Tape & Reel MC74ACT245DWG SOIC−20(Pb−Free)38 Units / Rail MC74ACT245DWR2G SOIC−20(Pb−Free)1000 / Tape & Reel MC74AC245DTG TSSOP−20(Pb−Free)75 Units / Rail MC74AC245DTR2G TSSOP−20(Pb−Free)2500 / Tape & Reel MC74ACT245DTG TSSOP−20(Pb−Free)75 Units / Rail MC74ACT245DTR2GTSSOP−20(Pb−Free)2500 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.MARKING DIAGRAMSSOIC−20W TSSOP−20120AC 245ALYW G GA = Assembly Location WL, L = Wafer Lot YY , Y = YearWW, W = Work Week G or G = Pb−Free Package(Note: Microdot may be in either location)120ACT 245ALYW GGTSSOP−20DT SUFFIX CASE 948E−02ISSUE CDIM A MIN MAX MIN MAX INCHES 6.600.260MILLIMETERS B 4.30 4.500.1690.177C 1.200.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSCH 0.270.370.0110.015J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M 0 8 0 8 ____NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION:MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSIONSHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.DETAIL E6.400.252------16X0.360.65PITCH*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOIC−20WDW SUFFIXCASE 751D−05ISSUE GM0.25SA SBTDIM MIN MAXMILLIMETERSA 2.35 2.65A10.100.25B0.350.49C0.230.32D12.6512.95E7.407.60e 1.27 BSCH10.0510.55h0.250.75L0.500.90q0 7NOTES:1.DIMENSIONS ARE IN MILLIMETERS.2.INTERPRET DIMENSIONS AND TOLERANCESPER ASME Y14.5M, 1994.3.DIMENSIONS D AND E DO NOT INCLUDE MOLDPROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.5.DIMENSION B DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE PROTRUSIONSHALL BE 0.13 TOTAL IN EXCESS OF BDIMENSION AT MAXIMUM MATERIALCONDITION.__PUBLICATION ORDERING INFORMATIONON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at /site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.。

TOSHIBA CMOS Digital Integrated Circuit Silicon MonolithicTC74LVX245F,TC74LVX245FTOctal Bus TransceiverThe TC74LVX245F/ FT is a high-speed CMOS octal bus transceiver fabricated using silicon gate CMOS technology.Designed for use in 3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation.These devices are suitable for low-voltage and battery operated systems.It is intended for two-way asynchronous communication between data busses.The direction of data transmission is determined by the level of the DIR input. The enable input (G ) can be used to disable the device so that the busses are effectively isolated.All inputs are equipped with protection circuits against static discharge.Features (Note)• High-speed: t pd = 4.7 ns (typ.) (V CC = 3.3 V) • Low power dissipation: I CC = 4 μA (max) (Ta = 25°C) • Input voltage level: V IL = 0.8 V (max) (V CC = 3 V)V IH = 2.0 V (min) (V CC = 3 V)• Balanced propagation delays: t pLH ∼ − tpHL •Low noise: V OLP = 0.8 V (max)• Pin and function compatible with 74HC245Note: Do not apply a signal to any bus pins when it is in the output mode. Damage may result.All floating (high impedance) bus pins must have their input levels fixed by means of pull-up or pull-down resistors.A parasitic diode is formed between the bus and V CC terminals. Therefore bus terminal can not be used to interface 5-V to 3-V systems directly.TC74LVX245FTC74LVX245FTWeightSOP20-P-300-1.27A : 0.22 g (typ.) TSSOP20-P-0044-0.65A: 0.08 g (typ.)Pin Assignment (top view)IEC Logic SymbolTruth TableX: Don’t care Z: High impedanceAbsolute Maximum Ratings (Note)Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or evendestruction.Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and thesignificant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges.Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability testreport and estimated failure rate, etc).V CC 20 G B1 B2 B3 B4 19 18 17 16 15 14 DIR 1234567A1 A2 A3 A4 A5 A6 B5 8910A7 A8GND 13 12 11B6 B7B8GOperating Ranges (Note)Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs and bus inputs must be tied to either VCC or GND. Please connect both bus inputs and the bus outputs with VCC or GND when the I/O of the bus terminal changes by the function. In this case, please note that the output is not short-circuited.Electrical CharacteristicsDC CharacteristicsTa = 25°CTa = −40 to85°CCharacteristics Symbol Test ConditionV CC (V)MinTyp.Max Min MaxUnit2.0 1.5 ⎯⎯ 1.5 ⎯ 3.0 2.0 ⎯ ⎯ 2.0 ⎯ H-level V IH⎯3.6 2.4 ⎯ ⎯ 2.4 ⎯2.0 ⎯ ⎯ 0.5 ⎯ 0.53.0 ⎯ ⎯ 0.8 ⎯ 0.8 Input voltageL-level V IL⎯ 3.6⎯⎯ 0.8 ⎯ 0.8VI OH = −50 μA2.0 1.9 2.0 ⎯ 1.9 ⎯ I OH = −50 μA3.0 2.9 3.0 ⎯ 2.9 ⎯ H-level V OHV IN = V IHor V ILI OH = −4 mA3.02.58⎯⎯ 2.48 ⎯I OL = 50 μA 2.0 ⎯ 0 0.1 ⎯ 0.1I OL = 50 μA 3.0 ⎯ 0 0.1 ⎯ 0.1Output voltageL-level V OLV IN = V IHor V ILI OL = 4 mA 3.0 ⎯ ⎯ 0.36 ⎯ 0.44V3-State output Off-state current I OZ V IN = V IH or V IL V OUT = V CC or GND 3.6 ⎯ ⎯ ±0.25 ⎯ ±2.5μA Input leakage current I IN V IN = 5.5 V or GND 3.6 ⎯ ⎯±0.1⎯±1.0μA Quiescent supply currentI CCV IN = V CC or GND3.6⎯⎯ 4.0 ⎯ 40.0μAAC Characteristics (input: t r= t f= 3 ns)Note 1: Parameter guaranteed by design.(t osLH= |t pLHm− t pLHn|, t osHL= |t pHLm− t pHLn|)Note 2: Parameter guaranteed by design.Note 3: C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption.Average operating current can be obtained by the equation:I CC (opr)= C PD･V CC･f IN+ I CC/8 (per bit)Noise Characteristics (Ta = 25°C, input: t r= t f= 3 ns, C L= 50 pF)Characteristics Symbol TestConditionV CC (V)Typ. Limit Unit Quiet output maximum dynamic V OL V OLP⎯ 3.30.50.8V Quiet output minimum dynamic V OL V OLV⎯ 3.3−0.5 −0.8V Minimum high level dynamic inputvoltage V IHV IHD⎯ 3.3⎯ 2.0 VMaximum low level dynamic inputvoltage V ILV ILD⎯ 3.3⎯ 0.8 VInput Equivalent Circuit Bus Terminal Equivalent Circuit (An, Bn)Weight: 0.22 g (typ.)Weight: 0.08 g (typ.)RESTRICTIONS ON PRODUCT USE•Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice.•This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA’s written permission, reproduction is permissible only if reproduction is without alteration/omission.•Though TOSHIBA works continually to improve Product’s quality and reliability, Product can malfunction or fail. Customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before creating and producing designs and using, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the instructions for the application that Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS’ PRODUCT DESIGN OR APPLICATIONS.•Product is intended for use in general electronics applications (e.g., computers, personal equipment, office equipment, measuring equipment, industrial robots and home electronics appliances) or for specific applications as expressly stated in this document.Product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or serious public impact (“Unintended Use”). Unintended Use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. Do not use Product for Unintended Use unless specifically permitted in this document.•Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.•Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations.•The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise.•ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITYWHATSOEVER, INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR LOSS, INCLUDING WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND (2) DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT, OR INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT.•Do not use or otherwise make available Product or related software or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction weapons). Product and related software and technology may be controlled under the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. •Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product.Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations.。

PACKAGING INFORMATIONOrderable Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)SN74LVT245BDBLE OBSOLETE SSOP DB 20TBDCall TI Call TISN74LVT245BDBR ACTIVE SSOP DB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BDBRE4ACTIVE SSOPDB 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BDW ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BDWE4ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BDWG4ACTIVE SOIC DW 2025Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BDWR ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BDWRE4ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BDWRG4ACTIVE SOIC DW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BGQNRACTIVEBGA MI CROSTA R JUNI ORGQN201000TBDSNPBLevel-1-240C-UNLIMSN74LVT245BNSR ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BNSRE4ACTIVE SO NS 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BPW ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BPWE4ACTIVE TSSOP PW 2070Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BPWLE OBSOLETE TSSOP PW 20TBDCall TI Call TISN74LVT245BPWR ACTIVE TSSOP PW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BPWRE4ACTIVE TSSOP PW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BPWRG4ACTIVE TSSOP PW 202000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVT245BRGYR ACTIVE QFN RGY 201000Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR SN74LVT245BRGYRG4ACTIVE QFN RGY 201000Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR SN74LVT245BZQNRACTIVEBGA MI CROSTA R JUNI ORZQN201000Green (RoHS &no Sb/Br)SNAGCULevel-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.6-Dec-2006OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annualbasis.6-Dec-2006IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. T o minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetwork Microcontrollers Security /securityLow Power Wireless /lpw Telephony /telephonyVideo & Imaging /videoWireless /wirelessMailing Address:Texas InstrumentsPost Office Box 655303 Dallas, Texas 75265Copyright 2006, Texas Instruments Incorporated。

HD74LVC245AOctal Bidirectional Transceivers with 3-state OutputsADE-205-111B(Z)3rd EditionDecember 1996 DescriptionThe HD74LVC245A has eight buffers with three state outputs in a 20 pin package. When (T / R) is high, data flows from the A inputs to the B outputs, and when (T / R) is low, data flows from the B inputs to the A outputs. A and B bus are separated by making enable input (OE) high level. Low voltage and high speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation.Features•V CC = 2.0 V to 5.5 V•All inputs V IH (Max.) = 5.5 V (@V CC = 0 V to 5.5 V)•All input outputs V I/O (Max.) = 5.5 V (@V CC = 0 V or output off state)•Typical V OL ground bounce < 0.8 V (@V CC = 3.3 V, Ta = 25°C)•Typical V OH undershoot > 2.0 V (@V CC = 3.3 V, Ta = 25°C)•High output current ±24 mA (@V CC = 3.0 V to 5.5 V)Function TableInputsOE T / R OperationL L B data to A busL H A data to B busH X ZH :High levelL :Low levelX :ImmaterialZ :High impedanceHD74LVC245ARev.3, Dec. 1996, page 2 of 10Pin ArrangementAbsolute Maximum RatingsItemSymbol Ratings Unit ConditionsSupply voltage V CC –0.5 to 6.0V Input diode current I IK –50mA V I = –0.5 V Input voltage V I –0.5 to 6.0V T / R , OE Output diode current I OK –50mA V O = –0.5 V 50mA V O = V CC +0.5 V Input / output voltage V I/O –0.5 to V CC +0.5V Output "H" or "L"–0.5 to 6.0V Output "Z" or V CC :OFF Output current I O±50mA V CC , GND current / pin I CC or I GND 100mA Storage temperatureTstg–65 to 150°CNote:The absolute maximum ratings are values which must not individually be exceeded, and furthermore,no two of which may be realized at the same time.HD74LVC245ARev.3, Dec. 1996, page 3 of 10Recommended Operating ConditionsItemSymbol Ratings Unit Conditions Supply voltage V CC 1.5 to 5.5V Data retention 2.0 to 5.5V At operation Input / output voltageV I 0 to 5.5V T / R , OE V I/O0 to V CC V Output "H" or "L"0 to 5.5V Output "Z" or V CC :OFFOperating temperature Ta –40 to 85°C Output currentI OH –12mA V CC = 2.7 V –24*2mA V CC = 3.0 V to 5.5 V I OL12mA V CC = 2.7 V 24*2mA V CC = 3.0 V to 5.5 V Input rise / fall time *1t r , t f10ns/VNotes: 1.This item guarantees maximum limit when one input switches.Waveform : Refer to test circuit of switching characteristics.2.duty cycle ≤ 50%HD74LVC245ARev.3, Dec. 1996, page 4 of 10Electrical CharacteristicsTa = –40 to 85°CItem Symbol V CC (V)MinMax Unit Test ConditionsInput voltageV IH 2.7 to 3.6 2.0—V 4.5 to 5.5V CC ×0.7—V V IL2.7 to3.6—0.8V 4.5 to 5.5—V CC ×0.3V Output voltageV OH2.7 to 5.5V CC –0.2—V I OH = –100 µA 2.7 2.2—V I OH = –12 mA 3.0 2.4—V 3.0 2.2—V I OH = –24 mA 4.53.8—V V OL2.7 to 5.5—0.2V I OL = 100 µA 2.7—0.4V I OL = 12 mA 3.0—0.55V I OL = 24 mA 4.5—0.55V Input currentI IN 0 to 5.5—±5.0µA V IN = 5.5 V or GND Off state output currentI OZ2.7 to 5.5—±5.0µA V IN = V CC , GND V OUT = 5.5 V or GNDOutput leak currentI OFF—20µA V IN / V OUT = 5.5 V Quiescent supply current I CC2.7 to3.6—±10µA V IN / V OUT = 3.6 to 5.5 V 2.7 to 5.5—10µA V IN = V OUT or GND∆I CC3.0 to 3.6—500µAV IN = one input at (V CC –0.6)V,other inputs at V CC or GNDHD74LVC245ARev.3, Dec. 1996, page 5 of 10Switching CharacteristicsTa = –40 to 85°CItemSymbol V CC (V)Min Typ Max Unit From (Input)To (Output)Propagation delay timet PLH 2.7——8.0ns A or BB or At PHL3.3±0.3 1.5—7.0ns 5.0±0.5—— 5.5ns Output enable timet ZH 2.7——9.5ns OEA or Bt ZL3.3±0.3 1.5—8.5ns 5.0±0.5——7.0ns Output disable timet ZH 2.7——8.5ns OEA or Bt LZ3.3±0.3 1.5—7.5ns 5.0±0.5—— 6.5ns Between outut pins skew *1t OSLH2.7———ns t OSHL3.3±0.3—— 1.0ns 5.0±0.5—— 1.0ns Input capacitance C IN 2.7— 3.0—pF Output capacitance C O2.7—15.0—pFNote:1.This parameter is characterized but not tested.tos LH = | t PLHm - t PLHn |, tos HL = | t PHLm - t PHLn |HD74LVC245ATest CircuitWaveforms – 1Rev.3, Dec. 1996, page 6 of 10HD74LVC245A Waveforms – 2Rev.3, Dec. 1996, page 7 of 10HD74LVC245A Package DimensionsRev.3, Dec. 1996, page 8 of 10HD74LVC245ARev.3, Dec. 1996, page 9 of 10HD74LVC245ARev.3, Dec. 1996, page 10 of 10Disclaimer1.Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,copyright, trademark, or other intellectual property rights for information contained in this document.Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document.2.Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use.3.Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,traffic, safety equipment or medical equipment for life support.4.Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installationconditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.5.This product is not designed to be radiation resistant.6.No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi.7.Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products.Sales OfficesHitachi, Ltd.Semiconductor & Integrated Circuits.Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.Hitachi Asia Ltd. Hitachi Tower16 Collyer Quay #20-00, Singapore 049318Tel : <65>-538-6533/538-8577 Fax : <65>-538-6933/538-3877URL : .sg URLNorthAmerica : /Europe : /hel/ecg Asia : Japan : http://www.hitachi.co.jp/Sicd/indx.htmHitachi Asia Ltd.(Taipei Branch Office)4/F, No. 167, Tun Hwa North Road, Hung-Kuo Building, Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TPURL : Hitachi Asia (Hong Kong) Ltd.Group III (Electronic Components) 7/F., North Tower, World Finance Centre,Harbour City, Canton Road Tsim Sha Tsui, Kowloon, Hong KongTel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281URL : Hitachi Europe Ltd.Electronic Components Group.Whitebrook ParkLower Cookham Road MaidenheadBerkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000Fax: <44> (1628) 585160Hitachi Europe GmbHElectronic Components Group Dornacher Stra ße 3D-85622 Feldkirchen, Munich GermanyTel: <49> (89) 9 9180-0Fax: <49> (89) 9 29 30 00Hitachi Semiconductor (America) Inc.179 East Tasman Drive,San Jose,CA 95134 Tel: <1> (408) 433-1990Fax: <1>(408) 433-0223For further information write to:Colophon 2.0。

MC74LCX16245Low−Voltage CMOS16−Bit TransceiverWith 5 V−Tolerant Inputs and Outputs(3−State, Non−Inverting)The MC74LCX16245 is a high performance, non−inverting 16−bittransceiver operating from a 2.3 to 3.6 V supply. The device is byte controlled. Each byte has separate Output Enable inputs which can be tied together for full 16−bit operation. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A V I specification of 5.5 V allows MC74LCX16245 inputs to be safely driven from 5.0 V devices. The MC74LCX16245 is suitable for memory address driving and all TTL level bus oriented transceiver applications.The 4.5 ns maximum propagation delays support high performance applications. Current drive capability is 24 mA at both A and B ports. The Transmit/Receive (T/Rn) inputs determine the direction of data flow through the bidirectional transceiver. Transmit (active−HIGH) enables data from A ports to B ports; Receive (active−LOW) enables data from B to A ports. The Output Enable inputs (OEn), when HIGH, disable both A and B ports by placing them in a HIGH Z condition. Features•Designed for 2.3 to 3.6 V V CC Operation•4.5 ns Maximum t pd•5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic •Supports Live Insertion and Withdrawal•I OFF Specification Guarantees High Impedance When V CC = 0 V •LVTTL Compatible•LVCMOS Compatible•24 mA Balanced Output Sink and Source Capability•Near Zero Static Supply Current in All Three Logic States (20 m A) Substantially Reduces System Power Requirements •Latchup Performance Exceeds 500 mA•ESD Performance:Human Body Model >2000 V;Machine Model >200 V•These are Pb−Free Devices**For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.ORDERING INFORMATIONFigure 1. Pinout: 48−Lead (Top View)481OE1T/R1472A0B0463A1B1454GND GND 445A2B2436A3B3427V CC V CC 418A4B4409A5B53910GND GND 3811A6B63712A7B73613A8B83514A9B93415GND GND 3316A10B103217A11B113118V CC V CC 3019A12B122920A13B132821GND GND 2722A14B142623A15B152524OE2T/R2Table 1. PIN NAMESPinsFunctionOEn T/Rn A0 − A15B0 − B15Output Enable Inputs Transmit/Receive InputsSide A Inputs or 3−State Outputs Side B Inputs or 3−State OutputsT/R1Figure 2. Logic DiagramTRUTH TABLEInputs OutputsInputsOutputsOE1T/R1OE2T/R2L L Bus B0:7 Data to Bus A0:7L L Bus B8:15 Data to Bus A8:15L H Bus A0:7 Data to Bus B0:7L H Bus A8:15 Data to Bus B8:15H XHigh Z State on A0:7, B0:7HXHigh Z State on A8:15, B8:15H =High Voltage Level L =Low Voltage Level Z =High Impedance StateX=High or Low Voltage Level and Transitions Are Acceptable; for I CC reasons, DO NOT FLOAT InputsORDERING INFORMATIONDevice Package Shipping†MC74LCX16245DT TSSOP−48*39 Units / RailMC74LCX16245DTG TSSOP−48*39 Units / RailMC74LCX16245DTR2TSSOP−48*2500 / Tape & ReelM74LCX16245DTR2G TSSOP−48*2500 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*This package is inherently Pb−Free.MAXIMUM RATINGSSymbol Parameter Value Condition Unit V CC DC Supply Voltage−0.5 to +7.0V V I DC Input Voltage−0.5 ≤ V I≤ +7.0V V O DC Output Voltage−0.5 ≤ V O≤ +7.0Output in 3−State V−0.5 ≤ V O≤ V CC + 0.5Output in HIGH or LOW State. (Note 1)VI IK DC Input Diode Current−50V I < GND mAI OK DC Output Diode Current−50V O < GND mA+50V O > V CC mAI O DC Output Source/Sink Current±50mAI CC DC Supply Current Per Supply Pin±100mAI GND DC Ground Current Per Ground Pin±100mAT STG Storage Temperature Range−65 to +150°C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.1.I O absolute maximum rating must be observed.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Typ Max UnitV CC Supply Voltage OperatingData Retention Only 2.01.52.5,3.32.5,3.33.63.6VV I Input Voltage0 5.5VV O Output Voltage(HIGH or LOW State)(3−State)0V CC5.5VI OH HIGH Level Output Current V CC = 3.0 V − 3.6 VV CC = 2.7 V − 3.0 VV CC = 2.3 V − 2.7 V − 24− 12− 8mAI OL LOW Level Output Current V CC = 3.0 V − 3.6 VV CC = 2.7 V − 3.0 VV CC = 2.3 V − 2.7 V + 24+ 12+ 8mAT A Operating Free−Air Temperature−40+85°C D t/D V Input Transition Rise or Fall Rate, V IN from 0.8 V to 2.0 V, V CC = 3.0 V010ns/VDC ELECTRICAL CHARACTERISTICSSymbol Characteristic Condition T A = −40°C to +85°CUnit Min MaxV IH HIGH Level Input Voltage (Note 2) 2.3 V ≤ V CC≤ 2.7 V 1.7V2.7 V ≤ V CC≤3.6 V 2.0V IL LOW Level Input Voltage (Note 2) 2.3 V ≤ V CC≤ 2.7 V0.7V2.7 V ≤ V CC≤3.6 V0.8V OH HIGH Level Output Voltage 2.3 V ≤ V CC≤ 3.6 V; I OL = 100 m A V CC−0.2VV CC = 2.3 V; I OH = −8 mA 1.8V CC = 2.7 V; I OH = −12 mA 2.2V CC = 3.0 V; I OH = −18 mA 2.4V CC = 3.0 V; I OH = −24 mA 2.2 V OL LOW Level Output Voltage 2.3 V ≤ V CC≤ 3.6 V; I OL = 100 m A0.2VV CC = 2.3 V; I OL= 8 mA0.6V CC = 2.7 V; I OL= 12 mA0.4V CC = 3.0 V; I OL = 16 mA0.4V CC = 3.0 V; I OL = 24 mA0.55I I Input Leakage Current 2.3 V ≤ V CC≤ 3.6 V; 0 V ≤ V I≤ 5.5 V±5.0m AI OZ3−State Output Current 2.3 ≤ V CC≤ 3.6 V; 0V ≤ V O≤ 5.5 V;V I = V IH or V IL±5.0m AI OFF Power−Off Leakage Current V CC = 0 V; V I or V O = 5.5 V10m AI CC Quiescent Supply Current 2.3 ≤ V CC≤ 3.6 V; V I = GND or V CC20m A2.3 ≤ V CC≤3.6 V; 3.6 ≤ V I or V O≤ 5.5 V±20m AD I CC Increase in I CC per Input 2.3 ≤ V CC≤ 3.6 V; V IH = V CC − 0.6 V500m A2.These values of V I are used to test DC electrical characteristics only.AC CHARACTERISTICS t R = t F = 2.5 ns; R L = 500 WSymbol Parameter WaveformT A = −40°C to +85°CUnit V CC = 3.3 V ± 0.3 VC L = 50 pFV CC = 2.7 VC L = 50 pFV CC = 2.5 V ± 0.2 VC L = 30 pFMin Max Min Max Min Maxt PLH t PHL Propagation DelayInput to Output1 1.51.54.54.51.51.55.25.21.51.55.45.4nst PZH t PZL Output Enable Time toHigh and Low Level2 1.51.56.56.51.51.57.27.21.51.58.58.5nst PHZ t PLZ Output Disable Time FromHigh and Low Level2 1.51.56.46.41.51.56.96.91.51.57.77.7nst OSHL t OSLH Output−to−Output Skew(Note 3)1.01.0ns3.Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t OSHL) or LOW−to−HIGH (t OSLH); parameter guaranteed by design.DYNAMIC SWITCHING CHARACTERISTICSSymbol Characteristic ConditionT A = +25°CUnit Min Typ MaxV OLP Dynamic LOW Peak Voltage(Note 4)V CC = 3.3 V, C L = 50 pF, V IH = 3.3 V, V IL = 0 VV CC = 2.5 V, C L = 30 pF, V IH = 2.5 V, V IL = 0 V0.80.6VVV OLV Dynamic LOW Valley Voltage (Note 4)V CC = 3.3 V, C L = 50 pF, V IH = 3.3 V, V IL = 0 VV CC = 2.5 V, C L = 30 pF, V IH = 2.5 V, V IL = 0 V−0.8−0.6VV4.Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output ismeasured in the LOW state.CAPACITIVE CHARACTERISTICSSymbol Parameter Condition Typical UnitC IN Input Capacitance V CC = 3.3 V, V I = 0 V or V CC7pFC I/O Input/Output Capacitance V CC = 3.3 V, V I = 0 V or V CC8pFC PD Power Dissipation Capacitance10 MHz, V CC = 3.3 V, V I = 0 V or V CC20pFAn, Bn WAVEFORM 1 − PROPAGATION DELAYS t R = t F = 2.5 ns, 10% to 90%; f = 1 MHz; t W = 500 ns V CC0 VV OHV OLAn, BnBn, AnWAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMESt R = t F = 2.5 ns, 10% to 90%; f = 1 MHz; t W = 500 ns0 VOEn,T/RnAn, BnFigure 3. AC WaveformsV OH V HZ V OLV CCV LZ Table 2. AC WAVEFORMSSymbol V CC3.3 V ±0.3 V2.7 V 2.5 V +0.2 V Vmi 1.5 V 1.5 V V CC / 2Vmo 1.5 V 1.5 V V CC / 2V HZ V OL + 0.3 V V OL+ 0.3 V V OL + 0.15 V V LZV OH − 0.3 VV OH − 0.3 VV OH − 0.15 VOPEN V 6 V or V CC x 2GNDFigure 4. Test CircuitTable 3. TEST CIRCUITTESTSWITCH t PLH , t PHL Opent PZL , t PLZ6 V at V CC = 3.3 0.3 V 6 V at V CC = 2.5 0.2 VOpen Collector/Drain t PLH and t PHL 6 V t PZH , t PHZGNDC L = 50 pF at V CC = 3.3 0.3 V or equivalent (includes jig and probe capacitance)C L = 30 pF at V CC = 2.5 0.2 V or equivalent (includes jig and probe capacitance)R L = R 1 = 500 W or equivalentR T = Z OUT of pulse generator (typically 50 W )PACKAGE DIMENSIONSTSSOP−48DT SUFFIX CASE 1201−01ISSUE ADIM MIN MAX MIN MAX INCHESMILLIMETERS A 12.4012.600.4880.496B 6.00 6.200.2360.244C −−− 1.10−−−0.043D 0.050.150.0020.006F 0.500.750.0200.030G 0.50 BSC 0.0197 BSC H 0.37−−−0.015−−−J 0.090.200.0040.008J10.090.160.0040.006K 0.170.270.0070.011K10.170.230.0070.009L 7.958.250.3130.325M0 8 0 8 ____NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.5.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.6.DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。

MC74VHC244Octal Bus BufferThe MC74VHC244 is an advanced high speed CMOS octal bus buffer fabricated with silicon gate CMOS technology.The MC74VHC244 is a noninverting 3−state buffer, and has two active −low output enables. This device is designed to be used with 3−state memory address drivers, etc.The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7 V , allowing the interface of 5 V systems to 3 V systems.•High Speed: t PD = 3.9 ns (Typ) at V CC = 5 V•Low Power Dissipation: I CC = 4 m A (Max) at T A = 25°C •High Noise Immunity: V NIH = V NIL = 28% V CC •Power Down Protection Provided on Inputs •Balanced Propagation Delays•Designed for 2 V to 5.5 V Operating Range •Low Noise: V OLP = 0.9 V (Max)•Pin and Function Compatible with Other Standard Logic Families •Latchup Performance Exceeds 300 mA•ESD Performance:Human Body Model > 2000 VMachine Model > 200 V•Chip Complexity: 136 FETs•These Devices are Pb −Free and are RoHS CompliantDATA INPUTSYB4YB3YB2YB1YA4YA3YA2YA1NONINVERTING OUTPUTSFigure 1. Logic Diagram201120MARKING DIAGRAMSSOIC −20DW SUFFIX CASE 751DTSSOP −20DT SUFFIX CASE 948ESOEIAJ −20M SUFFIX CASE 967VHC244AWLYWWGVHC244= Specific Device Code A = Assembly Location WL, L = Wafer Lot Y= Year WW, W = Work Week G or G = Pb −Free Package(Note: Microdot may be in either location)VHC 244ALYW G G A3A2YB4A1OEA GNDYB1A4YB2YB3YA2B4YA1OEB V CC B1YA4B2YA3B3PIN ASSIGNMENTORDERING INFORMATIONSee detailed ordering and shipping information in the Ordering Information Table on page 2 of this data sheet.FUNCTION TABLEINPUTS OUTPUTSOEA, OEB A, B YA, YBL L LL H HH X ZORDERING INFORMATIONDevice Package Shipping†MC74VHC244DW − OBSOLETE*SOIC−20 WB38 Units/RailMC74VHC244DWR2G SOIC−20 WB(Pb−Free)1000/T ape & ReelMC74VHC244DTG TSSOP−20(Pb−Free)75 Units/RailMC74VHC244DTR2G TSSOP−20(Pb−Free)2500/T ape & ReelMC74VHC244M − OBSOLETE*SOIC EIAJ−20(Pb−Free)1600 Units/BoxMC74VHC244MELG SOIC EIAJ−20(Pb−Free)2000/T ape & Reel*This device is obsolete, information available for reference.†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.MAXIMUM RATINGS (Note 1)Symbol Parameter Value UnitV CC Positive DC Supply Voltage−0.5 to +7.0VV IN Digital Input Voltage−0.5 to +7.0VV OUT DC Output Voltage−0.5 to V CC +0.5VI IK Input Diode Current−20mAI OK Output Diode Current$20mAI OUT DC Output Current, per Pin$25mAI CC DC Supply Current, V CC and GND Pins$75mAP D Power Dissipation in Still Air SOICTSSOP 500450mWT STG Storage Temperature Range−65 to +150°CV ESD ESD Withstand Voltage Human Body Model (Note 2)Machine Model (Note 3)Charged Device Model (Note 4)>2000>200>2000VI LATCHUP Latchup Performance Above V CC and Below GND at 125°C (Note 5)$300mAq JA Thermal Resistance, Junction−to−Ambient SOICTSSOP 96128°C/WStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1.V in and V out should be constrained to the range GND v (V in or V out) v V CC. Unused inputs must always be tied to an appropriate logic voltagelevel (e.g., either GND or V CC). Unused outputs must be left open.2.Tested to EIA/JESD22−A114−A3.Tested to EIA/JESD22−A115−A4.Tested to JESD22−C101−A5.Tested to EIA/JESD78RECOMMENDED OPERATING CONDITIONSSymbol Characteristics Min Max Unit V CC DC Supply Voltage 2.0 5.5V V IN DC Input Voltage0 5.5V V OUT DC Output Voltage0V CC V T A Operating Temperature Range, all Package Types−55125°Ct r, t f Input Rise or Fall Time V CC = 3.3 V + 0.3 VV CC = 5.0 V + 0.5 V 010020ns/VDEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURESJunctionTemperature °C Time, Hours Time, Years 801,032,200117.890419,30047.9100178,70020.411079,6009.4 12037,000 4.2 13017,800 2.0 1408,900 1.011101001000TIME, YEARSNORMALIZEDFAILURERATEFigure 2. Failure Rate vs. Time Junction TemperatureDC CHARACTERISTICS (Voltages Referenced to GND)V CC T A = 25°C T A≤ 85°C−55°C ≤ T A≤ 125°C Symbol Parameter Condition(V)Min Typ Max Min Max Min Max UnitV IH Minimum High−LevelInput Voltage2.03.0 to5.51.5V CCX0.71.5V CCX0.71.5V CCX0.71.5V CCX0.7VV IL Maximum Low−LevelInput Voltage2.03.0 to5.50.5V CCX0.30.5V CCX0.30.5V CCX0.3VV OH Maximum High−LevelOutput Voltage V IN = V IH or V ILI OH = −50 m A2.03.04.51.92.94.42.03.04.51.92.94.41.92.94.4VV IN = V IH or V ILI OH = −4 mAI OH = −8 mA3.04.52.583.942.483.82.343.66V OL Maximum Low−LevelOutput Voltage V IN = V IH or V ILI OL = 50 m A2.03.04.50.00.00.00.10.10.10.10.10.10.10.10.1VV IN = V IH or V ILI OH = 4 mAI OH = 8 mA3.04.50.360.360.440.440.520.52I IN Input Leakage Current V IN = 5.5 V or GND0 to5.5±0.1±1.0±1.0m AI OZ Maximum 3−StateLeakage Current V IN = V IH or V ILV OUT = V CC or GND5.5±0.25±2.5±2.5m AI CC Maximum QuiescentSupply Current(per package)V IN = V CC or GND 5.5 4.040.040.0m AAC ELECTRICAL CHARACTERISTICS (Input t r = t f= 3.0 ns)Symbol Parameter Test ConditionsT A = 25°C T A3 85°C−55°C 3 T A3 125°CUnit Min Typ Max Min Max Min Maxt PLH, t PHL Maximum PropagationDelay, A to YA orB to YBV CC = 3.3 ± 0.3 V C L = 15 pFC L = 50 pF5.88.38.411.91.01.010.013.51.01.011.014.5nsV CC = 5.0 ± 0.5 V C L = 15 pFC L = 50 pF3.95.45.57.51.01.06.58.51.01.07.59.5t PZL, t PZH Output Enable TimeOEA to YA orOEB to YBV CC = 3.3 ± 0.3 V C L = 15 pFR L = 1 k W C L = 50 pF6.69.110.614.11.01.012.516.01.01.013.517.0nsV CC = 5.0 ± 0.5 V C L = 15 pFR L = 1 k W C L = 50 pF4.76.27.39.31.01.08.510.51.01.09.511.5t PLZ, t PHZ Output Disable TimeOEA to YA orOEB to YBV CC = 3.3 ± 0.3 V C L = 50 pFR L = 1 k W10.314.0 1.016.0 1.017.0nsV CC = 5.0 ± 0.5 V C L = 50 pFR L = 1 k W6.79.2 1.010.5 1.011.5t OSLH, t OSHL Output to Output Skew V CC = 3.3 ± 0.3 V C L = 50 pF(Note 6)1.5 1.5 1.5nsV CC = 5.0 ± 0.5 V C L = 50 pF(Note 6)1.0 1.0 1.5C in Maximum InputCapacitance4101010pFC out Maximum Three−StateOutput Capacitance(Output in High−ImpedanceState)6pFC PD Power Dissipation Capacitance (Note 7)Typical @ 25°C, V CC = 5.0VpF196.Parameter guaranteed by design. t OSLH = |t PLHm− t PLHn|, t OSHL = |t PHLm− t PHLn|.7.C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.Average operating current can be obtained by the equation: I CC(OPR) = C PD V CC f in + I CC/8 (per bit). C PD is used to determine the no−load dynamic power consumption; P D = C PD V CC2 f in + I CC V CC.NOISE CHARACTERISTICS (Input t r = t f = 3.0 ns, C L = 50 pF, V CC = 5.0 V)Symbol ParameterT A = 25°CUnit Typ MaxV OLP Quiet Output Maximum Dynamic V OL0.60.9V V OLV Quiet Output Minimum Dynamic V OL−0.6−0.9V V IHD Minimum High Level Dynamic Input Voltage 3.5V V ILD Maximum Low Level Dynamic Input Voltage 1.5VFigure 3. Switching Waveform Figure 4. Switching WaveformV CCGNDOEA or OEBYA or YBYA or YBV CCGNDHIGHIMPEDANCEHIGHIMPEDANCE*Includes all probe and jig capacitance C L *TEST POINTFigure 5. Test Circuit *Includes all probe and jig capacitanceTEST POINTFigure 6. Test CircuitCONNECT TO V CC WHEN TESTING t PLZ AND t PZL .CONNECT TO GND WHEN TESTING t PHZ AND t PZH .TEST CIRCUITSSWITCHING WAVEFORMSFigure 7. Input Equivalent CircuitINPUTSOIC−20 WB DW SUFFIX CASE 751D−05 ISSUE GM0.25SA SBTDIM MIN MAXMILLIMETERSA 2.35 2.65A10.100.25B0.350.49C0.230.32D12.6512.95E7.407.60e 1.27 BSCH10.0510.55h0.250.75L0.500.90q0 7NOTES:1.DIMENSIONS ARE IN MILLIMETERS.2.INTERPRET DIMENSIONS AND TOLERANCESPER ASME Y14.5M, 1994.3.DIMENSIONS D AND E DO NOT INCLUDE MOLDPROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.5.DIMENSION B DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE PROTRUSIONSHALL BE 0.13 TOTAL IN EXCESS OF BDIMENSION AT MAXIMUM MATERIALCONDITION.__TSSOP −20CASE 948E −02ISSUE CDIM A MIN MAX MIN MAX INCHES 6.600.260MILLIMETERS B 4.30 4.500.1690.177C 1.200.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSCH 0.270.370.0110.015J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M 0 8 0 8 ____NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION:MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSIONSHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W −.DETAIL E6.400.252------16X0.360.65PITCHSOLDERING FOOTPRINTSOEIAJ −20CASE 967−01ISSUE ADIM MIN MAX MIN MAX INCHES --- 2.05---0.081MILLIMETERS 0.050.200.0020.0080.350.500.0140.0200.150.250.0060.01012.3512.800.4860.5045.10 5.450.2010.2151.27 BSC 0.050 BSC 7.408.200.2910.3230.500.850.0200.0331.10 1.500.0430.0590 0.700.900.0280.035---0.81---0.032A 1H E Q 1L E _10 _0 _10 _NOTES: 1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982. 2.CONTROLLING DIMENSION: MILLIMETER. 3.DIMENSIONS D AND E DO NOT INCLUDEMOLD FLASH OR PROTRUSIONS AND AREMEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15(0.006) PER SIDE. 4.TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY. 5.THE LEAD WIDTH DIMENSION (b) DOES NOTINCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003)TOTAL IN EXCESS OF THE LEAD WIDTHDIMENSION AT MAXIMUM MATERIAL CONDITION.DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACEBETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018).DETAIL PA b c D E e L M ZON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。

© 2005 Fairchild Semiconductor Corporation DS011993February 1994Revised March 200574LCX240 Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and Outputs74LCX240Low Voltage Octal Buffer/Line Driver with 5V Tolerant Inputs and OutputsGeneral DescriptionThe LCX240 is an inverting octal buffer and line driver designed to be employed as a memory address driver,clock driver and bus oriented transmitter or receiver. The device is designed for low voltage (2.5V or 3.3V) V CC appli-cations with capability of interfacing to a 5V signal environ-ment.The LCX240 is fabricated with an advanced CMOS tech-nology to achieve high speed operation while maintaining CMOS low power dissipation.Featuress 5V tolerant inputs and outputs s 2.3V–3.6V V CC specifications provided s 6.5 ns t PD max (V CC 3.3V), 10 P A I CC max s Power-down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1)s r 24 mA output drive (V CC 3.0V)s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance:Human body model ! 2000V Machine model ! 200VNote 1: To ensure the high-impedance state during power up or down, OE should be tied to V CC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver.Ordering Code:Devices also available in T ape and Reel. Specify by appending the suffix letter “X ” to the ordering code.Pb-Free package per JEDEC J-STD-020B.Note 2: “_NL ” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.Logic Diagram Connection DiagramOrder Number Package Package DescriptionNumber 74LCX240WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LCX240SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX240MSA MSA2020-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74LCX240MTC MTC2020-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LCX240MTCX_NL (Note 2)MTC20Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 274L C X 240Pin DescriptionsTruth TablesH HIGH Voltage Level L LOW Voltage Level X ImmaterialZ High ImpedancePin Names DescriptionOE 1, OE 23-STATE Output Enable Inputs I 0–I 7Inputs O 0–O 7OutputsInputsOutputsOE 1I n (Pins 12, 14, 16, 18)L L H L H L HXZ InputsOutputsOE 2I n (Pins 3, 5, 7, 9)L L H L H L HXZ74LCX240Absolute Maximum Ratings (Note 3)Recommended Operating Conditions (Note 5)Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-mended Operating Conditions ” table will define the conditions for actual device operation.Note 4: I O Absolute Maximum Rating must be observed.Note 5: Unused inputs must be held HIGH or LOW. They may not float.DC Electrical CharacteristicsSymbol ParameterValueConditionsUnits V CC Supply Voltage 0.5 to 7.0V V I DC Input Voltage 0.5 to 7.0VV O DC Output Voltage 0.5 to 7.0Output in 3-STATEV 0.5 to V CC 0.5Output in HIGH or LOW State (Note 4)V I IK DC Input Diode Current 50V I GND mA I OK DC Output Diode Current 50V O GND mA 50V O ! V CCI O DC Output Source/Sink Current r 50mA I CC DC Supply Current per Supply Pin r 100mA I GND DC Ground Current per Ground Pin r 100mAT STGStorage Temperature65 to 150q CSymbol ParameterMin Max Units V CC Supply Voltage Operating 2.0 3.6V Data Retention1.5 3.6V I Input Voltage 0 5.5V V O Output Voltage HIGH or LOW State0V CC V3-STATE5.5I OH /I OLOutput CurrentV CC 3.0V 3.6V r 24mAV CC 2.7V 3.0V r 12V CC 2.3V 2.7Vr 8T AFree-Air Operating Temperature4085q C 't/'VInput Edge Rate, V IN 0.8V –2.0V, V CC 3.0V10ns/VSymbol ParameterConditionsV CC T A 40q C to 85q C Units (V)Min MaxV IH HIGH Level Input Voltage 2.3 2.7 1.7V 2.7 3.6 2.0V IL LOW Level Input Voltage 2.3 2.70.7V2.73.60.8V OHHIGH Level Output VoltageI OH 100P A 2.3 3.6V CC - 0.2VI OH = -8 mA 2.3 1.8I OH 12 mA 2.7 2.2I OH 18 mA 3.0 2.4I OH 24 mA3.0 2.2V OLLOW Level Output VoltageI OL 100P A 2.3 3.60.2I OL = 8mA 2.30.6I OL 12 mA 2.70.4V I OL 16 mA 3.00.4I OL 24 mA3.00.55I I Input Leakage Current 0 d V I d 5.5V 2.3 3.6r 5.0P A I OFF Power-Off Leakage Current V I or V O 5.5V 10P A I CC Quiescent Supply Current V I V CC or GND2.33.610P A 3.6V d V I , V O d 5.5V (Note 6) 2.3 3.6r 10'I CCIncrease in I CC per InputV IH V CC 0.6V2.33.6500P A 474L C X 240DC Electrical Characteristics (Continued)Note 6: Outputs disabled or 3-STATE only.AC Electrical CharacteristicsNote 7: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t OSHL ) or LOW-to-HIGH (t OSLH ).Dynamic Switching CharacteristicsCapacitanceSymbolParameterT A 40q C to 85q C, R L 500:UnitsV CC 3.3V r 0.3VV CC 2.7V V CC 2.5V r 0.2VC L 50 pF C L 50 pF C L 30 pF MinMax Min Max Min Max t PHL Propagation Delay1.5 6.5 1.57.5 1.57.8ns t PLH 1.5 6.5 1.57.5 1.57.8t PZL Output Enable Time 1.58.0 1.59.0 1.510.0ns t PZH 1.58.0 1.59.0 1.510.0t PLZ Output Disable Time 1.57.0 1.58.0 1.58.4ns t PHZ 1.57.0 1.58.01.58.4t OSHL Output to Output Skew (Note 7) 1.0ns t OSLH1.0Symbol ParameterConditionsV CC T A 25q C Units (V)Typical V OLP Quiet Output Dynamic Peak V OL C L 50 pF, V IH 3.3V, V IL 0V 3.30.8V C L 30 pF, V IH 2.5V, V IL 0V 2.50.6V OLVQuiet Output Dynamic Valley V OLC L 50 pF, V IH 3.3V, V IL 0V 3.3 0.8VC L 30 pF, V IH 2.5V, V IL 0V2.50.6Symbol ParameterConditionsTypical Units C IN Input Capacitance V CC Open, V I 0V or V CC 7pF C OUT Output CapacitanceV CC 3.3V, V I 0V or V CC8pF C PDPower Dissipation CapacitanceV CC 3.3V, V I 0V or V CC , f 10 MHz25pF74LCX240AC Loading and Waveforms Generic for LCX FamilyFIGURE 1. AC Test Circuit(C L includes probe and jig capacitance)Waveform for Inverting and Non-Inverting FunctionsPropagation Delay, Pulse Width and t rec Waveforms3-STATE Output High Enable andDisable TImes for Logic3-STATE Output Low Enable andDisable Times for LogicSetup Time, Hold TIme and Recovery TIme for Logict rise and t fallFIGURE 2. Waveforms(Input Pulse Characteristics; f = 1MHz, t r = t f = 3ns)Test Switcht PLH, t PHL Opent PZL, t PLZ6V at V CC 3.3 r 0.3VV CC x 2 at V CC 2.5 r 0.2Vt PZH,t PHZ GNDSymbolV CC3.3V r 0.3V 2.7V 2.5V r 0.2VV mi 1.5V 1.5V V CC/2V mo 1.5V 1.5V V CC/2V x V OL 0.3V V OL 0.3V V OL 0.15VV y V OH 0.3V V OH 0.3V V OH 0.15V 674L C X 240Schematic DiagramGeneric for LCX Family 74LCX240Physical Dimensions inches (millimeters) unless otherwise noted20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" WidePackage Number M20B 874L C X 240Physical Dimensionsinches (millimeters) unless otherwise noted (Continued)Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage Number M20D 74LCX240Physical Dimensions inches (millimeters) unless otherwise noted (Continued)20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm WidePackage Number MSA201074L C X 240 L o w V o l t a g e O c t a l B u f f e r /L i n e D r i v e r w i t h 5V T o l e r a n t I n p u t s a n d O u t p u t sPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage Number MTC20Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。

HD74AC245/HD74ACT245 Octal Bidirectional Transceiver with 3-State Input/OutputDescriptionThe HD74AC245/HD74ACT245 contains eight non-inverting bidirectional buffers with 3-state outputs and is intended for bus-oriented applications. Current sinking capability is 24 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active-High) enables data from A ports to B ports; Receive (active-Low) enables data from B ports to A ports. The Output Enable input, when High, disables, both A and B ports by placing them in a High Z condition.Features• Noninverting Buffers• Bidirectional Data Path• A and B Outputs Source/Sink 24 mA• HD74ACT245 has TTL-Compatible InputsPin NamesOE Output Enable InputT/R Transmit/Receive InputA0 to A7Side A 3-State Inputs or 3-State OutputsB0 to B7Side B 3-State Inputs or 3-State OutputsHD74AC245/HD74ACT245Pin ArrangementTruth TablesInputsOE T/R OutputsL L Bus B Data to Bus A L H Bus A Data to Bus B H X High Z StateH:High Voltage LevelL:Low Voltage LevelX:Immaterial2HD74AC245/HD74ACT2453DC Characteristics (unless otherwise specified)ItemSymbol Max Unit ConditionMaximum quiescent supply current I CC 80µA V IN = V CC or ground, V CC = 5.5 V,Ta = Worst caseMaximum quiescent supply current I CC 8.0µA V IN = V CC or ground, V CC = 5.5 V,Ta = 25°CMaximum additional I CC /input (HD74ACT245)I CCT1.5mAV IN = V CC – 2.1 V, V CC = 5.5 V,Ta = Worst caseAC Characteristics: HD74AC245Ta = +25°C C L = 50 pFTa = –40°C to +85°C C L = 50 pF ItemSymbol V CC (V)*1Min Typ Max Min Max Unit Propagation delay t PLH3.3 1.0 5.08.5 1.09.0nsData to output 5.0 1.0 3.5 6.5 1.07.0Propagation delay t PHL 3.3 1.0 5.08.5 1.09.0ns Data to output 5.0 1.0 3.5 6.0 1.07.0Output enable time t PZH 3.3 1.07.011.5 1.012.5ns 5.0 1.0 5.08.5 1.09.0Output enable time t PZL 3.3 1.07.512.0 1.013.5ns 5.0 1.0 5.59.0 1.09.5Output disable time t PHZ 3.3 1.0 6.512.0 1.012.5ns 5.0 1.0 5.59.0 1.010.0Output disable time t PLZ 3.3 1.07.011.5 1.013.0ns 5.01.05.59.01.010.0Note:1.Voltage Range 3.3 is 3.3 V ± 0.3 VVoltage Range 5.0 is 5.0 V ± 0.5 VHD74AC245/HD74ACT2454AC Characteristics: HD74ACT245Ta = +25°C C L = 50 pFTa = –40°C to +85°C C L = 50 pF ItemSymbol V CC (V)*1Min Typ Max Min Max Unit Propagation delay Data to output t PLH 5.0 1.0 4.07.5 1.08.0ns Propagation delay Data to output t PHL 5.0 1.0 4.08.0 1.09.0ns Output enable time t PZH 5.0 1.0 5.010.0 1.011.0ns Output enable time t PZL 5.0 1.0 5.510.0 1.012.0ns Output disable time t PHZ 5.0 1.0 5.510.0 1.011.0ns Output disable time t PLZ5.01.05.010.01.011.0nsNote:1.Voltage Range 5.0 is 5.0 V ± 0.5 VCapacitanceItemSymbol Typ Unit Condition Input capacitance C IN 4.5pF V CC = 5.5 V Input/output capacitance C I/O 15.0pF V CC = 5.5 V Power dissipation capacitanceC PD45.0pFV CC = 5.0 VHitachi Code JEDEC EIAJWeight (reference value)DP-20N —Conforms 1.26 gUnit: mm元器件交易网Hitachi Code JEDEC EIAJWeight (reference value)TTP-20DA ——0.07 gUnit: mm*Dimension including the plating thicknessBase material dimension元器件交易网Cautions1.Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,copyright, trademark, or other intellectual property rights for information contained in this document.Hitachi bears no responsibility for problems that may arise with third party’s rights, includingintellectual property rights, in connection with use of the information contained in this document.2.Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use.3.Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,traffic, safety equipment or medical equipment for life support.4.Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installationconditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.5.This product is not designed to be radiation resistant.6.No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi.7.Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products.Hitachi, Ltd.Semiconductor & Integrated Circuits.Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.Hitachi Asia Pte. Ltd.16 Collyer Quay #20-00Hitachi TowerSingapore 049318Tel: 535-2100Fax: 535-1533URLNorthAmerica : http:/Europe : /hel/ecg Asia (Singapore): .sg/grp3/sicd/index.htm Asia (Taiwan): /E/Product/SICD_Frame.htm Asia (HongKong): /eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htmHitachi Asia Ltd.Taipei Branch Office3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105)Tel: <886> (2) 2718-3666Fax: <886> (2) 2718-8180Hitachi Asia (Hong Kong) Ltd.Group III (Electronic Components)7/F., North Tower, World Finance Centre,Harbour City, Canton Road, Tsim Sha Tsui,Kowloon, Hong Kong Tel: <852> (2) 735 9218Fax: <852> (2) 730 0281 Telex: 40815 HITEC HXHitachi Europe Ltd.Electronic Components Group.Whitebrook ParkLower Cookham Road MaidenheadBerkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000Fax: <44> (1628) 778322Hitachi Europe GmbHElectronic components Group Dornacher Stra§e 3D-85622 Feldkirchen, Munich GermanyTel: <49> (89) 9 9180-0Fax: <49> (89) 9 29 30 00Hitachi Semiconductor (America) Inc.179 East Tasman Drive,San Jose,CA 95134 Tel: <1> (408) 433-1990Fax: <1>(408) 433-0223For further information write to:。