Remote Revocation of Smart Cards in a Private DRM System
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IBM System Storage SAN Volume ControllerIBM Storwize V7000Information Center ErrataVersion 6.3.0April 27, 20121Contents Introduction (4)Who should use this guide (4)Last Update (4)Change History (4)iSCSI Limits (5)iSCSI Limits with Multiple I/O Groups (5)Definition of terms (5)Limits that take effect when using iSCSI (6)Single I/O Group Configurations (6)iSCSI host connectivity only (6)Mixed iSCSI and Fibre Channel host connectivity (6)Multiple I/O Group Config (7)Symptoms of exceeding the limits (7)Configuring the HP 3PAR F-Class and T-Class Storage Systems (8)Minimum Supported STORWIZE V7000 Version (8)Configuring the HP 3PAR Storage System (8)Supported models of HP 3PAR Storage Systems (8)Support firmware levels of HP 3PAR storage arrays (8)Concurrent maintenance on HP 3PAR storage arrays (8)HP 3PAR user interfaces (8)HP 3PAR Management Console (9)HP 3PAR Command Line Interface (CLI) (9)Logical units and target ports on HP 3PAR storage arrays (9)LUNs (9)LUN IDs (9)LUN creation and deletion (10)LUN Presentation (10)Special LUNs (10)LU access model (11)LU grouping (11)LU preferred access port (11)Detecting Ownership (11)Switch zoning limitations for HP 3PAR storage arrays (11)Fabric zoning (11)Target port sharing (11)Controller splitting (12)Configuration settings for HP 3PAR storage array (12)Logical unit options and settings for HP 3PAR storage array (12)Creation of CPG (12)Set up of Ports (13)Setup of Host (14)LUN creation (15)Host options and settings for HP 3PAR storage array (16)2Quorum disks on HP 3PAR storage arrays (16)Clearing SCSI reservations and registrations (17)Copy functions for HP 3PAR storage array (17)Thin Provisioning for HP 3PAR storage array (17)Recommended Settings for Linux Hosts (18)Multipath settings for specific Linux distributions and Releases (19)Udev Rules SCSI Command Timeout Changes (21)Editing the udev rules file (22)3IntroductionThis guide provides errata information that pertains to release 6.3.0 of the IBM System Storage SAN Volume Controller Information Center and the IBM Storwize V7000 Information Center.Who should use this guideThis errata should be used by anyone using iSCSI as a method to connect hosts, Connecting Linux hosts using Fibre Channel or when connecting HP 3PAR Storage to IBM System Storage SAN Volume Controller or IBM Storwize V7000 .Last UpdateThis document was last updated: April 27, 2012.Change HistoryThe following revisions have been made to this document:Revision Date Sections ModifiedNov 18, 2011 New publicationApr 27 2012 Linux Host SettingsTable 1: Change History4iSCSI LimitsiSCSI Limits with Multiple I/O GroupsThe information is in addition to, and a simplification of, the information provided in the Session Limits pages at the following links:/infocenter/StorwizeV7000/ic/index.jsp?topic=/com.ibm.storage.Storwize V7000.console.doc/StorwizeV7000_iscsisessionlimits.html/infocenter/storwize/ic/topic/com.ibm.storwize.v7000.doc/S torwize V7000_iscsisessionlimits.htmlDefinition of termsFor the purposes of this document the following definitions are used:IQN:an iSCSI qualified name – each iSCSI target or initiator has an IQN. The IQN should be unique within the network. Recommended values are of the formiqn.<date>.<reverse domain name>:<hostname>.<unique id> e.g. iqn.03-.ibm.hursley:host1.1initiator: an IQN that is used by a host to connect to an iSCSI targettarget: an IQN on an STORWIZE V7000 or V7000 node that is the target for an iSCSI logintarget portal: an IP address that can be used to access a target IQN. This can be either an IPv4 or an IPv6 address.5Limits that take effect when using iSCSISingle I/O Group ConfigurationsiSCSI host connectivity only1 target IQN per node2 iSCSI target portals (1xIPv4 and 1xIPv6) per network interface on a node4 sessions per initiator for each target IQN256 defined iSCSI host object IQNs512 host iSCSI sessions per I/O group **256 host iSCSI sessions per node (this is to allow the hosts to reconnect in the event of a failover)** e.g. if a single initiator logs in 3 times to a single target count this as 3. If a singleinitiator logs in to 2 targets via 3 target portals each count this as 6.Only the 256 defined iSCSI IQN limit is enforced by the GUI or CLI commands. Mixed iSCSI and Fibre Channel host connectivity512 total sessions per I/O group where:1 defined FC host object port (WWPN) = 1 session1 defined iSCSI host object IQN = 1 session1 additional iSCSI session to a target = 1 sessionIf the total number of defined FC ports & iSCSI sessions in an I/O group exceeds 512, some of the hosts may not be able to reconnect to the STORWIZE V7000/V7000 targets in the event of a node IP failover. See above section for help on calculating the number of iSCSI sessions.6Multiple I/O Group ConfigIf a host object is defined in more than one I/O group then each of its host object port definitions is counted against the session limits for every I/O group it is a member of. This is true for both FC and iSCSI host objects. By default a host object created using the graphical user interface is created in all available I/O groups.Symptoms of exceeding the limits.The following list is not comprehensive. It is given to illustrate some of the common symptoms seen if the limits defined above are exceeded.. These symptoms could also indicate other types of problem with the iSCSI network.•The host reports a time out during the iSCSI login process•The host reports a time out when reconnecting to the target after a STORWIZE V7000/V7000 node IP failover has occurred.In both of the above cases no errors will be logged by the STORWIZE V7000/V7000 system.7Configuring the HP 3PAR F-Class and T-Class Storage SystemsMinimum Supported STORWIZE V7000 Version6.2.0.4Configuring the HP 3PAR Storage SystemThis portion of the document covers the necessary configuration for using an HP 3PAR Storage System with an IBM Storwize V7000 cluster.Supported models of HP 3PAR Storage SystemsThe HP 3PAR F-Class (Models 200 and 400) the HP 3PAR T-Class (Models 400 and 800) are supported for use with the IBM STORWIZE V7000. These systems will be referred to as HP 3PAR storage arrays. For the latest supported models please visit /support/docview.wss?uid=ssg1S1003907Support firmware levels of HP 3PAR storage arraysFirmware revision HP InForm Operating System 2.3.1 (MU4 or later maintenance level) is the supported level of firmware for use with IBM STORWIZE V7000. For support on later versions, consult /support/docview.wss?uid=ssg1S1003907 Concurrent maintenance on HP 3PAR storage arraysConcurrent Firmware upgrades (“online upgrades”) are supported as per HP procedures. HP 3PAR user interfacesUsers may configure an HP 3PAR storage array with the 3PAR Management Console or HP 3PAR Command Line Interface (CLI).8HP 3PAR Management ConsoleThe management console accesses the array via the IP address of the HP 3PAR storage array. All configuration and monitoring steps are intuitively available through this interface.HP 3PAR Command Line Interface (CLI)The CLI may be installed locally on a Windows or Linux host. The CLI is also available through SSH.Logical units and target ports on HP 3PAR storage arraysFor clarification, partitions in the HP 3PAR storage array are exported as Virtual Volumes with a Virtual Logical Unit Number (VLUN) either manually or automatically assigned to the partition.LUNsHP 3PAR storage arrays have highly developed thin provisioning capabilities. The HP 3PAR storage array has a maximum Virtual Volume size of 16TB. A partition Virtual Volume is referenced by the ID of the VLUN.HP 3PAR storage arrays can export up to 4096 LUNs to the STORWIZE V7000 Controller (STORWIZE V7000’s maximum limit). The largest Logical Unit size supported by STORWIZE V7000 under PTF 6.2.0.4 is 2TB, STORWIZE V7000 will not display or exceeded this capacity.LUN IDsHP 3PAR storage arrays will identify exported Logical Units throughSCSI Identification Descriptor type 3.The 64-bit IEEE Registered Identifier (NAA=5) for the Logical Unit is in the form;5-OUI-VSID .The 3PAR IEEE Company ID of 0020ACh, the rest is a vendor specific ID.9Example 50002AC000020C3A.LUN creation and deletionVirtual Volumes (VVs) and their corresponding Logical Units (VLUNs) are created, modified, or deleted through the provisioning option in the Management Console or through the CLI commands. VVs are formatted to all zeros upon creation.To create a VLUN, highlight the Provisioning Menu and select the Create Virtual Volume option. To modify, resize, or destroy a VLUN, select the appropriate Virtual Volume from the window, right click when the specific VLUN is highlighted.*** Note: Delete the mdisk on the STORWIZE V7000 Cluster before deleting the LUN on the HP 3PAR storage array.LUN PresentationVLUNs are exported through the HP 3PAR storage array’s available FC ports by the export options on Virtual Volumes. The Ports are designated at setup and configured separately as either Host or Target (Storage connection). Ports being identified by a node : slot : port representation.There are no constraints on which ports or hosts a logical unit may be addressable.To apply Export to a logical unit, highlight the specific Virtual Volume associated with the Logical Unit in the GUI and right click and select Export.Special LUNsThere are no special considerations to a Logical Unit numbering. LUN 0 may be exported where necessary.Target PortsA HP 3PAR storage array may contain dual and/or quad ported FC cards. Each WWPN is identified with the pattern 2N:SP:00:20:AC:MM:MM:MM where N is the node, S is the slot and P is the port number on the controller and N is the controller’s address. The MMMMMM represents the systems serial number.Port 2 in slot 1 of controller 0 would have the WWPN of 20:12:00:02:AC:00:0C:3A The last 4 digits of serial number 1303130 in hex (3130=0x0C3A).This system has a WWNN for all ports of 2F:F7:00:02:AC:00:0C:3A.10LU access modelAll controllers are Active/Active. In all conditions, it is recommended to multipath across FC controller cards to avoid an outage from controller failure. All HP 3PAR controllers are equal in priority so there is no benefit to using an exclusive set for a specific LU.LU groupingLU grouping does not apply to HP 3PAR storage arrays.LU preferred access portThere are no preferred access ports on the HP 3PAR storage arrays as all ports are Active/Active across all controllers.Detecting OwnershipDetecting Ownership does not apply to HP 3PAR storage arrays.Switch zoning limitations for HP 3PAR storage arraysThere are no zoning limitations for HP 3PAR storage arrays.Fabric zoningWhen zoning an HP 3PAR storage array to the STORWIZE V7000 backend ports, be sure there are multiple zones or multiple HP 3PAR storage array and STORWIZE V7000 ports per zone to enable multipathing.Target port sharingThe HP 3PAR storage array may support LUN masking to enable multiple servers to access separate LUNs through a common controller port. There are no issues with mixing workloads or server types in this setup.Host splitting11There are no issues with host splitting on an HP 3PAR storage array.Controller splittingHP 3PAR storage array LUNs that are mapped to the Storwize V7000 cluster cannot be mapped to other hosts. LUNs that are not presented to STORWIZE V7000 may be mapped to other hosts.Configuration settings for HP 3PAR storage arrayThe management console enables the intuitive setup of the HP 3PAR storage array LUNs and export to the Storwize V7000 cluster.Logical unit options and settings for HP 3PAR storage array From the HP 3PAR storage array Management Console the following dialog of options are involved in setting up of Logical Units.Creation of CPGThe set up of Common Provisioning Groups (CPGs). If Tiering is to be utilised, it should be noted it is not good practice to mix different performance LUNs in the same STORWIZE V7000 mdiskgrp.Action->Provisioning->Create CPG (Common Actions)12Set up of PortsShown is on a completed 8 node STORWIZE V7000 cluster.Each designated Host ports should be set to Mode; point.Connection Mode: HostConnection Type: PointSystem->Configure FC Port (Common Actions)13Setup of HostHost Persona should be: 6 – Generic Legacy.All STORWIZE V7000 ports need to be included. Actions->Hosts->Create Host (Common Actions)14LUN creationSize limitations: 256 MiB minimum2TB maximum (STORWIZE V7000 limit)Provisioning: Fully Provision from CPGThinly ProvisionedCPG: Choose provisioning group for new LUN, usually R1,R5,R6 or drive specific. Allocation Warning: Level at which warning is given, optional [%]Allocation Limit: Level at which TP allocation is stopped, optional [%] Grouping: For creating multiple sequential LUNs in a set [integer values, 1-999] Actions->Provisioning->Create Virtual Volumes (Common Actions)15Exporting LUNs to STORWIZE V7000Host selection: choose host definition created for STORWIZE V7000Actions->Provisioning->Virtual Volumes->Unexported (Select VV and right click)Host options and settings for HP 3PAR storage arrayThe host options required to present the HP 3PAR storage array to Storwize V7000 clusters is, “6 legacy controller”.Quorum disks on HP 3PAR storage arraysThe Storwize V7000 cluster selects disks that are presented by the HP 3PAR storage array as quorum disks. To maintain availability with the cluster, ideally each quorum disk should reside on a separate disk subsystem.16Clearing SCSI reservations and registrationsYou must not use the HP 3PAR storage array to clear SCSI reservations and registrations on volumes that are managed by Storwize V7000. The option is not available on the GUI.Note; the following CLI command should only be used under qualified supervision,“setvv –clrsv”.Copy functions for HP 3PAR storage arrayThe HP 3PARs copy/replicate/snapshot features are not supported under STORWIZEV7000.Thin Provisioning for HP 3PAR storage arrayThe HP 3PAR storage array provides extensive thin provisioning features. The use of these thin provisioned LUNs is supported by STORWIZE V7000.The user should take notice of any warning limits from the Array system, to maintain the integrity of the STORWIZE V7000 mdisks and mdiskgrps. An mdisk will go offline and take its mdiskgroup offline if the ultimate limits are exceeded. Restoration will involve provisioning the 3PAR Array LUN, then including the mdisk and restoring any slandered paths.17Recommended Settings for Linux HostsThe following details the recommended multipath ( DMMP ) settings and udev rules for the attachment of Linux hosts to SAN Volume Controller and Storwize V7000. The settings are recommended to ensure path recovery in failover scenarios and are valid for x-series, all Intel/AMD based servers and Power platforms.A host reboot is required after completing the following two stepsEditing the multipath settings in etc/multipath.confEditing the udev rules for SCSI command timeoutFor each Linux distribution and releases within a distribution please reference the default settings under [/usr/share/doc/device-mapper-multipath.*] for Red Hat and[/usr/share/doc/packages/multipath-tools] for Novell SuSE. Ensure that the entries added to multipath.conf match the format and syntax for the required Linux distribution. Only use the multipath.conf from your related distribution and release. Do not copy the multipath.conf file from one distribution or release to another.Note for some OS levels the "polling_interval" needs to be located under defaults instead of under device settings.If "polling_interval" is present in the device section, comment out "polling_interval" using a # keyExamplesUnder Device Section# polling_interval 30,Under Defaults Sectiondefaults {user_friendly_names yespolling_interval 30}18Multipath settings for specific Linux distributions and ReleasesEdit /etc/multipath.conf with the following parameters and confirm the changes using “multipathd -k"show config".RHEL61device {vendor "IBM"product "2145"path_grouping_policy group_by_priogetuid_callout "/lib/udev/scsi_id --whitelisted --device=/dev/%n"features "1 queue_if_no_path"prio aluapath_checker turfailback immediateno_path_retry "5"rr_min_io 1# polling_interval 30dev_loss_tmo 120}RHEL56device {vendor "IBM"product "2145"path_grouping_policy group_by_prioprio_callout "/sbin/mpath_prio_alua /dev/%n"path_checker turfailback immediateno_path_retry 5rr_min_io 1# polling_interval 30dev_loss_tmo 120}19RHEL57device {vendor "IBM"product "2145"path_grouping_policy group_by_prioprio_callout "/sbin/mpath_prio_alua /dev/%n" path_checker turfailback immediateno_path_retry 5rr_min_io 1dev_loss_tmo 120}SLES10SP4device {vendor "IBM"product "2145"path_grouping_policy "group_by_prio"features "1 queue_if_no_path"path_checker "tur"prio "alua"failback "immediate"no_path_retry "5"rr_min_io "1"# polling_interval 30dev_loss_tmo 120}SLES11SP1device {vendor "IBM"product "2145"path_grouping_policy group_by_prioprio aluafeatures "0"no_path_retry 5path_checker turrr_min_io 1failback immediate# polling_interval 30dev_loss_tmo 12020}SLES11SP2device {vendor "IBM"product "2145"path_grouping_policy "group_by_prio"prio "alua"path_checker "tur"failback "immediate"no_path_retry "5"rr_min_io 1dev_loss_tmo 120}Udev Rules SCSI Command Timeout ChangesSet the udev rules for SCSI command timeoutSet SCSI command timeout to 120sOS Level Default Required SettingRHEL61 30 120RHEL62 30 120RHEL56 60 120RHEL57 60 120SLES10SP4 60 120SLES11SP1 60 120SLES11SP2 30 12021Creating a udev rules fileCreate the following udev rule that increases the SCSI command timeout for SVC and V7000 block devicesudev rules filecat /etc/udev/rules.d/99-ibm-2145.rules# Set SCSI command timeout to 120s (default == 30 or 60) for IBM 2145 devices SUBSYSTEM=="block", ACTION=="add", ENV{ID_VENDOR}=="IBM",ENV{ID_MODEL}=="2145", RUN+="/bin/sh -c 'echo 120 >/sys/block/%k/device/timeout'"Reconfirm the settings following the system reboot.22。
f in eo nIn fio nI n fTechnical Committee SD Card Associationf in eo nIn fi ne o n I nf in eo nIRevision HistoryDate Version Changes compared to previous issueApril 3, 2006 1.10 Simplified Version Initial ReleaseFebruary 8, 20072.00(1) Added method to change bus speed (Normal Speed up to 25MHzand High Speed up to 50 MHz)(2) Operational Voltage Requirement is extended to 2.7-3.6V(3) Combine sections 12 (Physical Properties) and 13 (MechanicalExtensions) and add miniSDIO to the new section 13 (Physical Properties)(4) Add Embedded SDIO ATA Standard Function Interface Code (5) Reference of Physical Ver2.00 supports SDHC combo card. (6) Some typos in Ver1.10 are fixed.f in eo nIn fi ne o n I nf in eo nI Release of SD Simplified SpecificationThe following conditions apply to the release of the SD simplified specification ("Simplified Specification") by the SD Card Association. The Simplified Specification is a subset of the complete SD Specification which is owned by the SD Card Association.Publisher:SD Association2400 Camino Ramon, Suite 375 San Ramon, CA 94583 USA Telephone: +1 (925) 275-6615 Fax: +1 (925) 886-4870 E-mail: office@Copyright Holder: The SD Card AssociationNotes:This Simplified Specification is provided on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified Specification may require a license from the SD Card Association or other third parties.Disclaimers:The information contained in the Simplified Specification is presented only as a standard specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any representations or warranties of any kind. No responsibility is assumed by the SD Card Association for any damages, any infringements of patents or other right of the SD Card Association or any third parties, which may result from its use. No license is granted by implication, estoppel or otherwise under any patent or other rights of the SD Card Association or any third party. Nothing herein shall be construed as an obligation by the SD Card Association to disclose or distribute any technical information, know-how or other confidential information to any third party.f in eo nIn fi ne o n I nf in eo nConventions Used in This DocumentNaming ConventionsSome terms are capitalized to distinguish their definition from their common English meaning. Words not capitalized have their common English meaning.Numbers and Number BasesHexadecimal numbers are written with a lower case “h” suffix, e.g., FFFFh and 80h. Binary numbers are written with a lower case “b” suffix (e.g., 10b).Binary numbers larger than four digits are written with a space dividing each group of four digits, as in 1000 0101 0010b.All other numbers are decimal.Key WordsMay: Indicates flexibility of choice with no implied recommendation or requirement.Shall: Indicates a mandatory requirement. Designers shall implement such mandatory requirements to ensure interchangeability and to claim conformance with the specification.Should: Indicates a strong recommendation but not a mandatory requirement. Designers should give strong consideration to such recommendations, but there is still a choice in implementation.Application NotesSome sections of this document provide guidance to the host implementers as follows: Application Note:This is an example of an application note.f in eo nIn fi ne o n I nf in eo nTable of Contents1. General Description.................................................................................................................................1 1.1 SDIO Features....................................................................................................................................1 1.2 Primary Reference Document.............................................................................................................1 1.3 Standard SDIO Functions....................................................................................................................1 2. SDIO Signaling Definition........................................................................................................................2 2.1 SDIO Card Types................................................................................................................................2 2.2 SDIO Card modes...............................................................................................................................2 2.2.1 SPI (Card mandatory support).....................................................................................................2 2.2.2 1-bit SD Data Transfer Mode (Card Mandatory Support).............................................................2 2.2.3 4-bit SD Data Transfer Mode (Mandatory for High-Speed Cards, Optional for Low-Speed).........2 2.3 SDIO Host Modes...............................................................................................................................2 2.4 Signal Pins..........................................................................................................................................3 3. SDIO Card Initialization............................................................................................................................4 3.1 Differences in I/O card Initialization.....................................................................................................4 3.2 The IO_SEND_OP_COND Command (CMD5).................................................................................10 3.3 The IO_SEND_OP_COND Response (R4)........................................................................................11 3.4 Special Initialization considerations for Combo Cards.......................................................................12 3.4.1 Re-initialize both I/O and Memory..............................................................................................12 3.4.2 Using a Combo Card as SDIO only or SD Memory only after Combo Initialization....................12 3.4.3 Acceptable Commands after Initialization..................................................................................12 3.4.4 Recommendations for RCA after Reset.....................................................................................12 3.4.5 Enabling CRC in SPI Combo Card.............................................................................................14 4. Differences with SD Memory Specification..........................................................................................15 4.1 SDIO Command List.........................................................................................................................15 4.2 Unsupported SD Memory Commands...............................................................................................15 4.3 Modified R6 Response......................................................................................................................16 4.4 Reset for SDIO..................................................................................................................................16 4.5 Bus Width..........................................................................................................................................16 4.6 Card Detect Resistor.........................................................................................................................17 4.7 Timings..............................................................................................................................................17 4.8 Data Transfer Block Sizes.................................................................................................................18 4.9 Data Transfer Abort...........................................................................................................................18 4.9.1 Read Abort.................................................................................................................................18 4.9.2 Write Abort.................................................................................................................................18 4.10 Changes to SD Memory Fixed Registers..........................................................................................18 4.10.1 OCR Register.............................................................................................................................19 4.10.2 CID Register...............................................................................................................................19 4.10.3 CSD Register.............................................................................................................................19 4.10.4 RCA Register.............................................................................................................................19 4.10.5 DSR Register.............................................................................................................................19 4.10.6 SCR Register.............................................................................................................................19 4.10.7 SD Status...................................................................................................................................19 4.10.8 Card Status Register..................................................................................................................19 5. New I/O Read/Write Commands............................................................................................................21 5.1 IO_RW_DIRECT Command (CMD52)..............................................................................................21 5.2 IO_RW_DIRECT Response (R5)......................................................................................................22 5.2.1 CMD52 Response (SD modes)..................................................................................................22 5.2.2 R5, IO_RW_DIRECT Response (SPI mode).............................................................................23 5.3 IO_RW_EXTENDED Command (CMD53). (24)f in eo nIn fi ne o n I nf in eo nI 5.3.2 Special Timing for CMD53 Multi-Block Read..............................................................................25 6. SDIO Card Internal Operation................................................................................................................26 6.1 Overview...........................................................................................................................................26 6.2 Register Access Time........................................................................................................................26 6.3 Interrupts...........................................................................................................................................26 6.4 Suspend/Resume..............................................................................................................................27 6.5 Read Wait..........................................................................................................................................27 6.6 CMD52 During Data Transfer............................................................................................................27 6.7 SDIO Fixed Internal Map...................................................................................................................27 6.8 Common I/O Area (CIA)....................................................................................................................28 6.9 Card Common Control Registers (CCCR).........................................................................................28 6.10 Function Basic Registers (FBR)........................................................................................................35 6.11 Card Information Structure (CIS).......................................................................................................37 6.12 Multiple Function SDIO Cards...........................................................................................................37 6.13 Setting Block Size with CMD53.........................................................................................................37 6.14 Bus State Diagram............................................................................................................................38 7. Embedded I/O Code Storage Area (CSA).............................................................................................39 7.1 CSA Access.......................................................................................................................................39 7.2 CSA Data Format..............................................................................................................................39 8. SDIO Interrupts.......................................................................................................................................40 8.1 Interrupt Timing.................................................................................................................................40 8.1.1 SPI and SD 1-bit Mode Interrupts ..............................................................................................40 8.1.2 SD 4-bit Mode............................................................................................................................40 8.1.3 Interrupt Period Definition ..........................................................................................................40 8.1.4 Interrupt Period at the Data Block Gap in 4-bit SD Mode (Optional)..........................................40 8.1.5 Inhibited Interrupts (Removed Section)......................................................................................40 8.1.6 End of Interrupt Cycles...............................................................................................................40 8.1.7 Terminated Data Transfer Interrupt Cycle ..................................................................................41 8.1.8 Interrupt Clear Timing.................................................................................................................41 9. SDIO Suspend/Resume Operation........................................................................................................42 10. SDIO Read Wait Operation.....................................................................................................................43 11. Power Control.........................................................................................................................................44 11.1 Power Control Overview....................................................................................................................44 11.2 Power Control support for SDIO Cards.............................................................................................44 11.2.1 Master Power Control ................................................................................................................44 11.2.2 Power Selection.........................................................................................................................45 11.2.3 High-Power Tuples.....................................................................................................................45 11.3 Power Control Support for the SDIO Host.........................................................................................45 11.3.1 Version 1.10 Host.......................................................................................................................45 11.3.2 Power Control Operation............................................................................................................46 12. High-Speed Mode...................................................................................................................................47 12.1 SDIO High-Speed Mode....................................................................................................................47 12.2 Switching Bus Speed Mode in a Combo Card...................................................................................47 13. SDIO Physical Properties......................................................................................................................48 13.1 SDIO Form Factors...........................................................................................................................48 13.2 Full-Size SDIO ..................................................................................................................................48 13.3 miniSDIO...........................................................................................................................................48 14. SDIO Power.............................................................................................................................................48 14.1 SDIO Card Initialization Voltages......................................................................................................48 14.2 SDIO Power Consumption................................................................................................................48 15. Inrush Current Limiting..........................................................................................................................50 16. CIS Formats.. (51)f in eo nIn fi ne o n I nf in eo nI 16.2 Basic Tuple Format and Tuple Chain Structure.................................................................................51 16.3 Byte Order Within Tuples ..................................................................................................................51 16.4 Tuple Version ....................................................................................................................................52 16.5 SDIO Card Metaformat......................................................................................................................52 16.6 CISTPL_MANFID: Manufacturer Identification String Tuple..............................................................53 16.7 SDIO Specific Extensions..................................................................................................................53 16.7.1 CISTPL_FUNCID: Function Identification Tuple.........................................................................53 16.7.2 CISTPL_FUNCE: Function Extension Tuple..............................................................................54 16.7.3 CISTPL_FUNCE Tuple for Function 0 (common).......................................................................54 16.7.4 CISTPL_FUNCE Tuple for Function 1-7....................................................................................55 16.7.5 CISTPL_SDIO_STD: Function is a Standard SDIO Function.....................................................58 16.7.6 CISTPL_SDIO_EXT: Tuple Reserved for SDIO Cards...............................................................58 Appendix A.....................................................................................................................................................59 A.1 SD and SPI Command List....................................................................................................................59 Appendix B.....................................................................................................................................................61 B.1 Normative References...........................................................................................................................61 Appendix C.....................................................................................................................................................62 C.1 Abbreviations and Terms...................................................................................................................62 Appendix D.. (64)f in eo nIn fi ne o n I nf in eo nI Table of TablesTable 3-1 OCR Values for CMD5.....................................................................................................................10 Table 4-1 Unsupported SD Memory Commands.............................................................................................16 Table 4-2 R6 response to CMD3.....................................................................................................................16 Table 4-3 SDIO R6 Status Bits.........................................................................................................................16 Table 4-4 Combo Card 4-bit Control................................................................................................................17 Table 4-5 Card Detect Resistor States.............................................................................................................17 Table 4-6 is blanked.........................................................................................................................................17 Table 4-7 SDIO Status Register Structure .......................................................................................................20 Table 5-1 Flag data for IO_RW_DIRECT SD Response..................................................................................23 Table 5-2 IO_RW_ EXTENDED command Op Code Definition.......................................................................24 Table 5-3 Byte Count Values ...........................................................................................................................25 Table 6-1 Card Common Control Registers (CCCR).......................................................................................29 Table 6-2 CCCR bit Definitions........................................................................................................................34 Table 6-3 Function Basic Information Registers (FBR)....................................................................................35 Table 6-4 FBR bit and field definitions.............................................................................................................36 Table 6-5 Card Information Structure (CIS) and reserved area of CIA.............................................................37 Table 11-1 Reference Tuples by Master Power Control and Power Select......................................................45 Table 16-1 Basic Tuple Format........................................................................................................................51 Table 16-2 Tuples Supported by SDIO Cards..................................................................................................52 Table 16-3 CISTPL_MANFID: Manufacturer Identification Tuple.....................................................................53 Table 16-4 CISTPL_FUNCID Tuple.................................................................................................................53 Table 16-5 CISTPL_FUNCE Tuple General Structure.....................................................................................54 Table 16-6 TPLFID_FUNCTION Tuple for Function 0 (common)....................................................................54 Table 16-7 TPLFID_FUNCTION Field Descriptions for Function 0 (common).................................................54 Table 16-8 TPLFID_FUNCTION Tuple for Function 1-7..................................................................................55 Table 16-9 TPLFID_FUNCTION Field Descriptions for Functions 1-7.............................................................57 Table 16-10 TPLFE_FUNCTION_INFO Definition...........................................................................................57 Table 16-11 TPLFE_CSA_PROPERTY Definition...........................................................................................57 Table 16-12 CISTPL_SDIO_STD: Tuple Reserved for SDIO Cards................................................................58 Table 16-13 CISTPL_SDIO_EXT: Tuple Reserved for SDIO Cards.................................................................58 Table A-14 SD Mode Command List................................................................................................................59 Table A-15 SPI Mode Command List (60)f in eo nIn fi ne o n I nf in eo nI Table of FiguresFigure 2-1 Signal connection to two 4-bit SDIO cards.......................................................................................3 Figure 3-1 SDIO response to non-I/O aware initialization..................................................................................4 Figure 3-2 Card initialization flow in SD mode (SDIO aware host)....................................................................7 Figure 3-3 Card initialization flow in SPI mode (SDIO aware host)....................................................................9 Figure 3-4 IO_SEND_OP_COND Command (CMD5).....................................................................................10 Figure 3-5 Response R4 in SD mode...............................................................................................................11 Figure 3-6 Response R4 in SPI mode..............................................................................................................11 Figure 3-7 Modified R1 Response....................................................................................................................11 Figure 3-8 Re-Initialization Flow for I/O Controller...........................................................................................13 Figure 3-9 Re-Initialization Flow for Memory controller ...................................................................................13 Figure 5-1 IO_RW_DIRECT Command...........................................................................................................21 Figure 5-2 R5 IO_RW_DIRECT Response (SD modes)..................................................................................22 Figure 5-3 IO_RW_DIRECT Response in SPI Mode.......................................................................................23 Figure 5-4 IO_RW_EXTENDED Command.....................................................................................................24 Figure 6-1 SDIO Internal Map..........................................................................................................................28 Figure 6-2 State Diagram for Bus State Machine (38)f in eo nIn fi ne o n I nf in eo nI 1. General DescriptionThe SDIO (SD Input/Output) card is based on and compatible with the SD memory card. This compatibility includes mechanical, electrical, power, signaling and software. The intent of the SDIO card is to provide high-speed data I/O with low power consumption for mobile electronic devices. A primary goal is that an SDIO card inserted into a non-SDIO aware host shall cause no physical damage or disruption of that host or it’s software. In this case, the SDIO card should simply be ignored. Once inserted into an SDIO aware host, the detection of the card proceeds via the normal means described in this specification with some extensions. In this state, the SDIO card is idle and draws a small amount of power (15 mA averaged over 1 second). During the normal initialization and interrogation of the card by the host, the card identifies itself as an SDIO card. The host software then obtains the card information in a tuple (linked list) format and determines if that card’s I/O function(s) are acceptable to activate. This decision is based on such parameters as power requirements or the availability of appropriate software drivers. If the card is acceptable, it is allowed to power up fully and start the I/O function(s) built into it.1.1 SDIO Features• Targeted for portable and stationary applications• Minimal or no modification to SD Physical bus is required • Minimal change to memory driver software• Extended physical form factor available for specialized applications • Plug and play (PnP) support• Multi-function support including multiple I/O and combined I/O and memory • Up to 7 I/O functions plus one memory supported on one card. • Allows card to interrupt host• Operational Voltage range: 2.7-3.6V (Operational Voltage is used for Initialization) • Application Specifications for Standard SDIO Functions. • Multiple Form Factors:• Full-Size SDIO • miniSDIO1.2 Primary Reference DocumentThis specification is based on and refers extensively to the SDA document:SD Memory Card SpecificationsPart 1 PHYSICAL LAYER SPECIFICATION Version 2.00 May 9, 2006The reader is directed to this document for more information on the basic operation of SD cards. In addition, other documents are referenced in this specification. A complete list can be found in appendix B.1.This specification can apply to any released versions of Physical Layer Specification after Version 2.00.1.3 Standard SDIO FunctionsAssociated with the base SDIO specification, there are several Application Specifications for Standard SDIO Functions. These common functions such as cameras, Bluetooth cards and GPS receivers have a standard register interface, a common operation method and a standard CIS extension. Implementation of the standard interfaces are optional for any card vendor, but compliance with the standard allows the use of standard drivers and applications which will increase the appeal of these cards to the consumer. Full information on these standard interfaces can be found in the Application Specifications for Standard SDIO Functions maintained by the SDA.。
—A B B M E A S U R E M E N T&A N A L Y T I C S|SP A R E P A R T S LI S T CoriolisMaster FCB400, FCH400Coriolis mass flowmeterMeasurement made easyAdditional Information Additional documentation on CoriolisMaster FCB400, FCH400 is available for download free of charge at /flow.Alternatively simply scan this code:2 CoriolisMaster FCB400, FCH400 CORIOLIS MASS FLOWMETER | SPL/FCB400/FCH400-EN REV. CTable of contents1 Safety instructions for repair work (3)2 Name plate specifications for spare parts orders 4Name plate of sensor in integral mount design (example)43 Spare parts list (5)Coriolis mass flowmeter FCB430, FCB450, FCH430,FCH450 in remote mount design (5)Transmitter FCT430, FCT450 (5)Sensor FCB430, FCB450, FCH430, FCH450 (10)Coriolis mass flowmeter FCB430, FCB450, FCH430,FCH450 in integral mount design (12)4 Upgrade Kits (15)Conversion kit FCB3XX to FCB430, FCB450, FCH430,FCH450 (15)5 Activation codes (15)1Safety instructions for repair workABB flowmeters are designed to be easy to repair thanks to uniform replacement parts and simple replacement of predefined parts.However, if repair work is not carried out in accordance with the guidelines, this may result in malfunctioning of the device, causing serious injury to persons, and harm to the environment. This is especially true for safety-critical devices and those certified for use in explosion hazard environments. Certifications will also lapse if the repairs were not carried out with the proper tool or by persons without adequate training. We therefore recommend all repair work on flowmeters be carried out by ABB service technicians.As the manufacturer of the device, ABB cannot guarantee the necessary quality of the repair procedures if the work and/or parts exchange was not carried out by ABB.The plant operator is responsible for all repairs carried out by the customer, plant operator, or third party. In this case, ABB will reject all responsibility for any improper device functionality, in particular all safety-related functions. ABB does not assume any liability for the deterioration or loss of device performance, malfunctions, or damage arising from the above repair work or replacement. All liability for defects shall lapse when the replacement or repair work is not carried out by ABB.If you are unsure about the repair process even if some or all replacement parts are available, please get in touch with ABB Service before beginning work.Respect national and internal laws when carrying out repairs. In particular laws relating to certified flowmeters used in explosion hazard environments. Repair work which is carried out without following the legal requirements can result in the revocation of your operating permit.For more information, go to/service/repairs or contact your local ABB Customer Service Center.2Name plate specifications for spare parts ordersThe flowmeter version can be identified by referring to the name plate that is attached to the housing.Name plate of sensor in integral mount design (example)When placing spare parts orders, always remember to state the serial number as shown on the name plate.1 Serial numberFigure 1: Name plate of sensor in integral mount design (example)NotePrices available upon request!3 Spare parts listCoriolis mass flowmeter FCB430, FCB450, FCH430, FCH450 in remote mount designTransmitter FCT430, FCT450Figure 2:Upper part with electronicsNumber DesignationVariantOrdering numberRecommended spare part1+2+8+k T3 housing including motherboard and EMCboard aluminum zone 2 / DIV 2 M20 U high Without explosion protection, ATEX / IECExZone 23KQZ 407115U0100T3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 NPT U highWithout explosion protection, ATEX / IECExZone 2, cFMus Class 1 Div. 23KQZ 407115U0500T3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 NPT U lowWithout explosion protection, ATEX / IECExZone 2, cFMus Class 1 Div. 23KQZ 407115U0700T3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 M20 U lowWithout explosion protection, ATEX / IECExZone 23KQZ 407115U0300... 3 Spare parts listNumber Designation Variant Orderingnumber Recommendedspare part1+2+8+k T3 housing including motherboard and EMCboard aluminum zone 2 / DIV 2 M20 U high Without explosionprotection, ATEX / IECExZone 23KQZ407133U1100 Modbus and DPT3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 NPT U high Without explosionprotection, ATEX / IECExZone 2, cFMus Class 1Div. 23KQZ407133U1500 Modbus and DPT3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 NPT U low Without explosionprotection, ATEX / IECExZone 2, cFMus Class 1Div. 23KQZ407133U1300 Modbus and DPT3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 M20 U low Without explosionprotection, ATEX / IECExZone 23KQZ407133U1700 Modbus and DP1 T3 housing aluminum M20 Zone2 / DIV 2pa. without gland Without explosionprotection, ATEX / IECExZone 23KQZ407020U0100T3 housing aluminum NPT Zone 2 / DIV 2 pa. without plug Without explosionprotection, ATEX / IECExZone 2, cFMus Class 1Div. 23KQZ407020U0300T3 housing aluminum M20 Zone 2 / DIV 2 pa. without gland Without explosionprotection, ATEX / IECExZone 23KQZ407020U0100 Modbus and DPT3 housing aluminum NPT Zone 2 / DIV 2 pa. without plug Without explosionprotection, ATEX / IECExZone 2, cFMus Class 1Div. 23KQZ407020U0300 Modbus and DPO-ring housing 41.00 x 1.78 NBR – D101A040U01 X2 Motherboard complete U high – D800D520U19X Motherboard complete U low – D800D520U20XFuse 5 x 20 mm 1.25 A 1500 A @ 250 V AC – 3KQR000757U0100 X Only 1:1 replacementin case of EXFuse 5 x 20 mm 0.8 A 1500 A @ 250 V AC – 3KQR000757U0200 X Only 1:1 replacementin case of EXk T3 spacing bolts HML type c – 3KQZ407017U01004 HMI Type C pre assy. no data logger – 3KQZ407125U0100 XNumber Designation Variant Orderingnumber Recommendedspare part3 DP Plug-in card – 3KQZ400027U0100 Only 1:1 replacementin case of EX Modbus plug-in card – 3KQZ400028U0100 Only 1:1 replacementin case of EXPlug-in card current output 4 to 20 mA passive (red) – 3KQZ400029U0100 Only 1:1 replacementin case of EXPlug-in card digital output passive (green) – 3KQZ400030U0100 Only 1:1 replacementin case of EX Plug-in card 24 V DC power supply (blue) – 3KQZ400031U0100 Only 1:1 replacementin case of EX Plug-in card passive digital input (yellow) – 3KQZ400032U0100 Only 1:1 replacementin case of EX EMC protection sheet T3 – 3KXF003070U0100 Only 1:1 replacementin case of EX5 Cover with glass pre-mounted Without explosionprotection, ATEX / IECExZone 2, cFMus Class 1Div. 2D612A197U01Cover with glass pre-mounted, Ex, ATEX / IECEx Zone 1,cFMus Class 1 Div. 1D612A197U027 Cover, VST rear, type 3, STDAluminum, INT Without explosionprotection, ATEX / IECExZone 2, cFMus Class 1Div. 2D612A226U01Cover, VST rear, type 3, EX Aluminum ATEX / IECEx Zone 1,cFMus Class 1 Div. 1D612A226U026 O-ring cover 118 x 3.70, NBR – D101A034U05 X 8 T3 EMC board complete ZN2 /DIV 2/ DIV1 D800D520U21 X4WCTW EMC Board complete ZN1 POT ZN1 D800D520U22 XT3 EMC board complete ZN2 /DIV 2/ DIV1 D800D520U23 X4WCTW EMC Board complete ZN1 POT ZN1 D800D520U24 X 9 T3 plastic cap network connection – 3KQZ407005U0100j Screw for network connection cap M 4 x 6DIN7985 – D004G106AU20... 3 Spare parts list... Coriolis mass flowmeter FCB430, FCB450, FCH430, FCH450 in remote mount designFigure 3:Wall mountNumber DesignationVariantOrdering numberRecommended spare part1T3 wall mount, base aluminum ZN1 M20 pre assy W ithout explosionprotection, ATEX / IECEx Zone 23KQZ 407114U0100T3 wall mount, base aluminum DIV 1 NPT pre assyWithout explosion protection, ATEX / IECEx Zone 2cFMus Class 1 Div. 23KQZ 407114U03002T2 cover wall mount aluminum Zone 1, 2 / DIV 1, 2 pre assyWithout explosion protection, ATEX / IECEx Zone 2ATEX / IECEx Zone 1, cFMus Class 1 Div. 2, cFMus Class 1 Div. 13KQZ207035U01003 O-ring cover wall mount 118 x 3.70 NBR – D101A034U054 O-Ring 41 x 1.78 NBR – D101A040U01 5Terminal block 4-pole–3KQR002621U0100Number Designation Variant Ordering number Recommended sparepart6 Raised-head screw for terminal block ISO7985M3 x 20 A2-70– 3KQP000063U0100 Accessory bag for cable clamps – 3KXF002015U0100T3 connection cable wall mount for housing Without explosionprotection, ATEX / IECExZone 2cFMus Class 1 Div. 23KQZ407087U0100Signal cable wall mounting for connection box 4WCTW 4 x 0.75 mm 5 m 3KQZ407123U0500Signal cable wall mounting for connection box 4WCTW 4 x 0.75 mm 10 m 3KQZ407123U1000Signal cable wall mounting for connection box 4WCTW 4 x 0.75 mm 15 m 3KQZ407123U1500Signal cable wall mounting for connection box 4WCTW 4 x 0.75 mm 20 m 3KQZ407123U2000Signal cable wall mounting for connection box 4WCTW 4 x 0.75 mm 25 m 3KQZ407123U2500Signal cable wall mounting for connection box 4WCTW 4 x 0.75 mm 30 m 3KQZ407123U3000Signal cable wall mounting for connection box 4WCTW 4 x 0.75 mm 35 m 3KQZ407123U3500Signal cable wall mounting for connection box 4WCTW 4 x 0.75 mm 40 m 3KQZ407123U4000Signal cable wall mounting for connection box 4WCTW 4 x 0.75 mm 50 m 3KQZ407123U5000Signal cable wall mounting for connection box 4WCTW 4 x 0.75 mm 80 m 3KQZ407123U8000... 3 Spare parts list... Coriolis mass flowmeter FCB430, FCB450, FCH430, FCH450 in remote mount designSensor FCB430, FCB450, FCH430, FCH450Figure 4:Terminal boxNumber DesignationVariantOrdering numberRecommended spare part1Connection box aluminum M20 GP/ZN2/DV2/ZN1 PreA 1EntryWithout explosion protection, ATEX / IECEx Zone 2, ATEX / IECEx Zone 1, cFMus Class 1 Div. 23KXF002568U0100With Div. 1 not replaceableConnection box aluminum NPT GP/ZN2/DV2/ZN1 PreA 1EntryWithout explosion protection, ATEX / IECEx Zone 2, ATEX / IECEx Zone 1, cFMus Class 1 Div. 23KXF002568U0200With Div. 1 not replaceableTerminal box stainless steel M20 GP/ZN2/DV2/ZN1 PreA 1EntryWithout explosion protection, ATEX / IECEx Zone 2, ATEX / IECEx Zone 1, cFMus Class 1 Div. 23KXF002567U0100With Div. 1 not replaceableTerminal box NPTGP/ZN2/DV2/ZN1 PreA 1EntryWithout explosion protection, ATEX / IECEx Zone 2, ATEX / IECEx Zone 1, cFMus Class 1 Div. 23KXF002567U0200With Div. 1 not replaceableNumber DesignationVariantOrdering numberRecommended spare part2Slide-In Remote GP/ZN/DV2/DV1 U low CorIFWithout explosion protection, ATEX / IECEx Zone 2, cFMus version Class 1 Div. 23KXF002566U0100 XSlide-In Remote ZN1 U low Cor_IFATEX / IECEx, (Zone 1 / 21), cFMus version Class 1 Div. 13KXF002566U0200X3Memory module assembled- 3KXF002906U0100 Memory module assembled programmed-3KXF002906U0100AX4Cover, VST rear, TYPE3, standard, aluminum, INT W ithout explosionprotection, ATEX / IECEx Zone 2, ATEX / IECExZone 1, cFMus Class 1 Div. 2D612A226U01Cover, VST rear, TYPE3, EX, aluminum cFMus Class 1 Div. 1 D612A226U02Cover VST, rear stainless steelWithout explosion protection, ATEX / IECExZone 2, ATEX / IECEx Zone 1, cFMus Class 1 Div. 2, cFMus Class 1 Div. 13KQZ 407109U0100Rounded head screw ISO7380 M5 x 16 A2 - 3KQP000043U0100 O-Ring 4.76 x 1.78 NBR-D101A034U075Raised-head screw with cross slot M4 x 12 D7985 stainless- D396A014U02 Spacing bolts for Ex M4 x 8 SW7ATEX / IECEx, (Zone 1 / 21)3KXF002616U01007 Washer A 4.3 DIN 125 without bevel stainless- D085A021AU206Spring washer B 4.0 DIN 127 SS- D085C020BU20... 3 Spare parts listCoriolis mass flowmeter FCB430, FCB450, FCH430, FCH450 in integral mount designFigure 5:FCB4x0, FCH4x0 with integral mount designNumberDesignationVariantOrdering numberRecommended spare part1+2+j +m T3 housing including motherboard and EMCboard aluminum zone 2 / DIV 2 M20 U high Without explosion protection, ATEX / IECEx Zone 23KQZ 07115U0100T3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 M20 U low Without explosion protection, ATEX / IECEx Zone 23KQZ407115U0300T3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 NPT U high Without explosion protection, ATEX / IECEx Zone 2 cFMus Class 1 Div. 23KQZ407115U0500T3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 NPT U low Without explosion protection, ATEX / IECEx Zone 2 cFMus Class 1 Div. 23KQZ407115U0700T3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 M20 U high Without explosion protection, ATEX / IECEx Zone 23KQZ407133U1100Modbus and DPT3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 M20 U low Without explosion protection, ATEX / IECEx Zone 23KQZ407133U1500Modbus and DPT3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 NPT U high Without explosion protection, ATEX / IECEx Zone 23KQZ407133U1300Modbus and DPT3 housing including motherboard and EMC board aluminum zone 2 / DIV 2 NPT U lowWithout explosion protection, ATEX / IECEx Zone 23KQZ407133U1700Modbus and DPNumber Designation Variant Ordering number Recommended sparepart1 T3 base aluminum M20 Zone2 / DIV 2 pa.without gland Without explosion protection,ATEX / IECEx Zone 23KQZ407020U0100T3 base aluminum NPT Zone 2 / DIV 2 pa. without plug Without explosion protection,ATEX / IECEx Zone 2, cFMusClass 1 Div. 23KQZ407020U0300O-ring housing 41.00 x 1.78 NBR D101A040U01 X2 Motherboard complete U high – D800D520U19X Motherboard complete U low – D800D520U20XFuse 5 x 20 mm 1.25 A 1500 A @ 250 V AC 3KQR000757U0100 X Only 1:1 replacementin case of EXFuse 5 x 20 mm 0.8 A 1500 A @ 250 V AC 3KQR000757U0200 X Only 1:1 replacementin case of EXm T3 spacing bolts HML type c – 3KQZ407017U01003 Front end board Cor_IF pre assy – 3KXF002564U0100 X4 DP Plug-in card – 3KQZ400027U0100 Only 1:1 replacementin case of EX Modbus plug-in card – 3KQZ400028U0100 Only 1:1 replacementin case of EXPlug-in card current output 4 to 20 mA passive (red) – 3KQZ400029U0100 Only 1:1 replacementin case of EXPlug-in card digital output passive (green) – 3KQZ400030U0100 Only 1:1 replacementin case of EX Plug-in card 24 V DC power supply (blue) – 3KQZ400031U0100 Only 1:1 replacementin case of EX Plug-in card passive digital input (yellow) – 3KQZ400032U0100 Only 1:1 replacementin case of EX EMC protection sheet T3 3KXF003070U0100 Only 1:1 replacementin case of EX5 Memory module assembled – 3KXF002906U0100Memory module assembled programmed 3KXF002906U0100A X6 HMI Type C pre assy. no data logger – 3KQZ407125U0100 X... 3 Spare parts list... Coriolis mass flowmeter FCB430, FCB450, FCH430, FCH450 in integral mount designNumber Designation Variant Ordering number Recommended sparepart7 Cover with glass pre-mounted Without explosion protection,ATEX / IECEx Zone 2, ATEX /IECEx Zone 1, cFMus Class 1 Div. 2D612A197U01Cover with glass pre-mounted, Ex ATEX / IECEx Zone 1, cFMusClass 1 Div. 1D612A197U029 Cover, VST rear, TYPE 3, Standard,Aluminum INT Blind Without explosion protection,ATEX / IECEx Zone 2, ATEX /IECEx Zone 1, cFMus Class 1 Div. 2D612A226U01Cover, VST rear, TYPE3, EX, aluminum ATEX / IECEx Zone 1, cFMusClass 1 Div. 1D612A226U028 O-ring cover 118 x 3.70, NBR – D101A034U05 X j T3 EMC board complete ZN2 /DIV 2/ DIV1 D800D520U21 X 4WCTW EMC Board complete ZN1 POT ZN1 D800D520U22 XT3 EMC board complete ZN2 /DIV 2/ DIV1 D800D520U23 X4WCTW EMC Board complete ZN1 POT ZN1 D800D520U24 X k T3 plastic cap network connection – 3KQZ407005U0100l Screw for network connection cap M 4 x 6DIN7985 – D004G106AU20Accessory bag for cable clamps 3KXF002015U01004Upgrade KitsConversion kit FCB3XX to FCB430, FCB450, FCH430, FCH450Number Designation Variant Orderingnumber Recommendedspare part Conversion kit FCB3xx > FCB4xx U high remotemount design M20 without explosion protectionD800D520U03Conversion kit FCB3xx > FCB4xx U low remote mount designM20 without explosion protection D800D520U04Conversion kit FCB3xx > FCB4xx U high remotemount designNPT without explosion protectionD800D520U05Conversion kit FCB3xx > FCB4xx U low remotemount designNPT without explosion protectionD800D520U06Conversion kit FCB3xx > FCB4xx U high integralmount design M20 without explosion protectionD800D520U07Conversion kit FCB3xx > FCB4xx U low integralmount design M20 without explosion protectionD800D520U08Conversion kit FCB3xx > FCB4xx U high integralmount design NPT without explosion protectionD800D520U09Conversion kit FCB3xx > FCB4xx U low integralmount design NPT without explosion protectionD800D520U10NoteUpgrades shall be at the user's own risk!The upgrade can be performed by request on site or by the Göttingen service center.5Activation codesNumber Designation Variant Orderingnumber Recommendedspare part DensiMass measurement activation code – 3KXS360060L0001FillMass filling application activation code – 3KXS360060L0002VeriMass diagnosis measurement activationcode– 3KXS360060L0003TrademarksModbus is a registered trademark of the Modbus Organization— ABB Automation GmbH - Service Instruments - Schillerstraße 72 D-32425 Minden DeutschlandFax: +49 571 830-1744Mail: **************************.com/flowIhre lokale ABB-Niederlassung finden Sie unter: /contactsS P L /F C B 400/F C H 400-E N R e v . C 05.2018—We reserve the right to make technical changes or modify the contents of this document without prior notice. With regard to purchase orders, the agreed particulars shall prevail. ABB does not accept any responsibility whatsoever for potential errors or possible lack of information in this document.We reserve all rights in this document and in the subject matter and illustrations contained therein. Any reproduction, disclosure to third parties or utilization of its contents – in whole or in parts – is forbidden without prior written consent of ABB. Copyright© 2018 ABB All rights reserved 3KXF411013R4701。
Features Array•Fast Read Access Time – 70 ns•Automatic Page Write Operation–Internal Address and Data Latches for 64 Bytes•Fast Write Cycle Times–Page Write Cycle Time: 10 ms Maximum (Standard)2 ms Maximum (Option – Ref. AT28HC64BF Datasheet)–1 to 64-byte Page Write Operation•Low Power Dissipation–40 mA Active Current–100µA CMOS Standby Current•Hardware and Software Data Protection•DATA Polling and Toggle Bit for End of Write Detection•High Reliability CMOS Technology–Endurance: 100,000 Cycles–Data Retention: 10 Years•Single 5 V ±10% Supply•CMOS and TTL Compatible Inputs and Outputs•JEDEC Approved Byte-wide Pinout•Industrial Temperature Ranges•Green (Pb/Halide-free) Packaging Option Only1.DescriptionThe AT28HC64B is a high-performance electrically-erasable and programmable read-only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 55 ns with power dissipation of just 220 mW. When the device is deselected, the CMOS standby current is less than 100µA.The AT28HC64B is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA polling of I/O7. Once the end of a write cycle has been detected, a new access for a read or write can begin.Atmel’s AT28HC64B has additional features to ensure high quality and manufactura-bility. The device utilizes internal error correction for extended endurance and improved data retention characteristics. An optional software data protection mecha-nism is available to guard against inadvertent writes. The device also includes anextra 64 bytes of EEPROM for device identification or tracking.20274L–PEEPR–2/3/09AT28HC64B2.Pin Configurations2.128-lead SOIC Top ViewPin Name Function A0 - A12Addresses CE Chip Enable OE Output Enable WE Write Enable I/O0 - I/O7Data Inputs/Outputs NC No Connect DCDon’t Connect2.232-lead PLCC Top ViewNote:PLCC package pins 1 and 17 are Don’t Connect.2.328-lead TSOP Top View30274L–PEEPR–2/3/09AT28HC64B3.Block Diagram4.Device Operation4.1ReadThe AT28HC64B is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the out-puts. The outputs are put in the high-impedance state when either CE or OE is high. This dual line control gives designers flexibility in preventing bus contention in their systems.4.2Byte WriteA low pulse on the WE or CE input with CE or WE low (respectively) and OE high initiates a write cycle. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. Once a byte write has been started, it will automatically time itself to completion. Once a programming operation has been initiated and for the duration of t WC , a read operation will effectively be a polling operation.4.3Page WriteThe page write operation of the AT28HC64B allows 1 to 64 bytes of data to be written into the device during a single internal programming period. A page write operation is initiated in the same manner as a byte write; after the first byte is written, it can then be followed by 1 to 63 additional bytes. Each successive byte must be loaded within 150 µs (t BLC ) of the previous byte. If the t BLC limit is exceeded, the AT28HC64B will cease accepting data and commence the internal programming operation. All bytes during a page write operation must reside on the same page as defined by the state of the A6 to A12 inputs. For each WE high-to-low transition during the page write operation, A6 to A12 must be the same.The A0 to A5 inputs specify which bytes within the page are to be written. The bytes may be loaded in any order and may be altered within the same load period. Only bytes which are specified for writing will be written; unnecessary cycling of other bytes within the page does not occur.4.4DATA PollingThe AT28HC64B features DATA Polling to indicate the end of a write cycle. During a byte or page write cycle, an attempted read of the last byte written will result in the complement of the written data to be presented on I/O7. Once the write cycle has been completed, true data is valid on all outputs, and the next write cycle may begin. DATA Polling may begin at any time during the write cycle.40274L–PEEPR–2/3/09AT28HC64B4.5Toggle BitIn addition to DATA Polling, the AT28HC64B provides another method for determining the end of a write cycle. During the write operation, successive attempts to read data from the device will result in I/O6 toggling between one and zero. Once the write has completed, I/O6 will stop toggling, and valid data will be read. Toggle bit reading may begin at any time during the write cycle.4.6Data ProtectionIf precautions are not taken, inadvertent writes may occur during transitions of the host system power supply. Atmel ® has incorporated both hardware and software features that will protect the memory against inadvertent writes.4.6.1Hardware ProtectionHardware features protect against inadvertent writes to the AT28HC64B in the following ways: (a) V CC sense – if V CC is below 3.8 V (typical), the write function is inhibited; (b) V CC power-on delay – once V CC has reached 3.8 V, the device will automatically time out 5 ms (typical) before allowing a write; (c) write inhibit – holding any one of OE low, CE high or WE high inhib-its write cycles; and (d) noise filter – pulses of less than 15 ns (typical) on the WE or CE inputs will not initiate a write cycle.4.6.2Software Data ProtectionA software-controlled data protection feature has been implemented on the AT28HC64B. When enabled, the software data protection (SDP), will prevent inadvertent writes. The SDP feature may be enabled or disabled by the user; the AT28HC64B is shipped from Atmel with SDP disabled.SDP is enabled by the user issuing a series of three write commands in which three specific bytes of data are written to three specific addresses (refer to the “Software Data Protection Algorithm” diagram on page 10). After writing the 3-byte command sequence and waiting t WC , the entire AT28HC64B will be protected against inadvertent writes. It should be noted that even after SDP is enabled, the user may still perform a byte or page write to the AT28HC64B. This is done by preceding the data to be written by the same 3-byte command sequence used to enable SDP.Once set, SDP remains active unless the disable command sequence is issued. Power transi-tions do not disable SDP, and SDP protects the AT28HC64B during power-up and power-down conditions. All command sequences must conform to the page write timing specifica-tions. The data in the enable and disable command sequences is not actually written into the device; their addresses may still be written with user data in either a byte or page write operation.After setting SDP, any attempt to write to the device without the 3-byte command sequence will start the internal write timers. No data will be written to the device, however. For the dura-tion of t WC , read operations will effectively be polling operations.4.7Device IdentificationAn extra 64 bytes of EEPROM memory are available to the user for device identification. By raising A9 to 12 V ±0.5 V and using address locations 1FC0H to 1FFFH, the additional bytes may be written to or read from in the same manner as the regular memory array.50274L–PEEPR–2/3/09AT28HC64BNotes:1.X can be VIL or VIH.2.See “AC Write Waveforms” on page 8.3.VH = 12.0 V ±0.5 V.Note:1.I SB1 and I SB2 for the 55 ns part is 40 mA maximum.5.DC and AC Operating RangeAT28HC64B-70AT28HC64B-90AT28HC64B-120Operating Temperature (Case)-40°C - 85°C -40°C - 85°C -40°C - 85°C V CC Power Supply5 V ±10%5 V ±10%5 V ±10%6.Operating ModesMode CE OE WE I/O Read V IL V IL V IH D OUT Write (2)V IL V IH V IL D IN Standby/Write Inhibit V IH X (1)X High ZWrite Inhibit X X V IH Write Inhibit X V IL X Output Disable X V IH XHigh ZChip Erase V ILV H (3)V IL High Z7.Absolute Maximum Ratings*Temperature Under Bias................................-55°C to +125°C *NOTICE:Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam-age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliabilityStorage Temperature.....................................-65°C to +150°C All Input Voltages(including NC Pins)with Respect to Ground.................................-0.6 V to +6.25 V All Output Voltageswith Respect to Ground...........................-0.6 V to V CC + 0.6 V Voltage on OE and A9with Respect to Ground..................................-0.6 V to +13.5V8.DC CharacteristicsSymbol Parameter ConditionMinMax Units I LI Input Load Current V IN = 0 V to V CC + 1 V 10µA I LO Output Leakage Current V I/O = 0 V to V CC10µA I SB1V CC Standby Current CMOS CE = V CC - 0.3 V to V CC + 1 V 100(1)µA I SB2V CC Standby Current TTL CE = 2.0 V to V CC + 1 V 2(1)mA I CC V CC Active Current f = 5 MHz; I OUT = 0 mA40mA V IL Input Low Voltage 0.8V V IH Input High Voltage 2.0V V OL Output Low Voltage I OL = 2.1 mA 0.40V V OH Output High VoltageI OH = -400 µA2.4V60274L–PEEPR–2/3/09AT28HC64B10.AC Read Waveforms (1)(2)(3)(4)Notes:1.CE may be delayed up to t ACC - t CE after the address transition without impact on t ACC .2.OE may be delayed up to t CE - t OE after the falling edge of CE without impact on t CE or by t ACC - t OE after an address changewithout impact on t ACC .3.t DF is specified from OE or CE whichever occurs first (C L = 5 pF).4.This parameter is characterized and is not 100% tested.9.AC Read CharacteristicsSymbol ParameterAT28HC64B-70AT28HC64B-90AT28HC64B-120Units MinMax MinMax MinMax t ACC Address to Output Delay 7090120ns t CE (1)CE to Output Delay 7090120ns t OE (2)OE to Output Delay 035040050ns t DF (3)(4)OE to Output Float 035040050ns t OHOutput Hold00ns70274L–PEEPR–2/3/09AT28HC64B11.Input Test Waveforms and Measurement Level12.Output Test LoadNote:1.This parameter is characterized and is not 100% tested.R F 13.Pin Capacitancef = 1 MHz, T = 25°C (1)Symbol Typ Max Units Conditions C IN 46pF V IN = 0 V C OUT 812pFV OUT = 0 V815.AC Write Waveforms15.1WE Controlled15.2CE Controlled14.AC Write CharacteristicsSymbol ParameterMin MaxUnits t AS , t OES Address, OE Setup Time 0ns t AH Address Hold Time 50ns t CS Chip Select Setup Time 0ns t CH Chip Select Hold Time 0ns t WP Write Pulse Width (WE or CE)100ns t DS Data Setup Time 50ns t DH , t OEHData, OE Hold Timens90274L–PEEPR–2/3/09AT28HC64B17.Page Mode Write Waveforms (1)(2)Notes: 1.A6 through A12 must specify the same page address during each high to low transition of WE (or CE).2.OE must be high only when WE and CE are both low.18.Chip Erase Waveformst S = t H = 5 µs (min.)t W = 10 ms (min.)V H = 12.0 V ±0.5 V16.Page Mode CharacteristicsSymbol Parameter MinMax Units t WC Write Cycle Time10ms t WC Write Cycle Time (Use AT28HC64BF))2ms t AS Address Setup Time 0ns t AH Address Hold Time 50ns t DS Data Setup Time 50ns t DH Data Hold Time 0ns t WP Write Pulse Width 100ns t BLC Byte Load Cycle Time 150µs t WPHWrite Pulse Width High50ns100274L–PEEPR–2/3/09AT28HC64B19.Software Data Protection EnableAlgorithm (1)Notes:1.Data Format: I/O7 - I/O0 (Hex);Address Format: A12 - A0 (Hex).2.Write Protect state will be activated at end of writeeven if no other data is loaded.3.Write Protect state will be deactivated at end of writeperiod even if no other data is loaded.4.1 to 64 bytes of data are loaded.20.Software Data Protection DisableAlgorithm (1)Notes:1.Data Format: I/O7 - I/O0 (Hex);Address Format: A12 - A0 (Hex).2.Write Protect state will be activated at end of writeeven if no other data is loaded.3.Write Protect state will be deactivated at end of writeperiod even if no other data is loaded.4. 1 to 64 bytes of data are loaded.21.Software Protected Write Cycle Waveforms (1)(2)Notes:1.A6 through A12 must specify the same page address during each high to low transition of WE (or CE) after the softwarecode has been entered.2.OE must be high only when WE and CE are both low.11AT28HC64BNote:1.These parameters are characterized and not 100% tested. See “AC Read Characteristics” on page 6.23.Data Polling WaveformsNotes:1.These parameters are characterized and not 100% tested.2.See “AC Read Characteristics” on page 6.25.Toggle Bit Waveforms (1)(2)(3)Notes: 1.Toggling either OE or CE or both OE and CE will operate toggle bit.2.Beginning and ending state of I/O6 will vary.3.Any address location may be used, but the address should not vary.22.Data Polling Characteristics (1)Symbol Parameter Min TypMaxUnits t DH Data Hold Time 0ns t OEH OE Hold Time 0ns t OE OE to Output Delay (1)ns t WR Write Recovery Timens24.Toggle Bit Characteristics (1)Symbol Parameter Min TypMaxUnits t DH Data Hold Time 10ns t OEH OE Hold Time 10ns t OE OE to Output Delay (2)ns t OEHP OE High Pulse 150ns t WR Write Recovery Timens12AT28HC64B26.Normalized I CCGraphs13AT28HC64B27.Ordering Information27.1Green Package Option (Pb/Halide-free)t ACC (ns)I CC (mA)Ordering Code Package Operation RangeActive Standby 70400.1AT28HC64B-70TU 28T Industrial (-40°C to 85°C)AT28HC64B-70JU 32J AT28HC64B-70SU 28S 90400.1AT28HC64B-90JU 32J AT28HC64B-90SU 28S AT28HC64B-90TU 28T 120400.1AT28HC64B-12JU 32J AT28HC64B-12SU28SPackage Type32J 32-lead, Plastic J-leaded Chip Carrier (PLCC)28S 28-lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC)28T28-lead, Plastic Thin Small Outline Package (TSOP)27.2Die ProductsContact Atmel Sales for die sales options.28.Packaging Information 28.132J – PLCC14AT28HC64BAT28HC64B 28.228S – SOIC1528.328T – TSOP16AT28HC64BHeadquarters InternationalAtmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USATel: 1(408) 441-0311 Fax: 1(408) 487-2600Atmel AsiaUnit 1-5 & 16, 19/FBEA Tower, Millennium City 5418 Kwun Tong RoadKwun Tong, KowloonHong KongTel: (852) 2245-6100Fax: (852) 2722-1369Atmel EuropeLe Krebs8, Rue Jean-Pierre TimbaudBP 30978054 Saint-Quentin-en-Yvelines CedexFranceTel: (33) 1-30-60-70-00Fax: (33) 1-30-60-71-11Atmel Japan9F, Tonetsu Shinkawa Bldg.1-24-8 ShinkawaChuo-ku, Tokyo 104-0033JapanTel: (81) 3-3523-3551Fax: (81) 3-3523-7581Product ContactWeb SiteTechnical Support******************Sales Contact/contactsLiterature Requests/literatureDisclaimer: The information in this document is provided in connection with Atmel products. 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Mishra Avanish, Singh Ashish, Singh Rajeshwar; International Journal of Advance Research, Ideas and Innovations inTechnology.ISSN: 2454-132XImpact factor: 4.295(Volume3, Issue2)Smart RTO System (SRS)Avanish Mishra1Computer Department ,Yadavrao Tasgaonkar Collage of Engineering and Technology, Chandhai,IndiaAshish SinghComputer Department ,Yadavrao Tasgaonkar Collage ofEngineering and Technology, Chandhai,IndiaRajeshwar SinghComputer Department ,Yadavrao Tasgaonkar Collage ofEngineering and Technology, Chandhai,IndiaAbstract: This document describes the project of SMART RTO SYSTEM (SRS) it describes the development in technology. Saving time and making more efforts for Traffic Police. Our Objective is to provide the advance technology to Police officer. This document is all about the system used for traffic challan. It consists of interfacing of printer and Smart card reader to Android phone. The data will be stored in Main server. All the functions will be made according to the Indian Penal Code Sections. The machine will be connected to the server. The penal code will be entered by traffic police officer and it will print the challan with IPC section code and amount of penalty.Keywords:RTO, Microprocessor, IPC.INTRODUCTIONThe SMART RTO SYSTEM is a basic need in now-a-days developing technology.–By using this software one can easily manage all the jobsProf. Nilima Nikam2Professor at Department of Computer Engineering from Yadavrao Tasgaonkar Institute ofEngineering and Technology, Bhivpuri road, Chandhai, Karjat–Which is difficult to sort by RTO.–This project should reflect majority program outcomes as achieved by the officers.–Through the new system, the Traffic police will create a centralised data bank of all vehicles, details of their registered owners and driving licences. The traffic cops on beat duty will be provided with smart phone with a special Androidsoftware.1.1 About LicenseNow days the license has transformed into smart card. The smart card can be classified by its chip type:1. Memory: It simply store data like floppy disk with poor security.2. Microprocessor card: It can add, delete, update and manipulate the data.In license card Contact cards are inserted for read-write operations. They have small gold plate about 1/2'' diameter known as micro module. When card is inserted into Smart card reader, the data is transferred to and from.1.2 About machineThis machine consists following hardware:∙Smart Card Reader∙Android phone∙Mini printer∙Hc05Literature ReviewIn this project we have made research over the working Traffic police. Whenever the driver violates any rule, it takes very long time to pay fine. It is also very difficult to verify the license that whether it is original or fake. Police needs to maintain all records manually. If officer needs the record of the driver coming for distant place, its takes long procedure and multiple of days.Let's take the example, consider a driver who had parked his car at wrong place. Traffic police will make challan and take themade any mistake or not. If driver accept his mistakes then court refunds particular amount of fine. In all these procedures neither the court nor that officer aware of that person whether he had violated the same rule or not. By observing all these problems, we have introduced a new system which helps to overcome with these problems. This device will be assign to every Traffic officer so that they can make challan through this device. All the data of driver will be stored in the main server, which helps to retrieve the data of any driver at any corner of location.This device also keeps the location of person where challan had made. So that he can visit to nearest court of that location. Problem Definition and Scope•Now-a-days it is very difficult to update all the data of challans in database•Each entry is done manually.•It is very difficult for officers to verify for correct license holders on road.•To overcome these problems Smart RTO System introduced.•It is very easy to verify the license of the driver•The data of individuals with the violated rules will be stored in database•The same of number rules violated by same person will be noticed, so that violator have to more penalty according to court.•It is very time efficient.•It also saves the paper, because all the data are in digital format•Since it is in digital format, it requires less physical space as compared to paper files and registers kept in office.•METHODOLOGYThis project is based on Android applicationThere will be interfacing of hardware with android smart phone.3.1 Working of projecto Officer will ask for license card to drivero The licence will be scanned with the help of Smart Card readero Details of driver will be retrieved in appo System will Verify for original license cardo The IPC code will be written according violation of ruleso If the violation of rule found repeated by same driver, then there will be more amount of penalties charged from user o The record will be updated in the main server of government.3.2 Block diagram of microcontrollerFlow chart for working of device (fig.b)3.3 Language UsedEmbedded C: This language is used for writing the code for chip level. It is also known as mixed language.Java: This language is used for writing the code of android app. This is also most secure language.ASP Dot Net using C#: This language is used for making web application.Design4.1Data flow diagramDFD level 0DFD level 1DFD level 24.2 UML diagram4.2.1 Sequence diagram4.2.3 Use case DiagramSoftware Requirement5.1 For serverVisual studio:It is a Microsoft product used as IDE for software and Web pages.My SQL is needed for database.5.2 System requirementMinimum 4GB RAM1 GHz Processor, Windows 7/8/8.1/105.3KEILKEIL IDE is basically an assembler and a compiler. You can write either an Assembly or C language code and KEIL will take care of the rest for you. Furthermore, it supports many of the 8051 variants that you will face.5.4Android studioAndroid Studio is the official integrated development environment (IDE) for Android platform development.5.4.1System requirementsWindows OS X LinuxOS versionMicrosoft Windows 10/8.1/8/7/Vista/2003/XP (32 or 64 bit)Mac OS X 10.8.5 or higher, up to 10.10 to up 10.10.2 up 10.10.3 or 10.10.5 (Yosemite)GNOME or KDE or Unity desktop on Ubuntu or Fedora or GNU/Linux Debian RAM 2 GB RAM minimum, 4 GB RAM recommended Disk space 500 MB disk space for Android SDK At least 1 GB for Android SDK, emulator system images, and caches JDK version Java Development Kit (JDK) 7 or higher Screen resolution 1280x800 minimum screen resolution. Hardware requirement6.1Android phone:∙OS minimum 5.0,∙512MB RAM6.2Blue-tooth module-JY MCU BT HC-06The module provides a method to connect wirelessly with a PC or Bluetooth phone. Bluetooth module can be used in master slave configuration. The role of the module can be configured only by AT COMMAND. The user can use it simply to establish a connection to other device. In Bluetooth module hardware used as∙Up to +4dBm RF transmits the power.∙ 3.3 to 5 V I/O.∙PIO (Programmable Input/ Output) control.∙UART interface with programmable baud rate.∙With integrated antenna.With edge connectorSoftware features∙Slave default Baud rate: 9600, Data bits: 8, Stop bit: 1, Parity: No parity.∙Auto‐connect to the last device on power as default.∙Permit pairing device to connect as default.Auto‐pairing PINCODE:”1234” as default.6.3 MicrocontrollerIt consists of memory, peripheral device and I/O device used for embedded systemBlock Diagram of ATMEL6.4Smart Card ReaderThere are two types of smart cards: contact and contactless. Both have an embedded microprocessor and memory.The smart card differs from the proximity card in that the microchip and the proximity card has only one function: to provide the reader with the card's identification number.The processor on the smart card has an embedded operating system and can handle multiple applications such as a cash card, a pre-paid membership card, or an access control card.Since contact cards must be inserted into readers carefully in the proper orientation, the speed and convenience of such a transaction is not acceptable for most access control applications.The difference between the two types of smart cards is the manner with which the microprocessor on the card communicates with the outside world. A contact smart card has eight contact points, which must physically touch the contacts on the reader to convey information between them.The use of contact smart cards as physical access control is limited mostly to parking applications when payment data is stored in card memory, and when the speed of transactions is not as important.Applications•This device is used for RTO system.•On road if driver forget his license, but if they know their license number they could easily safe from penalty.•The data of all the licensed holder will be stored in the main server.•This will reduce cost and space of the department.•No, need for doing heavy file work, as all the records will be stored in digital format.•Criminals from other states could be traced easily.•Same numbers of violated rules by individual can be found easily.•Officers can easily charge on one click instead of writing on paper.•Details of crime will be stored automatically on database.•No need of entering regular data of penalties manually.•Fake license holder will be caught easily.•It will be easy to determine the same number of penalties over individuals.•People will aware of traffic rules and regulations.•This reduces corruption.•People will give fine for particular penalties, as the penalties are already assigned in machine.CONCLUSIONThis project is in development stage. The operating system of smart phone is Android which helps in interfacing with embedded system. This device uses either blue-tooth or USB 2.0 for interfacing between embedded hardware and smart phone. Through this project it will be great help for Police officers.ACKNOWLEDGEMENTI take the privilege to express my sincere thanks to Dr. Rajendra Prasad, Principal of Y.T.I.E.T. Bhivpuri road and Prof. Vaishali Londhe Head Department Of Computer Engineering, Yadavrao Tasgaonkar Institute of Engineering and Technology for providing the much needed support.I wish to express my wholehearted appreciation and deep sense of heartfelt gratitude to my guide Prof. Nilima Nikam, Professor, Department Of Computer Engineering for generous helpExcellent guidance, lucid suggestions and encouragement throughout the course of this work. His concrete directions and critical views have greatly helped me in successful completion of this work.I am also thankful to all those who directly or indirectly in completion of this work.REFERENCES1.https:///guide/topics/2./products/microcontrollers/default.aspx3.Embedded Systems Book by Raj kamal。
Decora Digital Device Questions∙Do all Decora Digital devices have Bluetooth Technology?DDMX1, DDS15 and DDL06-BT, DDE06, DD710 and DDF01 are all Bluetooth enabled deviceswith timer capabilities.DD00R-DL, DD0SR-DL, and DD0SR-1 remotes are not Bluetooth enabled devices.The DDL06-1L is a digital dimmer without the advanced Bluetooth control.∙How is the DDL06-1L different from the DDL06-BT?The DDL06-1L is a digital dimmer with manual control and programming. The DDL06-BT hasthe same dimming functions as the DDL06-1L but with advanced Bluetooth control,programming and timer capabilities.∙What are the benefits of using Decora Digital Controls with Bluetooth Technology?Decora Digital devices with Bluetooth Technology offer all the benefits of advanced full-featured digital dimmers, switches and timers and can be wirelessly controlled andprogrammed via Bluetooth technology using a smartphone or tablet. Simply pair the devicewith the Leviton Decora Digital Dimmer & Timer App to set timed events, turn lights on and off,dim and brighten lights and set advanced features through Bluetooth communication.∙What features are available through the Decora Digital Dimmer & Timer App?For all Bluetooth enabled devices:o On/Off controlo Programmable timer to set lights (or fan) to switch on/off at user selected intervals any day or combination of dayso Astronomical clock which automatically adjusts to local sunrise and sunset times as well as automatic adjustment for Daylight Saving Timeo Sleep timer to program lights (or fan) to switch off after a pre-selected length of timeo Full range dimming with adjustable fade rates (for all dimmers)∙What is the wireless range of the Bluetooth enabled devices?Decora Digital Controls with Bluetooth Technology provide local control within a 30-foot rangewithout the need of a hub, gateway or internet connection. The range may vary depending onspecific conditions of installation, configuration of walls, obstacles and other factors.∙Is a neutral wire required with Leviton Decora Digital Controls?A neutral wire is required with the DDMX1, DDS15, DDE06 and DDF01.∙Is a ground wire required with Leviton Decora Digital Controls?All Decora Digital devices require a ground wire.∙Can I control a device away from my home?No, control is limited to the maximum range of Bluetooth (30 feet).∙How do I identify my device's model number?If you remove the wallplate, there is a product label in the upper right hand of the metal strap.∙Can the rechargeable backup battery be replaced in the DDS15, DDE06, DD710 or DDF01?No, the battery is permanently installed.∙Decora Digital Controls are suitable for single pole and 3-way/multi-location applications, what does that mean?Single pole means controlling one or more lighting fixtures from one location. 3-way is the abilityto control one or more lighting fixtures from two separate switch locations. An example of a3-way is the ability to control the same fixture from a switch at the top of a staircase and fromanother switch at the bottom of the staircase. A Decora Digital remote must be used with theDecora Digital Dimmer or Switch in a 3-way or multi-location application.Decora Digital Remotes also work with Leviton’s Decora Smart product line.3‐Way/Multi‐Location RemotesRemote DD00R‐DLMatchingDimmerRemoteDD0SR‐DLMatchingSwitchRemoteDD0SR‐1CoordinatingSwitchRemoteDecora Digital DDMX1, DDL06‐BT,DDL06‐1L, DDE06,DD710, DDF01Yes ‐ ‐ DDS15 ‐ Yes YesDecora SmartDZ1KD, DZ6HD,DW1KD, DW6HD,DH1KD, DH6HDYes ‐ ‐DZ15S, DW15S,DH15S‐ Yes Yes∙What is the difference between a matching and a coordinating remote?A matching remote offers more functionality than a coordinating remote. The chart below outlinesthe differences between Decora Digital/Decora Smart 3-way remotes, which device they should be used with and the functions offered.FunctionsRemote On/OffControlDim/BrightControlLED BrightnessDisplayLED LocatorLightDD00R‐DL MatchingDimmer RemoteYes Yes Yes Yes DD0SR‐DL MatchingSwitch RemoteYes No No Yes DD0SR‐1 CoordinatingSwitch RemoteYes No No No∙Do the Decora Digital Controls have a locator light?All Decora Digital controls (except for the DD0SR-1 Remote) have a locator light. The locator light is the small green LED light located below the rocker switch that illuminates when the load is off. This light is helpful in locating the device in the dark. This light can be disabled using the Decora Digital Dimmer & Timer app for users who choose not to have this light illuminated (DDL06-1L users must disable this manually).∙What colors do the Decora Digital Controls come in?All Decora Digital Controls have changeable faceplates and come packaged with three colorsin a box: White, Ivory and Light Almond. Additional packaging options are available. Colorchange kits are available in White, Ivory, Light Almond, Gray, Black, Brown and Red.Decora Digital Dimmer & Timer App Questions∙What are the minimum smartphone and tablet hardware requirements?Decora Digital requires that smartphones and tablets support Bluetooth 4.0 (BT LE), alsoknown as Bluetooth Low Energy. The following iPhones and iPads use Bluetooth 4.0:iPhone iPadiPhone 4s iPhone 5 iPhone 5c iPhone 5s iPhone 6 iPhone 6 Plus iPhone SE iPhone 7 iPhone 7 Plus iPad, 3rd generation iPad, 4th generation iPad miniiPad mini 2iPad mini 3iPad AiriPad Air 2iPad Pro∙What are the minimum Operating System requirements?Apple: iOS 6.0 or laterAndroid: Android 4.3 and upAndroid 7.1 and up (Android 7.0 is not supported)∙I’m having trouble pairing and/or connecting with my Android phone; is there something wrong with the device or app?Depending on your version of Android you may have to change the following settings on your phone to manually enable BLE communications to operate:Go to "Settings | Apps | Decora Digital | Permissions | Location" to enable.∙Is there a charge to download the Decora Digital Dimmer & Timer App?There is no charge; the free app can be downloaded through Apple iTunes and Goggle Play. ∙Are a username and password required to use the app?No, but you have the option to register to receive important Leviton product notifications.∙Can other family members access my Decora Digital devices?Yes. Anyone with a compatible Bluetooth connected smartphone or tablet can download the Decora Digital Dimmer & Timer app and pair it with an installed Decora Digital Device with Bluetooth Technology.∙How does the Sunrise/Sunset feature work?Based on your physical location the app provides the Decora Digital device with accurate local sunrise/sunset times. You must enable ’Location Services’ on your smart device for this feature to work.∙How does the Random feature work?Scheduled events will turn on or off at a random time before the event is scheduled to occur.This randomly assigned time will be anywhere from 1-40 minutes before the regularlyscheduled event. A different random time is assigned to each event each time it occurs to givethe home a lived-in look.∙Am I required to enable ‘Location Services’ through the app?Yes, if you want to use the Sunrise/Sunset feature. The app needs to know your physicallocation to access the proper Sunrise/Sunset times.∙If I lose power, do I have to reset all the programming?No, all programming is saved to device’s flash memory.∙How many Decora Digital devices can be paired to the Decora Digital Dimmer & Timer app?Unlimited.∙How many users can pair with each Decora Digital device?Unlimited.∙How many On and Off events can be programmed on each Decora Digital device?80 individual on and off events can be programmed on each device.∙How do I reset a Decora Digital device to its original factory settings?Hold the top of the rocker switch down until the locator LED starts to blink. The Decora Digitaldevice is now reset. Once the device is reset, it may be necessary to pair again with theDecora Digital Dimmer & Timer app.∙What is the Authentication Code?Authentication Code Reset is when you want to lock out other people who might haveconnected to the Decora Digital device and you now no longer want them to have access to it. Bulb Questions∙What types of bulbs can be used with Decora Digital Controls?DDMX1 Dimmable LEDs, dimmable CFLs, incandescent, halogen,Mark10® Powerline, MLVDDL06 Dimmable LEDs, dimmable CFLs, incandescent, halogenDDS15 LED, CFL, incandescent, fluorescentDDE06 ELV, Dimmable LEDs, dimmable CFLs, incandescent, halogenDD710 0-10V LED/Fluorescent BallastsLeviton recommends only LED and CFL bulbs that are labeled as DIMMABLE be used with theDecora Digital Dimmers. The packaging on the bulb should identify it as dimmable.∙Will I save energy if I dim LED and CFL bulbs?Yes, dimming any bulb reduces energy consumption and is the perfect way to set the ambiancefor any occasion. Below is an example of the energy savings* realized when you dimincandescent, dimmable LED or dimmable CFL bulbs.* Energy savings may vary.∙What makes dimming a dimmable LED/CFL bulb different than dimming an incandescent bulb?Dimmable LED and CFL bulbs contain electronic circuitry not present in incandescent bulbs.Therefore, it is difficult to achieve the same smooth start and complete dimming range as onesees with incandescent bulbs. The Decora Digital Dimmer is designed to interact with theelectronic circuitry, providing smooth low level dimming on the majority of bulbs by majormanufacturers.∙Are there any adjustments that will need to be made to the Decora Digital Device based on the bulb I choose?Decora Digital Devices are preset to the following bulb types:DDMX1: Incandescent/MLV modeDDL06: Incandescent modeDDE06: Electromagnetic Low Voltage (ELV) modeDD710: There are no bulb options; this dimmer can only control 0-10V fixturesDDF01: There are no bulb options; this device can only control a ceiling fanDDS15: There are no bulb optionsIf your Decora Digital Dimmer is controlling a different bulb type, you should set the device tothe proper type of bulb you are controlling via the Decora Digital Dimmer & Timer App:Advanced Setting / Bulb Options.Dimmable CFL bulbs may also require an additional “kick start*” or automatic adjustment toturn on. In this case, the dimmer will need to be set to CFL mode. Please refer to the instructionsheet for details.∙Can I use dimmable LED bulbs when the dimmer is set to CFL mode?This is perfectly acceptable, especially if you encounter LED bulbs that are difficult to start at alow preset dimmer level. In CFL mode the dimmer will provide increased energy or a“kick start*” to start the bulb.∙My dimmable LED/CFL bulbs do not turn on when at the lowest dimmer setting. What can I do?The dimmer features a “kick start*” feature that provides an additional energy boost for hard tostart bulbs. Simply set the load type to the bulb you are currently using via the app to activatethis mode. Also, some bulbs have wider dimming ranges than others. In order to takeadvantage of the full dimming range of the bulb, use the app to adjust and set the minimumlight level.* “Kick start” is a precise boost of energy applied to difficult to start CFLs to initiate smooth start up and preventflickering. This feature maximizes the usable dimming range by allowing the user to start at the lowest possibledim/bright bar position.∙I have some LED bulbs that seem to have a slight delay before they turn on, is this to be expected?It may depend on the bulb. If the dimmer is programmed to have the soft on and off featureenabled, which fades the lights on and off as opposed to abruptly turning them on like a regularswitch, there could be a slight delay before some bulbs will turn on. While most will operatefine with the soft on and off and changes to dimmer settings, some bulbs have a built in delayduring those events and it may take a moment before they will turn on or respond to changesin dimmer settings.∙What will happen if I mix bulb types with the Decora Digital Dimmer?It is strongly recommended that the same light source be used to achieve consistentperformance from bulb to bulb. Keep in mind that different LED bulbs may have different colortemperatures and dimming ranges. If you choose to mix bulb types on the same dimmer it ispossible that you will experience a variation in dimming performance and start upcharacteristics.Device De-rating and Maximum Bulb Wattage∙Is de-rating required when installing more than one Decora Digital device in the same wallbox?If you install more than one device in the same wallbox, you may need to de-rate or reduce theload that each device can control. De-rating may be necessary based on the type of bulb youare controlling. Incandescent and Magnetic Low Voltage bulbs require de-rating. De-rating isnot required when using dimmable LED or dimmable CFL bulbs in multi-dimmer installations.Refer to the de-rating chart in the instructions for maximum load per dimmer.LOAD ONE DEVICE TWO DEVICESMORE THAN TWO DEVICESIncandescent 1000W 800W 700W Magnetic LowVoltage1000VA 800VA 700VALOAD ONE DEVICE TWO DEVICESMORE THAN TWO DEVICESIncandescent 600W 500W 500WLOAD ONE DEVICE TWO DEVICESMORE THAN TWO DEVICESIncandescent 600W 500W 400W Electronic LowVoltage600W 500W 400WONE DEVICE TWO DEVICESMORE THAN TWO DEVICES1.5A 1.5A 1.5ALOAD ONE DEVICETWO DEVICESMORE THAN TWO DEVICESIncandescent 480W 400W 320W Electronic LowVoltage480W400W320WVolts RATING ONE DEVICE TWO DEVICESMORE THAN TWO DEVICES120V 950VA 760VA 760VA 760VA 277V1350VA1080VA1080VA1080VA。
奖惩管理制度英文IntroductionIn order to maintain a system of order and discipline within an organization, it is important to have a well-established reward and punishment management system. This system not only ensures that employees are motivated to perform their best, but it also acts as a means of correcting and preventing undesirable behavior. By implementing a comprehensive reward and punishment management system, an organization can promote a positive work culture and ultimately achieve its goals.ObjectivesThe primary objectives of a reward and punishment management system are to establish and maintain a work environment that is conducive to productivity, professionalism, and respect. Specifically, the system aims to:- Recognize and reward employees for outstanding performance and achievements- Encourage employees to strive for excellence and contribute to the success of the organization- Address and rectify inappropriate conduct or poor performance through effective forms of discipline- Promote a fair and consistent approach to managing employee behavior and performance - Foster a positive work culture that values integrity, accountability, and teamwork RewardsRewarding employees for their hard work, dedication, and achievements is a fundamental aspect of a successful reward and punishment management system. A well-structured reward system can motivate employees to go above and beyond in their roles, leading to increased productivity and overall job satisfaction. The following are some of the key components of a reward system:1. Recognition and AppreciationEmployee recognition is essential for boosting morale and promoting a positive work environment. This can be done through various means, such as:- Employee of the Month awards- Public acknowledgments in team meetings or company-wide communications- Personalized notes or emails from managers- Monetary rewards or gift cards- Opportunities for professional development or career advancement2. Performance-Based IncentivesIncentive programs tied to performance metrics can motivate employees to strive for excellence and achieve their goals. This can include:- Bonuses or profit-sharing for exceeding sales targets or meeting key performance indicators- Commission-based compensation for sales or business development roles- Stock options or equity shares for long-term commitment and exceptional performance 3. Employee BenefitsProviding attractive employee benefits can also serve as a reward for hardworking employees. This may include:- Medical, dental, and vision insurance- Retirement savings plans- Paid time off and flexible work arrangements- Wellness programs and employee assistance resources4. Recognition EventsOrganizing special events or ceremonies to recognize and celebrate employee achievements can further demonstrate the organization's appreciation for their contributions. This could include:- Annual award ceremonies to honor employees for their dedication and accomplishments - Team-building activities and social gatherings to promote camaraderie and a sense of belongingPunishmentsWhile it is important to recognize and reward employees for their positive contributions, it is equally important to address and correct inappropriate behavior or poor performance through appropriate forms of discipline. The goal of a punishment system is to enforce consequences for actions that do not align with the organization's values and standards. It is crucial to implement a fair and consistent approach to administering punishment, ensuring that employees understand the consequences of their actions and have the opportunity to improve. The following are key components of a punishment system:1. Progressive DisciplineProgressive discipline involves a series of escalating consequences for repeated instances of misconduct or poor performance. It typically follows a structured process, including:- Verbal warnings or counseling- Written warnings or performance improvement plans- Suspension or demotion- Termination as a last resort2. Performance Improvement PlansFor employees who are underperforming, a performance improvement plan can provide a clear roadmap for addressing their deficiencies and achieving the expected standards. This plan should outline:- Specific areas for improvement- Measurable goals and timelines- Support and resources provided by the organization- Consequences for failing to meet the improvement goals3. Loss of PrivilegesEmployees who violate company policies or engage in misconduct may face the loss of certain privileges as a form of discipline. This could include:- Restrictions on access to company facilities or equipment- Removal from specific projects or responsibilities- Revocation of certain benefits or incentives4. TerminationIn cases of severe misconduct or consistent failure to meet performance expectations, termination may be necessary. Before taking this step, the organization should ensure that the employee has been given fair warning and an opportunity to improve.ImplementationThe successful implementation of a reward and punishment management system requires careful planning, clear communication, and the involvement of all stakeholders. The following steps outline the process of implementing such a system:1. Define Clear Expectations and StandardsThe organization should establish clear performance expectations, behavioral standards, and policies that employees are expected to adhere to. This includes defining what constitutes exemplary performance and the consequences of violating company policies.2. Communicate the System to EmployeesIt is critical to communicate the reward and punishment system to all employees so that they understand how their performance and behavior will be evaluated. This could be done through employee handbooks, training sessions, and regular reminders from management.3. Provide Training and SupportManagers and supervisors should be trained on how to effectively administer rewards and disciplinary actions in a fair and consistent manner. Additionally, employees should be provided with the necessary support and resources to help them achieve their performance goals.4. Establish a Feedback MechanismFeedback is essential for the success of a reward and punishment management system. Employees should receive timely and constructive feedback on their performance, and there should be a process in place for employees to provide their input on the system.5. Monitor and AdjustThe organization should continuously monitor the effectiveness of the reward and punishment system and make adjustments as needed. This may involve reviewing performance metrics, gathering employee feedback, and adjusting the system to align with changing business needs.ConclusionA well-designed reward and punishment management system is vital for promoting a positive work culture, recognizing employee contributions, and addressing performance and behavioral issues. By implementing a fair and consistent system, an organization can motivate its employees to excel while maintaining a high standard of professionalism and integrity. With careful planning and effective communication, a reward and punishment management system can contribute to the long-term success of an organization.。
Intel USB4 Evaluation Dock Update ManualINFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATING TO SALE AND/OR USE OF INTEL PRODUCTS, INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT.A "Mission Critical Application" is any application in which failure of the Intel Product could result, directly or indirectly, in personal injury or death. SHOULD YOU PURCHASE OR USE INTEL'S PRODUCTS FOR ANY SUCH MISSION CRITICAL APPLICATION, YOU SHALL INDEMNIFY AND HOLD INTEL AND ITS SUBSIDIARIES, SUBCONTRACTORS AND AFFILIATES, AND THE DIRECTORS, OFFICERS, AND EMPLOYEES OF EACH, HARMLESS AGAINST ALL CLAIMS COSTS, DAMAGES, AND EXPENSES AND REASONABLE ATTORNEYS' FEES ARISING OUT OF, DIRECTLY OR INDIRECTLY, ANY CLAIM OF PRODUCT LIABILITY, PERSONAL INJURY, OR DEATH ARISING IN ANY WAY OUT OF SUCH MISSION CRITICAL APPLICATION, WHETHER OR NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN, MANUFACTURE, OR WARNING OF THE INTEL PRODUCT OR ANY OF ITS PARTS.Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined". Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information.The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725, or goto: /design/literature.htm.All information provided related to future Intel products and plans is preliminary and subject to change at any time, without notice.Intel and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.* Other names and brands may be claimed as the property of others.Copyright © 2020, Intel Corporation. All rights reserved.Important: Intel USB4 Evaluation Dock should be Powered off (No Power Supply must be Connected to the Board) when updating FW1.Equipment:1.1Dediprog SF600 (used to update the following components on the Intel USB4 EvaluationDock):Goshen Ridge: U8 – GR NVMDelta Bridge: UB10 – DB NVMUSB2.0 Hub: UB6 – USB2 HUB NVMFigure 1: Dediprog SF600SF600 SPI NOR Flash Programmer-Reference Link:https:///product/SF600-Link for downloading software:https:///download?productCategory=SPI+Flash+Solution&productName=SF600+SPI+NOR+Flash+Programmer&fileType=10Figure 2: Test ClipISP Testclip (SO8) (Compatible with SF100)Model Name: ISP-TC-8ISP Testclip (SO8) (Compatible with SF100)Reference Link: https:///product/ISP-TC-81.2Cypress MiniProg4 Program and Debug Kit CY8CKIT – 005 (used for updating thefollowing components):Cypress DMC (J5)Cypress CCG5(J4).Figure 3: Cypress MiniProg4 Program and Debug Kit CY8CKIT – 005-Reference Link: https:///product-detail/en/CY8CKIT-005/428-4713-ND/10314122?utm_medium=email&utm_source=oce&utm_campaign=3103_OCE20 RT&utm_content=productdetail_US&utm_cid=457843&so=64303907&mkt_tok=ey JpIjoiTURjNVlXVTBOekV4TW1aaSIsInQiOiJabjNuUjdzczgxZ0NCdWJBbExnR2k 3czkxNjhhZUVRcEFRdjlGSEZzeVZNNzdHcDRBSnEyYzhwa1F4QUJWS1NUeTJ wcEtXV1Z6d2tlbnpQbHUxamJCU1hqUHNhd3I4c1ZBaEd0WWtBUklLc0VsZ3F5T nc2eVRsYkZubXJrTm14dyJ9-Link for downloading software (Name of software: Download PSoC Programmer3.x.x.exe):https:///documentation/software-and-drivers/psoc-programmer-archiveNote: You need to create an account to able to download softwareNote: You need buy 5 Female to Male External Jumper for connecting.Figure 4: Female To Male Jumper-Reference Link: https:///GenBasic-Female-Solderless-Breadboard-Prototyping/dp/B077N7J6C4/ref=sr_1_7?dchild=1&keywords=male+to+female+jumper+wires&qid=1600894633&sr=8-7ponent Side and Back Side of Intel USB4 Evaluation DockFigure 5: Intel USB4 Evaluation Dock Component SideGR JTAG PA (UFP)DBR JTAGGR NVMCCG5 SWD Headers DMC SWD HeadersTMU CLKOUTFigure 6: Intel USB4 Evaluation Dock Back SideUB6 –USB2 HUB NVM UB10 – DB NVM Pin 0Pin 0Intel USB4 Evaluation Dock BKC File exampleGoshen Ridge: GR_4C_A0_rev9_ GATKES_BOARD.binDelta Bridge: DBR_CDR_ON_BOARD_rev1_NOSEC_sign.binFresco Hub: UB6_RegisterOnly_AddHeader_Merged_INTEL_1U5D_FL5801_1Q1_V02Cypress PD: DMC: CY7C65219‐40LQXIT_dmc_gatkex_creek_sha_3_3_0_1746_1_3_19_120W.hex CCG5: CYPD5235‐96BZXI_gatkex_3_3_1_39_2_8_0_nb.hex3.GoshenRidge FW UpdateExample file: GR_4C_A0_rev9_ GATKES_BOARD.bin-Step 1: Plug Dediprog SF600 flasher to PC-Step 2: Open Dediprog Engineering Application:o Go to Config Menu at the Top→Select Batch Operations(Top Left)→Check the Batch Operation Options is the same as Yellow Hightlight (see Figure 7) -→everything else leave as defaultFigure 7: Batch Operation Options- Step 3: Open U8 – NVM and take out the chip inside (see Figure 8)Figure 8: Chip inside U8 NVM- Step 4: Connect the SPI flash component to flasher (chip inside U8).Note: Make sure pin 0 of the chip is at the white line of the clip (see Figure 9)Figure 9: Connect the SPI Flash component to flasher (U8)- Step 5: Detect → choose First Chip number in the Memory list. (See Figure 10)- Note: If you do not see Memory list after Detect Chip → Please check the Connection between Chip and Test Clip-→Make sure they are connected correctlyPin 0Figure 10: Choose the chip from memory listNote: Majority of the time, the first component in the list is the correct chip.-Step 6: File load Goshen Ridge FW from BKC file bin file (See Figure 11), Select OKFigure 11: Load Intel USB4 Evaluation Dock bin file-Step 7: Batch-Step 8: Wait for all stages are PASS(see Figure 12), and Operation CompletelyFigure 12: All stages are PASSNote:-All stages are PASS only if you choose the correct chip in step 5.-In case you choose the wrong chip in step 5, you will see the following messageFigure 13: Error message after Batch when we choose the wrong chip Troubleshoot:-At Step 5: Detect → choose Second Chip number(W25Q168) of component in the list -Repeat Step 6 to Step 8-If Error:Programming Fail Message still occur→ At Step 5: Detect → choose Third Chip number (W25Q16CL)-Repeat Step 6 to Step 8-Step 9: Put the chip back to U8 GR NVM. Make sure pin 0 is on arrow position of U8 GR NVM .-Figure 14: Arrow Position of U8 GR NVM. Pin0 of Chip will go here4. Delta Bridge FW UpdateExample File: DBR_CDR_ON_BOARD_rev1_NOSEC_sign.bin Delta Bridge FW will be updated into UB10 componentFigure 15: Pin 0 at UB10While Dediprog SF600 flasher connected to PC and Dediprog application open:- Step 1: Connect the SPI flash component to flasher (UB10). Make sure the white linein the test clip connect to pin 0 (see Figure 16)Figure 16: Connect the SPI flash component to UB10-Step 2: Detect → choose First Chip number in the Memory list. (See Figure 17) -Note: If you do not see Memory list after Detect Chip→ Please check Connectionbetween Chip and Test Clip → Make sure they are connected correctlyFigure 17: Choose the chip from memory listNote: For most of the time, the first component in the list is a correct chip.-Step 3: File load Delta Bridge FW from BKC file bin file (See Figure 18)Figure 18: Load Intel USB4 Evaluation Dock bin file-NOTE:You may need to hold test clip to make sure test clip and chip connected. -Step 4: Batch-Step 5: Wait for all stages are PASS (see Figure 19) and Operation Completed.Figure 19: All stages are PASSNote:-All stages are PASS only if you choose the correct chip in step 2.-In the case you choose the wrong chip in step 2, you will see the following messageFigure 20: Error message after Batch when we choose the wrong chip-Troubleshoot:-At Step 3: Detect → choose Second Chip number (W25Q80) of component in the list -Repeat Step 3 to Step 5-If Error:Programming Fail Message still occur→ At Step 2: Detect → choose Third Chip number(W25Q80BL)-Repeat Step 3 to Step 55. Fresco Hub FW UpdateExample File:UB6_RegisterOnly_AddHeader_Merged_INTEL_1U5D_FL5801_1Q1_V02 Fresco Hub FW Update into UB6 componentFigure 21: Pin 0 at UB6While Dediprog SF600 flasher connected to PC and Dediprog application open:- Step 1: Connect the SPI flash component to flasher (UB6). Make sure the white line in the clip connect to bit 0.- Step 2: Detect → choose First Chip number in the Memory list. (See Figure 22) - Note: If you do not see Memory list after Detect Chip → Please check Connectionbetween Chip and Test Clip →Make sure they are connected correctlyFigure 22: Choose the chip from memory listNote: For most of the time, the first component in the list is the correct chip.-Step 3: File load Fresco USB Hub FW from BKC file bin file (See Figure 23)Figure 23: Load Intel USB4 Evaluation Dock bin file-NOTE:You may need to hold test clip to make sure test clip and chip connected. -Step 4: Batch-Step 5: Wait for all stages are PASS (see Figure 24), and Operation CompletelyFigure 24: All stages are PASSNote:-All stages are PASS only if you choose the correct chip in step 2.-In the case you choose the wrong chip in step 2, you will see the following messageFigure 25: Error message after Batch when we choose the wrong chip -Troubleshoot:-At Step 3: Detect → choose Second Chip number(W25Q168) of component in the list -Repeat Step 3 to Step 5-If Error: Programming Fail Message still occur→ At Step 2: Detect → choose Third Chip number(W25Q16CL)-Repeat Step 3 to Step 56. Cypress DMC FW UpdateExample DMC: CY7C65219‐40LQXIT_dmc_gatkex_creek_sha_3_3_0_1746_1_3_19_120W.hex Example CCG5: CYPD5235‐96BZXI_gatkex_3_3_1_39_2_8_0_nb.hex- Step 1: Plug Cypress MiniProg4 Program and Debug Kit CY8CKIT to the PC - Step 2: Connect MiniProg4 to DMC SWD connector (J5).Note: Only flash to the top five header pins of DMC SWD-- - - -Figure 26: DMC Headers (pin 6 to pin 10)-- Note: Make sure jumper connected to SWDIO pin of Cypress MiniProg4 connect toPin 10 at DMC header Cypress Minipro4 PinIntel USB4 Evaluation Dock DMCHeader PinSWDIO Pin 10 SWCLK Pin 9-CLK XRES Pin 8-XRES GND Pin 7-GND VTARG Pin 6-VDD-Step 3: Open Cypress PSOC programmerFigure 27: Cypress PSOC programmerNote: Make sure you see MiniProg4 in Port Selection-Step 4: Load file – DMC FW hex file (It may be inside PD folder from BKC file)Figure 28: Load file-Step 5: ProgramFigure 29: Select program on PSOC Programmer-Step 6: Wait until everything is PASSFigure 30: Wait until everything is PASSNote: If you see FAIL message, you may get the connection wrong between Cypress MiniProg4 and DMC header→ Check connection again at Step 2If connection between Cypress MiniProg4 and DMC header are correct but still get FAIL message→Close PSOC Programmer application and detach/attach MiniProg4 to host and reopen PSOC Programmer.7.Cypress CCG5 FW UpdateCCG5ABCCG5CDFigure 31: CCG5 SWD (J4) ConnectorWhile Cypress MiniProg4 Program and Debug Kit CY8CKIT connected to the PCand Cypress PSOC programmer open:Update CCG5 AB:-Step 1: Connect Cypress MiniProg4 to first CCG5 AB (J4) connectorCypress Minipro4 Pin Intel USB4 Evaluation Dock DMCHeader PinSWDIO Pin 10SWCLK Pin 9XRES Pin 8GND Pin 7VTARG Pin 6--Step 2: Load file – CCG5 FW hex file-Step 3: Program-Step 4: Wait until everything is PASSUpdate CCG5 CD:-Step 1: Connect Cypress MiniProg4 to first CCG5 CD (J4) connectorCypress Minipro4 Pin Intel USB4 Evaluation Dock DMCHeader PinSWDIO Pin 1SWCLK Pin 2XRES Pin 3GND Pin 4VTARG Pin 5-Step 2: Load file – CCG5 FW hex file (the same file for CCG5 AB update)-Step 3: Program-Step 4: Wait until everything is PASSNote: There is only 1 CCG5 file for CCG5 AB and CCG5 CDNote: If you see FAIL message, you may get connection wrong between CypressMiniProg4 and DMC header→ Check connection again at Step 1If connection between Cypress MiniProg4 and DMC header are correct but still get FAIL message→Close PSOC Programmer application and detach/attach MiniProg4 to host and reopen PSOC Programmer.-Step 5: Power Intel USB4 Evaluation Dock。
PRODUCT OVERVIEWThe E6000® Converged Edge Router (CER) is a next-generation Converged Cable Access Platform (CCAP ™) that provides cable operators unprecedented advances in channel density, power efficiency, and cost savings in a redundant, integratedarchitecture designed from the ground up for high availability. This powerful design allows operators to converge all services (video, high speed data, and voice), enabling additional savings in capital and operational expenditures along with increased operational efficiency. For Distributed Access Architecture (DAA) solutions, CommScope provides both the CCAP Core andRemote PHY (R-PHY) Device (RPD) defined in the CableLabs® Modular Headend Architecture (MHAv2). In this approach, the PHY layer is moved from the E6000 CER into a node or remote shelf, but the MAC processing, provisioning, and monitoring functions are performed by the E6000 CCAP Core.The Downstream CCAP Core Module (DCCM) has the same MAC processing capacity of the 2nd generation Downstream Cable Access Module (DCAM-2) but without the PHY-layer hardware and related components. The DCCM and DCAM-2 can be used interchangeably to provide downstream MAC processing for the E6000 CCAP Core. The DCCM offers power, weight, and cost savings over the DCAM-2 for Remote PHY applications. Without RF hardware, the DCCM cannot be used for I-CCAP applications. E6000 Release 7.0 and later support “hybrid” operation of Integrated CCAP (I-CCAP) and CCAP Core within the same chassis.Roadmap for future capabilities is subject to change.E6000® Converged Edge RouterDownstream CCAP Core ModuleThe Downstream CCAP Core Module (DCCM) isessentially a DCAM-2 without the RF circuitry. The DCCMis meant only for R-PHY operation for which it providesthe same functionality and capacity as the DCAM-2. TheDCCM and DCAM-2 are interchangeable for R-PHYoperation and can be mixed in the same E6000 chassis.The DCCM supports MAC processing for RPDs withdownstream RF bands up to 1.2 GHz. In addition, theDCCM can support multiple 192 MHz OFDM channelsper Service Group on capable RPDs. Operators receivesignificant benefits in terms of operational simplicity,power, and cost savings by deploying DCCM in R-PHYapplications. Use of DCCM requires the RSM-2 andeither UCAM-2 or UCCM upstream modules.Roadmap for future capabilities is subject to change.SUMMARY OF DCCM FEATURES AND CAPABILITIES (PARTIAL LIST)Downstream MAC Processing for Remote PHY Operation on the E6000 CER Acting as a CCAP CoreNo RF Output —R-PHY Operation OnlyFull Spectrum Capable (MAC processing for channels up to 1.2GHz)Interoperable with DCAM-2 in the Same E6000 ChassisMultiple DOCSIS 3.1 Downstream Channel Support (24 –192 MHz each) —Dependent on Software Release and RPD Capabilities DOCSIS 3.0 Downstream (Annex A and Annex B) Support —Channel Density Dependent on Software Release and RPD Capabilities Video SC-QAM Support for VOD and Broadcast Services —Channel Density Dependent on Software Release and RPD Capabilities Channel Density Scalability via Licensing or Software Upgrades (No Hardware Changes Required)E6000 CCAP Core Interoperable for Multi-Core R-PHY ArchitecturesDeploys with CCAP Core Rear Card (CCRC) –One Required on the Back of the E6000 Chassis for Each DCCMSPECIFICATIONSRemote PHY CapabilitiesFrequency Range (MHz)108 to 1218 (edge to edge)Modulation (QAM)All required by DOCSIS 3.0 and DOCSIS 3.1(Specific software support varies by release)Max OFDM Channel Width (MHz)192 (Multiple channels supported per RPD Service Group)Max SC-QAMs perDownstream Service Group128 (Sum total DOCSIS and IEQ)SC-QAM Data Rate (Mbps)(Max.)30.34 to 55.62 per channelMax Number of DS ServiceGroups per DCCM27SC-QAM RF Output Level(dBmV)Dependent on RPD PhysicalPower-48 VDCPower Consumption (W)135 (typical at 25 °C)Operating Temperature: Short Term °F (°C) Long Term °F (°C)+23 to +131 (-5 to +55) +41 to +104 (+5 to +40)Storage Temperature °F(°C)-40 to +158 (-40 to +70)Operating Humidity(Min.-Max.)5 to 85% (Non condensing)Dimensions(H x W x D) in. (cm)13.8 x 1.2 x 17. 8 (35.0 x 3.0 x 45.3) Weight lbs. (kg) Approx. 5 (2.3)SPECIFICATIONSInstallation Environment (System Level)Management Interfaces100/1000 Mbps Ethernet (RJ-45) plusConsole (serial port, RJ45)RF Connector Access NoneNSI Connector Access RSM-2 ports via front of chassis,RPIC-2Q ports via rear Management Access (System Level)In-band Management with Access Control Lists via any NSI portOut-of-Band Management via dedicated Ethernet port on RPIC-2Q Console (serial) port on RPIC-2QManaging the E6000® CER is typically done via SNMP and/or CLI. The E6000 CER has multiple options available for IPDR, a useful tool for measuring bandwidth usage. Physical maintenance of the E6000 CER is very simple. Air filters, one in the front and another in the rear of the chassis, should be inspected and/or replaced per recommendations in the E6000 CER User Guide.Roadmap for future capabilities is subject to change.Note:Specifications are subject to change without notice.Copyright Statement:©2021CommScope,Inc.All rights reserved.ARRIS,the ARRIS logo and E6000are trademarks of CommScope,Inc.and/or its affiliates.All other trademarks are the property of their respective owners.No part of this content may be reproduced in any form or by any means or used to make any derivative work (such as translation,transformation,or adaptation)without written permission from CommScope,Inc and/or its affiliates (“CommScope”).CommScope reserves the right to revise or change this content from time to time without obligation on the part of CommScope to provide notification of such revision or change.ORDERING CODES (PARTIAL LIST)Part NumberDescriptionPart NumberDescription1000536GEN-2 Duplex Chassis Kit -Two RSM-2s, No CAMs 1000325Router System Module 2 Kit -1 RSM-2 and RPIC-2Q 1000963CCRC -CCAP Core Rear Card (for DCCM and UCCM, active or spare)1001136SYSTEM-PRINCIPAL-CORE LICENSE1000961DCCM -DS CCAP Core Module (only for RPHYapplications; must purchase one of the Initial DS D3.0 MAC License Bundles with this item)1000962UCCM -US CCAP Core Module (only for RPHYapplications; must purchase one of the Initial Upstream D3.0 MAC License Bundles with this item)1000720E6000; 256 Initial DS D3.0 Annex A MAC License Bundle for DCAM-2 -For MAC Channels 1-256 (requires DCAM-2 HW purchase (PN 1000506) or DCCM HW purchase (PN 1000961))1000737E6000; 48 Initial Upstream D3.0 MAC License Bundle for UCAM-2 -For MAC Channels 1-48 (requires UCAM-2 HW purchase (PN 1000445) or UCCM HW purchase (PN 1000962))1000721E6000; 384 Initial DS D3.0 Annex A MAC License Bundle for DCAM-2 -For MAC Channels 1-384 (requires DCAM-2 HW purchase (PN 1000506) or DCCM HW purchase (PN 1000961))1001047E6000; 64 Initial Upstream D3.0 MAC License Bundle for UCAM-2 -For MAC Channels 1-64 (requires UCAM-2 HW purchase (PN 1000445) or UCCM HW purchase (PN 1000962))1001279E6000; 448 Initial DS D3.0 Annex A MAC License Bundle for DCAM-2 -For MAC Channels 1-448 (requires DCAM-2 HW purchase (PN 1000506) or DCCM HW purchase (PN 1000961))1000738E6000; 72 Initial Upstream D3.0 MAC License Bundle for UCAM-2 -For MAC Channels 1-72 (requires UCAM-2 HW purchase (PN 1000445) or UCCM HW purchase (PN 1000962))1000722E6000; 512 Initial DS D3.0 Annex A MAC License Bundle for DCAM-2 -For MAC Channels 1-512 (requires DCAM-2 HW purchase (PN 1000506) or DCCM HW purchase (PN 1000961))1000739E6000; 96 Initial Upstream D3.0 MAC License Bundle for UCAM-2 -For MAC Channels 1-96 (requires UCAM-2 HW purchase (PN 1000445) or UCCM HW purchase (PN 1000962))1000730E6000; 256 Initial DS D3.0 Annex B MAC License Bundle for DCAM-2 -For MAC Channels 1-256 (requires DCAM-2 HW purchase (PN 1000506) or DCCM HW purchase (PN 1000961))1000740E6000; 144 Initial Upstream D3.0 MAC License Bundle for UCAM-2 -For MAC Channels 1-144 (requires UCAM-2 HW purchase (PN 1000445) or UCCM HW purchase (PN 1000962))1000731E6000; 384 Initial DS D3.0 Annex B MAC License Bundle for DCAM-2 -For MAC Channels 1-384 (requires DCAM-2 HW purchase (PN 1000506) or DCCM HW purchase (PN 1000961))1000741E6000; 192 Initial Upstream D3.0 MAC License Bundle for UCAM-2 -For MAC Channels 1-192 (requires UCAM-2 HW purchase (PN 1000445) or UCCM HW purchase (PN 1000962))1001272E6000; 448 Initial DS D3.0 Annex B MAC License Bundle for DCAM-2 -For MAC Channels 1-448 (requires DCAM-2 HW purchase (PN 1000506) or DCCM HW purchase (PN 1000961))1000742E6000; 216 Initial Upstream D3.0 MAC License Bundle for UCAM-2 -For MAC Channels 1-216 (requires UCAM-2 HW purchase (PN 1000445) or UCCM HW purchase (PN 1000962))1000732E6000; 512 Initial DS D3.0 Annex B MAC License Bundle for DCAM-2 -For MAC Channels 1-512 (requires DCAM-2 HW purchase (PN 1000506) or DCCM HW purchase (PN 1000961))1000715E6000 D3.0 Downstream Annex A MAC Processing License (per 8 MHz D3.0 DS channel)1000736E6000 D3.0 Upstream MAC Processing License (per D3.0 US channel)1000716E6000 D3.0 Downstream Annex B MAC Processing License (per 6 MHz D3.0 DS channel)1000743E6000 D3.1 Downstream MAC Processing License (per 1 MHz channel)1000744E6000 D3.1 Upstream MAC Processing License (per 1 MHz channel)Full Price List available from CommScopeCUSTOMER CAREContact Customer Care for product information and sales:•United States: 866-36-ARRIS •International: +1-678-473-5656(rev 04-2021)E6000_CER_DCCM v1.0。
invalid foidInvalid FOID: Understanding the Importance and Consequences of Invalid Firearm Owner's Identification CardsIntroductionThe Firearm Owner's Identification (FOID) card is a crucial document required by the state of Illinois for anyone looking to own or possess firearms or ammunition. The FOID system exists to ensure that individuals with a history of certain criminal offenses or mental health issues are not granted access to firearms. However, instances of invalid FOID cards pose a significant concern as they can lead to potential risks within society. This document will explore the importance of valid FOID cards, the consequences of possessing an invalid FOID card, and potential solutions to address the issue.Valid FOID Cards: Why Are They Important?The FOID program acts as a safety measure to protect public safety by screening individuals who wish to possess firearms. It serves to prevent individuals with a criminal background ormental health issues from obtaining firearms, helping to reduce the risk of crimes involving firearms.1. Background Checks: The state of Illinois requires applicants to undergo thorough background checks before issuing a FOID card. This comprehensive process ensures that individuals with a history of violent crimes, restraining orders, or certain mental illnesses are prohibited from owning firearms.2. Public Safety: Valid FOID cards provide law enforcement with an efficient way to quickly identify individuals who are legally authorized to possess firearms. This allows them to respond appropriately to potential threats and ensure public safety.3. Responsible Gun Ownership: The FOID system encourages responsible gun ownership by providing proper training and education to applicants. By completing the application process and obtaining a valid FOID card, individuals demonstrate their commitment to understanding and following firearm regulations.Consequences of an Invalid FOID CardPossessing an invalid FOID card can have severe consequences, both legally and socially. Here are some key factors to consider:1. Legal Penalties: Individuals caught in possession of an invalid FOID card can face various legal penalties, including heavy fines, revocation of their FOID privileges, and possible imprisonment. These consequences are in place to deter individuals from obtaining and using illegal firearms.2. Increased Crime Risk: Possessing an invalid FOID card raises concerns about the individual's ability and intention to handle firearms responsibly. This situation can contribute to an increased risk of gun-related crimes, putting the safety of the individual as well as the general public at stake.3. Public Perception: Individuals found with an invalid FOID card may face social stigma and distrust. The perception of possessing an invalid FOID card may raise suspicions about one's intentions, affecting relationships and community interactions.Addressing the IssueRecognizing the significance of invalid FOID cards, it is essential to find ways to address the problem effectively. Here are a few potential solutions:1. Enhanced Background Checks: Continuously improving the background check process can help identify individuals with invalid FOID cards. Regular updates and cross-referencing with criminal and mental health databases can ensure prompt revocation of privileges when necessary.2. Education and Awareness Programs: Promoting public awareness about the importance of valid FOID cards can encourage responsible gun ownership. Collaborative efforts between law enforcement agencies, community organizations, and firearm advocacy groups can help organize educational campaigns to inform the public about the consequences of invalid FOID cards.3. Strict Enforcement: Law enforcement agencies must implement strong enforcement strategies to deter individuals from possessing invalid FOID cards. Regular audits and inspections of FOID cardholders can help identify and penalize those in violation of the law.ConclusionThe invalidity of a FOID card compromises safety and security within society. It is crucial to understand the significance of valid FOID cards and the consequences associated with possessing an invalid one. By continuously improving background checks, promoting education and awareness, and enforcing strict regulations, we can strive towards a safer and more responsible gun ownership culture. It is imperative to ensure that the FOID system continues to protect public safety effectively.。
The information in this document is subject to change without notice and does not represent a commitment on the part of Native Instruments GmbH. The software described by this docu-ment is subject to a License Agreement and may not be copied to other media. No part of this publication may be copied, reproduced or otherwise transmitted or recorded, for any purpose, without prior written permission by Native Instruments GmbH, hereinafter referred to as Native Instruments.“Native Instruments”, “NI” and associated logos are (registered) trademarks of Native Instru-ments GmbH.ASIO, VST, HALion and Cubase are registered trademarks of Steinberg Media Technologies GmbH.All other product and company names are trademarks™ or registered® trademarks of their re-spective holders. Use of them does not imply any affiliation with or endorsement by them.Document authored by: David Gover and Nico Sidi.Software version: 2.8 (02/2019)Hardware version: MASCHINE MIKRO MK3Special thanks to the Beta Test Team, who were invaluable not just in tracking down bugs, but in making this a better product.NATIVE INSTRUMENTS GmbH Schlesische Str. 29-30D-10997 Berlin Germanywww.native-instruments.de NATIVE INSTRUMENTS North America, Inc. 6725 Sunset Boulevard5th FloorLos Angeles, CA 90028USANATIVE INSTRUMENTS K.K.YO Building 3FJingumae 6-7-15, Shibuya-ku, Tokyo 150-0001Japanwww.native-instruments.co.jp NATIVE INSTRUMENTS UK Limited 18 Phipp StreetLondon EC2A 4NUUKNATIVE INSTRUMENTS FRANCE SARL 113 Rue Saint-Maur75011 ParisFrance SHENZHEN NATIVE INSTRUMENTS COMPANY Limited 5F, Shenzhen Zimao Center111 Taizi Road, Nanshan District, Shenzhen, GuangdongChina© NATIVE INSTRUMENTS GmbH, 2019. All rights reserved.Table of Contents1Welcome to MASCHINE (23)1.1MASCHINE Documentation (24)1.2Document Conventions (25)1.3New Features in MASCHINE 2.8 (26)1.4New Features in MASCHINE 2.7.10 (28)1.5New Features in MASCHINE 2.7.8 (29)1.6New Features in MASCHINE 2.7.7 (29)1.7New Features in MASCHINE 2.7.4 (31)1.8New Features in MASCHINE 2.7.3 (33)2Quick Reference (35)2.1MASCHINE Project Overview (35)2.1.1Sound Content (35)2.1.2Arrangement (37)2.2MASCHINE Hardware Overview (40)2.2.1MASCHINE MIKRO Hardware Overview (40)2.2.1.1Browser Section (41)2.2.1.2Edit Section (42)2.2.1.3Performance Section (43)2.2.1.4Transport Section (45)2.2.1.5Pad Section (46)2.2.1.6Rear Panel (50)2.3MASCHINE Software Overview (51)2.3.1Header (52)2.3.2Browser (54)2.3.3Arranger (56)2.3.4Control Area (59)2.3.5Pattern Editor (60)3Basic Concepts (62)3.1Important Names and Concepts (62)3.2Adjusting the MASCHINE User Interface (65)3.2.1Adjusting the Size of the Interface (65)3.2.2Switching between Ideas View and Song View (66)3.2.3Showing/Hiding the Browser (67)3.2.4Showing/Hiding the Control Lane (67)3.3Common Operations (68)3.3.1Adjusting Volume, Swing, and Tempo (68)3.3.2Undo/Redo (71)3.3.3Focusing on a Group or a Sound (73)3.3.4Switching Between the Master, Group, and Sound Level (77)3.3.5Navigating Channel Properties, Plug-ins, and Parameter Pages in the Control Area.773.3.6Navigating the Software Using the Controller (82)3.3.7Using Two or More Hardware Controllers (82)3.3.8Loading a Recent Project from the Controller (84)3.4Native Kontrol Standard (85)3.5Stand-Alone and Plug-in Mode (86)3.5.1Differences between Stand-Alone and Plug-in Mode (86)3.5.2Switching Instances (88)3.6Preferences (88)3.6.1Preferences – General Page (89)3.6.2Preferences – Audio Page (93)3.6.3Preferences – MIDI Page (95)3.6.4Preferences – Default Page (97)3.6.5Preferences – Library Page (101)3.6.6Preferences – Plug-ins Page (109)3.6.7Preferences – Hardware Page (114)3.6.8Preferences – Colors Page (114)3.7Integrating MASCHINE into a MIDI Setup (117)3.7.1Connecting External MIDI Equipment (117)3.7.2Sync to External MIDI Clock (117)3.7.3Send MIDI Clock (118)3.7.4Using MIDI Mode (119)3.8Syncing MASCHINE using Ableton Link (120)3.8.1Connecting to a Network (121)3.8.2Joining and Leaving a Link Session (121)4Browser (123)4.1Browser Basics (123)4.1.1The MASCHINE Library (123)4.1.2Browsing the Library vs. Browsing Your Hard Disks (124)4.2Searching and Loading Files from the Library (125)4.2.1Overview of the Library Pane (125)4.2.2Selecting or Loading a Product and Selecting a Bank from the Browser (128)4.2.3Selecting a Product Category, a Product, a Bank, and a Sub-Bank (133)4.2.3.1Selecting a Product Category, a Product, a Bank, and a Sub-Bank on theController (137)4.2.4Selecting a File Type (137)4.2.5Choosing Between Factory and User Content (138)4.2.6Selecting Type and Character Tags (138)4.2.7Performing a Text Search (142)4.2.8Loading a File from the Result List (143)4.3Additional Browsing Tools (148)4.3.1Loading the Selected Files Automatically (148)4.3.2Auditioning Instrument Presets (149)4.3.3Auditioning Samples (150)4.3.4Loading Groups with Patterns (150)4.3.5Loading Groups with Routing (151)4.3.6Displaying File Information (151)4.4Using Favorites in the Browser (152)4.5Editing the Files’ Tags and Properties (155)4.5.1Attribute Editor Basics (155)4.5.2The Bank Page (157)4.5.3The Types and Characters Pages (157)4.5.4The Properties Page (160)4.6Loading and Importing Files from Your File System (161)4.6.1Overview of the FILES Pane (161)4.6.2Using Favorites (163)4.6.3Using the Location Bar (164)4.6.4Navigating to Recent Locations (165)4.6.5Using the Result List (166)4.6.6Importing Files to the MASCHINE Library (169)4.7Locating Missing Samples (171)4.8Using Quick Browse (173)5Managing Sounds, Groups, and Your Project (175)5.1Overview of the Sounds, Groups, and Master (175)5.1.1The Sound, Group, and Master Channels (176)5.1.2Similarities and Differences in Handling Sounds and Groups (177)5.1.3Selecting Multiple Sounds or Groups (178)5.2Managing Sounds (181)5.2.1Loading Sounds (183)5.2.2Pre-listening to Sounds (184)5.2.3Renaming Sound Slots (185)5.2.4Changing the Sound’s Color (186)5.2.5Saving Sounds (187)5.2.6Copying and Pasting Sounds (189)5.2.7Moving Sounds (192)5.2.8Resetting Sound Slots (193)5.3Managing Groups (194)5.3.1Creating Groups (196)5.3.2Loading Groups (197)5.3.3Renaming Groups (198)5.3.4Changing the Group’s Color (199)5.3.5Saving Groups (200)5.3.6Copying and Pasting Groups (202)5.3.7Reordering Groups (206)5.3.8Deleting Groups (207)5.4Exporting MASCHINE Objects and Audio (208)5.4.1Saving a Group with its Samples (208)5.4.2Saving a Project with its Samples (210)5.4.3Exporting Audio (212)5.5Importing Third-Party File Formats (218)5.5.1Loading REX Files into Sound Slots (218)5.5.2Importing MPC Programs to Groups (219)6Playing on the Controller (223)6.1Adjusting the Pads (223)6.1.1The Pad View in the Software (223)6.1.2Choosing a Pad Input Mode (225)6.1.3Adjusting the Base Key (226)6.2Adjusting the Key, Choke, and Link Parameters for Multiple Sounds (227)6.3Playing Tools (229)6.3.1Mute and Solo (229)6.3.2Choke All Notes (233)6.3.3Groove (233)6.3.4Level, Tempo, Tune, and Groove Shortcuts on Your Controller (235)6.3.5Tap Tempo (235)6.4Performance Features (236)6.4.1Overview of the Perform Features (236)6.4.2Selecting a Scale and Creating Chords (239)6.4.3Scale and Chord Parameters (240)6.4.4Creating Arpeggios and Repeated Notes (253)6.4.5Swing on Note Repeat / Arp Output (257)6.5Using Lock Snapshots (257)6.5.1Creating a Lock Snapshot (257)7Working with Plug-ins (259)7.1Plug-in Overview (259)7.1.1Plug-in Basics (259)7.1.2First Plug-in Slot of Sounds: Choosing the Sound’s Role (263)7.1.3Loading, Removing, and Replacing a Plug-in (264)7.1.4Adjusting the Plug-in Parameters (270)7.1.5Bypassing Plug-in Slots (270)7.1.6Using Side-Chain (272)7.1.7Moving Plug-ins (272)7.1.8Alternative: the Plug-in Strip (273)7.1.9Saving and Recalling Plug-in Presets (273)7.1.9.1Saving Plug-in Presets (274)7.1.9.2Recalling Plug-in Presets (275)7.1.9.3Removing a Default Plug-in Preset (276)7.2The Sampler Plug-in (277)7.2.1Page 1: Voice Settings / Engine (279)7.2.2Page 2: Pitch / Envelope (281)7.2.3Page 3: FX / Filter (283)7.2.4Page 4: Modulation (285)7.2.5Page 5: LFO (286)7.2.6Page 6: Velocity / Modwheel (288)7.3Using Native Instruments and External Plug-ins (289)7.3.1Opening/Closing Plug-in Windows (289)7.3.2Using the VST/AU Plug-in Parameters (292)7.3.3Setting Up Your Own Parameter Pages (293)7.3.4Using VST/AU Plug-in Presets (298)7.3.5Multiple-Output Plug-ins and Multitimbral Plug-ins (300)8Using the Audio Plug-in (302)8.1Loading a Loop into the Audio Plug-in (306)8.2Editing Audio in the Audio Plug-in (307)8.3Using Loop Mode (308)8.4Using Gate Mode (310)9Using the Drumsynths (312)9.1Drumsynths – General Handling (313)9.1.1Engines: Many Different Drums per Drumsynth (313)9.1.2Common Parameter Organization (313)9.1.3Shared Parameters (316)9.1.4Various Velocity Responses (316)9.1.5Pitch Range, Tuning, and MIDI Notes (316)9.2The Kicks (317)9.2.1Kick – Sub (319)9.2.2Kick – Tronic (321)9.2.3Kick – Dusty (324)9.2.4Kick – Grit (325)9.2.5Kick – Rasper (328)9.2.6Kick – Snappy (329)9.2.7Kick – Bold (331)9.2.8Kick – Maple (333)9.2.9Kick – Push (334)9.3The Snares (336)9.3.1Snare – Volt (338)9.3.2Snare – Bit (340)9.3.3Snare – Pow (342)9.3.4Snare – Sharp (343)9.3.5Snare – Airy (345)9.3.6Snare – Vintage (347)9.3.7Snare – Chrome (349)9.3.8Snare – Iron (351)9.3.9Snare – Clap (353)9.3.10Snare – Breaker (355)9.4The Hi-hats (357)9.4.1Hi-hat – Silver (358)9.4.2Hi-hat – Circuit (360)9.4.3Hi-hat – Memory (362)9.4.4Hi-hat – Hybrid (364)9.4.5Creating a Pattern with Closed and Open Hi-hats (366)9.5The Toms (367)9.5.1Tom – Tronic (369)9.5.2Tom – Fractal (371)9.5.3Tom – Floor (375)9.5.4Tom – High (377)9.6The Percussions (378)9.6.1Percussion – Fractal (380)9.6.2Percussion – Kettle (383)9.6.3Percussion – Shaker (385)9.7The Cymbals (389)9.7.1Cymbal – Crash (391)9.7.2Cymbal – Ride (393)10Using the Bass Synth (396)10.1Bass Synth – General Handling (397)10.1.1Parameter Organization (397)10.1.2Bass Synth Parameters (399)11Working with Patterns (401)11.1Pattern Basics (401)11.1.1Pattern Editor Overview (402)11.1.2Navigating the Event Area (404)11.1.3Following the Playback Position in the Pattern (406)11.1.4Jumping to Another Playback Position in the Pattern (407)11.1.5Group View and Keyboard View (408)11.1.6Adjusting the Arrange Grid and the Pattern Length (410)11.1.7Adjusting the Step Grid and the Nudge Grid (413)11.2Recording Patterns in Real Time (416)11.2.1Recording Your Patterns Live (417)11.2.2Using the Metronome (419)11.2.3Recording with Count-in (420)11.3Recording Patterns with the Step Sequencer (422)11.3.1Step Mode Basics (422)11.3.2Editing Events in Step Mode (424)11.4Editing Events (425)11.4.1Editing Events with the Mouse: an Overview (425)11.4.2Creating Events/Notes (428)11.4.3Selecting Events/Notes (429)11.4.4Editing Selected Events/Notes (431)11.4.5Deleting Events/Notes (434)11.4.6Cut, Copy, and Paste Events/Notes (436)11.4.7Quantizing Events/Notes (439)11.4.8Quantization While Playing (441)11.4.9Doubling a Pattern (442)11.4.10Adding Variation to Patterns (442)11.5Recording and Editing Modulation (443)11.5.1Which Parameters Are Modulatable? (444)11.5.2Recording Modulation (446)11.5.3Creating and Editing Modulation in the Control Lane (447)11.6Creating MIDI Tracks from Scratch in MASCHINE (452)11.7Managing Patterns (454)11.7.1The Pattern Manager and Pattern Mode (455)11.7.2Selecting Patterns and Pattern Banks (456)11.7.3Creating Patterns (459)11.7.4Deleting Patterns (460)11.7.5Creating and Deleting Pattern Banks (461)11.7.6Naming Patterns (463)11.7.7Changing the Pattern’s Color (465)11.7.8Duplicating, Copying, and Pasting Patterns (466)11.7.9Moving Patterns (469)11.8Importing/Exporting Audio and MIDI to/from Patterns (470)11.8.1Exporting Audio from Patterns (470)11.8.2Exporting MIDI from Patterns (472)11.8.3Importing MIDI to Patterns (474)12Audio Routing, Remote Control, and Macro Controls (483)12.1Audio Routing in MASCHINE (484)12.1.1Sending External Audio to Sounds (485)12.1.2Configuring the Main Output of Sounds and Groups (489)12.1.3Setting Up Auxiliary Outputs for Sounds and Groups (494)12.1.4Configuring the Master and Cue Outputs of MASCHINE (497)12.1.5Mono Audio Inputs (502)12.1.5.1Configuring External Inputs for Sounds in Mix View (503)12.2Using MIDI Control and Host Automation (506)12.2.1Triggering Sounds via MIDI Notes (507)12.2.2Triggering Scenes via MIDI (513)12.2.3Controlling Parameters via MIDI and Host Automation (514)12.2.4Selecting VST/AU Plug-in Presets via MIDI Program Change (522)12.2.5Sending MIDI from Sounds (523)12.3Creating Custom Sets of Parameters with the Macro Controls (527)12.3.1Macro Control Overview (527)12.3.2Assigning Macro Controls Using the Software (528)13Controlling Your Mix (535)13.1Mix View Basics (535)13.1.1Switching between Arrange View and Mix View (535)13.1.2Mix View Elements (536)13.2The Mixer (537)13.2.1Displaying Groups vs. Displaying Sounds (539)13.2.2Adjusting the Mixer Layout (541)13.2.3Selecting Channel Strips (542)13.2.4Managing Your Channels in the Mixer (543)13.2.5Adjusting Settings in the Channel Strips (545)13.2.6Using the Cue Bus (549)13.3The Plug-in Chain (551)13.4The Plug-in Strip (552)13.4.1The Plug-in Header (554)13.4.2Panels for Drumsynths and Internal Effects (556)13.4.3Panel for the Sampler (557)13.4.4Custom Panels for Native Instruments Plug-ins (560)13.4.5Undocking a Plug-in Panel (Native Instruments and External Plug-ins Only) (564)14Using Effects (567)14.1Applying Effects to a Sound, a Group or the Master (567)14.1.1Adding an Effect (567)14.1.2Other Operations on Effects (574)14.1.3Using the Side-Chain Input (575)14.2Applying Effects to External Audio (578)14.2.1Step 1: Configure MASCHINE Audio Inputs (578)14.2.2Step 2: Set up a Sound to Receive the External Input (579)14.2.3Step 3: Load an Effect to Process an Input (579)14.3Creating a Send Effect (580)14.3.1Step 1: Set Up a Sound or Group as Send Effect (581)14.3.2Step 2: Route Audio to the Send Effect (583)14.3.3 A Few Notes on Send Effects (583)14.4Creating Multi-Effects (584)15Effect Reference (587)15.1Dynamics (588)15.1.1Compressor (588)15.1.2Gate (591)15.1.3Transient Master (594)15.1.4Limiter (596)15.1.5Maximizer (600)15.2Filtering Effects (603)15.2.1EQ (603)15.2.2Filter (605)15.2.3Cabinet (609)15.3Modulation Effects (611)15.3.1Chorus (611)15.3.2Flanger (612)15.3.3FM (613)15.3.4Freq Shifter (615)15.3.5Phaser (616)15.4Spatial and Reverb Effects (617)15.4.1Ice (617)15.4.2Metaverb (619)15.4.3Reflex (620)15.4.4Reverb (Legacy) (621)15.4.5Reverb (623)15.4.5.1Reverb Room (623)15.4.5.2Reverb Hall (626)15.4.5.3Plate Reverb (629)15.5Delays (630)15.5.1Beat Delay (630)15.5.2Grain Delay (632)15.5.3Grain Stretch (634)15.5.4Resochord (636)15.6Distortion Effects (638)15.6.1Distortion (638)15.6.2Lofi (640)15.6.3Saturator (641)15.7Perform FX (645)15.7.1Filter (646)15.7.2Flanger (648)15.7.3Burst Echo (650)15.7.4Reso Echo (653)15.7.5Ring (656)15.7.6Stutter (658)15.7.7Tremolo (661)15.7.8Scratcher (664)16Working with the Arranger (667)16.1Arranger Basics (667)16.1.1Navigating Song View (670)16.1.2Following the Playback Position in Your Project (672)16.1.3Performing with Scenes and Sections using the Pads (673)16.2Using Ideas View (677)16.2.1Scene Overview (677)16.2.2Creating Scenes (679)16.2.3Assigning and Removing Patterns (679)16.2.4Selecting Scenes (682)16.2.5Deleting Scenes (684)16.2.6Creating and Deleting Scene Banks (685)16.2.7Clearing Scenes (685)16.2.8Duplicating Scenes (685)16.2.9Reordering Scenes (687)16.2.10Making Scenes Unique (688)16.2.11Appending Scenes to Arrangement (689)16.2.12Naming Scenes (689)16.2.13Changing the Color of a Scene (690)16.3Using Song View (692)16.3.1Section Management Overview (692)16.3.2Creating Sections (694)16.3.3Assigning a Scene to a Section (695)16.3.4Selecting Sections and Section Banks (696)16.3.5Reorganizing Sections (700)16.3.6Adjusting the Length of a Section (702)16.3.6.1Adjusting the Length of a Section Using the Software (703)16.3.6.2Adjusting the Length of a Section Using the Controller (705)16.3.7Clearing a Pattern in Song View (705)16.3.8Duplicating Sections (705)16.3.8.1Making Sections Unique (707)16.3.9Removing Sections (707)16.3.10Renaming Scenes (708)16.3.11Clearing Sections (710)16.3.12Creating and Deleting Section Banks (710)16.3.13Working with Patterns in Song view (710)16.3.13.1Creating a Pattern in Song View (711)16.3.13.2Selecting a Pattern in Song View (711)16.3.13.3Clearing a Pattern in Song View (711)16.3.13.4Renaming a Pattern in Song View (711)16.3.13.5Coloring a Pattern in Song View (712)16.3.13.6Removing a Pattern in Song View (712)16.3.13.7Duplicating a Pattern in Song View (712)16.3.14Enabling Auto Length (713)16.3.15Looping (714)16.3.15.1Setting the Loop Range in the Software (714)16.3.15.2Activating or Deactivating a Loop Using the Controller (715)16.4Playing with Sections (715)16.4.1Jumping to another Playback Position in Your Project (716)16.5Triggering Sections or Scenes via MIDI (717)16.6The Arrange Grid (719)16.7Quick Grid (720)17Sampling and Sample Mapping (722)17.1Opening the Sample Editor (722)17.2Recording Audio (724)17.2.1Opening the Record Page (724)17.2.2Selecting the Source and the Recording Mode (725)17.2.3Arming, Starting, and Stopping the Recording (729)17.2.5Checking Your Recordings (731)17.2.6Location and Name of Your Recorded Samples (734)17.3Editing a Sample (735)17.3.1Using the Edit Page (735)17.3.2Audio Editing Functions (739)17.4Slicing a Sample (743)17.4.1Opening the Slice Page (743)17.4.2Adjusting the Slicing Settings (744)17.4.3Manually Adjusting Your Slices (746)17.4.4Applying the Slicing (750)17.5Mapping Samples to Zones (754)17.5.1Opening the Zone Page (754)17.5.2Zone Page Overview (755)17.5.3Selecting and Managing Zones in the Zone List (756)17.5.4Selecting and Editing Zones in the Map View (761)17.5.5Editing Zones in the Sample View (765)17.5.6Adjusting the Zone Settings (767)17.5.7Adding Samples to the Sample Map (770)18Appendix: Tips for Playing Live (772)18.1Preparations (772)18.1.1Focus on the Hardware (772)18.1.2Customize the Pads of the Hardware (772)18.1.3Check Your CPU Power Before Playing (772)18.1.4Name and Color Your Groups, Patterns, Sounds and Scenes (773)18.1.5Consider Using a Limiter on Your Master (773)18.1.6Hook Up Your Other Gear and Sync It with MIDI Clock (773)18.1.7Improvise (773)18.2Basic Techniques (773)18.2.1Use Mute and Solo (773)18.2.2Create Variations of Your Drum Patterns in the Step Sequencer (774)18.2.3Use Note Repeat (774)18.2.4Set Up Your Own Multi-effect Groups and Automate Them (774)18.3Special Tricks (774)18.3.1Changing Pattern Length for Variation (774)18.3.2Using Loops to Cycle Through Samples (775)18.3.3Load Long Audio Files and Play with the Start Point (775)19Troubleshooting (776)19.1Knowledge Base (776)19.2Technical Support (776)19.3Registration Support (777)19.4User Forum (777)20Glossary (778)Index (786)1Welcome to MASCHINEThank you for buying MASCHINE!MASCHINE is a groove production studio that implements the familiar working style of classi-cal groove boxes along with the advantages of a computer based system. MASCHINE is ideal for making music live, as well as in the studio. It’s the hands-on aspect of a dedicated instru-ment, the MASCHINE hardware controller, united with the advanced editing features of the MASCHINE software.Creating beats is often not very intuitive with a computer, but using the MASCHINE hardware controller to do it makes it easy and fun. You can tap in freely with the pads or use Note Re-peat to jam along. Alternatively, build your beats using the step sequencer just as in classic drum machines.Patterns can be intuitively combined and rearranged on the fly to form larger ideas. You can try out several different versions of a song without ever having to stop the music.Since you can integrate it into any sequencer that supports VST, AU, or AAX plug-ins, you can reap the benefits in almost any software setup, or use it as a stand-alone application. You can sample your own material, slice loops and rearrange them easily.However, MASCHINE is a lot more than an ordinary groovebox or sampler: it comes with an inspiring 7-gigabyte library, and a sophisticated, yet easy to use tag-based Browser to give you instant access to the sounds you are looking for.What’s more, MASCHINE provides lots of options for manipulating your sounds via internal ef-fects and other sound-shaping possibilities. You can also control external MIDI hardware and 3rd-party software with the MASCHINE hardware controller, while customizing the functions of the pads, knobs and buttons according to your needs utilizing the included Controller Editor application. We hope you enjoy this fantastic instrument as much as we do. Now let’s get go-ing!—The MASCHINE team at Native Instruments.MASCHINE Documentation1.1MASCHINE DocumentationNative Instruments provide many information sources regarding MASCHINE. The main docu-ments should be read in the following sequence:1.MASCHINE MIKRO Quick Start Guide: This animated online guide provides a practical ap-proach to help you learn the basic of MASCHINE MIKRO. The guide is available from theNative Instruments website: https:///maschine-mikro-quick-start/2.MASCHINE Manual (this document): The MASCHINE Manual provides you with a compre-hensive description of all MASCHINE software and hardware features.Additional documentation sources provide you with details on more specific topics:►Online Support Videos: You can find a number of support videos on The Official Native In-struments Support Channel under the following URL: https:///NIsupport-EN. We recommend that you follow along with these instructions while the respective ap-plication is running on your computer.Other Online Resources:If you are experiencing problems related to your Native Instruments product that the supplied documentation does not cover, there are several ways of getting help:▪Knowledge Base▪User Forum▪Technical Support▪Registration SupportYou will find more information on these subjects in the chapter Troubleshooting.Document Conventions1.2Document ConventionsThis section introduces you to the signage and text highlighting used in this manual. This man-ual uses particular formatting to point out special facts and to warn you of potential issues.The icons introducing these notes let you see what kind of information is to be expected:This document uses particular formatting to point out special facts and to warn you of poten-tial issues. The icons introducing the following notes let you see what kind of information canbe expected:Furthermore, the following formatting is used:▪Text appearing in (drop-down) menus (such as Open…, Save as… etc.) in the software andpaths to locations on your hard disk or other storage devices is printed in italics.▪Text appearing elsewhere (labels of buttons, controls, text next to checkboxes etc.) in thesoftware is printed in blue. Whenever you see this formatting applied, you will find thesame text appearing somewhere on the screen.▪Text appearing on the displays of the controller is printed in light grey. Whenever you seethis formatting applied, you will find the same text on a controller display.▪Text appearing on labels of the hardware controller is printed in orange. Whenever you seethis formatting applied, you will find the same text on the controller.▪Important names and concepts are printed in bold.▪References to keys on your computer’s keyboard you’ll find put in square brackets (e.g.,“Press [Shift] + [Enter]”).►Single instructions are introduced by this play button type arrow.→Results of actions are introduced by this smaller arrow.Naming ConventionThroughout the documentation we will refer to MASCHINE controller (or just controller) as the hardware controller and MASCHINE software as the software installed on your computer.The term “effect” will sometimes be abbreviated as “FX” when referring to elements in the MA-SCHINE software and hardware. These terms have the same meaning.Button Combinations and Shortcuts on Your ControllerMost instructions will use the “+” sign to indicate buttons (or buttons and pads) that must be pressed simultaneously, starting with the button indicated first. E.g., an instruction such as:“Press SHIFT + PLAY”means:1.Press and hold SHIFT.2.While holding SHIFT, press PLAY and release it.3.Release SHIFT.1.3New Features in MASCHINE2.8The following new features have been added to MASCHINE: Integration▪Browse on , create your own collections of loops and one-shots and send them directly to the MASCHINE browser.Improvements to the Browser▪Samples are now cataloged in separate Loops and One-shots tabs in the Browser.▪Previews of loops selected in the Browser will be played in sync with the current project.When a loop is selected with Prehear turned on, it will begin playing immediately in-sync with the project if transport is running. If a loop preview starts part-way through the loop, the loop will play once more for its full length to ensure you get to hear the entire loop once in context with your project.▪Filters and product selections will be remembered when switching between content types and Factory/User Libraries in the Browser.▪Browser content synchronization between multiple running instances. When running multi-ple instances of MASCHINE, either as Standalone and/or as a plug-in, updates to the Li-brary will be synced across the instances. For example, if you delete a sample from your User Library in one instance, the sample will no longer be present in the other instances.Similarly, if you save a preset in one instance, that preset will then be available in the oth-er instances, too.▪Edits made to samples in the Factory Libraries will be saved to the Standard User Directo-ry.For more information on these new features, refer to the following chapter ↑4, Browser. Improvements to the MASCHINE MIKRO MK3 Controller▪You can now set sample Start and End points using the controller. For more information refer to ↑17.3.1, Using the Edit Page.Improved Support for A-Series Keyboards▪When Browsing with A-Series keyboards, you can now jump quickly to the results list by holding SHIFT and pushing right on the 4D Encoder.▪When Browsing with A-Series keyboards, you can fast scroll through the Browser results list by holding SHIFT and twisting the 4D Encoder.▪Mute and Solo Sounds and Groups from A-Series keyboards. Sounds are muted in TRACK mode while Groups are muted in IDEAS.。
Rexroth IndraControl VCP 20Industrial Hydraulics Electric Drivesand ControlsLinear Motion andAssembly Technologies PneumaticsServiceAutomationMobileHydraulicsRexroth VisualMotion 10 Multi-Axis Machine Control R911306327 Edition 01Troubleshooting GuideAbout this Documentation Rexroth VisualMotion 10 Troubleshooting Guide DOK-VISMOT-VM*-10VRS**-WA01-EN-PRexroth VisualMotion 10Multi-Axis Machine ControlTroubleshooting Guide DOK-VISMOT-VM*-10VRS**-WA01-EN-P Document Number, 120-2300-B323-01/ENPart of Box Set, 20-10V-EN (MN R911306370)This documentation describes …•the use of VisualMotion Toolkit for assitance in diagnostics •the proper steps for indentifing diagnostic faults • and the suggested remedies for clearing faults Description ReleaseDateNotes DOK-VISMOT-VM*-10VRS**-WA01-EN-P 08/2004Initial release© 2004 Bosch Rexroth AGCopying this document, giving it to others and the use or communicationof the contents thereof without express authority, are forbidden. Offendersare liable for the payment of damages. All rights are reserved in the eventof the grant of a patent or the registration of a utility model or design(DIN 34-1).The specified data is for product description purposes only and may notbe deemed to be guaranteed unless expressly confirmed in the contract.All rights are reserved with respect to the content of this documentationand the availability of the product.Bosch Rexroth AGBgm.-Dr.-Nebel-Str. 2 • D-97816 Lohr a. MainTel.: +49 (0)93 52/40-0 • Fax: +49 (0)93 52/40-48 85 • Telex: 68 94 21Bosch Rexroth Corporation • Electric Drives and Controls5150 Prairie Stone Parkway • Hoffman Estates, IL 60192 • USATel.: 847-645-3600 • Fax: 847-645-6201/Dept. ESG4 (DPJ)This document has been printed on chlorine-free bleached paper.Title Type of DocumentationDocument TypecodeInternal File Reference Purpose of Documentation Record of Revisions Copyright Validity Published byNoteRexroth VisualMotion 10 Troubleshooting Guide Table of Contents I Table of Contents1VisualMotion Tools for Diagnosing1-1 The Diagnostics Menu.............................................................................................................1-1System Diagnostics.................................................................................................................1-1Tasks Diagnostics...................................................................................................................1-3Drive Overview….....................................................................................................................1-42Monitoring and Diagnostics2-12.1System Diagnostics - Codes and Message...................................................................................2-1Parameters..............................................................................................................................2-2DriveTop..................................................................................................................................2-32.2Control Startup Messages.............................................................................................................2-4PPC Boot-Up Sequence..........................................................................................................2-4Control Firmware Sequence....................................................................................................2-42.3Status Messages (001-199)...........................................................................................................2-5001 Initializing System.............................................................................................................2-5002 Parameter Mode...............................................................................................................2-5003 Initializing Drives...............................................................................................................2-5004 System is Ready...............................................................................................................2-5005 Manual Mode....................................................................................................................2-5006 Automatic Mode: ABCD....................................................................................................2-5007 Program Running: ABCD.................................................................................................2-6008 Single-Stepping: ABCD....................................................................................................2-6009 Select Parameter Mode to Continue................................................................................2-6010 Breakpoint Reached: ABCD.............................................................................................2-6018 Please cycle power to continue........................................................................................2-6019 Executing User Initialization Task....................................................................................2-62.4Warning Messages (201-399).......................................................................................................2-7201 Invalid jog type or axis selected........................................................................................2-7202 Drive %d is not ready.......................................................................................................2-7203 Power Fail detected..........................................................................................................2-7204 Sercos ring was disconnected..........................................................................................2-8205 Parameter transfer warning in Task %c...........................................................................2-8207 Axis %d position limit reached..........................................................................................2-8208 Lost Fieldbus Connection.................................................................................................2-9209 Fieldbus Mapping Timeout...............................................................................................2-9210 File System Defrag: %d completed................................................................................2-10211 Program- & Data memory cleared..................................................................................2-10212 Option Card PLS Warning, see ext. diag.......................................................................2-10213 Sercos cycle time changed.............................................................................................2-11214 PCI Bus Cyclic Mapping Timeout...................................................................................2-11 DOK-VISMOT-VM*-10VRS**-WA01-EN-PII Table of Contents Rexroth VisualMotion 10 Troubleshooting Guide215 RECO I/O Failure, see ext. diag.....................................................................................2-11216 Control PLS %d warning, see ext. diag..........................................................................2-12217 PCI Bus Communication, see ext. diag..........................................................................2-12218 PCI Bus Register Mapping Timeout...............................................................................2-13219 PCI Bus Lifecounter Timeout.........................................................................................2-13220 Excessive deviation in PMG%d, see ext. diag...............................................................2-13221 Excessive Master Position Slip Deviation......................................................................2-13222 ELS Config. Warning, see ext. diag...............................................................................2-14223 PCI Bus reset occurred, cyclic data are invalid..............................................................2-14225 System booted................................................................................................................2-14226 RS485 Serial Communication Error (port X1%d)...........................................................2-15227 Control Over-temperature Warning................................................................................2-15228 Control - SYSTEM WARNING.......................................................................................2-152.5Shutdown Messages (400 - 599).................................................................................................2-16400 EMERGENCY STOP......................................................................................................2-16401 Sercos Controller Error: %02d........................................................................................2-16402 Sercos Config. Error: see ext. diag................................................................................2-16403 System Error see ext. diag.............................................................................................2-17405 Phase %d: Drive did not respond...................................................................................2-17407 Drive %d Phase 3 Switch Error......................................................................................2-17409 Sercos Disconnect Error.................................................................................................2-18411 Drive %d Phase 4 Switch Error......................................................................................2-18412 No drives were found on ring..........................................................................................2-18414 Parameters were lost......................................................................................................2-19415 Drive %d was not found..................................................................................................2-19416 Invalid Instruction at %04x..............................................................................................2-19417 SYSTEM ERROR: pSOS #%04x...................................................................................2-19418 No program is active.......................................................................................................2-20419 Invalid Program File: code = %d....................................................................................2-20420 Drive %d Shutdown Error...............................................................................................2-20421 User Program Stack Overflow........................................................................................2-20422 Parameter transfer error in Task %c..............................................................................2-21423 Unimplemented Instruction.............................................................................................2-21425 Instruction error: see Task %c diag................................................................................2-21426 Drive %d is not ready.....................................................................................................2-22427 Calc: invalid table index %d............................................................................................2-22428 Calc: division by zero......................................................................................................2-22429 Calc: too many operands................................................................................................2-22430 Calc: invalid operator......................................................................................................2-23431 Calc error: see Task %c diag.........................................................................................2-23432 Calc: too many nested expressions...............................................................................2-23433 Setup instruction outside of a task.................................................................................2-23434 Axis %d configured more than once...............................................................................2-23435 Axis %d is not assigned to a task...................................................................................2-24436 General Compiler Error: %04x.......................................................................................2-24438 Invalid Axis Selected: %d...............................................................................................2-24DOK-VISMOT-VM*-10VRS**-WA01-EN-PRexroth VisualMotion 10 Troubleshooting Guide Table of Contents III439 Axis %d: Invalid Motion Type.........................................................................................2-24440 I/O Transfer Error: see task diag....................................................................................2-25450 Event %d: invalid event type..........................................................................................2-25451 Invalid event number ‘%d’..............................................................................................2-25452 More than %d event timers armed.................................................................................2-25453 Homing param. transfer error: %d..................................................................................2-25454 Axis %d homing not complete........................................................................................2-26459 Axis %d target position out of bounds............................................................................2-26460 Invalid program %d from binary inputs...........................................................................2-26463 Ratio command: invalid ratio..........................................................................................2-26464 Can't activate while program running.............................................................................2-27465 Drive %d config. error, see ext. diag..............................................................................2-27467 Invalid ELS Master Option..............................................................................................2-27468 ELS adjustment out of bounds.......................................................................................2-27470 Axis %d velocity > maximum..........................................................................................2-28474 Drive %d cyclic data size too large.................................................................................2-28477 Axis D: probe edge not configured.................................................................................2-28478 Calc: operand out of range.............................................................................................2-28483 Parameter Init. Error: see Task %c diag........................................................................2-29484 Control SYSTEM ERROR..............................................................................................2-29486 Sercos Device %d is not a drive.....................................................................................2-29487 CAM %d is invalid or not stored.....................................................................................2-29488 CAM Error: See Task %c diag........................................................................................2-30489 More than %d CAM axes selected.................................................................................2-30490 System Memory Allocation Error....................................................................................2-30492 Programs were lost, see ext. diag..................................................................................2-30496 Can't execute this instruction from an event..................................................................2-31497 Limit switch config. error, see ext. diag.........................................................................2-31498 Drive %d Shutdown Warning..........................................................................................2-32499 Axis number %d not supported in this version...............................................................2-32500 Axis %d is not referenced...............................................................................................2-32501 Drive %d comm. error, see ext. diag..............................................................................2-33502 ELS and cams not supported in this version..................................................................2-33504 Communication Timeout.................................................................................................2-33505 Axis %d is not configured...............................................................................................2-33508 User Watchdog Timeout.................................................................................................2-33509 Control System Timing Error (%d).................................................................................2-34515 PLC Communications Error............................................................................................2-34516 More than %d registration functions enabled.................................................................2-34519 Lost Fieldbus/PLC Connection.......................................................................................2-35520 Fieldbus Mapping Timeout.............................................................................................2-35521 Invalid Virtual Master ID: %d..........................................................................................2-36522 Invalid ELS Master ID: %d..............................................................................................2-36523 IFS status, facility = 0x%x..............................................................................................2-36524 Hardware Watchdog timeout..........................................................................................2-36525 I/O Configuration error, see ext. diag.............................................................................2-36 DOK-VISMOT-VM*-10VRS**-WA01-EN-PIV Table of Contents Rexroth VisualMotion 10 Troubleshooting Guide526 Sercos Multiplex Channel Config, see ext. diag.............................................................2-37527 Control Initialization Error, see ext. diag.........................................................................2-38528 System Event %d Occurred...........................................................................................2-38529 Invalid ELS Group ID: %d...............................................................................................2-38530 CAM %d is active, can't overwrite..................................................................................2-39531 Invalid variable for Fieldbus/PCI Bus Mapping...............................................................2-39532 Power fail brown out condition detected.........................................................................2-39533 Multiple instances of index CAM: %d found...................................................................2-39534 Hardware Version Not Supported..................................................................................2-40539 Invalid Parameter Number..............................................................................................2-40540 Option Card PLS error....................................................................................................2-40541 Link Ring Error, see ext. diag.........................................................................................2-41542 PLC Cyclic Mapping Timeout.........................................................................................2-42543 PCI Bus Runtime Error...................................................................................................2-42544 RECO I/O Failure, see ext. diag.....................................................................................2-42545 Invalid Coordinated Articulation Function ID: %d...........................................................2-43546 Multiple Instance of Coordinated Articulation Function with ID: %d...............................2-43547 Task %c Coordinated Articulation Error, see ext. diag...................................................2-43548 Invalid Kinematic Number: %d.......................................................................................2-43549 Fieldbus Initialization Error.............................................................................................2-43550 User Initialization Task Timeout.....................................................................................2-44551 Master Slip Config. Error, see ext. diag..........................................................................2-44552 Excessive Master Position Slip Deviation......................................................................2-44553 Invalid Parameter Detected, see C-0-2002....................................................................2-44554 Excessive Deviation in PMG%d, see ext. diag...............................................................2-45555 PCI Bus Register Mapping Timeout...............................................................................2-45556 PCI Bus Lifecounter Timeout.........................................................................................2-45557 PMG%d Maximum allowed deviation window is Zero....................................................2-45558 PMG%d Only 1 axis parameterized...............................................................................2-46559 PMG%d Number of offsets does not match number of Axis..........................................2-46560 PMG%d Max. allowed dev. window is larger than 25% of Modulo................................2-46561 PMG%d Offset is larger than Modulo.............................................................................2-46562 PMG%d Parameterized Axis is not in system................................................................2-46563 Invalid Task Specified, Must be A-D..............................................................................2-46564 PMG%d Invalid configuration, see ext. diag...................................................................2-46565 Axis %d: Configuration error, see ext. diag....................................................................2-47566 Filter sample rate and cutoff frequency mismatch.........................................................2-47567 ELS Config. Error, see ext. diag.....................................................................................2-47568 Axis %d: Assigned Task is Not Defined.........................................................................2-48570 ELS Max. Vel. Exceeded, see ext. diag.........................................................................2-48571 No Program Found.........................................................................................................2-49572 PCI Bus reset occurred, cyclic data is invalid.................................................................2-49573 CAM %d is being built....................................................................................................2-49575 ELS Master for ELS Group %d is invalid........................................................................2-49576 Event for input I%d is already armed, cannot arm again...............................................2-50577 Restored non volatile memory from compact flash........................................................2-50DOK-VISMOT-VM*-10VRS**-WA01-EN-PRexroth VisualMotion 10 Troubleshooting Guide Table of Contents V578 Virtual Master %d Exceeded Its Max. Vel., see ext. diag...............................................2-50579 Group %d Exceeded Its Jog Velocity, see ext. diag......................................................2-51580 pROBE Error Occurred in Task:0x%04X.......................................................................2-51581 Probe Function for Axis # is locked by the PLC.............................................................2-51582 Integrated PLC: PLC Stopped in Operation Mode.........................................................2-51583 Integrated PLC: Internal System Error...........................................................................2-51584 ELS System Master %d is invalid, see ext. diag............................................................2-51585 Drive %d separate deceleration not supported..............................................................2-52586 Master Encoder Card Error, see ext diag.......................................................................2-522.6Integrated PLC Status Messages................................................................................................2-536001 Integrated PLC: Running..............................................................................................2-536002 Integrated PLC: Stopped..............................................................................................2-536002 Integrated PLC: Stopped at Breakpoint........................................................................2-532.7Integrated PLC Error Codes........................................................................................................2-530016 Integrated PLC: Software Watchdog Error...................................................................2-530019 Integrated PLC: Program Checksum Error..................................................................2-530020 Integrated PLC: Fieldbus Master Error.........................................................................2-540021 Integrated PLC: I/O Update Error.................................................................................2-542000 Integrated PLC: Internal SIS System Error..................................................................2-542001 Integrated PLC: Internal Acyclic Access Error.............................................................2-542002 Integrated PLC: Internal Acyclic Memory Error............................................................2-542003 Integrated PLC: PLC Configuration Error.....................................................................2-552004 Integrated PLC: File Access Error................................................................................2-552005 Integrated PLC: Internal Fatal Task Error....................................................................2-556011 Integrated PLC: PLC Program Stopped in Operation Mode........................................2-556012 Integrated PLC: General Error.....................................................................................2-552.8Communication Error Codes and Messages...............................................................................2-56!01 Sercos Error Code # xxxx...............................................................................................2-56!02 Invalid Parameter Number..............................................................................................2-57!03 Data is Read Only...........................................................................................................2-57!04 Write Protected in this mode/phase...............................................................................2-57!05 Greater than maximum value.........................................................................................2-57!06 Less than minimum value...............................................................................................2-57!07 Data is Invalid.................................................................................................................2-57!08 Drive was not found........................................................................................................2-57!09 Drive not ready for communication.................................................................................2-57!10 Drive is not responding...................................................................................................2-57!11 Service channel is not open...........................................................................................2-57!12 Invalid Command Class..................................................................................................2-57!13 Checksum Error: xx (xx= checksum that control calculated).........................................2-58!14 Invalid Command Subclass............................................................................................2-58!15 Invalid Parameter Set.....................................................................................................2-58!16 List already in progress..................................................................................................2-58!17 Invalid Sequence Number..............................................................................................2-58!18 List has not started.........................................................................................................2-58!19 List is finished.................................................................................................................2-58 DOK-VISMOT-VM*-10VRS**-WA01-EN-P。
w e e n g i n e e r y o u r p r o g r e s sTable of Contents1 Product Details .....................................................................................................................................................................................2 1.1 Application ............................................................................................................................................................................................. 2 1.2 Recommended Installation .................................................................................................................................................................... 2 2 Function ................................................................................................................................................................................................ 2 2.1 Features ................................................................................................................................................................................................. 23 Technical Data ...................................................................................................................................................................................... 34 Ordering Information ........................................................................................................................................................................... 3 4.1 Type Code ............................................................................................................................................................................................. 3 4.2Versions currently available (3)5 Description of Characterisics in Accordance with Type Code ........................................................................................................ 4 5.1 Characteristic 1: Variant DSU ................................................................................................................................................................ 4 5.2 Characteristic 2: Port / Case: Variant CA - Cartridge ............................................................................................................................. 4 5.3 Characteristic 3: input flow rate .............................................................................................................................................................. 4 5.4 Characteristic 4: Max.permissible pressure ........................................................................................................................................... 4 5.5 Characteristic 5: Activation / Setting ...................................................................................................................................................... 4 5.6 Characteristic 6: Stepped cavity 8.00239 (corresponds to Bucher UVP- 4) ......................................................................................... 4 Das vorgesteuerte Druckbegrenzungsventil ist ein Cartridgebauteil und wird in eine Stufenbohrung entsprechend nebenstehender Zeichnung eingeschraubt. ..................................................................................................................................................................................................... 4 5.7 Characteristic 7: Seal ............................................................................................................................................................................. 4 6 Installation ............................................................................................................................................................................................ 5 6.1 General information ............................................................................................................................................................................... 5 6.2 Connection Recommendations .............................................................................................................................................................. 5 6.3 Installation - installation space ............................................................................................................................................................... 5 7 Notes, Standards and Safety Instructions ......................................................................................................................................... 5 7.1 General Instructions ............................................................................................................................................................................... 5 7.2 Standards ............................................................................................................................................................................................... 58 Zubehör .................................................................................................................................................................................................5w e e n g i n e e r y o u r p r o g r e s s1The pressure valve is designed as cartridge valve. It is a direct operated valve for flow rates up to 10 l / min, which can be adjusted manually. The adjustment can be protected by a cap. The components are designed robust. The valve can be charged up to 500 bar and is delivered at a certain pressure.1.1 ApplicationThe pressure valve is used to protect high volume lift cylinders in truck cranes. It should avoid excessive pressure increase in unmoving cylin-ders due to warming (“sushine valve”).1.2 Recommended Installation2 FunctionThe pressure valve operates as a direct acting seat valve. The pressure can be set using an adjusting screw. The screw is locked after adjustment with a backup sealing nut and can be protected by a cap.2.1 Features▪ Cartridge type▪ Small installation space ▪ Robust construction▪Stepped cavity (corresponds to Bucher UVP-4) ▪Seat valve, leakage freeP – protected port T - tankw e e n g i n e e r y o u r p r o g r e s s3 Technical Data4 4.1 Type CodeXXX – fest vorgegebene Merkmale XXX – vom Kunden wählbare Merkmale4.2 Versions currently availableThe versions listed below are available as standard. Further versions as part of the options given on the type code can be configured upon request.designationtype codepart nr.PRV –DSU –CA -10LPM -500BAR –MAN230BAR –239 -NBR PRV –DSU –CA -10 -500 –MAN230 –239 -N 412.072.451.9 PRV –DSU –CA -10LPM -500BAR –MAN235BAR –239 -NBR PRV –DSU –CA -10 -500 –MAN235 –239 -N 412.072.430.9 PRV –DSU –CA -10LPM -500BAR –MAN290BAR –239 -NBR PRV –DSU –CA -10 -500 –MAN290 –239 -N 412.072.433.9 PRV –DSU –CA -10LPM -500BAR –MAN340BAR –239 -NBR PRV –DSU –CA -10 -500 –MAN340 –239 -N 412.072.431.9 PRV –DSU –CA -10LPM -500BAR –MAN420BAR –239 -NBR PRV –DSU –CA -10 -500 –MAN420 –239 -N 412.072.432.9CriteriaUnit Value Installation position any Weightkg 0,1Surface protectiveZinc coated Maximum input pressure (P) bar 550Adjustable pressurebar 100 - 500 Maximum Tankpressure (T) bar 8 Maximum input flow rate (P) l/min 10Hydraulic fluidMineral oil (HL, HLP) conforming with DIN 51524, other fluids upon re-Hydraulic fluid pressure range °C -25 bis +80 Ambient temperature °C < +50 Viscosity rangemm2/s 2,8 - 500Contamination gradeFiltering conforming with NAS 1638, class 9, with minimum retentionPRVDSUCA10500239N000102030405060700 Product group Pressure relief valves PRV 01 Variant manual adjustable DSU 02 Port / Case Cartridgeventil CA 03 Input flow rate Qmax.10 l/min 1004 Max.permissible pressure Pmax.. 500bar50005 Activation Man ually adjustable 100-500barMAN100 06 Stepped cavity WESSEL-Patrone 8.00239 (stepped cavity) 239 07 Seal NBR, temperatur range -25°C bis +80°CNw e e n g i n e e r y o u r p r o g r e s s5 5.1 Characteristic 1: Variant DSUAdjustable pressure relief valve5.2 Characteristic 2: Port / Case: Variant CA - CartridgeAs variant CA, the valve is delivered as a cartridge valve. The Cavity has to be designed according to characteristic 6 (stepped cavity)5.3 Characteristic 3: input flow rateRecommended maximum flow rate of 10 l/min.5.4 Characteristic 4: Max.permissible pressureMaximum permissible pressure is 500bar (adjustable range100 - 500bar)5.5 Characteristic 5: Activation / SettingThe valve can be adjusted with a set screw. For this purpose, the protective cap must be removed and the counter nut undone.5.6 Characteristic 6: Stepped cavity 8.00239 (corresponds to Bucher UVP- 4)Das vorgesteuerte Druckbegrenzungsventil ist ein Cartridgebauteilund wird in eine Stufenbohrung entsprechend nebenstehender Zeichnung eingeschraubt.5.7 Characteristic 7: SealNBR, temperature range -25°C bis +80°Cw e e n g i n e e r y o u r p r o g r e s s6 Installation6.1 General information▪ Observe all installation and safety information of the construction machine / attachment tools manufacturer. ▪ Only technically permitted changes are to be made on the construction machine. ▪ The user has to ensure that the device is suitable for the respective application. ▪ Application exclusively for the range of application specified by the manufacturer. ▪ Before installation or de-installation, the hydraulic system is to be depressurized. ▪ Settings are to be made by qualified personnel only.▪ Opening is only to be performed with the approval of the manufacturer, otherwise the warranty is invalidated.6.2 Connection RecommendationsNOTE : Enclosed proposed resolution is not always guaranteed. The functionality and the technical details of the construction ma-chine must be checked.5.3 Montage – BauraumObserve connection names.Do not damage seals and flange surface. Its hydraulic system must be ventedEnsure sufficient free space for setting and installation work6.3 Installation - installation space▪ Observe connection names.▪ Do not damage seals and flange surface. ▪ Its hydraulic system must be vented▪ Ensure sufficient free space for setting and installation workCAUTION: Hydraulic hoses must not touch the pressure relief valve, otherwise they are subject to thermal damaging. Tightening torques must be observed. Torque wrench needed.77.1 General Instructions▪The views in drawings are shown in accordance with the European normal projection variant▪ A comma ( , ) is used as a decimal point in drawings ▪All dimensions are given in mm7.2 StandardsThe following standards must be observed when installing and operating the valve:▪ DIN EN ISO 13732-1:2008-12, Temperatures on accessible surfaces8 ZubehörSafety cap: 275.066.000.6。
Remote Revocation of Smart Cards in a Private DRM System∗Keith Frikken Mikhail Atallah Marina BykovaCERIAS and Department of Computer SciencesPurdue University{kbf,mja,mbykova}@AbstractWe describe a DRM smartcard-based scheme in whichcontent access requests are not linked to a user’s iden-tity or smartcard,and in which compromised cardscan be revoked without the need to communicate withany card(whether revoked or not).The scheme hasmany other features,such as efficiency and requiringminimal interaction to process an access request(nocomplex interactive protocols),forward and backwardsecurity,stateless receivers,and under certain crypto-graphic constructions collusion-resistance.The aboveis achieved while requiring the smartcard to store onlya single key and to perform a single modular expo-nentiation per revocation.Furthermore,our solutionintroduces a combinatorial problem that is of inde-pendent interest.Keywords:DRM,revocation scheme,privacy preser-vation.1IntroductionOne of the problems with smartcard-based DRMschemes is that,when a card is compromised andits keys are revealed to an adversary,he could dis-tribute or sell the keys and enable massive unautho-rized access to any digital content that is encryptedwith these keys.Although it is not easy to“crack”a smartcard,it is more likely and inexpensive than iscommonly believed(Anderson&Kuhn1996,Ander-son&Kuhn1997).This is why it is prudent for a con-tent distributor to plan for such occurrences:Whenthe content distributor learns of the compromise ofsuch a card,he must stop using the compromised keysfor the delivery of encrypted content,and switch tousing other,non-compromised keys.We investigatehow this can be achieved when privacy requirementsprevent the content owner from knowing which cardis at the receiving end of the encrypted content he issending,i.e.,when all cards(whether revoked or not)must be treated in the same way and receive the sameencrypted content.We also do not want the contentowner to have to contact any card to effectively carryout a revocation.We present a scheme that achieves these goals,atgeneralization of the scheme to higher dimensions.In section7,we list open problems,andfinally section8 concludes the paper.2Problem DescriptionSuppose n+1users have purchased the right to ac-cess some copyrighted media for a given period of time (e.g.,for a particular month),and were given for that purpose respective smartcards C0,C1,...,C n.Ac-cess is through one or more servers operated by the content-distributors(for this paper we assume there is a single server S,but our schemes could easily be ex-tended to multiple servers).Although a user’s smart-card C i may have been issued to them by the server S,another possibility for the privacy-conscious user is the anonymous purchase of C i(e.g.,at a bookstore using a cash payment).The properties we seek to achieve for our scheme are the following:1.Protected:Only a client with a smartcard shouldbe able to access the data.2.Private:S should not be able to determine whichsmartcard is making an access request.There-fore,when a client requests a message,it should send the server a request for content that gives no clue as to which C i is requesting the content.The purpose of this is to avoid the possibility of tracking and profiling by S of a C i’s content ac-cess patterns;such tracking would have the dan-ger that if even once the C i is associated with an event that is linked to the customer’s real iden-tity(e.g.,access from a particular IP address), the whole access history of that individual be-comes known to the server.The client would normally make the request either through some form of anonymous communication such as us-ing a mix(e.g.,(Chaum1981))or using a public PC at a cyber-cafe,but if the client occasionally makes a request from an IP address that can be traced back to him,then only this particular re-quest is linked to him,not the whole history of requests he previously made using that C i.3.Revocable:S should be able to revoke a set ofclient’s smartcards(remotely“shred”them by rendering them useless).This would occur when S learns that a smartcard has been cracked and the keys in it compromised,but it is crucial that this does not require reissuing of keys for any cards not in the revoked set,or communicating with any card(whether revoked or not).4.Non-interactive:Upon receipt of a request,theserver should send suitably encrypted content such that only non-revoked smartcards can de-crypt it.The client and server do not engage in any protocol(such as a zero-knowledge proof) to determine whether the smartcard is valid or revoked.5.Efficient:The system should be efficient in termsof both communication and computation.6.Forward and backward secure:No newly addedsmartcards can read previous messages,and no users whose keys have been revoked can read fu-ture messages,even with collusion by arbitrarily many other users with revoked keys.3Related WorkOur work is closely related to other work on broadcast encryption.A broadcast encryption scheme(which,in some sources,is also referred to as revocation scheme) allows a distribution center to securely broadcast data to a dynamically changing set of users(so called privi-leged users)over an insecure channel.In other words, the scheme should allow to selectively exclude a sub-set of users from receiving the data by carefully con-structing keys used to encrypt broadcast material. Broadcast encryption was motivated by applications such as pay-TV where users who fail to pay for the service leave the set of privileged users.The idea of broadcasting of a secret wasfirst ex-plored in(Berkovitz1991),and the formal study of broadcast encryption was initiated in(Fiat& Naor1994).In(Fiat&Naor1994),a scheme is given that requires each user to store O(k log k log n)keys and the center to broadcast O(k2log2k log n)mes-sages,where n is the total number of users and k is the maximum number of excluded users(so called revocation threshold).The scheme is based on the idea of constructing a scheme that is1-resilient(i.e., works when a single user is excluded)and applying multi-level hashing to subgroups of users to provide resilience against a larger number of excluded users. Subsequent work of(Blundo&Cresti1994,Blundo, Mattos&Stinson1996,Luby&Staddon1998)and others further explore and provide analysis of broad-cast encryption schemes.Many other broadcast en-cryption schemes based on hierarchies,secret shar-ing,cover-free set systems,etc.have been proposed in the literature.We categorize them based on their intended use and the underlying methods used.Practical schemes for multicast security were first designed in(Wong,Gouda&Lam1998)and (Wallner,Harder&Agee1999).Both(Wong et al. 1998)and(Wallner et al.1999)are tree-based ap-proaches that use key hierarchies and achieve O(log n) keys per user and O(r log n)communication overhead to revoke r users.The work in(Canetti,Garay,Itkis, Micciancio,Naor&Pinkas1999)and(McGrew& Sherman1998)improve(by a constant factor)on the schemes,and another work(Canetti,Malkin& Nissim1999)studies tradeoffs between communica-tion overhead and space requirements of the schemes. All of the work above,however,require stateful re-ceivers(i.e.,keys of all of the users change after a leave/join)and therefore are not appropriate in our setting where clients do not always stay online and the keys of cards not in the revoked set should stay unchanged.Another broadcast encryption scheme based on trees(using layered subset difference)was developed (Halevy&Shamir2002).The scheme is stateless and requires O(log1+ n)keys per user,O(r)mes-sage length,and O(log n)computation per message received.Combinatorial approaches to broadcast encryption include(Kumar,Rajagopalan&Sahai1999)who use error-correcting codes and cover-free set systems to give solutions with O(k log n)keys per user and O(k2),O(k log n),and O(k)message lengths.Their scheme is threshold-based,i.e.,provides k-resilience. Another work(Garay,Staddon&Wool2000)at-tempts to minimize the amount of re-carding needed per epoch by introducing so called long-lived broad-cast encryption for a combinatorial threshold-based scheme.Note that schemes that provide full col-lusion resilience(including our own scheme)do not require re-carding at all.In(Abdalla,Shavitt& Wool2000)the theoretical lower bounds of(Luby& Staddon1998)were lowered by providing a relaxed definition of security.We,however,seek a solution where an adversary has a negligible probability of suc-cess.Another related line of work goes under thename of traitor tracing.Traitor tracing schemes (such as (Chor,Fiat,Naor &Pinkas 2000,Fiat &Tassa 1999,Naor &Pinkas 1998)among many oth-ers)were introduced to help to trace pirate smart-cards or decoders back to the users who produced and distributed those pirate copies to illegal subscribers.An interesting class of schemes combine tracing with revocation capabilities,thus producing new revoca-tion schemes.For instance,(Naor &Pinkas 2000)and later (Kogan,Shavitt &Wool 2003)describe revocation schemes based on secret sharing;their systems are,however,stateful and have a revoca-tion threshold.Another scheme,(Naor,Naor &Lotspiech 2001),gives a tree-based stateless revoca-tion scheme with no upper bound on the number of revocations.In this scheme,the number of keys per user is O (log n )and O (log 2n ),and communi-cation overhead is O (r log nThe server keeps the following state information (C ,R ,H,G,x,K ),where these state variables are ini-tialized to:1.C is the set of all cards and is initialized to C 0,C 1,...,C n .Note that the server typically does not know the identity of the user who has a particular C i (because it may have been pur-chased anonymously at a public store).2.R is the set of all revoked smartcards and is ini-tialized to ∅.3.H and G are commutative one-way functions that are chosen randomly by the server.4.x is a random element in the domain of H and G .5.K is the set of keys that are used to encrypt the messages.This is initialized to the single-element set {H n (G n (x ))}.We now define a shorthand notation for the possible keys in the system:We use K i,j to denote H i (G j (x )).Note that anyone who has key K x 1,y 1can use it to generate key K x 2,y 2iffx 1≤x 2and y 1≤y 2(the “only if”part is a special case of Assumption 1).We say that a tuple (x 1,...,x d )dominates another tuple (y 1,...,y d )iff∀i ∈{1,...,d },x i ≤y i .Smartcard InitializationWhen the server receives a request for digital con-tent M ,it sends back the following information:1.Enc (M,k )where k is a random encryption key generated and used to encrypt M as a result of the request for M .02468101224681012V a l u e (n -x )Client number xClient keys System Key(s)Figure 1:The keys in a system with 11clients (n =10),along with the system key K n,n .2.For each key K i,j∈K ,the server sends(i,j ),Enc (k,K i,j ).Revoking Keys4.Smartcard work after key revocation:The cardmust again do O(n)work(of course,the more re-vocations in the system the less work that needs to be done).The smartcard’s work,however,in this case can also be reduced by applying the same techniques as those used during smartcard initialization.Lemma2At any time in the system,any smartcard in C−R will have exactly one key in K that it can reach.Proof We prove this by induction on the number of revocations.Clearly,when there are no revocations, there is only one key in K and thus the statement holds.Suppose it also holds for f revocations.Now, suppose that another card C i that can reach key K x,y∈K(we know there is exactly one by the in-duction hypothesis)is being revoked.Clearly,any card in the range C n−y,...,C x can reach this key (by system invariant each of these clients must be in C−R),and thus n−y≤i≤x.Now the key K x,y will be split into K i−1,y and K x,n−i−1.Clearly clients C n−y,...,C i−1can only reach thefirst of these keys and clients C i+1,...,C x can reach the second of these keys.2 Theorem2After f revocations,the worst-case number of keys in K is f+1,and the expected number is f−(f2/n)with a variance of(2(n−f)2f2−n(n−f)f)/2n2(n−1).Proof By Lemma2,each key will have at most one key that it can reach,and therefore after each revoca-tion there will only be one key that is modified in the set.Each key that is modified produces at most two keys,which means that the number of keys increases by1,and the worst-case bound of f+1follows.For the average-case claim,the crucial observation is that the expected number of keys is1+(the number of con-tiguous runs of ones in a random sequence containing f ones and n−f zeros).Runs of ones in random binary sequences are a well studied topic in probabil-ity theory,and this theorem’s claims follow without much difficulty from the“theorems on runs”found in (Feller1968).26Extensions6.1GroupingIn the previous scheme,before any revocations take place(i.e.,when K={K n,n}),a smartcard hav-ing key K a,b does not need to re-compute K n,n from K a,b every time it makes an access request from the server:Instead,it computes K n,n only thefirst time, and stores it for subsequent accesses.But if at some point in time a smartcard K i,j is cracked and its key is posted on rogue bulletin boards on the Internet, then the server will revoke it by replacing K n,n with K i−1,n and K n,j−1in K.An access request after such a change in K could cause the requesting smartcard to have to do O(n)commutative hash function com-putations to compute its new access key(which is one of the two new keys in K).This is not efficient for smartcards;thus in this section we introduce a tradeoff,which consists of the server performing more pseudorandom function evaluations and an increased message size it sends to the smartcards in response to an access request.This is done by breaking the smartcards into c groups with at most nc )commutative functioncomputations,but the message size would be O(f+c)and the server would need to perform O(f+c)pseu-dorandom function computations.6.2Offloading smartcard workAs smartcards are weak computational devices,itwould be desirable for the smartcard to be able of-fload its expensive computations to a workstation.This cannot be done by just sending the workstationthe key and having them do the work,as this wouldprovide an attacker with the ability to easily retrievethe key.In this section we introduce a scheme thatallows the smartcard to do a single exponentiationper key update.This technique can only be used ifthe base scheme being used is the RSA-based scheme(i.e.,no collusion protection)or is a family of commu-tative trapdoor functions(rather than being one-wayfunctions).When issuing a smartcard C i,the server,insteadof sending H i(G n−i(x)),creates another function andits inverse(E,D),creates a key E((H i(G n−i(x)))),and also puts D on the smartcard.Now the smartcardcan send E((H i(G n−i(x))))to the workstation alongwith H and G.The workstation can perform the com-putation and send the result back to the smartcard,which can then decrypt it with D to obtain the actualkey.6.3Reducing server’s loadWhen the underlying scheme is RSA(no collusion-resilience),the server’s load at the card creation timecan be reduced to O(1)modular exponentiations persmartcard,resulting in the total of O(n)exponenti-ations.This can be done by utilizing the fact thatthe server knows p and q:For smartcard C i,theserver is to compute H i(G n−i(x))=x h i·g n−i modN.Consequently,the server computes y=h i·g(n−i)mod(p−1)(q−1)and performs one exponen-tiation x y mod N,where x y mod N≡H i(G n−i(x)).6.4Filtering keysAnother way to improve the efficiency of the protocolis to reduce the number of keys in K byfiltering outunnecessary keys.There are two types offiltering:1.Reachability:A key in K can befiltered out ifit is not reachable by any of the smartcards inC−R.In our previous protocol,a key K x,y canbe reached iff:(i)x≥0,(ii)y≥0,and(iii)x+y≥n.This possibly reduces the number ofkeys from the bound in Theorem2,but if thenumber of keys revoked is smaller than n6.5Adding new smartcardsIn this section,we show how with slight changes toour protocol we can allow addition of new smartcardsto the system.Before describing the scheme we notethat in the modified protocol we assume that keyfil-tering based on key reachability is in place.Server InitializationSmartcard C i contains key K i,m−i.Adding a Smartcardm).It is not hard to see that,for a d-dimensional scheme(d≥2)with m initial keys,this worst-case work isO(dm1/(d−1)).Higher dimensions therefore seem to be better interms of cutting down on computation time.How-ever,this advantage would be much less appealing ifa higher d resulted in an uncontrolled growth in thenumber of keys in K as a function of the number ofrevocations f.The revocation of a key in higher di-mensions is done in a natural generalization of thetwo-dimensional case,e.g.,when a three-dimensionalkey K i,j, ∈K is to be revoked,the serverfinds allkeys K x,y,z in K such that(i,j, )dominates(x,y,z)and for each such key it does the following:1.The server deletes each such K x,y,z from K andreplaces it(in K)with keys K i−1,y,z,K x,j−1,z,and K x,y, −1.2.The serverfilters out of K the keys that dom-inate any other key of K,and also those thatare not reachable from any of the non-revokedsmartcards.Filtering eliminates keys on a mas-sive scale(more on this later).We now brieflydiscuss the algorithmics of suchfiltering.(a)Dominance-filtering is easily seen to be acomputation of the minimal(“not domi-nating any other”)vectors in a set of vec-tors,for which very efficient algorithmsare known:Computing the minimal vec-tors among a set ofµd-dimensional vec-tors can be done in a simple recursive man-ner in time O(µ(logµ)d−2+µlogµ)(Kung,Luccio&Preparata1975),and in timeO(µ(logµ)d−3log logµ+µlogµ)using amore complicated technique(Gabow,Bent-ley&Tarjan1984).There are also dynamicdata structuring techniques(Overmars&Leeuwen1981)for maintaining the minimalvectors as insertions and deletions occur.(b)Reachability-filtering can be solved usingdominance range counting data structures,which dynamically maintain a set of pointsso as to efficiently answer queries of thetype“how many points in the data struc-ture dominate the query point”.The d-dimensional points in the data structurecorrespond to the active(not revoked)cardkeys,and a new key K i,j, is tested for reachability by means of a query that counts how many points in the structure dominate K i,j, (if that number is zero then the key is filtered out).If λdenotes the number of points in the data structure,then inser-tions,deletions,and queries can be done in time O (log λd )each,using a variant of the usual O (λ(log λ)d −1)-space range-query data structure (Willard 1985),somewhat faster using more complicated techniques (see (Agarwal 1997)for a survey).In the special case where the original set of client keys is full,i.e.,in d dimensions it consists of all keys K x 1,x 2,...,x d where x iare all non-negative and the di =1x i =n for a fixed value n ,it is possible to deter-mine if a key is reachable in O (d )time.We now present how this can be done for three dimensions,which easily extends to d dimensions.A key K x,y,z is reachable iff(i)x ,y ,and z are non-negative,and (ii)x +y +z ≥n .The proof that this is a nec-essary and sufficient condition will be given in the full version of the paper.We can also prove that K =O (d f );the proof will be given in the full paper.Figure 3gives experimental data on how K changes with f for random revo-cations —note that d f is an over-estimate of K ,especially for larger values of f .A probabilistic anal-ysis similar to the one we did for the case d =2clearly needs to be done,and is left for future work.50100150200250300350020*******80010001200N u m b e r o f k e y s i n KNumber of revoked keysRun 1Run 2Run 3Figure 3:Number of Keys in System in (3-D).6.8HypercubeIt is interesting to see what happens when n =1and the d -dimensional “grid graph”of keys is one where the length n +1of each dimension is 2(because each key’s dimension is now 0or 1).The graph so-defined is then a 2d -node hypercube.Recall that a hypercube of dimension d is a graph that consists of 2d vertices which are uniquely labeled with bitstrings of length d ,where two vertices are connected by an edge ifftheir respective bitstrings differ from each other in exactly one bit position (i.e.,they are equal for d −1bits).A vertex has therefore degree d .In this case of a hypercube,it is not interesting to define the initial set of keys as those for which K i 1,...,i d satisfies i 1+...+i d =n :This is because n =2and there would only be m =d initial keys,which is too small a number to be useful.The number of initial keys would be exponential in d if we defined the initial set of keys to be those for which K i 1,...,i d satisfies i 1+...+i d =d/2:m = dd/2∼2dm ).Thecost of this improvement,in terms of how K changes with f ,is quite acceptable:Figure 4gives experimental data on how K changes with f for random revocations.5010015020025030035040045050001002003004005006007008009001000N u m b e r o f k e y s i n KNumber of revoked keysRun 1Run 2Run 3Figure 4:Number of Keys in System in a Hypercube.7Open ProblemsIn this section we list several open problems as direc-tions for future work.Open Problem 1In the higher dimensional schemes for d dimensions,what is a tight upper bound for the number of keys after f failures?What is the expected number of keys after f failures?Open Problem 2In the hypercube schemes of d di-mensions,what is a tight upper bound for the number of keys after f failures?What is the expected number of keys after f failures?Open Problem 3Is there a way to achieve similar results without requiring the smartcard to perform any modular exponentiations?8ConclusionsIn this work we described a new revocation scheme based on commutative one-way functions that pre-vents owners of revoked smartcards from using the service and at the same time preserves privacy of le-gitimate cardholders.This scheme has the same ex-pressive power as other revocation schemes previously described in the literature:it allows to revoke smart-cards and then later “undo”a revocation,which lets the scheme to represent every possible subset of thesmartcards and be suitable for a wide range of appli-cations.Our scheme works with stateless receivers,i.e.,no interaction between smartcards and the center is re-quired when a smartcard is revoked or,in turn,added to the set of cards who have access to the service.Our scheme is also fully backward and forward secure in the presence of commutative one-way hash functions: no newly added cards can read previous messages, and no revoked cards can obtain access to future mes-sages,even if they collude with any number of other revoked cards.Our base scheme requires each smartcard to store only one key,has O(r)communication overhead where r is the current number of revoked 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