430头文件详解

_BIS_SR()是C语言中的本征函数。

其意思是，通过本征函数就可以直接写该状态寄存器中的数值。

其中在_BIS_SR()中，BI 可以理解为BIT 即“位”的意思，而，“S”可以理解为“SET”，而“SR”就是指的事状态寄存器。

这个函数的功能就是对函数所调用的寄存器中的位进行置“1”。

例如：_BIS_SR(GIE)，就是对SR寄存器中的GIE位进行置1,那么也就是打开总中断。

在_BIC_SR()中，BI 可以理解为BIT 即“位”的意思，而“C”就可以理解为“clear”，也就是“清除”的意思，而“SR”就是指的事状态寄存器。

这个函数的意思就是对函数所调用的寄存器中的位进行“清除”，也就是置“0”。

_BIC_SR(GIE)，就是对SR寄存器中的GIE位进行置0，那么也就是关闭总中断。

下面就是有这两个函数的430的头文件/**************************************************** Intrinsic functions for the MSP430 IAR Systems C/C++ Compiler* provided for backward compatibility with version 1 of the compiler.** Most intrincis functions have been replaced with equivalent* intrinsic functions that follow the current naming convention.* However, there are two exceptions:** 1) The intrinsic functions _BIx_SR and _BIx_SR_IRQ are replaced* with __bix_SR_register and __bix_SR_register_on_exit. The new* intrinsic functions no longer returns the previous value of the* status register. You can access that value by using the* intrinsic function __get_SR_register.** 2) The intrinsic function _BIS_NMI_IE1 has been replaced with the* #pragma directive bis_nmi_ie1. The reason why this no longer is* an intrinsic function is that the effect was always performed,* even if the intrinsic was guarded with, say, an "if"-statement.** Copyright 2002-2003, 2006 IAR Systems. All rights reserved.** $Revision: 4055 $***************************************************/#ifndef __IN430_H#define __IN430_H#ifndef _SYSTEM_BUILD#pragma system_include#endif#include "intrinsics.h"#pragma language=save#pragma language=extended/** Deprecated intrinsic functions.*/#ifdef __cplusplusextern "C"{#endif/* Deprecated, please use "__bis_SR_re。

MSP430单片机介绍一．C简介1．数据类型int，unsigned int，char, float, long, unsigned long了解表示数据范围。

2．运算符：算法的实现，牢记。

3．程序结构：顺序，分支，循环。

4．函数：重要。

C语言程序都是函数构成的，在main函数中可以很清楚的看到整个程序的结构和功能。

其它函数可以放在当前文件也可以放在其他文件中，若在其他的C文件中，需要建立同名的H文件，然在main文件中包含H文件，H文件相当于接口。

函数是由语句和参数构成的，理解局部变量全局变量，形参实参概念。

举例说明。

5．宏定义：#define PI 3.14#define S（r）PI*(r)*（r）宏调用：int r；Int area;Area= S（r）;6.头文件：两个同名的h文件和c文件，c文件中定义函数，h文件为接口。

7条件编译：控制汇编过程。

是否对以下代码就行汇编？？#ifdef ……..如果条件满足则对以下程序段进行汇编程序段#endif总结：C语言结构清晰，很容易理解程序的编程思路，特别适用于程序较大，使用函数多的情况。

特别注意头文件，一般要包含器件的h 文件，例如#include <msp430x16x.h>，其中主要提供寄存器的声明，另外输入输出，算术运算头文件也可能用到，当然也可以自己编写头文件和对应的c文件。

二．430介绍重点：时钟；I/O；定时器其次：键盘显示；AD; DA其他内容自己了解。

概述：430和51相比外围模块更丰富，功能更强大，学习起来更麻烦，但方法仍然是查看特殊功能寄存器说明，同时要结合例程来理解，因为我们不学汇编语言，所以一定要掌握在c语言中正确设置寄存器。

430的资料大多是C语言的，较好的网络资源：利尔达论坛，微控论坛，可以再TI官网上下载例程。

1．C语言软件延时程序。

用汇编语言可以很精确的计算出软件延时时间，因为每条指令的指令周期是已知的。

msp430头文件解释说明//1MSP430F149祥解对头文件做了比较详细的注释，记不清寄存器的人可以看看#ifndef __msp430x14x#define __msp430x14x/********************************************************** *** STANDARD BITS*********************************************************** */#define BIT0 0x0001#define BIT1 0x0002#define BIT2 0x0004#define BIT3 0x0008#define BIT4 0x0010#define BIT5 0x0020#define BIT6 0x0040#define BIT7 0x0080#define BIT8 0x0100#define BIT9 0x0200#define BITA 0x0400#define BITB 0x0800#define BITC 0x1000#define BITD 0x2000#define BITE 0x4000#define BITF 0x8000/********************************************************** *** STATUS REGISTER BITS*********************************************************** */#define C 0x0001#define Z 0x0002#define N 0x0004#define V 0x0100#define GIE 0x0008#define CPUOFF 0x0010#define OSCOFF 0x0020#define SCG0 0x0040#define SCG1 0x0080/* Low Power Modes coded with Bits 4-7 in SR */#ifndef __IAR_SYSTEMS_ICC /* Begin #defines for assembler */#define LPM0 CPUOFF#define LPM1 SCG0+CPUOFF#define LPM2 SCG1+CPUOFF#define LPM3 SCG1+SCG0+CPUOFF#define LPM4 SCG1+SCG0+OSCOFF+CPUOFF/* End #defines for assembler */#else /* Begin #defines for C */#define LPM0_bits CPUOFF#define LPM1_bits SCG0+CPUOFF#define LPM2_bits SCG1+CPUOFF#define LPM3_bits SCG1+SCG0+CPUOFF#define LPM4_bits SCG1+SCG0+OSCOFF+CPUOFF#include <In430.h>#define LPM0 _BIS_SR(LPM0_bits) /* Enter Low Power Mode 0 */#define LPM0_EXIT _BIC_SR(LPM0_bits) /* Exit Low Power Mode 0 */#define LPM1 _BIS_SR(LPM1_bits) /* Enter Low Power Mode 1 */#define LPM1_EXIT _BIC_SR(LPM1_bits) /* Exit Low Power Mode 1 */#define LPM2 _BIS_SR(LPM2_bits) /* Enter Low Power Mode 2 */#define LPM2_EXIT _BIC_SR(LPM2_bits) /* Exit Low Power Mode 2 */#define LPM3 _BIS_SR(LPM3_bits) /* Enter Low Power Mode 3 */#define LPM3_EXIT _BIC_SR(LPM3_bits) /* Exit Low Power Mode 3 */#define LPM4 _BIS_SR(LPM4_bits) /* Enter Low Power Mode 4 */#define LPM4_EXIT _BIC_SR(LPM4_bits) /* Exit Low Power Mode 4 */#endif /* End #defines for C *//********************************************************** *** PERIPHERAL FILE MAP*********************************************************** *//********************************************************** *** 特殊功能寄存器地址和控制位*********************************************************** *//*中断使能1*/#define IE1_ 0x0000sfrb IE1 = IE1_;#define WDTIE 0x01 /*看门狗中断使能*/#define OFIE 0x02 /*外部晶振故障中断使能*/#define NMIIE 0x10 /*非屏蔽中断使能*/#define ACCVIE 0x20 /*可屏蔽中断使能/flash 写中断错误*/#define URXIE0 0x40 /*串口0接收中断使能*/#define UTXIE0 0x80 /*串口0发送中断使能*//*中断标志1*/#define IFG1_ 0x0002sfrb IFG1 = IFG1_;#define WDTIFG 0x01 /*看门狗中断标志*/#define OFIFG 0x02 /*外部晶振故障中断标志*/ #define NMIIFG 0x10 /*非屏蔽中断标志*/#define URXIFG0 0x40 /*串口0接收中断标志*/#define UTXIFG0 0x80 /*串口0发送中断标志*//* 中断模式使能1 */#define ME1_ 0x0004sfrb ME1 = ME1_;#define URXE0 0x40 /* 串口0接收中断模式使能 */#define USPIE0 0x40 /* 同步中断模式使能*/#define UTXE0 0x80 /* 串口0发送中断模式使能 *//* 中断使能2 */#define IE2_ 0x0001sfrb IE2 = IE2_;#define URXIE1 0x10 /* 串口1接收中断使能*/#define UTXIE1 0x20 /* 串口1发送中断使能*//* 中断标志2 */#define IFG2_ 0x0003sfrb IFG2 = IFG2_;#define URXIFG1 0x10 /* 串口1接收中断标志*/#define UTXIFG1 0x20 /* 串口1发送中断标志*//* 中断模式使能2 */#define ME2_ 0x0005sfrb ME2 = ME2_;#define URXE1 0x10 /* 串口1接收中断模式使能 */#define USPIE1 0x10 /* 同步中断模式使能*/#define UTXE1 0x20 /* 串口1发送中断模式使能 *//********************************************************** *** 看门狗定时器的寄存器定义*********************************************************** */#define WDTCTL_ 0x0120sfrw WDTCTL = WDTCTL_;#define WDTIS0 0x0001 /*选择WDTCNT的四个输出端之一*/#define WDTIS1 0x0002 /*选择WDTCNT的四个输出端之一*/#define WDTSSEL 0x0004 /*选择WDTCNT的时钟源*/#define WDTCNTCL 0x0008 /*清除WDTCNT端: 为1时从0开始计数*/#define WDTTMSEL 0x0010 /*选择模式 0: 看门狗模式; 1: 定时器模式*/#define WDTNMI 0x0020 /*选择NMI/RST 引脚功能 0:为 RST; 1:为NMI*/#define WDTNMIES 0x0040 /*WDTNMI=1时.选择触发延 0:为上升延 1:为下降延*/#define WDTHOLD 0x0080 /*停止看门狗定时器工作 0:启动;1:停止*/#define WDTPW 0x5A00 /* 写密码:高八位*//* SMCLK= 1MHz定时器模式 */#define WDT_MDLY_32 WDTPW+WDTTMSEL+WDTCNTCL /* TSMCLK*2POWER15=32ms 复位状态 */#define WDT_MDLY_8 WDTPW+WDTTMSEL+WDTCNTCL+WDTIS0 /* TSMCLK*2POWER13=8.192ms " */#define WDT_MDLY_0_5 WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1 /* TSMCLK*2POWER9=0.512ms " */#define WDT_MDLY_0_064WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1+WDTIS0 /*TSMCLK*2POWER6=0.512ms " *//* ACLK=32.768KHz 定时器模式*/#define WDT_ADLY_1000 WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL /* TACLK*2POWER15=1000ms " */#define WDT_ADLY_250WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS0 /*TACLK*2POWER13=250ms " */#define WDT_ADLY_16WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1 /*TACLK*2POWER9=16ms " */#define WDT_ADLY_1_9WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0 /*TACLK*2POWER6=1.9ms " *//* SMCLK=1MHz看门狗模式 */#define WDT_MRST_32 WDTPW+WDTCNTCL /* TSMCLK*2POWER15=32ms 复位状态 */#define WDT_MRST_8 WDTPW+WDTCNTCL+WDTIS0 /* TSMCLK*2POWER13=8.192ms " */#define WDT_MRST_0_5 WDTPW+WDTCNTCL+WDTIS1 /* TSMCLK*2POWER9=0.512ms " */#define WDT_MRST_0_064 WDTPW+WDTCNTCL+WDTIS1+WDTIS0 /* TSMCLK*2POWER6=0.512ms " *//* ACLK=32KHz看门狗模式 */#define WDT_ARST_1000 WDTPW+WDTCNTCL+WDTSSEL /* TACLK*2POWER15=1000ms " */#define WDT_ARST_250 WDTPW+WDTCNTCL+WDTSSEL+WDTIS0 /* TACLK*2POWER13=250ms " */#define WDT_ARST_16 WDTPW+WDTCNTCL+WDTSSEL+WDTIS1 /* TACLK*2POWER9=16ms " */#define WDT_ARST_1_9WDTPW+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0 /*TACLK*2POWER6=1.9ms " *//************************************************************硬件乘法器的寄存器定义************************************************************/#define MPY_ 0x0130 /* 无符号乘法 */sfrw MPY = MPY_;#define MPYS_ 0x0132 /* 有符号乘法*/sfrw MPYS = MPYS_;#define MAC_ 0x0134 /* 无符号乘加 */sfrw MAC = MAC_;#define MACS_ 0x0136 /* 有符号乘加 */sfrw MACS = MACS_;#define OP2_ 0x0138 /* 第二乘数 */sfrw OP2 = OP2_;#define RESLO_ 0x013A /* 低6位结果寄存器 */sfrw RESLO = RESLO_;#define RESHI_ 0x013C /* 高6位结果寄存器 */sfrw RESHI = RESHI_;#define SUMEXT_ 0x013E /*结果扩展寄存器 */const sfrw SUMEXT = SUMEXT_;/********************************************************** *** DIGITAL I/O Port1/2 寄存器定义有中断功能*********************************************************** */#define P1IN_ 0x0020 /* P1 输入寄存器 */const sfrb P1IN = P1IN_;#define P1OUT_ 0x0021 /* P1 输出寄存器 */sfrb P1OUT = P1OUT_;#define P1DIR_ 0x0022 /* P1 方向选择寄存器 */sfrb P1DIR = P1DIR_;#define P1IFG_ 0x0023 /* P1 中断标志寄存器*/sfrb P1IFG = P1IFG_;#define P1IES_ 0x0024 /* P1 中断边沿选择寄存器*/sfrb P1IES = P1IES_;#define P1IE_ 0x0025 /* P1 中断使能寄存器 */sfrb P1IE = P1IE_;#define P1SEL_ 0x0026 /* P1 功能选择寄存器*/ sfrb P1SEL = P1SEL_;#define P2IN_ 0x0028 /* P2 输入寄存器 */const sfrb P2IN = P2IN_;#define P2OUT_ 0x0029 /* P2 输出寄存器 */sfrb P2OUT = P2OUT_;#define P2DIR_ 0x002A /* P2 方向选择寄存器 */sfrb P2DIR = P2DIR_;#define P2IFG_ 0x002B /* P2 中断标志寄存器 */sfrb P2IFG = P2IFG_;#define P2IES_ 0x002C /* P2 中断边沿选择寄存器*/sfrb P2IES = P2IES_;#define P2IE_ 0x002D /* P2 中断使能寄存器 */sfrb P2IE = P2IE_;#define P2SEL_ 0x002E /* P2 功能选择寄存器 */ sfrb P2SEL = P2SEL_;/********************************************************** *** DIGITAL I/O Port3/4寄存器定义无中断功能*********************************************************** */#define P3IN_ 0x0018 /* P3 输入寄存器 */const sfrb P3IN = P3IN_;#define P3OUT_ 0x0019 /* P3 输出寄存器 */sfrb P3OUT = P3OUT_;#define P3DIR_ 0x001A /* P3 方向选择寄存器 */sfrb P3DIR = P3DIR_;#define P3SEL_ 0x001B /* P3 功能选择寄存器*/ sfrb P3SEL = P3SEL_;#define P4IN_ 0x001C /* P4 输入寄存器 */const sfrb P4IN = P4IN_;#define P4OUT_ 0x001D /* P4 输出寄存器 */sfrb P4OUT = P4OUT_;#define P4DIR_ 0x001E /* P4 方向选择寄存器 */sfrb P4DIR = P4DIR_;#define P4SEL_ 0x001F /* P4 功能选择寄存器 */ sfrb P4SEL = P4SEL_;/********************************************************** *** DIGITAL I/O Port5/6 I/O口寄存器定义PORT5和6 无中断功能*********************************************************** */#define P5IN_ 0x0030 /* P5 输入寄存器 */const sfrb P5IN = P5IN_;#define P5OUT_ 0x0031 /* P5 输出寄存器*/sfrb P5OUT = P5OUT_;#define P5DIR_ 0x0032 /* P5 方向选择寄存器*/sfrb P5DIR = P5DIR_;#define P5SEL_ 0x0033 /* P5 功能选择寄存器*/ sfrb P5SEL = P5SEL_;#define P6IN_ 0x0034 /* P6 输入寄存器 */const sfrb P6IN = P6IN_;#define P6OUT_ 0x0035 /* P6 输出寄存器*/sfrb P6OUT = P6OUT_;#define P6DIR_ 0x0036 /* P6 方向选择寄存器*/sfrb P6DIR = P6DIR_;#define P6SEL_ 0x0037 /* P6 功能选择寄存器*/ sfrb P6SEL = P6SEL_;//2/********************************************************** *** USART 串口寄存器"UCTL","UTCTL","URCTL"定义的各个位可串口1 串口2公用*********************************************************** *//* UCTL 串口控制寄存器*/#define PENA 0x80 /*校验允许位*/#define PEV 0x40 /*偶校验为0时为奇校验*/#define SPB 0x20 /*停止位为2 为0时停止位为1*/#define CHAR 0x10 /*数据位为8位为0时数据位为7位*/#define LISTEN 0x08 /*自环模式(发数据同时在把发的数据接收回来)*/#define SYNC 0x04 /*同步模式为0异步模式*/#define MM 0x02 /*为1时地址位多机协议(异步) 主机模式(同步);为0时线路空闲多机协议(异步) 从机模式(同步)*/#define SWRST 0x01 /*控制位*//* UTCTL 串口发送控制寄存器*/#define CKPH 0x80 /*时钟相位控制位(只同步方式用)为1时时钟UCLK延时半个周期*/#define CKPL 0x40 /*时钟极性控制位为1时异步与UCLK相反;同步下降延有效*/#define SSEL1 0x20 /*时钟源选择位:与SSEL0组合为0,1,2,3四种方式*/#define SSEL0 0x10 /*"0"选择外部时钟,"1"选择辅助时钟,"2","3"选择系统子时钟 */#define URXSE 0x08 /*接收触发延控制位(只在异步方式下用)*/#define TXWAKE 0x04 /*多处理器通信传送控制位(只在异步方式下用)*/#define STC 0x02 /*外部引脚STE选择位为0时为4线模式为1时为3线模式*/#define TXEPT 0x01 /*发送器空标志*//* URCTL 串口接收控制寄存器同步模式下只用两位:FE和OE*/#define FE 0x80 /*帧错标志*/ #define PE 0x40 /*校验错标志位*/#define OE 0x20 /*溢出标志位*/#define BRK 0x10 /*打断检测位*/#define URXEIE 0x08 /*接收出错中断允许位*/#define URXWIE 0x04 /*接收唤醒中断允许位*/#define RXWAKE 0x02 /*接收唤醒检测位*/ #define RXERR 0x01 /*接收错误标志位*//********************************************************** *** USART 0 串口0寄存器定义*********************************************************** */#define U0CTL_ 0x0070 /* 串口0基本控制寄存器*/sfrb U0CTL = U0CTL_;#define U0TCTL_ 0x0071 /* 串口0发送控制寄存器 */sfrb U0TCTL = U0TCTL_;#define U0RCTL_ 0x0072 /* 串口0接收控制寄存器 */sfrb U0RCTL = U0RCTL_;#define U0MCTL_ 0x0073 /* 波特率调整寄存器 */sfrb U0MCTL = U0MCTL_;#define U0BR0_ 0x0074 /* 波特率选择寄存器0 */sfrb U0BR0 = U0BR0_;#define U0BR1_ 0x0075 /* 波特率选择寄存器1 */sfrb U0BR1 = U0BR1_;#define U0RXBUF_ 0x0076 /* 接收缓存寄存器 */const sfrb U0RXBUF = U0RXBUF_;#define U0TXBUF_ 0x0077 /* 发送缓存寄存器 */sfrb U0TXBUF = U0TXBUF_;/* 改变的寄存器名定义 */#define UCTL0_ 0x0070 /* UART 0 Control */sfrb UCTL0 = UCTL0_;#define UTCTL0_ 0x0071 /* UART 0 Transmit Control */sfrb UTCTL0 = UTCTL0_;#define URCTL0_ 0x0072 /* UART 0 Receive Control */sfrb URCTL0 = URCTL0_;#define UMCTL0_ 0x0073 /* UART 0 Modulation Control */sfrb UMCTL0 = UMCTL0_;#define UBR00_ 0x0074 /* UART 0 Baud Rate 0 */ sfrb UBR00 = UBR00_;#define UBR10_ 0x0075 /* UART 0 Baud Rate 1 */sfrb UBR10 = UBR10_;#define RXBUF0_ 0x0076 /* UART 0 Receive Buffer */const sfrb RXBUF0 = RXBUF0_;#define TXBUF0_ 0x0077 /* UART 0 Transmit Buffer */ sfrb TXBUF0 = TXBUF0_;#define UCTL_0_ 0x0070 /* UART 0 Control */sfrb UCTL_0 = UCTL_0_;#define UTCTL_0_ 0x0071 /* UART 0 Transmit Control */sfrb UTCTL_0 = UTCTL_0_;#define URCTL_0_ 0x0072 /* UART 0 Receive Control */sfrb URCTL_0 = URCTL_0_;#define UMCTL_0_ 0x0073 /* UART 0 Modulation Control */sfrb UMCTL_0 = UMCTL_0_;#define UBR0_0_ 0x0074 /* UART 0 Baud Rate 0 */sfrb UBR0_0 = UBR0_0_;#define UBR1_0_ 0x0075 /* UART 0 Baud Rate 1 */sfrb UBR1_0 = UBR1_0_;#define RXBUF_0_ 0x0076 /* UART 0 Receive Buffer */ const sfrb RXBUF_0 = RXBUF_0_;#define TXBUF_0_ 0x0077 /* UART 0 Transmit Buffer */sfrb TXBUF_0 = TXBUF_0_;/********************************************************** *** USART 1 串口1寄存器定义*********************************************************** */#define U1CTL_ 0x0078 /* 串口1基本控制寄存器*/sfrb U1CTL = U1CTL_;#define U1TCTL_ 0x0079 /* 串口1发送控制寄存器 */sfrb U1TCTL = U1TCTL_;#define U1RCTL_ 0x007A /* 串口1接收控制寄存器 */sfrb U1RCTL = U1RCTL_;#define U1MCTL_ 0x007B /* 波特率调整控制寄存器 */sfrb U1MCTL = U1MCTL_;#define U1BR0_ 0x007C /* 波特率选择寄存器0 */sfrb U1BR0 = U1BR0_;#define U1BR1_ 0x007D /* 波特率选择寄存器1 */sfrb U1BR1 = U1BR1_;#define U1RXBUF_ 0x007E /* 接收缓存 */const sfrb U1RXBUF = U1RXBUF_;#define U1TXBUF_ 0x007F /* 发送缓存 */ sfrb U1TXBUF = U1TXBUF_;/* 改变的寄存器名定义 */#define UCTL1_ 0x0078 /* UART 1 C。

MPS430头文件摘要及注释一．ADC121..定义采样保持时间(ADC12CTL0)#define SHT0_0 (0*0x100u) //定义ADC12MEM0——ADC12MEM7采样#define SHT0_1 (1*0x100u) //保持时间为ADCCLK的多少个周期 eg：#define SHT0_2 (2*0x100u) //SHT0_0 代表采样保持时间为4个ADCCLK#define SHT0_3 (3*0x100u) //周期同理 SHT0_1为8个周期#define SHT0_4 (4*0x100u)#define SHT0_5 (5*0x100u)#define SHT0_6 (6*0x100u)#define SHT0_7 (7*0x100u)#define SHT0_8 (8*0x100u)#define SHT0_9 (9*0x100u)#define SHT0_10 (10*0x100u)#define SHT0_11 (11*0x100u)#define SHT0_12 (12*0x100u)#define SHT0_13 (13*0x100u)#define SHT0_14 (14*0x100u)#define SHT0_15 (15*0x100u)#define SHT1_0 (0*0x1000u) //定义ADC12MEM8——ADC12MEM15采样#define SHT1_1 (1*0x1000u) //保持时间为ADCCLK的多少个周期#define SHT1_2 (2*0x1000u) //使用方法同SHT0_x#define SHT1_3 (3*0x1000u)#define SHT1_4 (4*0x1000u)#define SHT1_5 (5*0x1000u)#define SHT1_6 (6*0x1000u)#define SHT1_7 (7*0x1000u)#define SHT1_8 (8*0x1000u)#define SHT1_9 (9*0x1000u)#define SHT1_10 (10*0x1000u)#define SHT1_11 (11*0x1000u)#define SHT1_12 (12*0x1000u)#define SHT1_13 (13*0x1000u)#define SHT1_14 (14*0x1000u)#define SHT1_15 (15*0x1000u)2.转换模式选择(ADC12CTL1)#define CONSEQ_0 (0*2u) //单通道单次转换#define CONSEQ_1 (1*2u) //多通道单次转换#define CONSEQ_2 (2*2u) //单通道多次转换#define CONSEQ_3 (3*2u) //多通道多次转换3..ADC12内核时钟源选择(ADC12CTL1)#define ADC12SSEL_0 (0*8u) //ADC内部时钟源 ADC12OSC #define ADC12SSEL_1 (1*8u) //ACLK#define ADC12SSEL_2 (2*8u) //MCLK#define ADC12SSEL_3 (3*8u) //SMCLK4.ADC时钟分频选择(ADC12CTL1)//分频数=三位二进制数加#define ADC12DIV_0 (0*0x20u) //1分频即不分频#define ADC12DIV_1 (1*0x20u) //2分频#define ADC12DIV_2 (2*0x20u)#define ADC12DIV_3 (3*0x20u)#define ADC12DIV_4 (4*0x20u)#define ADC12DIV_5 (5*0x20u)#define ADC12DIV_6 (6*0x20u)#define ADC12DIV_7 (7*0x20u) //8分频5..采样触发输入源选择(ADC12CTL1)#define SHS_0 (0*0x400u) //ADC12SC 位#define SHS_1 (1*0x400u) //TimerA_OUT1#define SHS_2 (2*0x400u) //TImerB_OUT0#define SHS_3 (3*0x400u) //TimerB_OUT16.转换结果数据存储寄存器选择(ADC12CTL1)#define CSTARTADD_0 (0*0x1000u) //结果存在ADC12MEM0 #define CSTARTADD_1 (1*0x1000u)#define CSTARTADD_2 (2*0x1000u)#define CSTARTADD_3 (3*0x1000u)#define CSTARTADD_4 (4*0x1000u)#define CSTARTADD_5 (5*0x1000u)#define CSTARTADD_6 (6*0x1000u)#define CSTARTADD_7 (7*0x1000u)#define CSTARTADD_8 (8*0x1000u)#define CSTARTADD_9 (9*0x1000u)#define CSTARTADD_10 (10*0x1000u)#define CSTARTADD_11 (11*0x1000u)#define CSTARTADD_12 (12*0x1000u)#define CSTARTADD_13 (13*0x1000u)#define CSTARTADD_14 (14*0x1000u)#define CSTARTADD_15 (15*0x1000u)注：在单通道单次转换情况下，转换结果存储寄存器的选择与ADC转换通道选择并没有必然联系，即从不同转换通道进入的数据经转换后，其结果在不引起错误的前提下，可存入任一个转换结果存储寄存器。

#include "msp430x14x.h"#define uint unsigned int#define uchar unsigned char//POW_UP通过配置子写入#define CSN BIT0 //每次SPI前一个下降沿，SPI后上升沿#define MOSI BIT1#define MISO BIT2#define SCK BIT3#define CE BIT4#define IRQ BIT5//SPI 命令命令字#define R_REGISTER 0x00 //0x00 + Register address#define W_REGISTER 0x20 //0x20 + Register address#define R_RX_PAYLOAD 0x61#define W_TX_PAYLOAD 0xA0#define FLUSH_TX 0xE1#define FLUSH_RX 0xE2#define REUSE_TX_PL 0xE3#define NOP 0xFF//寄存器定义// 名称地址#define CONFIG 0x00 //0x1e:TX_DS IRQ、EN CRC、PWR_UP、TX#define EN_AA 0x01 //0x00:禁止自动应答#define EN_RXADDR 0x02 //0X01:使能接收通道0#define SETUP_AW 0x03 //0X03:默认5字节的地址宽度#define SETUP_RETR 0x04 //0X00: 禁止自动重发#define RF_CH 0x05 //0X00: Sets the frequency channel nRF24L01 operates on #define RF_SETUP 0x06 //0X06:1M、0dBm、no LNA#define STATUS 0x07 //read and中断服务程序后清标志#define OBSERVE_TX 0x08 //read only#define CD 0x09 //用在Enhanced ShockBurst#define RX_ADDR_P0 0x0A //接收通道0的地址(低字节先写)#define RX_ADDR_P1 0x0B //0x00:不使用#define RX_ADDR_P2 0x0C //0x00:不使用#define RX_ADDR_P3 0x0D //0x00:不使用#define RX_ADDR_P4 0x0E //0x00:不使用#define RX_ADDR_P5 0x0F //0x00:不使用#define TX_ADDR 0x10 //0XE7E7E7E7E7:默认发送通道的地址5字节#define RX_PW_P0 0x11 //0X03:接收通道0的数据宽度为3字节#define RX_PW_P1 0x12 //0X00:该接收通道不使用#define RX_PW_P2 0x13 //0X00:该接收通道不使用#define RX_PW_P3 0x14 //0X00:该接收通道不使用#define RX_PW_P4 0x15 //0X00:该接收通道不使用#define RX_PW_P5 0x16 //0X00:该接收通道不使用#define FIFO_STATUS 0x17//read onlyuchar Tx_Address[5]={0x09,0x87,0x65,0x43,0x21};//设置发送端的地址uchar Rx_Address[5]={0x09,0x87,0x65,0x43,0x21};//设置发送端的地址uchar Tx_date=0; //要发送的数据变量uchar Rx_date=0; //收到的数据uchar read_date[5]={0};//度寄存器数据变量/**********以下为函数声明**********************/void clk_sys_init(); //MCLK = SMCLK = 4Mvoid io_nrf_init(); //无线端口初始化（P2）void wr_spi_byte(uchar date);uchar rd_spi_byte(); //从寄存器读取一字节void wr_spi(uchar command_address,uchar config_date);void tx_nrf_init(); //初始化发射配置字void rx_nrf_init(); //初始化接收配置字void Set_Tx_Address(); //设置发送端的地址void Set_Rx_Address(); //设置接收端地址void tx_payload(); //将要发送的数据写入FIFOvoid CE_pulse(); //CE 不低于10us 的上升沿，触发数据发送void CE_up(); //CE 高电平，接收模式void Reset_Tx_DS(); //清除发射中断标志位void Reset_Rx_DS(); //清除接收中断标志位void rd_fifo(); //读FIFOvoid Flush_TX_FIFO(); // 清空发射FIFOvoid flush_RX_FIFO(); //清空接收FIFOvoid read_register(uchar register_adds); //读寄存器的内容void delay_us(); //进入函数需8条指令的时间，2 usvoid delay_1_5ms(); //1.5msvoid delay(uint time);//短延时void delay_130us(); //需要520 * （1/4M）=130us/****************************系统时钟初始化函数************************/ void clk_sys_init(){uint i;BCSCTL1 &= ~XT2OFF;do{IFG1 &=~OFIFG;for(i=0;i<0xff;i++);}while(!(IFG1 & OFIFG));BCSCTL2 |= SELM_2+DIVM_1 + SELS; //MCLK = SMCLK = 4M}/************************I/o口初始化函数************************/void io_nrf_init(){P2DIR |= CSN + MOSI + SCK + CE; //SOMI , IRQ INPUT端口默认为输入P2OUT=0;P2OUT |= CSN;P1DIR |= BIT4;}/***********************写SPI函数*************************/void wr_spi(uchar command_address,uchar config_date){P2OUT |=CSN;P2OUT &=~CSN;wr_spi_byte(command_address);wr_spi_byte(config_date);P2OUT |= CSN;}/************************无线模块发射模式函数*************************/ void tx_nrf_init(){wr_spi(W_REGISTER + CONFIG,0x0e); //TX_DS IRQ允许wr_spi(W_REGISTER + EN_AA,0x00); //禁止自动应答wr_spi(W_REGISTER + EN_RXADDR,0x01);//使能接收通道0wr_spi(W_REGISTER + SETUP_AW,0x03);//地址宽度5字节wr_spi(W_REGISTER + SETUP_RETR,0x00);//禁止自动重发wr_spi(W_REGISTER + RF_CH,0x00); //无线发射频率设定wr_spi(W_REGISTER + RF_SETUP,0x06); //发射功率设定wr_spi(W_REGISTER + RX_PW_P0,0x01); //一字节有效数据//wr_spi(W_REGISTER + RX_PW_P1,0x00);//wr_spi(W_REGISTER + RX_PW_P2,0x00);// wr_spi(W_REGISTER + RX_PW_P3,0x00);//wr_spi(W_REGISTER + RX_PW_P4,0x00);//wr_spi(W_REGISTER + RX_PW_P5,0x00);}/************************无线模块接收模式函数*************************/ void rx_nrf_init(){wr_spi(W_REGISTER + CONFIG,0x3F); //只允许rx_dr 中断wr_spi(W_REGISTER + EN_AA,0x00); //禁止自动应答wr_spi(W_REGISTER + EN_RXADDR,0x01);//使能接收通道0wr_spi(W_REGISTER + SETUP_AW,0x03);//地址宽度5字节wr_spi(W_REGISTER + SETUP_RETR,0x00); //禁止自动重发wr_spi(W_REGISTER + RF_CH,0x00); //无线发射频率设定wr_spi(W_REGISTER + RF_SETUP,0x06); //发射功率设定wr_spi(W_REGISTER + RX_PW_P0,0x01); //一字节有效数据//wr_spi(W_REGISTER + RX_PW_P1,0x00); //写不写无所谓，通道没允许//wr_spi(W_REGISTER + RX_PW_P2,0x00);//wr_spi(W_REGISTER + RX_PW_P3,0x00);//wr_spi(W_REGISTER + RX_PW_P4,0x00);//wr_spi(W_REGISTER + RX_PW_P5,0x00);}/*********************地址设置函数************************/void Set_Tx_Address() //设置发送端的地址{uchar i=0;P2OUT |= CSN;P2OUT &=~ CSN;_NOP();wr_spi_byte(W_REGISTER + TX_ADDR);for(i=0;i<5;i++){wr_spi_byte(Tx_Address[i]);}P2OUT |= CSN;}void Set_Rx_Address() //设置发送端的地址{uchar i=0;P2OUT |= CSN;P2OUT &=~ CSN;_NOP();wr_spi_byte(W_REGISTER + RX_ADDR_P0);for(i=0;i<5;i++){wr_spi_byte(Rx_Address[i]);}P2OUT |= CSN;}/**********************装在待发射数据函数**************************/ void tx_payload() //将要发送的数据写入FIFO{P2OUT |= CSN;P2OUT &=~ CSN;_NOP();wr_spi_byte(W_TX_PAYLOAD);wr_spi_byte(Tx_date);P2OUT |= CSN;}/*************************启动发射函数***********************/ void CE_pulse() //CE 不低于10us 的上升沿，触发数据发送{delay(800);P2OUT |= CE;delay(800);P2OUT &=~ CE;}/*************************启动接收函数***********************/ void CE_up() //CE 高电平，接收模式{delay(800);P2OUT |= CE;}/************************清除发射中断标志位函数*****************/ void Reset_Tx_DS(){wr_spi(W_REGISTER + STATUS,0x2e);}/************************清除接收中断标志位函数*****************/ void Reset_Rx_DS(){wr_spi(W_REGISTER + STATUS,0x4e);}/***********************清空发射缓存函数************************/ void Flush_TX_FIFO() // 清空FIFO{P2OUT |= CSN;P2OUT &=~ CSN;wr_spi_byte(FLUSH_TX);P2OUT |= CSN;}/************************清空接收缓存函数************************/ void flush_RX_FIFO(){P2OUT |= CSN;P2OUT &=~ CSN;wr_spi_byte(FLUSH_RX);P2OUT |= CSN;}/**********************读取接收数据函数*************************/ void rd_fifo() //读FIFO{P2OUT |= CSN;P2OUT &=~ CSN;wr_spi_byte(R_RX_PAYLOAD);Rx_date=rd_spi_byte();P2OUT |= CSN;}/***********************SPI写字节函数*****************************/ void wr_spi_byte(uchar date){uchar bit;P2OUT &=~ SCK; //时钟低电平delay(1);for(bit=0;bit<8;bit++){ //先高位，后低位if(date & BIT7)P2OUT |= MOSI;elseP2OUT &=~ MOSI;//_NOP();_NOP();_NOP();_NOP(); //数据建立时间1usP2OUT |= SCK;delay(2);date <<= 1; //一条指令的时间//_NOP();_NOP();_NOP(); //数据保持时间1usP2OUT &=~ SCK;delay(2);}delay(1);}/************************SPI读字节函数************************/ uchar rd_spi_byte(){uchar buf=0,i=0;P2OUT &=~ SCK;delay(1);for(i=0;i<8;i++){P2OUT |= SCK;buf<<=1;if(P2IN & MISO)buf |= 1;P2OUT &=~ SCK;delay(2);}delay(2);return buf;}/**************读寄存器函数，仅用于调试之用**********************/ void read_register(uchar register_adds) //读指定寄存器的内容{uchar i=0;P2OUT |= CSN;P2OUT &=~ CSN;wr_spi_byte(R_REGISTER + register_adds);for(i=0;i<5;i++){read_date[i]=rd_spi_byte(); //将read_date[i]加入到watch}P2OUT |= CSN;}/***************************延时函数**************************/ void delay_us(){;}void delay_1_5ms(){uint i=0,j=0;for(i=0;i<50;i++)for(j=0;j<50;j++);}void delay(uint time){uint i;for(i=0;i<time;i++);}void delay_130us(){for(i=0;i<100;i++); }。

MSP430程序库<一>综述我与msp430最初的接触来自机械工业出版社出版的《MSP430系列单片机系统工程设计与实践》这本书；我开始参加电子设计竞赛是在大二的暑假，放假之前听说竞赛用MSP430F169的单片机，然后就去图书馆找有关430单片机的书籍了，有关这款单片机的书不多，很幸运的是我借到了这本书；我写430单片机的程序风格很大程度上受到了此书的影响。

程序库的组织方式：程序库解决方案包含多个项目，每个项目是针对一个单元（如：uart异步串行口）的程序库和使用示例，如异步串行口的程序库，下图中UART项目，Uart.c是主要的程序库源代码，Uart.h是对应头文件，使用时需包含此头文件，main.c是使用示例代码。

程序库使用时只需.c文件和对应的.h文件即可。

文件组织方式：程序库的c文件和h文件一一对应，c文件至少包含两个头文件，其中一个是430的头文件，以使用单片机的硬件资源，另一个是其对应的头文件；如Uart.c开头即为#include<msp430x16x.h>#include"Uart.h"为防止重复包含头文件中均有#define语句如Uart.h开头和结尾：#ifndef__UART_H#define__UART_H#endif/*__UART_H*/程序库使用方式：第一步，先把c文件和h文件拷到工程文件夹；然后把c文件添加到项目中在左侧workspace中右击项目，选Add—>Add Files，选择刚添加的c文件；如图：最后在要调用库函数的程序文件中包含拷进来的头文件；之后，就可以正常调用程序库中的函数（H文件中声明的，需要的话，可以自行添加）。

程序库目前打算先从异步串行口写起，多谢网友们的支持了啊。

相关文章：/bbs/article_1077_368318.html。

/* Timer0_A3 Capture/Compare 0 */__no_init volatile unsigned short TA0CCR0 @ 0x0172;/* Timer0_A3 Capture/Compare 1 */__no_init volatile unsigned short TA0CCR1 @ 0x0174;/* Timer0_A3 Capture/Compare 2 */__no_init volatile unsigned short TA0CCR2 @ 0x0176;#define __MSP430_HAS_TA3__ /* Definition to show that Module is available */ /* Alternate register names */#define TAIV TA0IV /* Timer A Interrupt Vector Word */#define TACTL TA0CTL /* Timer A Control */#define TACCTL0 TA0CCTL0 /* Timer A Capture/Compare Control 0 */#define TACCTL1 TA0CCTL1 /* Timer A Capture/Compare Control 1 */#define TACCTL2 TA0CCTL2 /* Timer A Capture/Compare Control 2 */#define TAR TA0R /* Timer A Counter Register */#define TACCR0 TA0CCR0 /* Timer A Capture/Compare 0 */#define TACCR1 TA0CCR1 /* Timer A Capture/Compare 1 */#define TACCR2 TA0CCR2 /* Timer A Capture/Compare 2 */#define TAIV_ TA0IV_ /* Timer A Interrupt Vector Word */#define TACTL_ TA0CTL_ /* Timer A Control */#define TACCTL0_ TA0CCTL0_ /* Timer A Capture/Compare Control 0 */#define TACCTL1_ TA0CCTL1_ /* Timer A Capture/Compare Control 1 */#define TACCTL2_ TA0CCTL2_ /* Timer A Capture/Compare Control 2 */#define TAR_ TA0R_ /* Timer A Counter Register */#define TACCR0_ TA0CCR0_ /* Timer A Capture/Compare 0 */#define TACCR1_ TA0CCR1_ /* Timer A Capture/Compare 1 */#define TACCR2_ TA0CCR2_ /* Timer A Capture/Compare 2 *//* Alternate register names 2 */#define CCTL0 TACCTL0 /* Timer A Capture/Compare Control 0 */#define CCTL1 TACCTL1 /* Timer A Capture/Compare Control 1 */#define CCTL2 TACCTL2 /* Timer A Capture/Compare Control 2 */#define CCR0 TACCR0 /* Timer A Capture/Compare 0 */#define CCR1 TACCR1 /* Timer A Capture/Compare 1 */#define CCR2 TACCR2 /* Timer A Capture/Compare 2 */#define CCTL0_ TACCTL0_ /* Timer A Capture/Compare Control 0 */#define CCTL1_ TACCTL1_ /* Timer A Capture/Compare Control 1 */#define CCTL2_ TACCTL2_ /* Timer A Capture/Compare Control 2 */#define CCR0_ TACCR0_ /* Timer A Capture/Compare 0 */#define CCR1_ TACCR1_ /* Timer A Capture/Compare 1 */#define CCR2_ TACCR2_ /* Timer A Capture/Compare 2 */#define MC_0 (0*0x10u) /* Timer A mode control: 0 - Stop */#define MC_1 (1*0x10u) /* Timer A mode control: 1 - Up to CCR0 */#define MC_2 (2*0x10u) /* Timer A mode control: 2 - Continous up */#define MC_3 (3*0x10u) /* Timer A mode control: 3 - Up/Down */#define ID_0 (0*0x40u) /* Timer A input divider: 0 - /1 */#define ID_1 (1*0x40u) /* Timer A input divider: 1 - /2 */#define ID_2 (2*0x40u) /* Timer A input divider: 2 - /4 */#define ID_3 (3*0x40u) /* Timer A input divider: 3 - /8 */#define TASSEL_0 (0*0x100u) /* Timer A clock source select: 0 - TACLK */#define TASSEL_1 (1*0x100u) /* Timer A clock source select: 1 - ACLK */#define TASSEL_2 (2*0x100u) /* Timer A clock source select: 2 - SMCLK */#define TASSEL_3 (3*0x100u) /* Timer A clock source select: 3 - INCLK */#define OUTMOD_0 (0*0x20u) /* PWM output mode: 0 - output only */#define OUTMOD_1 (1*0x20u) /* PWM output mode: 1 - set */#define OUTMOD_2 (2*0x20u) /* PWM output mode: 2 - PWM toggle/reset */ #define OUTMOD_3 (3*0x20u) /* PWM output mode: 3 - PWM set/reset */#define OUTMOD_4 (4*0x20u) /* PWM output mode: 4 - toggle */#define OUTMOD_5 (5*0x20u) /* PWM output mode: 5 - Reset */#define OUTMOD_6 (6*0x20u) /* PWM output mode: 6 - PWM toggle/set */ #define OUTMOD_7 (7*0x20u) /* PWM output mode: 7 - PWM reset/set */#define CCIS_0 (0*0x1000u) /* Capture input select: 0 - CCIxA */#define CCIS_1 (1*0x1000u) /* Capture input select: 1 - CCIxB */#define CCIS_2 (2*0x1000u) /* Capture input select: 2 - GND */#define CCIS_3 (3*0x1000u) /* Capture input select: 3 - Vcc */#define CM_0 (0*0x4000u) /* Capture mode: 0 - disabled */#define CM_1 (1*0x4000u) /* Capture mode: 1 - pos. edge */#define CM_2 (2*0x4000u) /* Capture mode: 1 - neg. edge */#define CM_3 (3*0x4000u) /* Capture mode: 1 - both edges *//* T0_A3IV Definitions */#define TA0IV_NONE (0x0000u) /* No Interrupt pending */#define TA0IV_TACCR1 (0x0002u) /* TA0CCR1_CCIFG */#define TA0IV_TACCR2 (0x0004u) /* TA0CCR2_CCIFG */#define TA0IV_6 (0x0006u) /* Reserved */#define TA0IV_8 (0x0008u) /* Reserved */#define TA0IV_TAIFG (0x000Au) /* TA0IFG *//*-------------------------------------------------------------------------* Timer1_A3*-------------------------------------------------------------------------*//* Timer1_A3 Interrupt Vector Word */__no_init volatile unsigned __READ short TA1IV @ 0x011E;。

MSP430单片机C语言的基本结构王晓宁2013/1/28随着单片机处理速度的加快和存储容量的加大以及相应的开发软件中增强的代码优化功能，用C语言编写的程序其代码效率和运行速度已堪与汇编程序相媲美，而且C语言程序因其平易性、结构化、易维护性和可移植性而日益广泛地应用于单片机的开发中。

用C语言编程时必须结合单片机的特点，不同品牌、不同系列或不同型号的单片机其内部资源、寄存器名称等都会不同，因此其软件的开发必须结合实际的硬件来进行。

但C语言的程序结构还是有许多共性的，下面结合MSP430单片机大致说一下C程序的基本结构。

C语言的程序结构还是比较规范的，一般包括头文件、宏定义、变量定义、函数定义、一个主函数main( )、以及中断处理函数等。

在多文件的管理中，还包括自定义的头文件等。

根据不同的情形，一个完整的C程序可以有不同的具体结构，但其框架基本上还是固定的。

下面通过几个简单的小例子来看一下C 程序的几种结构。

在此之前，先说一下C中的赋值方式。

很多情况下，C程序就是在那儿完成一些赋值操作。

|= 是“或”运算，&=是“与”运算，^= 是“异或”运算。

比如BIT0已经在430的头文件里定义为：BIT0=0x0001，0x0001是16进制计数，转成2进制就是（低八位），那么P1OUT|=BIT0，是一个什么结果？这是一个“或”运算（英文称or）。

首先P1OUT是一个在头文件中定义好的寄存器，是8位的，因此，我们可以把P1OUT就当成一个变量名好了，只不过这个变量是在头文件中定义的，我们直接拿来用即可。

P1OUT 的取值就是在~之间（二进制）。

因此不管P1OUT原先的值是多少，P1OUT|=BIT0就是（设P1OUT原先的值为xxxxxxxx）xxxxxxxx跟进行或运算，最低位（即BIT0）的值肯定是1的，而对其它位没有影响。

因此这样赋值后P1OUT=xxxxxxx1，达到了让BIT0位等于1（称为“置1”）的目的。

1、#define BIT0 (0×0001) //(0×0001)不是地址，而是一个16进制数值。

例1、P3DIR |= BIT3;实际上也可以写成P3DIR |= 0×0008;意思是将P3口的默认上电值0×0000和0×0008相与，设置P3口的第三位（即P3.3）管脚作输出使用。

例2、WDTCTL = WDTPW + WDTHOLD;实际上就是WDTCTL=0×5A80;你可以在头文件中查到#define WDTPW (0×5A00)和#define WDTHOLD (0×0080)。

WDTCTL是看门狗的控制寄存器，在msp430的User’Guide中有说明：当它的值为0×5A80时停止看门狗定时。

那为什么我们不直接写成WDTCTL=0×5A80;呢？这样的话程序的可读性会很差。

0×5A80只是一个数值，当你下次再看你写的程序，或者别人读你的程序时，就不明白WDTCTL=0×5A80;的意思了。

如果写成WDTCTL = WDTPW + WDTHOLD;就好理解多了：WDTPW（Watchdog timer password，看门狗的密码，WDTCTL的高8位）：只有WDTCTL的高8位为0×5A时才能对WDTCTL寄存器进行写操作。

WDTHOLD（Watchdog timer hold，WDTCTL的第7位）：当WDTCTL的第7位为1时，停止看门狗计时。

这样我们通过PW，HOLD就可以轻松的知道WDTCTL = WDTPW + WDTHOLD;是做什么的了。

可以看出msp430的头文件是很人性化的。

2、当然也有表示地址的，例如，头文件中有以下部分：#ifdef __IAR_SYSTEMS_ASM__#define DEFC(name, address) sfrb name = address#define DEFW(name, address) sfrw name = address;///运用了可变参数宏的宏定义格式：#define 宏符号名(参数表) 宏体；；宏体中就是写出参数表中各个//参数之间的关系。

IAR 430 头文件中#define定义的部分解释今天在阅读RF_Example_Code_v1.0中头文件cc430x613x.h时发现了几部分的疑问。

首先来看一下cc430x613x.h 中的3个#define的例子：#define DEFC(name, address) __no_init volatile unsigned char name @ address;#define DEFW(name, address) __no_init volatile unsigned short name @ address;#define DEFCW(name, address) __no_init union \{ \struct \{ \volatile unsigned char name##_L; \volatile unsigned char name##_H; \}; \volatile unsigned short name; \} @ address;前面的两个#define的用法是一样的。

首先我可以发现，在宏定义里面都有一个关键字__no_init。

查看了《MSP430 IAR C/EC++ Compiler Reference Guide》内的IAR Language Extension Overview 可以发现，__no_init是IAR扩展语法里面的一个扩展关键字。

作用是声明一个non-volatile类型的内存地址（Support non-valotile memory）。

于是解决了__no_init的问题。

再者对@这个字符存在一定的疑问，于是上网查了查资料。

虽然对于@这个字符的用法还是不是很明确，但是可以明确的是：#define DEFC(name, address) __no_init volatile unsigned char name @ address;#define DEFC(name, address) sfrb name = address;这两种定义是等价的，但是后者是基于汇编嵌入式编程的情况下才成立。

这只是我在学习TI公司生产的16位超的功耗单片机MSP430的随笔，希望能对其他朋友有所借鉴，不对之处还请多指教。

下面，开始430之旅。

讲解430的书现在也有很多了，不过大多数都是详细说明底层硬件结构的，看了不免有些空洞和枯燥，我认为了解一个MCU的操作首先要对其基础特性有所了解，然后再仔细研究各模块的功能。

1、首先你要知道msp430的存储器结构。

典型微处理器的结构有两种：冯 ? 诺依曼结构----程序存储器和数据存储器统一编码；哈佛结构----程序存储器和数据存储器。

MSP430系列单片机属于前者，而常用的mcs51系列属于后者。

0－0xf特殊功能寄存器；0x10－0x1ff外围模块寄存器；0x200－？根据不同型号地址从低向高扩展；0x1000－0x107f seg_b0x1080_0x10ff seg_a 供flash信息存储，剩下的从0xffff 开始向下扩展，根据不同容量，例如149为60KB，0xffff－0x11002、复位信号是MCU工作的起点，430的复位型号有两种：上电复位信号POR和上电清楚信号PUC。

POR信号只在上电和RST/NMI复位管脚被设置为复位功能，且低电平时系统复位。

而PUC信号是POR信号产生，以及其他如看门狗定时溢出、安全键值出现错误是产生。

但是，无论那种信号触发的复位，都会使MSP430在地址0xffff处读取复位中断向量，然后程序从中断向量所指的地址开始执行。

复位后的状态不写了，详见参考书，嘿嘿。

3、系统时钟是一个程序运行的指挥官，时序和中断也是整个程序的核心和中轴线。

430最多有三个振荡器：DCO内部振荡器；LFXT1外接低频振荡器，常见的32768HZ，不用外接负载电容；也可接高频450KHZ－8M，需接负载电容；XT2接高频450KHZ－8M，加外接电容。

430有三种时钟信号：MCLK系统主时钟，可分频1/2/4/8，供CPU使用，其他外围模块在有选择情况下也可使用；SMCLK系统子时钟，供外围模块使用，可选则不同振荡器产生的时钟信号；ACLK辅助时钟，只能由LFXT1产生，供外围模块。

#ifndef __msp430x14x#define __msp430x14x/************************************************************ * STANDARD BITS************************************************************/#define BIT0 0x0001#define BIT1 0x0002#define BIT2 0x0004#define BIT3 0x0008#define BIT4 0x0010#define BIT5 0x0020#define BIT6 0x0040#define BIT7 0x0080#define BIT8 0x0100#define BIT9 0x0200#define BITA 0x0400#define BITB 0x0800#define BITC 0x1000#define BITD 0x2000#define BITE 0x4000#define BITF 0x8000/************************************************************ * STATUS REGISTER BITS************************************************************/#define C 0x0001#define Z 0x0002#define N 0x0004#define V 0x0100#define GIE 0x0008#define CPUOFF 0x0010#define OSCOFF 0x0020#define SCG0 0x0040#define SCG1 0x0080/* Low Power Modes coded with Bits 4-7 in SR */#ifndef __IAR_SYSTEMS_ICC /* Begin #defines for assembler */#define LPM0 CPUOFF#define LPM1 SCG0+CPUOFF#define LPM2 SCG1+CPUOFF#define LPM3 SCG1+SCG0+CPUOFF#define LPM4 SCG1+SCG0+OSCOFF+CPUOFF/* End #defines for assembler */#else /* Begin #defines for C */#define LPM0_bits CPUOFF#define LPM1_bits SCG0+CPUOFF#define LPM2_bits SCG1+CPUOFF#define LPM3_bits SCG1+SCG0+CPUOFF#define LPM4_bits SCG1+SCG0+OSCOFF+CPUOFF#include <In430.h>#define LPM0 _BIS_SR(LPM0_bits) /* Enter Low Power Mode 0 */#define LPM0_EXIT _BIC_SR(LPM0_bits) /* Exit Low Power Mode 0 */#define LPM1 _BIS_SR(LPM1_bits) /* Enter Low Power Mode 1 */#define LPM1_EXIT _BIC_SR(LPM1_bits) /* Exit Low Power Mode 1 */#define LPM2 _BIS_SR(LPM2_bits) /* Enter Low Power Mode 2 */#define LPM2_EXIT _BIC_SR(LPM2_bits) /* Exit Low Power Mode 2 */#define LPM3 _BIS_SR(LPM3_bits) /* Enter Low Power Mode 3 */#define LPM3_EXIT _BIC_SR(LPM3_bits) /* Exit Low Power Mode 3 */#define LPM4 _BIS_SR(LPM4_bits) /* Enter Low Power Mode 4 */#define LPM4_EXIT _BIC_SR(LPM4_bits) /* Exit Low Power Mode 4 */#endif /* End #defines for C *//************************************************************ * PERIPHERAL FILE MAP************************************************************//************************************************************ * 特殊功能寄存器地址和控制位************************************************************/ /*中断使能1*/#define IE1_ 0x0000sfrb IE1 = IE1_;#define WDTIE 0x01 /*看门狗中断使能*/#define OFIE 0x02 /*外部晶振故障中断使能*/#define NMIIE 0x10 /*非屏蔽中断使能*/#define ACCVIE 0x20 /*可屏蔽中断使能/flash写中断错误*/#define URXIE0 0x40 /*串口0接收中断使能*/#define UTXIE0 0x80 /*串口0发送中断使能*//*中断标志1*/#define IFG1_ 0x0002sfrb IFG1 = IFG1_;#define WDTIFG 0x01 /*看门狗中断标志*/#define OFIFG 0x02 /*外部晶振故障中断标志*/#define NMIIFG 0x10 /*非屏蔽中断标志*/#define URXIFG0 0x40 /*串口0接收中断标志*/#define UTXIFG0 0x80 /*串口0发送中断标志*//* 中断模式使能1 */#define ME1_ 0x0004sfrb ME1 = ME1_;#define URXE0 0x40 /* 串口0接收中断模式使能*/#define USPIE0 0x40 /* 同步中断模式使能*/#define UTXE0 0x80 /* 串口0发送中断模式使能*//* 中断使能2 */#define IE2_ 0x0001sfrb IE2 = IE2_;#define URXIE1 0x10 /* 串口1接收中断使能*/#define UTXIE1 0x20 /* 串口1发送中断使能*//* 中断标志2 */#define IFG2_ 0x0003sfrb IFG2 = IFG2_;#define URXIFG1 0x10 /* 串口1接收中断标志*/#define UTXIFG1 0x20 /* 串口1发送中断标志*//* 中断模式使能2 */#define ME2_ 0x0005sfrb ME2 = ME2_;#define URXE1 0x10 /* 串口1接收中断模式使能*/#define USPIE1 0x10 /* 同步中断模式使能*/#define UTXE1 0x20 /* 串口1发送中断模式使能*//************************************************************* 看门狗定时器的寄存器定义************************************************************/#define WDTCTL_ 0x0120sfrw WDTCTL = WDTCTL_;#define WDTIS0 0x0001 /*选择WDTCNT的四个输出端之一*/#define WDTIS1 0x0002 /*选择WDTCNT的四个输出端之一*/#define WDTSSEL 0x0004 /*选择WDTCNT的时钟源*/#define WDTCNTCL 0x0008 /*清除WDTCNT端: 为1时从0开始计数*/#define WDTTMSEL 0x0010 /*选择模式0: 看门狗模式; 1: 定时器模式*/#define WDTNMI 0x0020 /*选择NMI/RST 引脚功能0:为RST; 1:为NMI*/#define WDTNMIES 0x0040 /*WDTNMI=1时.选择触发延0:为上升延1:为下降延*/ #define WDTHOLD 0x0080 /*停止看门狗定时器工作0:启动;1:停止*/#define WDTPW 0x5A00 /* 写密码:高八位*//* SMCLK= 1MHz定时器模式*/#define WDT_MDLY_32 WDTPW+WDTTMSEL+WDTCNTCL /* TSMCLK*2POWER15=32ms 复位状态*/#define WDT_MDLY_8 WDTPW+WDTTMSEL+WDTCNTCL+WDTIS0 /* TSMCLK*2POWER13=8.192ms " */#define WDT_MDLY_0_5 WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1 /* TSMCLK*2POWER9=0.512ms " */#define WDT_MDLY_0_064 WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1+WDTIS0 /* TSMCLK*2POWER6=0.512ms " *//* ACLK=32.768KHz 定时器模式*/#define WDT_ADLY_1000 WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL /* TACLK*2POWER15=1000ms " */#define WDT_ADLY_250 WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS0 /* TACLK*2POWER13=250ms " */#define WDT_ADLY_16 WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1 /* TACLK*2POWER9=16ms " */#define WDT_ADLY_1_9 WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0 /* TACLK*2POWER6=1.9ms " *//* SMCLK=1MHz看门狗模式*/#define WDT_MRST_32 WDTPW+WDTCNTCL /* TSMCLK*2POWER15=32ms 复位状态*/#define WDT_MRST_8 WDTPW+WDTCNTCL+WDTIS0 /* TSMCLK*2POWER13=8.192ms " */#define WDT_MRST_0_5 WDTPW+WDTCNTCL+WDTIS1 /* TSMCLK*2POWER9=0.512ms " */#define WDT_MRST_0_064 WDTPW+WDTCNTCL+WDTIS1+WDTIS0 /* TSMCLK*2POWER6=0.512ms " *//* ACLK=32KHz看门狗模式*/#define WDT_ARST_1000 WDTPW+WDTCNTCL+WDTSSEL /* TACLK*2POWER15=1000ms " */#define WDT_ARST_250 WDTPW+WDTCNTCL+WDTSSEL+WDTIS0 /* TACLK*2POWER13=250ms " */#define WDT_ARST_16 WDTPW+WDTCNTCL+WDTSSEL+WDTIS1 /* TACLK*2POWER9=16ms " */ #define WDT_ARST_1_9 WDTPW+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0 /* TACLK*2POWER6=1.9ms " *//************************************************************硬件乘法器的寄存器定义************************************************************/#define MPY_ 0x0130 /* 无符号乘法*/sfrw MPY = MPY_;#define MPYS_ 0x0132 /* 有符号乘法*/sfrw MPYS = MPYS_;#define MAC_ 0x0134 /* 无符号乘加*/sfrw MAC = MAC_;#define MACS_ 0x0136 /* 有符号乘加*/sfrw MACS = MACS_;#define OP2_ 0x0138 /* 第二乘数*/sfrw OP2 = OP2_;#define RESLO_ 0x013A /* 低6位结果寄存器*/sfrw RESLO = RESLO_;#define RESHI_ 0x013C /* 高6位结果寄存器*/sfrw RESHI = RESHI_;#define SUMEXT_ 0x013E /*结果扩展寄存器*/const sfrw SUMEXT = SUMEXT_;/************************************************************ * DIGITAL I/O Port1/2 寄存器定义有中断功能************************************************************/#define P1IN_ 0x0020 /* P1 输入寄存器*/const sfrb P1IN = P1IN_;#define P1OUT_ 0x0021 /* P1 输出寄存器*/sfrb P1OUT = P1OUT_;#define P1DIR_ 0x0022 /* P1 方向选择寄存器*/sfrb P1DIR = P1DIR_;#define P1IFG_ 0x0023 /* P1 中断标志寄存器*/sfrb P1IFG = P1IFG_;#define P1IES_ 0x0024 /* P1 中断边沿选择寄存器*/sfrb P1IES = P1IES_;#define P1IE_ 0x0025 /* P1 中断使能寄存器*/sfrb P1IE = P1IE_;#define P1SEL_ 0x0026 /* P1 功能选择寄存器*/sfrb P1SEL = P1SEL_;#define P2IN_ 0x0028 /* P2 输入寄存器*/const sfrb P2IN = P2IN_;#define P2OUT_ 0x0029 /* P2 输出寄存器*/sfrb P2OUT = P2OUT_;#define P2DIR_ 0x002A /* P2 方向选择寄存器*/sfrb P2DIR = P2DIR_;#define P2IFG_ 0x002B /* P2 中断标志寄存器*/sfrb P2IFG = P2IFG_;#define P2IES_ 0x002C /* P2 中断边沿选择寄存器*/sfrb P2IES = P2IES_;#define P2IE_ 0x002D /* P2 中断使能寄存器*/sfrb P2IE = P2IE_;#define P2SEL_ 0x002E /* P2 功能选择寄存器*/sfrb P2SEL = P2SEL_;/************************************************************ * DIGITAL I/O Port3/4寄存器定义无中断功能************************************************************/#define P3IN_ 0x0018 /* P3 输入寄存器*/const sfrb P3IN = P3IN_;#define P3OUT_ 0x0019 /* P3 输出寄存器*/sfrb P3OUT = P3OUT_;#define P3DIR_ 0x001A /* P3 方向选择寄存器*/sfrb P3DIR = P3DIR_;#define P3SEL_ 0x001B /* P3 功能选择寄存器*/sfrb P3SEL = P3SEL_;#define P4IN_ 0x001C /* P4 输入寄存器*/const sfrb P4IN = P4IN_;#define P4OUT_ 0x001D /* P4 输出寄存器*/sfrb P4OUT = P4OUT_;#define P4DIR_ 0x001E /* P4 方向选择寄存器*/sfrb P4DIR = P4DIR_;#define P4SEL_ 0x001F /* P4 功能选择寄存器*/sfrb P4SEL = P4SEL_;/************************************************************ * DIGITAL I/O Port5/6 I/O口寄存器定义PORT5和6 无中断功能************************************************************/#define P5IN_ 0x0030 /* P5 输入寄存器*/const sfrb P5IN = P5IN_;#define P5OUT_ 0x0031 /* P5 输出寄存器*/sfrb P5OUT = P5OUT_;#define P5DIR_ 0x0032 /* P5 方向选择寄存器*/sfrb P5DIR = P5DIR_;#define P5SEL_ 0x0033 /* P5 功能选择寄存器*/sfrb P5SEL = P5SEL_;#define P6IN_ 0x0034 /* P6 输入寄存器*/const sfrb P6IN = P6IN_;#define P6OUT_ 0x0035 /* P6 输出寄存器*/sfrb P6OUT = P6OUT_;#define P6DIR_ 0x0036 /* P6 方向选择寄存器*/sfrb P6DIR = P6DIR_;#define P6SEL_ 0x0037 /* P6 功能选择寄存器*/sfrb P6SEL = P6SEL_;/************************************************************* USART 串口寄存器"UCTL","UTCTL","URCTL"定义的各个位可串口1 串口2公用************************************************************//* UCTL 串口控制寄存器*/#define PENA 0x80 /*校验允许位*/#define PEV 0x40 /*偶校验为0时为奇校验*/#define SPB 0x20 /*停止位为2 为0时停止位为1*/#define CHAR 0x10 /*数据位为8位为0时数据位为7位*/#define LISTEN 0x08 /*自环模式(发数据同时在把发的数据接收回来)*/#define SYNC 0x04 /*同步模式为0异步模式*/#define MM 0x02 /*为1时地址位多机协议(异步) 主机模式(同步);为0时线路空闲多机协议(异步) 从机模式(同步)*/#define SWRST 0x01 /*控制位*//* UTCTL 串口发送控制寄存器*/#define CKPH 0x80 /*时钟相位控制位(只同步方式用)为1时时钟UCLK延时半个周期*/#define CKPL 0x40 /*时钟极性控制位为1时异步与UCLK相反;同步下降延有效*/#define SSEL1 0x20 /*时钟源选择位:与SSEL0组合为0,1,2,3四种方式*/#define SSEL0 0x10 /*"0"选择外部时钟,"1"选择辅助时钟,"2","3"选择系统子时钟*/#define URXSE 0x08 /*接收触发延控制位(只在异步方式下用)*/#define TXWAKE 0x04 /*多处理器通信传送控制位(只在异步方式下用)*/#define STC 0x02 /*外部引脚STE选择位为0时为4线模式为1时为3线模式*/#define TXEPT 0x01 /*发送器空标志*//* URCTL 串口接收控制寄存器同步模式下只用两位:FE和OE*/#define FE 0x80 /*帧错标志*/#define PE 0x40 /*校验错标志位*/#define OE 0x20 /*溢出标志位*/#define BRK 0x10 /*打断检测位*/#define URXEIE 0x08 /*接收出错中断允许位*/#define URXWIE 0x04 /*接收唤醒中断允许位*/#define RXWAKE 0x02 /*接收唤醒检测位*/#define RXERR 0x01 /*接收错误标志位*//************************************************************* USART 0 串口0寄存器定义************************************************************/#define U0CTL_ 0x0070 /* 串口0基本控制寄存器*/sfrb U0CTL = U0CTL_;#define U0TCTL_ 0x0071 /* 串口0发送控制寄存器*/ sfrb U0TCTL = U0TCTL_;#define U0RCTL_ 0x0072 /* 串口0接收控制寄存器*/ sfrb U0RCTL = U0RCTL_;#define U0MCTL_ 0x0073 /* 波特率调整寄存器*/sfrb U0MCTL = U0MCTL_;#define U0BR0_ 0x0074 /* 波特率选择寄存器0 */sfrb U0BR0 = U0BR0_;#define U0BR1_ 0x0075 /* 波特率选择寄存器1 */sfrb U0BR1 = U0BR1_;#define U0RXBUF_ 0x0076 /* 接收缓存寄存器*/const sfrb U0RXBUF = U0RXBUF_;#define U0TXBUF_ 0x0077 /* 发送缓存寄存器*/sfrb U0TXBUF = U0TXBUF_;/* 改变的寄存器名定义*/#define UCTL0_ 0x0070 /* UART 0 Control */sfrb UCTL0 = UCTL0_;#define UTCTL0_ 0x0071 /* UART 0 Transmit Control */ sfrb UTCTL0 = UTCTL0_;#define URCTL0_ 0x0072 /* UART 0 Receive Control */sfrb URCTL0 = URCTL0_;#define UMCTL0_ 0x0073 /* UART 0 Modulation Control */ sfrb UMCTL0 = UMCTL0_;#define UBR00_ 0x0074 /* UART 0 Baud Rate 0 */sfrb UBR00 = UBR00_;#define UBR10_ 0x0075 /* UART 0 Baud Rate 1 */sfrb UBR10 = UBR10_;#define RXBUF0_ 0x0076 /* UART 0 Receive Buffer */ const sfrb RXBUF0 = RXBUF0_;#define TXBUF0_ 0x0077 /* UART 0 Transmit Buffer */sfrb TXBUF0 = TXBUF0_;#define UCTL_0_ 0x0070 /* UART 0 Control */sfrb UCTL_0 = UCTL_0_;#define UTCTL_0_ 0x0071 /* UART 0 Transmit Control */ sfrb UTCTL_0 = UTCTL_0_;#define URCTL_0_ 0x0072 /* UART 0 Receive Control */ sfrb URCTL_0 = URCTL_0_;#define UMCTL_0_ 0x0073 /* UART 0 Modulation Control */ sfrb UMCTL_0 = UMCTL_0_;#define UBR0_0_ 0x0074 /* UART 0 Baud Rate 0 */sfrb UBR0_0 = UBR0_0_;sfrb UBR1_0 = UBR1_0_;#define RXBUF_0_ 0x0076 /* UART 0 Receive Buffer */const sfrb RXBUF_0 = RXBUF_0_;#define TXBUF_0_ 0x0077 /* UART 0 Transmit Buffer */sfrb TXBUF_0 = TXBUF_0_;/************************************************************ * USART 1 串口1寄存器定义************************************************************/#define U1CTL_ 0x0078 /* 串口1基本控制寄存器*/sfrb U1CTL = U1CTL_;#define U1TCTL_ 0x0079 /* 串口1发送控制寄存器*/sfrb U1TCTL = U1TCTL_;#define U1RCTL_ 0x007A /* 串口1接收控制寄存器*/sfrb U1RCTL = U1RCTL_;#define U1MCTL_ 0x007B /* 波特率调整控制寄存器*/sfrb U1MCTL = U1MCTL_;#define U1BR0_ 0x007C /* 波特率选择寄存器0 */sfrb U1BR0 = U1BR0_;#define U1BR1_ 0x007D /* 波特率选择寄存器1 */sfrb U1BR1 = U1BR1_;#define U1RXBUF_ 0x007E /* 接收缓存*/const sfrb U1RXBUF = U1RXBUF_;#define U1TXBUF_ 0x007F /* 发送缓存*/sfrb U1TXBUF = U1TXBUF_;/* 改变的寄存器名定义*/#define UCTL1_ 0x0078 /* UART 1 Control */sfrb UCTL1 = UCTL1_;#define UTCTL1_ 0x0079 /* UART 1 Transmit Control */sfrb UTCTL1 = UTCTL1_;#define URCTL1_ 0x007A /* UART 1 Receive Control */sfrb URCTL1 = URCTL1_;#define UMCTL1_ 0x007B /* UART 1 Modulation Control */sfrb UMCTL1 = UMCTL1_;#define UBR01_ 0x007C /* UART 1 Baud Rate 0 */sfrb UBR01 = UBR01_;#define UBR11_ 0x007D /* UART 1 Baud Rate 1 */sfrb UBR11 = UBR11_;#define RXBUF1_ 0x007E /* UART 1 Receive Buffer */const sfrb RXBUF1 = RXBUF1_;sfrb TXBUF1 = TXBUF1_;#define UCTL_1_ 0x0078 /* UART 1 Control */sfrb UCTL_1 = UCTL_1_;#define UTCTL_1_ 0x0079 /* UART 1 Transmit Control */sfrb UTCTL_1 = UTCTL_1_;#define URCTL_1_ 0x007A /* UART 1 Receive Control */sfrb URCTL_1 = URCTL_1_;#define UMCTL_1_ 0x007B /* UART 1 Modulation Control */sfrb UMCTL_1 = UMCTL_1_;#define UBR0_1_ 0x007C /* UART 1 Baud Rate 0 */sfrb UBR0_1 = UBR0_1_;#define UBR1_1_ 0x007D /* UART 1 Baud Rate 1 */sfrb UBR1_1 = UBR1_1_;#define RXBUF_1_ 0x007E /* UART 1 Receive Buffer */const sfrb RXBUF_1 = RXBUF_1_;#define TXBUF_1_ 0x007F /* UART 1 Transmit Buffer */sfrb TXBUF_1 = TXBUF_1_;/************************************************************ * Timer A 定时器A寄存器定义************************************************************/#define TAIV_ 0x012E /* Timer A 中断向量寄存器*/sfrw TAIV = TAIV_;#define TACTL_ 0x0160 /* Timer A 控制寄存器*/sfrw TACTL = TACTL_;#define TACCTL0_ 0x0162 /* Timer A 捕获/比较控制寄存器0 */sfrw TACCTL0 = TACCTL0_;#define TACCTL1_ 0x0164 /* Timer A 捕获/比较控制寄存器1 */sfrw TACCTL1 = TACCTL1_;#define TACCTL2_ 0x0166 /* Timer A 捕获/比较控制寄存器2 */sfrw TACCTL2 = TACCTL2_;#define TAR_ 0x0170 /* Timer A 16位计数器内容*/sfrw TAR = TAR_;#define TACCR0_ 0x0172 /* Timer A 捕获/比较寄存器0 */sfrw TACCR0 = TACCR0_;#define TACCR1_ 0x0174 /* Timer A 捕获/比较寄存器1 */sfrw TACCR1 = TACCR1_;#define TACCR2_ 0x0176 /* Timer A 捕获/比较寄存器2 */sfrw TACCR2 = TACCR2_;/* 改变的寄存器名定义*/#define CCTL0_ 0x0162 /* Timer A Capture/Compare Control 0 */ sfrw CCTL0 = CCTL0_;#define CCTL1_ 0x0164 /* Timer A Capture/Compare Control 1 */ sfrw CCTL1 = CCTL1_;#define CCTL2_ 0x0166 /* Timer A Capture/Compare Control 2 */ sfrw CCTL2 = CCTL2_;#define CCR0_ 0x0172 /* Timer A Capture/Compare 0 */sfrw CCR0 = CCR0_;#define CCR1_ 0x0174 /* Timer A Capture/Compare 1 */sfrw CCR1 = CCR1_;#define CCR2_ 0x0176 /* Timer A Capture/Compare 2 */sfrw CCR2 = CCR2_;/*TACTL 控制寄存器16个位寄存器定义*/#define TASSEL2 0x0400 /* 未用*/#define TASSEL1 0x0200 /* 时钟输入源控制位1 */#define TASSEL0 0x0100 /* 时钟输入源控制位0 */#define ID1 0x0080 /* 分频系数选择位1 */#define ID0 0x0040 /* 分频系数选择位0 */#define MC1 0x0020 /* 计数模式控制位1 */#define MC0 0x0010 /* 计数模式控制位0 */#define TACLR 0x0004 /* 置1位清除定时器*/#define TAIE 0x0002 /* 定时器中断允许*/#define TAIFG 0x0001 /* 定时器中断标志*/#define MC_0 00*0x10 /* 停止模式*/#define MC_1 01*0x10 /* 增计数模式*/#define MC_2 02*0x10 /* 连续计数模式*/#define MC_3 03*0x10 /* 增/减计数模式*/#define ID_0 00*0x40 /* 直通*/#define ID_1 01*0x40 /* 2分频*/#define ID_2 02*0x40 /* 4分频*/#define ID_3 03*0x40 /* 8分频*/#define TASSEL_0 00*0x100 /* 时钟源为TACLK */#define TASSEL_1 01*0x100 /* 时钟源为ACLK */#define TASSEL_2 02*0x100 /* 时钟源为SMCLK */#define TASSEL_3 03*0x100 /* 时钟源为INCLK *//* Timer A ,Timer B 可公用捕获/比较控制寄存器X */#define CM1 0x8000 /* 捕获模式选择位1 */#define CM0 0x4000 /* 捕获模式选择位0 */#define CCIS1 0x2000 /* 捕获输入信号源选择位1 */#define CCIS0 0x1000 /* 捕获输入信号源选择位0 */#define SCS 0x0800 /* 信号同步位0:异步捕获;1:同步捕获*/#define SCCI 0x0400 /* 锁存输入信号*/#define CAP 0x0100 /* 模式选择: 0:比较模式;1:捕获模式*/#define OUTMOD2 0x0080 /* 输出模式选择位2 */#define OUTMOD1 0x0040 /* 输出模式选择位1 */#define OUTMOD0 0x0020 /* 输出模式选择位0 */#define CCIE 0x0010 /* 中断允许位*/#define CCI 0x0008 /* 读出输入信号源位ccis0\1 */#define OUT 0x0004 /* 输出信号(选择输出模式0) */#define COV 0x0002 /* 捕获溢出标志*/#define CCIFG 0x0001 /* 中断标志*/#define OUTMOD_0 0*0x20 /* 输出模式*/#define OUTMOD_1 1*0x20 /* 置位模式*/#define OUTMOD_2 2*0x20 /* 翻转/复位模式*/#define OUTMOD_3 3*0x20 /* 置位/复位模式*/#define OUTMOD_4 4*0x20 /* 翻转模式*/#define OUTMOD_5 5*0x20 /* 复位模式*/#define OUTMOD_6 6*0x20 /* 翻转/置位模式*/#define OUTMOD_7 7*0x20 /* 复位/置位模式*/#define CCIS_0 0*0x1000 /* 选择CCIXA为捕获事件的输入信号源*/#define CCIS_1 1*0x1000 /* 选择CCIXB为捕获事件的输入信号源*/#define CCIS_2 2*0x1000 /* 选择GND为捕获事件的输入信号源*/#define CCIS_3 3*0x1000 /* 选择VCC为捕获事件的输入信号源*/#define CM_0 0*0x4000 /* 禁止捕获模式*/#define CM_1 1*0x4000 /* 上升延捕获模式*/#define CM_2 2*0x4000 /* 下降沿捕获模式*/#define CM_3 3*0x4000 /* 上升沿和下降沿都捕获模式*//************************************************************ * Timer B 定时器B寄存器定义************************************************************/#define TBIV_ 0x011E /* 中断向量寄存器:BIT1-BIT3有效*/sfrw TBIV = TBIV_;#define TBCTL_ 0x0180 /* 定时器B控制寄存器:全部控制都集中在这*/ sfrw TBCTL = TBCTL_;#define TBCCTL0_ 0x0182 /* 定时器B捕获/比较控制寄存器0*/sfrw TBCCTL0 = TBCCTL0_;#define TBCCTL1_ 0x0184 /* 定时器B捕获/比较控制寄存器1 */sfrw TBCCTL1 = TBCCTL1_;#define TBCCTL2_ 0x0186 /* 定时器B捕获/比较控制寄存器2 */sfrw TBCCTL2 = TBCCTL2_;#define TBCCTL3_ 0x0188 /* 定时器B捕获/比较控制寄存器3 */sfrw TBCCTL3 = TBCCTL3_;#define TBCCTL4_ 0x018A /* 定时器B捕获/比较控制寄存器4 */sfrw TBCCTL4 = TBCCTL4_;#define TBCCTL5_ 0x018C /* 定时器B捕获/比较控制寄存器5 */sfrw TBCCTL5 = TBCCTL5_;#define TBCCTL6_ 0x018E /* 定时器B捕获/比较控制寄存器6 */sfrw TBCCTL6 = TBCCTL6_;#define TBR_ 0x0190 /* 计数器*/sfrw TBR = TBR_;#define TBCCR0_ 0x0192 /* 定时器B捕获/比较寄存器0 */sfrw TBCCR0 = TBCCR0_;#define TBCCR1_ 0x0194 /* 定时器B捕获/比较寄存器1 */sfrw TBCCR1 = TBCCR1_;#define TBCCR2_ 0x0196 /* 定时器B捕获/比较寄存器2 */sfrw TBCCR2 = TBCCR2_;#define TBCCR3_ 0x0198 /* 定时器B捕获/比较寄存器3 */sfrw TBCCR3 = TBCCR3_;#define TBCCR4_ 0x019A /* 定时器B捕获/比较寄存器4 */sfrw TBCCR4 = TBCCR4_;#define TBCCR5_ 0x019C /* 定时器B捕获/比较寄存器5 */sfrw TBCCR5 = TBCCR5_;#define TBCCR6_ 0x019E /* 定时器B捕获/比较寄存器6 */sfrw TBCCR6 = TBCCR6_;/* 定时器B控制寄存器:全部控制都集中在这*/#define SHR1 0x4000 /* 装载比较锁存器控制位1 :受TBCCTLx中的CCLDx位控制*/#define SHR0 0x2000 /* 装载比较锁存器控制位0 :受TBCCTLx中的CCLDx位控制*/#define TBCLGRP1 0x4000 /* 装载比较锁存器控制位1 :受TBCCTLx中的CCLDx位控制*/ #define TBCLGRP0 0x2000 /* 装载比较锁存器控制位0 :受TBCCTLx中的CCLDx位控制*/ #define CNTL1 0x1000 /* 定时器位数长度控制位1 */#define CNTL0 0x0800 /* 定时器位数长度控制位0 */#define TBSSEL2 0x0400 /* 未用*/#define TBSSEL1 0x0200 /* 时钟输入源控制位1 */#define TBSSEL0 0x0100 /* 时钟输入源控制位0 */#define TBCLR 0x0004 /* 置1清除定时器*/#define TBIE 0x0002 /* 中断允许*/#define TBIFG 0x0001 /* 中断标志*/#define TBSSEL_0 0*0x0100 /* 时钟源为:TBCLK */#define TBSSEL_1 1*0x0100 /* 时钟源为: ACLK */#define TBSSEL_2 2*0x0100 /* 时钟源为:SMCLK */#define TBSSEL_3 3*0x0100 /* 时钟源为:INCLK */#define CNTL_0 0*0x0800 /* 16 位计数模式*/#define CNTL_1 1*0x0800 /* 12 位计数模式*/#define CNTL_2 2*0x0800 /* 10 位计数模式*/#define CNTL_3 3*0x0800 /* 8 位计数模式*/#define SHR_0 0*0x2000 /* 单独装载(初始值) */#define SHR_1 1*0x2000 /* 分三组装载: 1 - 3 groups (1-2, 3-4, 5-6) */#define SHR_2 2*0x2000 /* 分二组装载: 2 - 2 groups (1-3, 4-6)*/#define SHR_3 3*0x2000 /* 不分组装载: 3 - 1 group (all) */#define TBCLGRP_0 0*0x2000 /* 单独装载(初始值) */#define TBCLGRP_1 1*0x2000 /* 分三组装载: 1 - 3 groups (1-2, 3-4, 5-6) */#define TBCLGRP_2 2*0x2000 /* 分二组装载: 2 - 2 groups (1-3, 4-6)*/#define TBCLGRP_3 3*0x2000 /* 不分组装载: 3 - 1 group (all) *//* Additional Timer B Control Register bits are defined in Timer A */#define SLSHR1 0x0400 /* Compare latch load source 1 */#define SLSHR0 0x0200 /* Compare latch load source 0 */#define CLLD1 0x0400 /* 定义比较锁存器TBCLx的装载方式控制位1 */#define CLLD0 0x0200 /* 定义比较锁存器TBCLx的装载方式控制位0 */#define SLSHR_0 0*0x0200 /* 立即装载*/#define SLSHR_1 1*0x0200 /* TBR 计数到0时装载*/#define SLSHR_2 2*0x0200 /* 在增减模式下,计数到TBCLx或0时装载; 在连续计数模式下,计数到0时装载*/#define SLSHR_3 3*0x0200 /* 当计数到TBCL0时装载*/#define CLLD_0 0*0x0200 /* 立即装载*/#define CLLD_1 1*0x0200 /* TBR 计数到0时装载*/#define CLLD_2 2*0x0200 /* 在增减模式下,计数到TBCLx或0时装载; 在连续计数模式下,计数到0时装载*/#define CLLD_3 3*0x0200 /* 当计数到TBCL0时装载*//************************************************************* Basic Clock Module************************************************************/#define DCOCTL_ 0x0056 /* DCO 时钟频率控制寄存器:复位后的值位060h*/sfrb DCOCTL = DCOCTL_;#define BCSCTL1_ 0x0057 /* 系统时钟控制寄存器1 :复位后的值位084h*/sfrb BCSCTL1 = BCSCTL1_;#define BCSCTL2_ 0x0058 /* 系统时钟控制寄存器2 :复位后的值位000h*/sfrb BCSCTL2 = BCSCTL2_;/* DCO 时钟频率控制寄存器*/#define MOD0 0x01 /* DCO插入周期控制位0 */#define MOD1 0x02 /* DCO插入周期控制位1 */#define MOD2 0x04 /* DCO插入周期控制位2 */#define MOD3 0x08 /* DCO插入周期控制位3 */#define MOD4 0x10 /* DCO插入周期控制位4 */#define DCO0 0x20 /* 8种频率控制位0 */#define DCO1 0x40 /* 8种频率控制位1 */#define DCO2 0x80 /* 8种频率控制位2 *//* 系统时钟控制寄存器1 :复位后的值位084h*/#define RSEL0 0x01 /* 选择内部电阻控制位0 */#define RSEL1 0x02 /* 选择内部电阻控制位1 */#define RSEL2 0x04 /* 选择内部电阻控制位2 */#define XT5V 0x08 /* 必须为0*/#define DIVA0 0x10 /* ACLK分频系数控制位0*/#define DIVA1 0x20 /* ACLK分频系数控制位1 */#define XTS 0x40 /* LFXT1工作模式控制位0:低频模式. / 1: 高频模式. */ #define XT2OFF 0x80 /* XT2CLK 使能控制位0:开启; 1:关闭*/#define DIVA_0 0x00 /* ACLK分频系数为: 1 */#define DIVA_1 0x10 /* ACLK分频系数为: 2 */#define DIVA_2 0x20 /* ACLK分频系数为: 4 */#define DIVA_3 0x30 /* ACLK分频系数为: 8 *//* 系统时钟控制寄存器2 :复位后的值位000h*/#define DCOR 0x01 /* 内外电阻选择控制位*/#define DIVS0 0x02 /* SMCLK分频控制位0*/#define DIVS1 0x04 /* SMCLK分频控制位1 */#define SELS 0x08 /* SMCLK 时钟源选择位t 0COCLK / 1:XT2CLK/LFXTCLK */ #define DIVM0 0x10 /* MCLK分频控制位0 */#define DIVM1 0x20 /* MCLK分频控制位1 */#define SELM0 0x40 /* MCLK 时钟输入源选择位0 */#define SELM1 0x80 /* MCLK 时钟输入源选择位1 */#define DIVS_0 0x00 /* SMCLK 分频系数为: 1 */#define DIVS_1 0x02 /* SMCLK 分频系数为: 2 */#define DIVS_2 0x04 /* SMCLK 分频系数为: 4 */#define DIVS_3 0x06 /* SMCLK 分频系数为: 8 */#define DIVM_0 0x00 /* MCLK 分频系数为: 1 */#define DIVM_1 0x10 /* MCLK 分频系数为: 2 */#define DIVM_2 0x20 /* MCLK 分频系数为: 4 */#define DIVM_3 0x30 /* MCLK 分频系数为: 8 */#define SELM_0 0x00 /* MCLK 时钟输入源: DCOCLK */#define SELM_1 0x40 /* MCLK 时钟输入源: DCOCLK */#define SELM_2 0x80 /* MCLK 时钟输入源: XT2CLK/LFXTCLK */#define SELM_3 0xC0 /* MCLK 时钟输入源: LFXTCLK *//************************************************************* * Flash Memory FLASH操作寄存器定义*************************************************************/#define FCTL1_ 0x0128 /* FLASH控制寄存器1:控制编程、擦除*/sfrw FCTL1 = FCTL1_;#define FCTL2_ 0x012A /* FLASH 控制寄存器2 ：控制时钟分频*/sfrw FCTL2 = FCTL2_;#define FCTL3_ 0x012C /* FLASH 控制寄存器3：状态标志*/sfrw FCTL3 = FCTL3_;#define FRKEY 0x9600 /* 读FLASH 密码*/#define FWKEY 0xA500 /* 写FLASH 密码*/#define FXKEY 0x3300 /* for use with XOR instruction *//* FLASH控制寄存器1:控制编程、擦除*/#define ERASE 0x0002 /* 擦除段使能*/#define MERAS 0x0004 /* 主存擦除使能*/#define WRT 0x0040 /* 编程使能*/#define BLKWRT 0x0080 /* 段编程使能*//* FLASH 控制寄存器2 ：控制时钟分频*/#define FN_0 0x0000 /*直通*/#define FN_1 0x0001 /*2分频*/#define FN_2 0x0002 /*3分频*/#define FN_3 0x0003 /*4分频*/#define FN_4 0x0004 /*5分频*/#define FN_5 0x0005 /*6分频*/#define FN_6 0x0006 /*7分频*/#define FN_7 0x0007 /*8分频*/#define FN_8 0x0008 /*9分频*/#define FN_9 0x0009 /*10分频*/#define FN_10 0x000A /*11分频*/#define FN_11 0x000B /*12分频*/#define FN_12 0x000C /*13分频*/#define FN_13 0x000D /*14分频*/#define FN_14 0x000E /*15分频*/#define FN_15 0x000F /*16分频*/#define FN_16 0x0010 /*17分频*/#define FN_17 0x0011 /*18分频*/#define FN_18 0x0012 /*19分频*/#define FN_19 0x0013 /*20分频*/#define FN_20 0x0014 /*21分频*/#define FN_21 0x0015 /*22分频*/#define FN_22 0x0016 /*23分频*/#define FN_23 0x0017 /*24分频*/#define FN_24 0x0018 /*25分频*/#define FN_25 0x0019 /*26分频*/#define FN_26 0x001A /*27分频*/#define FN_27 0x001B /*28分频*/#define FN_28 0x001C /*29分频*/#define FN_29 0x001D /*30分频*/#define FN_30 0x001E /*31分频*/#define FN_31 0x001F /*32分频*/#define FN_32 0x0020 /*33分频*/#define FN_33 0x0021 /*34分频*/#define FN_34 0x0022 /*35分频*/#define FN_35 0x0023 /*36分频*/#define FN_36 0x0024 /*37分频*/#define FN_37 0x0025 /*38分频*/#define FN_38 0x0026 /*39分频*/#define FN_39 0x0027 /*40分频*/#define FN_40 0x0028 /*41分频*/#define FN_41 0x0029 /*42分频*/#define FN_42 0x002A /*43分频*/#define FN_43 0x002B /*44分频*/#define FN_44 0x002C /*45分频*/#define FN_45 0x002D /*46分频*/#define FN_46 0x002E /*47分频*/#define FN_47 0x002F /*48分频*/#define FN_48 0x0030 /*49分频*/#define FN_49 0x0031 /*50分频*/#define FN_50 0x0032 /*51分频*/#define FN_51 0x0033 /*52分频*/#define FN_52 0x0034 /*53分频*/#define FN_53 0x0035 /*54分频*/#define FN_54 0x0036 /*55分频*/#define FN_55 0x0037 /*56分频*/#define FN_56 0x0038 /*57分频*/#define FN_57 0x0039 /*58分频*/#define FN_58 0x003A /*59分频*/#define FN_59 0x003B /*60分频*/#define FN_60 0x003C /*61分频*/#define FN_61 0x003D /*62分频*/#define FN_62 0x003E /*63分频*/#define FN_63 0x003F /*64分频*/#define FSSEL_0 0x0000 /* Flash时钟选择: ACLK */ #define FSSEL_1 0x0040 /* Flash时钟选择: MCLK */ #define FSSEL_2 0x0080 /* Flash时钟选择: SMCLK */ #define FSSEL_3 0x00C0 /* Flash时钟选择: SMCLK */ /* FLASH 控制寄存器3：状态标志*/#define BUSY 0x0001 /* Flash忙标志*/#define KEYV 0x0002 /* Flash安全键值出错标志*/#define ACCVIFG 0x0004 /* Flash非法访问中断标志*/#define WAIT 0x0008 /* 等待指示信号位*/#define LOCK 0x0010 /* 锁定位*/#define EMEX 0x0020 /* 紧急退出位*//************************************************************ * Comparator A 比较器A寄存器定义************************************************************/#define CACTL1_ 0x0059 /* 比较器A控制寄存器1 */sfrb CACTL1 = CACTL1_;#define CACTL2_ 0x005A /* 比较器A控制寄存器2 */sfrb CACTL2 = CACTL2_;#define CAPD_ 0x005B /*比较器A端口禁止寄存器*/sfrb CAPD = CAPD_;/* 比较器A控制寄存器1 */#define CAIFG 0x01 /*比较器A中断标志*/#define CAIE 0x02 /* 比较器A中断使能*/#define CAIES 0x04 /* 比较器A中断边沿触发选择0:上升延1:下降延*/ #define CAON 0x08 /* 比较器电源开关*/#define CAREF0 0x10 /* 选择参考源位0 */#define CAREF1 0x20 /* 选择参考源位1 */#define CARSEL 0x40 /* 选择内部参考源加到比较器的正端或负端*/#define CAEX 0x80 /* 交换比较器的输入端*/#define CAREF_0 0x00 /* 选择参考源0 : Off 使用外部参考源*/#define CAREF_1 0x10 /* 选择参考源1 : 0.25*Vcc为参考源*/#define CAREF_2 0x20 /* 选择参考源2 : 0.5*Vcc为参考源*/#define CAREF_3 0x30 /* 选择参考源3 : Vt*//* 比较器A控制寄存器2 */#define CAOUT 0x01 /* 比较器输出*/#define CAF 0x02 /* 选择比较器是否经过RC低通滤波器*/#define P2CA0 0x04 /* 外部引脚信号连接到比较器A的CA0 */#define P2CA1 0x08 /* 外部引脚信号连接到比较器A的CA1 */#define CACTL24 0x10#define CACTL25 0x20#define CACTL26 0x40#define CACTL27 0x80#define CAPD0 0x01 /* Comp. A Disable Input Buffer of Port Register .0 */#define CAPD1 0x02 /* Comp. A Disable Input Buffer of Port Register .1 */#define CAPD2 0x04 /* Comp. A Disable Input Buffer of Port Register .2 */#define CAPD3 0x08 /* Comp. A Disable Input Buffer of Port Register .3 */#define CAPD4 0x10 /* Comp. A Disable Input Buffer of Port Register .4 */#define CAPD5 0x20 /* Comp. A Disable Input Buffer of Port Register .5 */#define CAPD6 0x40 /* Comp. A Disable Input Buffer of Port Register .6 */#define CAPD7 0x80 /* Comp. A Disable Input Buffer of Port Register .7 *//************************************************************* ADC12 A/D采样寄存器定义************************************************************//*ADC12转换控制类寄存器*/#define ADC12CTL0_ 0x0;' /* ADC12 Control 0 */sfrw ADC12CTL0 = ADC12CTL0_;#define ADC12CTL1_ 0x01A2 /* ADC12 Control 1 */sfrw ADC12CTL1 = ADC12CTL1_;/*ADC12中断控制类寄存器*/#define ADC12IFG_ 0x01A4 /* ADC12 Interrupt Flag */sfrw ADC12IFG = ADC12IFG_;#define ADC12IE_ 0x01A6 /* ADC12 Interrupt Enable */sfrw ADC12IE = ADC12IE_;#define ADC12IV_ 0x01A8 /* ADC12 Interrupt Vector Word */sfrw ADC12IV = ADC12IV_;/*ADC12存贮器类寄存器*/#define ADC12MEM_ 0x0140 /* ADC12 Conversion Memory */#ifndef __IAR_SYSTEMS_ICC#define ADC12MEM ADC12MEM_ /* ADC12 Conversion Memory (for assembler) */ #else#define ADC12MEM ((int*) ADC12MEM_) /* ADC12 Conversion Memory (for C) */ #endif#define ADC12MEM0_ ADC12MEM_ /* ADC12 Conversion Memory 0 */sfrw ADC12MEM0 = ADC12MEM0_;#define ADC12MEM1_ 0x0142 /* ADC12 Conversion Memory 1 */sfrw ADC12MEM1 = ADC12MEM1_;#define ADC12MEM2_ 0x0144 /* ADC12 Conversion Memory 2 */sfrw ADC12MEM2 = ADC12MEM2_;#define ADC12MEM3_ 0x0146 /* ADC12 Conversion Memory 3 */sfrw ADC12MEM3 = ADC12MEM3_;#define ADC12MEM4_ 0x0148 /* ADC12 Conversion Memory 4 */sfrw ADC12MEM4 = ADC12MEM4_;#define ADC12MEM5_ 0x014A /* ADC12 Conversion Memory 5 */sfrw ADC12MEM5 = ADC12MEM5_;#define ADC12MEM6_ 0x014C /* ADC12 Conversion Memory 6 */sfrw ADC12MEM6 = ADC12MEM6_;#define ADC12MEM7_ 0x014E /* ADC12 Conversion Memory 7 */。

/***************************************************************************** /* Legacy Header File /* Not recommended for use in new projects. /* Please use the msp430.h file or the device specific header file /***************************************************************************** /********************************************************************** Standard register and bit definitions for the Texas Instruments* MSP430 microcontroller.** This file supports assembler and C development for* MSP430x44x devices.** Texas Instruments, Version 2.6** Rev. 1.1, Enclose all #define statements with parentheses* Rev. 1.2, Defined vectors for USART (in addition to UART)* Rev. 1.3, Added USART special function labels (UxME, UxIE, UxIFG)* Rev. 1.4, Removed incorrect label 'BTRESET'* Added missing labels for FLL* Rev. 2.1, Fixed definition of FLL_DIV0 and FLL_DIV1* Alignment of defintions in Users Guide and of version numbers* Rev. 2.11,Removed definition of LCDLOWR (not available at 4xx devices)* Rev. 2.2, Fixed type in ADC12 bit definitions (replaced ADC10 with ADC12)* Rev. 2.3, Removed unused def of TASSEL2 / TBSSEL2* Rev. 2.4, Added VLD bits in SVS module* Rev. 2.5, Removed definitions for BTRESET* Rev. 2.6, added definitions for Interrupt Vectors xxIV*********************************************************************/#ifndef __msp430x44x#define __msp430x44x#ifdef __IAR_SYSTEMS_ICC__#ifndef _SYSTEM_BUILD#pragma system_include#endif#endif#if (((__TID__ >> 8) & 0x7F) != 0x2b) /* 0x2b = 43 dec */#error msp430x44x.h file for use with ICC430/A430 only#endif#ifdef __IAR_SYSTEMS_ICC__#include "in430.h"#pragma language=extended#define DEFC(name, address) __no_init volatile unsigned char name @ address;#define DEFW(name, address) __no_init volatile unsigned short name @ address;#define DEFXC volatile unsigned char#define DEFXW volatile unsigned short#endif/* __IAR_SYSTEMS_ICC__ */#ifdef __IAR_SYSTEMS_ASM__#define DEFC(name, address) sfrb name = address;#define DEFW(name, address) sfrw name = address;#endif/* __IAR_SYSTEMS_ASM__*/#ifdef __cplusplus#define READ_ONLY#else#define READ_ONLY const#endif/************************************************************ * STANDARD BITS************************************************************/ #define BIT0 (0x0001u)#define BIT1 (0x0002u)#define BIT2 (0x0004u)#define BIT3 (0x0008u)#define BIT4 (0x0010u)#define BIT5 (0x0020u)#define BIT6 (0x0040u)#define BIT7 (0x0080u)#define BIT8 (0x0100u)#define BIT9 (0x0200u)#define BITA (0x0400u)#define BITB (0x0800u)#define BITC (0x1000u)#define BITD (0x2000u)#define BITE (0x4000u)#define BITF (0x8000u)/************************************************************ * STATUS REGISTER BITS************************************************************/ #define C (0x0001u)#define Z (0x0002u)#define N (0x0004u)#define V (0x0100u)#define GIE (0x0008u)#define CPUOFF (0x0010u)#define OSCOFF (0x0020u)#define SCG0 (0x0040u)#define SCG1 (0x0080u)/* Low Power Modes coded with Bits 4-7 in SR */#ifndef __IAR_SYSTEMS_ICC__ /* Begin #defines for assembler */#define LPM0 (CPUOFF)#define LPM1 (SCG0+CPUOFF)#define LPM2 (SCG1+CPUOFF)#define LPM3 (SCG1+SCG0+CPUOFF)#define LPM4 (SCG1+SCG0+OSCOFF+CPUOFF)/* End #defines for assembler */#else/* Begin #defines for C */#define LPM0_bits (CPUOFF)#define LPM1_bits (SCG0+CPUOFF)#define LPM2_bits (SCG1+CPUOFF)#define LPM3_bits (SCG1+SCG0+CPUOFF)#define LPM4_bits (SCG1+SCG0+OSCOFF+CPUOFF)#include "in430.h"#define LPM0 _BIS_SR(LPM0_bits) /* Enter Low Power Mode 0 */#define LPM0_EXIT _BIC_SR_IRQ(LPM0_bits) /* Exit Low Power Mode 0 */#define LPM1 _BIS_SR(LPM1_bits) /* Enter Low Power Mode 1 */#define LPM1_EXIT _BIC_SR_IRQ(LPM1_bits) /* Exit Low Power Mode 1 */#define LPM2 _BIS_SR(LPM2_bits) /* Enter Low Power Mode 2 */#define LPM2_EXIT _BIC_SR_IRQ(LPM2_bits) /* Exit Low Power Mode 2 */#define LPM3 _BIS_SR(LPM3_bits) /* Enter Low Power Mode 3 */#define LPM3_EXIT _BIC_SR_IRQ(LPM3_bits) /* Exit Low Power Mode 3 */#define LPM4 _BIS_SR(LPM4_bits) /* Enter Low Power Mode 4 */#define LPM4_EXIT _BIC_SR_IRQ(LPM4_bits) /* Exit Low Power Mode 4 */#endif/* End #defines for C *//************************************************************* PERIPHERAL FILE MAP************************************************************//************************************************************* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS************************************************************/#define IE1_ (0x0000u) /* Interrupt Enable 1 */DEFC( IE1 , IE1_)#define U0IE IE1 /* UART0 Interrupt Enable Register */ #define WDTIE (0x01)#define OFIE (0x02)#define NMIIE (0x10)#define ACCVIE (0x20)#define URXIE0 (0x40)#define UTXIE0 (0x80)#define IFG1_ (0x0002u) /* Interrupt Flag 1 */DEFC( IFG1 , IFG1_)#define U0IFG IFG1 /* UART0 Interrupt Flag Register */#define WDTIFG (0x01)#define OFIFG (0x02)#define NMIIFG (0x10)#define URXIFG0 (0x40)#define UTXIFG0 (0x80)#define ME1_ (0x0004u) /* Module Enable 1 */DEFC( ME1 , ME1_)#define U0ME ME1 /* UART0 Module Enable Register */#define URXE0 (0x40)#define UTXE0 (0x80)#define USPIE0 (0x40)#define IE2_ (0x0001u) /* Interrupt Enable 2 */DEFC( IE2 , IE2_)#define U1IE IE2 /* UART1 Interrupt Enable Register */#define URXIE1 (0x10)#define UTXIE1 (0x20)#define BTIE (0x80)#define IFG2_ (0x0003u) /* Interrupt Flag 2 */DEFC( IFG2 , IFG2_)#define U1IFG IFG2 /* UART1 Interrupt Flag Register */#define URXIFG1 (0x10)#define UTXIFG1 (0x20)#define BTIFG (0x80)#define ME2_ (0x0005u) /* Module Enable 2 */DEFC( ME2 , ME2_)#define U1ME ME2 /* UART1 Module Enable Register */#define URXE1 (0x10)#define UTXE1 (0x20)#define USPIE1 (0x10)/************************************************************* WATCHDOG TIMER************************************************************/#define __MSP430_HAS_WDT__ /* Definition to show that Module is ava #define WDTCTL_ (0x0120u) /* Watchdog Timer Control */DEFW( WDTCTL , WDTCTL_)/* The bit names have been prefixed with "WDT" */#define WDTIS0 (0x0001u)#define WDTIS1 (0x0002u)#define WDTSSEL (0x0004u)#define WDTCNTCL (0x0008u)#define WDTTMSEL (0x0010u)#define WDTNMI (0x0020u)#define WDTNMIES (0x0040u)#define WDTHOLD (0x0080u)#define WDTPW (0x5A00u)/* WDT-interval times [1ms] coded with Bits 0-2 *//* WDT is clocked by fSMCLK (assumed 1MHz) */#define WDT_MDLY_32 (WDTPW+WDTTMSEL+WDTCNTCL) #define WDT_MDLY_8 (WDTPW+WDTTMSEL+WDTCNTCL+WDTIS0) #define WDT_MDLY_0_5 (WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1) #define WDT_MDLY_0_064 (WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1+WDTIS0) /* WDT is clocked by fACLK (assumed 32KHz) */#define WDT_ADLY_1000 (WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL) #define WDT_ADLY_250 (WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS0) #define WDT_ADLY_16 (WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1) #define WDT_ADLY_1_9 (WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0) /* Watchdog mode -> reset after expired time *//* WDT is clocked by fSMCLK (assumed 1MHz) */#define WDT_MRST_32 (WDTPW+WDTCNTCL) #define WDT_MRST_8 (WDTPW+WDTCNTCL+WDTIS0) #define WDT_MRST_0_5 (WDTPW+WDTCNTCL+WDTIS1) #define WDT_MRST_0_064 (WDTPW+WDTCNTCL+WDTIS1+WDTIS0) /* WDT is clocked by fACLK (assumed 32KHz) */#define WDT_ARST_1000 (WDTPW+WDTCNTCL+WDTSSEL) #define WDT_ARST_250 (WDTPW+WDTCNTCL+WDTSSEL+WDTIS0) #define WDT_ARST_16 (WDTPW+WDTCNTCL+WDTSSEL+WDTIS1) #define WDT_ARST_1_9 (WDTPW+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0) /* INTERRUPT CONTROL *//* These two bits are defined in the Special Function Registers *//* #define WDTIE 0x01 *//* #define WDTIFG 0x01 *//************************************************************* HARDWARE MULTIPLIER************************************************************/#define __MSP430_HAS_MPY__ /* Definition to show that Module is ava #define MPY_ (0x0130u) /* Multiply Unsigned/Operand 1 */DEFW( MPY , MPY_)#define MPYS_ (0x0132u) /* Multiply Signed/Operand 1 */DEFW( MPYS , MPYS_)#define MAC_ (0x0134u) /* Multiply Unsigned and Accumulate/Ope DEFW( MAC , MAC_)#define MACS_ (0x0136u) /* Multiply Signed and Accumulate/Opera DEFW( MACS , MACS_)#define OP2_ (0x0138u) /* Operand 2 */DEFW( OP2 , OP2_)#define RESLO_ (0x013Au) /* Result Low Word */DEFW( RESLO , RESLO_)#define RESHI_ (0x013Cu) /* Result High Word */DEFW( RESHI , RESHI_)#define SUMEXT_ (0x013Eu) /* Sum Extend */READ_ONLY DEFW( SUMEXT , SUMEXT_)/************************************************************* DIGITAL I/O Port1/2************************************************************/#define __MSP430_HAS_PORT1__ /* Definition to show that Module is ava #define __MSP430_HAS_PORT2__ /* Definition to show that Module is ava #define P1IN_ (0x0020u) /* Port 1 Input */READ_ONLY DEFC( P1IN , P1IN_)#define P1OUT_ (0x0021u) /* Port 1 Output */DEFC( P1OUT , P1OUT_)#define P1DIR_ (0x0022u) /* Port 1 Direction */DEFC( P1DIR , P1DIR_)#define P1IFG_ (0x0023u) /* Port 1 Interrupt Flag */DEFC( P1IFG , P1IFG_)#define P1IES_ (0x0024u) /* Port 1 Interrupt Edge Select */ DEFC( P1IES , P1IES_)#define P1IE_ (0x0025u) /* Port 1 Interrupt Enable */DEFC( P1IE , P1IE_)#define P1SEL_ (0x0026u) /* Port 1 Selection */DEFC( P1SEL , P1SEL_)#define P2IN_ (0x0028u) /* Port 2 Input */READ_ONLY DEFC( P2IN , P2IN_)#define P2OUT_ (0x0029u) /* Port 2 Output */DEFC( P2OUT , P2OUT_)#define P2DIR_ (0x002Au) /* Port 2 Direction */DEFC( P2DIR , P2DIR_)#define P2IFG_ (0x002Bu) /* Port 2 Interrupt Flag */DEFC( P2IFG , P2IFG_)#define P2IES_ (0x002Cu) /* Port 2 Interrupt Edge Select */ DEFC( P2IES , P2IES_)#define P2IE_ (0x002Du) /* Port 2 Interrupt Enable */DEFC( P2IE , P2IE_)#define P2SEL_ (0x002Eu) /* Port 2 Selection */DEFC( P2SEL , P2SEL_)/************************************************************* DIGITAL I/O Port3/4************************************************************/#define __MSP430_HAS_PORT3__ /* Definition to show that Module is ava #define __MSP430_HAS_PORT4__ /* Definition to show that Module is ava #define P3IN_ (0x0018u) /* Port 3 Input */READ_ONLY DEFC( P3IN , P3IN_)#define P3OUT_ (0x0019u) /* Port 3 Output */DEFC( P3OUT , P3OUT_)#define P3DIR_ (0x001Au) /* Port 3 Direction */DEFC( P3DIR , P3DIR_)#define P3SEL_ (0x001Bu) /* Port 3 Selection */DEFC( P3SEL , P3SEL_)#define P4IN_ (0x001Cu) /* Port 4 Input */READ_ONLY DEFC( P4IN , P4IN_)#define P4OUT_ (0x001Du) /* Port 4 Output */DEFC( P4OUT , P4OUT_)#define P4DIR_ (0x001Eu) /* Port 4 Direction */DEFC( P4DIR , P4DIR_)#define P4SEL_ (0x001Fu) /* Port 4 Selection */DEFC( P4SEL , P4SEL_)/************************************************************* DIGITAL I/O Port5/6************************************************************/#define __MSP430_HAS_PORT5__ /* Definition to show that Module is ava #define __MSP430_HAS_PORT6__ /* Definition to show that Module is ava #define P5IN_ (0x0030u) /* Port 5 Input */READ_ONLY DEFC( P5IN , P5IN_)#define P5OUT_ (0x0031u) /* Port 5 Output */DEFC( P5OUT , P5OUT_)#define P5DIR_ (0x0032u) /* Port 5 Direction */DEFC( P5DIR , P5DIR_)#define P5SEL_ (0x0033u) /* Port 5 Selection */DEFC( P5SEL , P5SEL_)#define P6IN_ (0x0034u) /* Port 6 Input */READ_ONLY DEFC( P6IN , P6IN_)#define P6OUT_ (0x0035u) /* Port 6 Output */DEFC( P6OUT , P6OUT_)#define P6DIR_ (0x0036u) /* Port 6 Direction */DEFC( P6DIR , P6DIR_)#define P6SEL_ (0x0037u) /* Port 6 Selection */DEFC( P6SEL , P6SEL_)/************************************************************* BASIC TIMER************************************************************/#define __MSP430_HAS_BT__ /* Definition to show that Module is ava #define BTCTL_ (0x0040u) /* Basic Timer Control */DEFC( BTCTL , BTCTL_)/* The bit names have been prefixed with "BT" */#define BTIP0 (0x01)#define BTIP1 (0x02)#define BTIP2 (0x04)#define BTFRFQ0 (0x08)#define BTFRFQ1 (0x10)#define BTDIV (0x20) /* fCLK2 = ACLK:256 */ #define BTHOLD (0x40) /* BT1 is held if this #define BTSSEL (0x80) /* fBT = fMCLK (main cl #define BTCNT1_ (0x0046u) /* Basic Timer Count 1 */DEFC( BTCNT1 , BTCNT1_)#define BTCNT2_ (0x0047u) /* Basic Timer Count 2 */DEFC( BTCNT2 , BTCNT2_)/* Frequency of the BTCNT2 coded with Bit 5 and 7 in BTCTL */#define BT_fCLK2_ACLK (0x00)#define BT_fCLK2_ACLK_DIV256 (BTDIV)#define BT_fCLK2_MCLK (BTSSEL)/* Interrupt interval time fINT coded with Bits 0-2 in BTCTL */#define BT_fCLK2_DIV2 (0x00) /* fINT = fCLK2:2 (defau #define BT_fCLK2_DIV4 (BTIP0) /* fINT = fCLK2:4 */#define BT_fCLK2_DIV8 (BTIP1) /* fINT = fCLK2:8 */#define BT_fCLK2_DIV16 (BTIP1+BTIP0) /* fINT = fCLK2:16 */#define BT_fCLK2_DIV32 (BTIP2) /* fINT = fCLK2:32 */#define BT_fCLK2_DIV64 (BTIP2+BTIP0) /* fINT = fCLK2:64 */#define BT_fCLK2_DIV128 (BTIP2+BTIP1) /* fINT = fCLK2:128 */#define BT_fCLK2_DIV256 (BTIP2+BTIP1+BTIP0) /* fINT = fCLK2:256 *//* Frequency of LCD coded with Bits 3-4 */#define BT_fLCD_DIV32 (0x00) /* fLCD = fACLK:32 (defa #define BT_fLCD_DIV64 (BTFRFQ0) /* fLCD = fACLK:64 */#define BT_fLCD_DIV128 (BTFRFQ1) /* fLCD = fACLK:128 */#define BT_fLCD_DIV256 (BTFRFQ1+BTFRFQ0) /* fLCD = fACLK:256 *//* LCD frequency values with fBT=fACLK */#define BT_fLCD_1K (0x00) /* fACLK:32 (default) */ #define BT_fLCD_512 (BTFRFQ0) /* fACLK:64 */#define BT_fLCD_256 (BTFRFQ1) /* fACLK:128 */#define BT_fLCD_128 (BTFRFQ1+BTFRFQ0) /* fACLK:256 *//* LCD frequency values with fBT=fMCLK */#define BT_fLCD_31K (BTSSEL) /* fMCLK:32 */#define BT_fLCD_15_5K (BTSSEL+BTFRFQ0) /* fMCLK:64 */#define BT_fLCD_7_8K (BTSSEL+BTFRFQ1+BTFRFQ0) /* fMCLK:256 *//* with assumed vlues of fACLK=32KHz, fMCLK=1MHz *//* fBT=fACLK is thought for longer interval times */#define BT_ADLY_0_064 (0x00) /* 0.064ms interval (def #define BT_ADLY_0_125 (BTIP0) /* 0.125ms " */#define BT_ADLY_0_25 (BTIP1) /* 0.25ms " */#define BT_ADLY_0_5 (BTIP1+BTIP0) /* 0.5ms " */#define BT_ADLY_1 (BTIP2) /* 1ms " */#define BT_ADLY_2 (BTIP2+BTIP0) /* 2ms " */#define BT_ADLY_4 (BTIP2+BTIP1) /* 4ms " */#define BT_ADLY_8 (BTIP2+BTIP1+BTIP0) /* 8ms " */#define BT_ADLY_16 (BTDIV) /* 16ms " */#define BT_ADLY_32 (BTDIV+BTIP0) /* 32ms " */#define BT_ADLY_64 (BTDIV+BTIP1) /* 64ms " */#define BT_ADLY_125 (BTDIV+BTIP1+BTIP0) /* 125ms " */#define BT_ADLY_250 (BTDIV+BTIP2) /* 250ms " */#define BT_ADLY_500 (BTDIV+BTIP2+BTIP0) /* 500ms " */#define BT_ADLY_1000 (BTDIV+BTIP2+BTIP1) /* 1000ms " */#define BT_ADLY_2000 (BTDIV+BTIP2+BTIP1+BTIP0) /* 2000ms " *//* fCLK2=fMCLK (1MHz) is thought for short interval times *//* the timing for short intervals is more precise than ACLK *//* NOTE *//* Be sure that the SCFQCTL-Register is set to 01Fh so that fMCLK=1MHz *//* Too low interval time results in interrupts too frequent for the processor #define BT_MDLY_0_002 (BTSSEL) /* 0.002ms interval #define BT_MDLY_0_004 (BTSSEL+BTIP0) /* 0.004ms " #define BT_MDLY_0_008 (BTSSEL+BTIP1) /* 0.008ms " #define BT_MDLY_0_016 (BTSSEL+BTIP1+BTIP0) /* 0.016ms " #define BT_MDLY_0_032 (BTSSEL+BTIP2) /* 0.032ms " */#define BT_MDLY_0_064 (BTSSEL+BTIP2+BTIP0) /* 0.064ms " */#define BT_MDLY_0_125 (BTSSEL+BTIP2+BTIP1) /* 0.125ms " */#define BT_MDLY_0_25 (BTSSEL+BTIP2+BTIP1+BTIP0)/* 0.25ms " *//* Reset/Hold coded with Bits 6-7 in BT(1)CTL *//* this is for BT *///#define BTRESET_CNT1 (BTRESET) /* BTCNT1 is reset while BTR //#define BTRESET_CNT1_2 (BTRESET+BTDIV) /* BTCNT1 .AND. BTCNT2 are r /* this is for BT1 */#define BTHOLD_CNT1 (BTHOLD) /* BTCNT1 is held while BTHOLD #define BTHOLD_CNT1_2 (BTHOLD+BTDIV) /* BT1CNT1 .AND. BT1CNT2 are h /* INTERRUPT CONTROL BITS *//* #define BTIE 0x80 *//* #define BTIFG 0x80 *//************************************************************* SYSTEM CLOCK, FLL+************************************************************/#define __MSP430_HAS_FLLPLUS__ /* Definition to show that Module is ava #define SCFI0_ (0x0050u) /* System Clock Frequency Integrator 0 DEFC( SCFI0 , SCFI0_)#define FN_2 (0x04) /* fDCOCLK = 1.4-12MHz*/#define FN_3 (0x08) /* fDCOCLK = 2.2-17Mhz*/#define FN_4 (0x10) /* fDCOCLK = 3.2-25Mhz*/#define FN_8 (0x20) /* fDCOCLK = 5-40Mhz*/#define FLLD0 (0x40) /* Loop Divider Bit : 0 */#define FLLD1 (0x80) /* Loop Divider Bit : 1 */#define FLLD_1 (0x00) /* Multiply Selected Loop Freq. By 1 */ #define FLLD_2 (0x40) /* Multiply Selected Loop Freq. By 2 */ #define FLLD_4 (0x80) /* Multiply Selected Loop Freq. By 4 */ #define FLLD_8 (0xC0) /* Multiply Selected Loop Freq. By 8 */ #define SCFI1_ (0x0051u) /* System Clock Frequency Integrator 1 DEFC( SCFI1 , SCFI1_)#define SCFQCTL_ (0x0052u) /* System Clock Frequency Control */ DEFC( SCFQCTL , SCFQCTL_)/* System clock frequency values fMCLK coded with Bits 0-6 in SCFQCTL *//* #define SCFQ_32K 0x00 fMCLK=1*fACLK #define SCFQ_64K (0x01) /* fMCLK=2*fACLK #define SCFQ_128K (0x03) /* fMCLK=4*fACLK */#define SCFQ_256K (0x07) /* fMCLK=8*fACLK */#define SCFQ_512K (0x0F) /* fMCLK=16*fACLK */#define SCFQ_1M (0x1F) /* fMCLK=32*fACLK */#define SCFQ_2M (0x3F) /* fMCLK=64*fACLK */#define SCFQ_4M (0x7F) /* fMCLK=128*fACLK */#define SCFQ_M (0x80) /* Modulation Disable *#define FLL_CTL0_ (0x0053u) /* FLL+ Control 0 */DEFC( FLL_CTL0 , FLL_CTL0_)#define DCOF (0x01) /* DCO Fault Flag */#define LFOF (0x02) /* Low Frequency Oscill #define XT1OF (0x04) /* High Frequency Oscil #define XT2OF (0x08) /* High Frequency Oscil #define OSCCAP0 (0x10) /* XIN/XOUT Cap 0 */#define OSCCAP1 (0x20) /* XIN/XOUT Cap 1 */#define XTS_FLL (0x40) /* 1: Selects high-freq #define DCOPLUS (0x80) /* DCO+ Enable */#define XCAP0PF (0x00) /* XIN Cap = XOUT Cap = #define XCAP10PF (0x10) /* XIN Cap = XOUT Cap = #define XCAP14PF (0x20) /* XIN Cap = XOUT Cap = #define XCAP18PF (0x30) /* XIN Cap = XOUT Cap = #define OSCCAP_0 (0x00) /* XIN Cap = XOUT Cap = #define OSCCAP_1 (0x10) /* XIN Cap = XOUT Cap = #define OSCCAP_2 (0x20) /* XIN Cap = XOUT Cap = #define OSCCAP_3 (0x30) /* XIN Cap = XOUT Cap =#define FLL_CTL1_ (0x0054u) /* FLL+ Control 1 */DEFC( FLL_CTL1 , FLL_CTL1_)#define FLL_DIV0 (0x01) /* FLL+ Divide Px.x/ACL #define FLL_DIV1 (0x02) /* FLL+ Divide Px.x/ACL #define SELS (0x04) /* Peripheral Module Cl #define SELM0 (0x08) /* MCLK Source Select 0 #define SELM1 (0x10) /* MCLK Source Select 1 #define XT2OFF (0x20) /* High Frequency Oscil #define SMCLKOFF (0x40) /* Peripheral Module Cl#define FLL_DIV_1 (0x00) /* FLL+ Divide Px.x/ACL #define FLL_DIV_2 (0x01) /* FLL+ Divide Px.x/ACL #define FLL_DIV_4 (0x02) /* FLL+ Divide Px.x/ACL #define FLL_DIV_8 (0x03) /* FLL+ Divide Px.x/ACL#define SELM_DCO (0x00) /* Select DCO for CPU M #define SELM_XT2 (0x10) /* Select XT2 for CPU M #define SELM_A (0x18) /* Select A (from LFXT1 /* INTERRUPT CONTROL BITS *//* These two bits are defined in the Special Function Registers *//* #define OFIFG 0x02 *//* #define OFIE 0x02 *//************************************************************* Brown-Out, Supply Voltage Supervision (SVS)************************************************************/#define __MSP430_HAS_SVS__ /* Definition to show that Module is ava#define SVSCTL_ (0x0056u) /* SVS Control */DEFC( SVSCTL , SVSCTL_)#define SVSFG (0x01) /* SVS Flag */#define SVSOP (0x02) /* SVS output (read only) */#define SVSON (0x04) /* Switches the SVS on/off */#define PORON (0x08) /* Enable POR Generation if Low Voltage #define VLD0 (0x10)#define VLD1 (0x20)#define VLD2 (0x40)#define VLD3 (0x80)#define VLDON (0x10)#define VLDOFF (0x00)#define VLD_1_8V (0x10)/************************************************************* LCD************************************************************/#define __MSP430_HAS_LCD4__ /* Definition to show that Module is ava #define LCDCTL_ (0x0090u) /* LCD Control */DEFC( LCDCTL , LCDCTL_)/* the names of the mode bits are different from the spec */#define LCDON (0x01)//#define LCDLOWR (0x02)#define LCDSON (0x04)#define LCDMX0 (0x08)#define LCDMX1 (0x10)#define LCDP0 (0x20)#define LCDP1 (0x40)#define LCDP2 (0x80)/* Display modes coded with Bits 2-4 */#define LCDSTATIC (LCDSON)#define LCD2MUX (LCDMX0+LCDSON)#define LCD3MUX (LCDMX1+LCDSON)#define LCD4MUX (LCDMX1+LCDMX0+LCDSON)/* Group select code with Bits 5-7 Seg.lines Dig.output #define LCDSG0 (0x00) /* --------- Port Only #define LCDSG0_1 (LCDP0) /* S0 - S15 see Datas #define LCDSG0_2 (LCDP1) /* S0 - S19 see Datas #define LCDSG0_3 (LCDP1+LCDP0) /* S0 - S23 see Datas #define LCDSG0_4 (LCDP2) /* S0 - S27 see Datas #define LCDSG0_5 (LCDP2+LCDP0) /* S0 - S31 see Datas #define LCDSG0_6 (LCDP2+LCDP1) /* S0 - S35 see Datas #define LCDSG0_7 (LCDP2+LCDP1+LCDP0) /* S0 - S39 see Datas /* NOTE: YOU CAN ONLY USE THE 'S' OR 'G' DECLARATIONS FOR A COMMAND *//* MOV #LCDSG0_3+LCDOG2_7,&LCDCTL ACTUALY MEANS MOV #LCDP1,&LCDCTL! */#define LCDOG1_7 (0x00) /* --------- Port Only #define LCDOG2_7 (LCDP0) /* S0 - S15 see Datas #define LCDOG3_7 (LCDP1) /* S0 - S19 see Datas #define LCDOG4_7 (LCDP1+LCDP0) /* S0 - S23 see Datas#define LCDOG5_7 (LCDP2) /* S0 - S27 see Datas #define LCDOG6_7 (LCDP2+LCDP0) /* S0 - S31 see Datas #define LCDOG7 (LCDP2+LCDP1) /* S0 - S35 see Datas #define LCDOGOFF (LCDP2+LCDP1+LCDP0) /* S0 - S39 see Datas #define LCDMEM_ (0x0091u) /* LCD Memory */#ifndef __IAR_SYSTEMS_ICC__#define LCDMEM (LCDMEM_) /* LCD Memory (for assembler) */#else#define LCDMEM ((char*) LCDMEM_) /* LCD Memory (for C) */#endif#define LCDM1_ (0x0091u) /* LCD Memory 1 */DEFC( LCDM1 , LCDM1_)#define LCDM2_ (0x0092u) /* LCD Memory 2 */DEFC( LCDM2 , LCDM2_)#define LCDM3_ (0x0093u) /* LCD Memory 3 */DEFC( LCDM3 , LCDM3_)#define LCDM4_ (0x0094u) /* LCD Memory 4 */DEFC( LCDM4 , LCDM4_)#define LCDM5_ (0x0095u) /* LCD Memory 5 */DEFC( LCDM5 , LCDM5_)#define LCDM6_ (0x0096u) /* LCD Memory 6 */DEFC( LCDM6 , LCDM6_)#define LCDM7_ (0x0097u) /* LCD Memory 7 */DEFC( LCDM7 , LCDM7_)#define LCDM8_ (0x0098u) /* LCD Memory 8 */DEFC( LCDM8 , LCDM8_)#define LCDM9_ (0x0099u) /* LCD Memory 9 */DEFC( LCDM9 , LCDM9_)#define LCDM10_ (0x009Au) /* LCD Memory 10 */DEFC( LCDM10 , LCDM10_)#define LCDM11_ (0x009Bu) /* LCD Memory 11 */DEFC( LCDM11 , LCDM11_)#define LCDM12_ (0x009Cu) /* LCD Memory 12 */DEFC( LCDM12 , LCDM12_)#define LCDM13_ (0x009Du) /* LCD Memory 13 */DEFC( LCDM13 , LCDM13_)#define LCDM14_ (0x009Eu) /* LCD Memory 14 */DEFC( LCDM14 , LCDM14_)#define LCDM15_ (0x009Fu) /* LCD Memory 15 */DEFC( LCDM15 , LCDM15_)#define LCDM16_ (0x00A0u) /* LCD Memory 16 */DEFC( LCDM16 , LCDM16_)#define LCDM17_ (0x00A1u) /* LCD Memory 17 */DEFC( LCDM17 , LCDM17_)#define LCDM18_ (0x00A2u) /* LCD Memory 18 */DEFC( LCDM18 , LCDM18_)#define LCDM19_ (0x00A3u) /* LCD Memory 19 */DEFC( LCDM19 , LCDM19_)#define LCDM20_ (0x00A4u) /* LCD Memory 20 */DEFC( LCDM20 , LCDM20_)#define LCDMA (LCDM10) /* LCD Memory A */#define LCDMB (LCDM11) /* LCD Memory B */#define LCDMC (LCDM12) /* LCD Memory C */#define LCDMD (LCDM13) /* LCD Memory D */#define LCDME (LCDM14) /* LCD Memory E */#define LCDMF (LCDM15) /* LCD Memory F *//************************************************************* USART************************************************************//* UxCTL */#define PENA (0x80) /* Parity enable */#define PEV (0x40) /* Parity 0:odd / 1:even */#define SPB (0x20) /* Stop Bits 0:one / 1: two */#define CHAR (0x10) /* Data 0:7-bits / 1:8-bits */#define LISTEN (0x08) /* Listen mode */#define SYNC (0x04) /* UART / SPI mode */#define MM (0x02) /* Master Mode off/on */#define SWRST (0x01) /* USART Software Reset *//* UxTCTL */#define CKPH (0x80) /* SPI: Clock Phase */#define CKPL (0x40) /* Clock Polarity */#define SSEL1 (0x20) /* Clock Source Select 1 */#define SSEL0 (0x10) /* Clock Source Select 0 */#define URXSE (0x08) /* Receive Start edge select */#define TXWAKE (0x04) /* TX Wake up mode */#define STC (0x02) /* SPI: STC enable 0:on / 1:off */#define TXEPT (0x01) /* TX Buffer empty *//* UxRCTL */#define FE (0x80) /* Frame Error */#define PE (0x40) /* Parity Error */#define OE (0x20) /* Overrun Error */#define BRK (0x10) /* Break detected */#define URXEIE (0x08) /* RX Error interrupt enable */#define URXWIE (0x04) /* RX Wake up interrupt enable */#define RXWAKE (0x02) /* RX Wake up detect */#define RXERR (0x01) /* RX Error Error *//************************************************************* USART 0************************************************************/#define __MSP430_HAS_UART0__ /* Definition to show that Module is ava #define U0CTL_ (0x0070u) /* USART 0 Control */DEFC( U0CTL , U0CTL_)#define U0TCTL_ (0x0071u) /* USART 0 Transmit Control */DEFC( U0TCTL , U0TCTL_)#define U0RCTL_ (0x0072u) /* USART 0 Receive Control */DEFC( U0RCTL , U0RCTL_)#define U0MCTL_ (0x0073u) /* USART 0 Modulation Control */DEFC( U0MCTL , U0MCTL_)#define U0BR0_ (0x0074u) /* USART 0 Baud Rate 0 */DEFC( U0BR0 , U0BR0_)#define U0BR1_ (0x0075u) /* USART 0 Baud Rate 1 */DEFC( U0BR1 , U0BR1_)#define U0RXBUF_ (0x0076u) /* USART 0 Receive Buffer */READ_ONLY DEFC( U0RXBUF , U0RXBUF_)#define U0TXBUF_ (0x0077u) /* USART 0 Transmit Buffer */DEFC( U0TXBUF , U0TXBUF_)/* Alternate register names */#define UCTL0 U0CTL /* USART 0 Control */#define UTCTL0 U0TCTL /* USART 0 Transmit Control */#define URCTL0 U0RCTL /* USART 0 Receive Control */#define UMCTL0 U0MCTL /* USART 0 Modulation Control */#define UBR00 U0BR0 /* USART 0 Baud Rate 0 */#define UBR10 U0BR1 /* USART 0 Baud Rate 1 */#define RXBUF0 U0RXBUF /* USART 0 Receive Buffer */#define TXBUF0 U0TXBUF /* USART 0 Transmit Buffer */#define UCTL0_ U0CTL_ /* USART 0 Control */#define UTCTL0_ U0TCTL_ /* USART 0 Transmit Control */#define URCTL0_ U0RCTL_ /* USART 0 Receive Control */#define UMCTL0_ U0MCTL_ /* USART 0 Modulation Control */#define UBR00_ U0BR0_ /* USART 0 Baud Rate 0 */#define UBR10_ U0BR1_ /* USART 0 Baud Rate 1 */#define RXBUF0_ U0RXBUF_ /* USART 0 Receive Buffer */#define TXBUF0_ U0TXBUF_ /* USART 0 Transmit Buffer */#define UCTL_0 U0CTL /* USART 0 Control */#define UTCTL_0 U0TCTL /* USART 0 Transmit Control */#define URCTL_0 U0RCTL /* USART 0 Receive Control */#define UMCTL_0 U0MCTL /* USART 0 Modulation Control */#define UBR0_0 U0BR0 /* USART 0 Baud Rate 0 */#define UBR1_0 U0BR1 /* USART 0 Baud Rate 1 */#define RXBUF_0 U0RXBUF /* USART 0 Receive Buffer */#define TXBUF_0 U0TXBUF /* USART 0 Transmit Buffer */#define UCTL_0_ U0CTL_ /* USART 0 Control */#define UTCTL_0_ U0TCTL_ /* USART 0 Transmit Control */#define URCTL_0_ U0RCTL_ /* USART 0 Receive Control */#define UMCTL_0_ U0MCTL_ /* USART 0 Modulation Control */#define UBR0_0_ U0BR0_ /* USART 0 Baud Rate 0 */#define UBR1_0_ U0BR1_ /* USART 0 Baud Rate 1 */#define RXBUF_0_ U0RXBUF_ /* USART 0 Receive Buffer */#define TXBUF_0_ U0TXBUF_ /* USART 0 Transmit Buffer *//************************************************************* USART 1************************************************************/#define __MSP430_HAS_UART1__ /* Definition to show that Module is ava #define U1CTL_ (0x0078u) /* USART 1 Control */。

/****************************************************************************** //* Legacy Header File */ /* Not recommended for use in new projects. *//* Please use the msp430.h file or the device specific header file *//****************************************************************************** //********************************************************************** Standard register and bit definitions for the Texas Instruments* MSP430 microcontroller.** This file supports assembler and C development for* MSP430x14x devices.** Texas Instruments, Version 2.4** Rev. 1.2, Additional Timer B bit definitions.* Renamed XTOFF to XT2OFF.* Rev. 1.3, Removed leading 0 to aviod interpretation as octal* values under C* Rev. 1.4, Corrected LPMx_EXIT to reference new intrinsic _BIC_SR_IRQ* Changed TAIV and TBIV to be read-only* Rev. 1.5, Enclose all #define statements with parentheses* Rev. 1.6, Defined vectors for USART (in addition to UART)* Rev. 1.7, Added USART special function labels (UxME, UxIE, UxIFG)* Rev. 2.1, Alignment of defintions in Users Guide and of version numbers* Rev. 2.2, Fixed type in ADC12 bit definitions (replaced ADC10 with ADC12)* Rev. 2.3, Removed unused def of TASSEL2 / TBSSEL2* Rev. 2.4, added definitions for Interrupt Vectors xxIV*********************************************************************/#ifndef __msp430x14x#define __msp430x14x#ifdef __IAR_SYSTEMS_ICC__#ifndef _SYSTEM_BUILD#pragma system_include#endif#endif#if (((__TID__ >> 8) & 0x7F) != 0x2b) /* 0x2b = 43 dec */#error msp430x14x.h file for use with ICC430/A430 only#endif#ifdef __IAR_SYSTEMS_ICC__#include "in430.h"#pragma language=extended#define DEFC(name, address) __no_init volatile unsigned char name @ address; #define DEFW(name, address) __no_init volatile unsigned short name @ address; #define DEFXC volatile unsigned char#define DEFXW volatile unsigned short#endif /* __IAR_SYSTEMS_ICC__ */#ifdef __IAR_SYSTEMS_ASM__#define DEFC(name, address) sfrb name = address;#define DEFW(name, address) sfrw name = address;#endif /* __IAR_SYSTEMS_ASM__*/#ifdef __cplusplus#define READ_ONL Y#else#define READ_ONL Y const#endif/************************************************************* STANDARD BITS************************************************************/#define BIT0 (0x0001u)#define BIT1 (0x0002u)#define BIT2 (0x0004u)#define BIT3 (0x0008u)#define BIT4 (0x0010u)#define BIT5 (0x0020u)#define BIT6 (0x0040u)#define BIT7 (0x0080u)#define BIT8 (0x0100u)#define BIT9 (0x0200u)#define BITA (0x0400u)#define BITB (0x0800u)#define BITC (0x1000u)#define BITD (0x2000u)#define BITE (0x4000u)#define BITF (0x8000u)/************************************************************* STATUS REGISTER BITS************************************************************/#define C (0x0001u)#define Z (0x0002u)#define N (0x0004u)#define V (0x0100u)#define GIE (0x0008u)#define CPUOFF (0x0010u)#define OSCOFF (0x0020u)#define SCG0 (0x0040u)#define SCG1 (0x0080u)/* Low Power Modes coded with Bits 4-7 in SR */#ifndef __IAR_SYSTEMS_ICC__ /* Begin #defines for assembler */#define LPM0 (CPUOFF)#define LPM1 (SCG0+CPUOFF)#define LPM2 (SCG1+CPUOFF)#define LPM3 (SCG1+SCG0+CPUOFF)#define LPM4 (SCG1+SCG0+OSCOFF+CPUOFF)/* End #defines for assembler */#else /* Begin #defines for C */#define LPM0_bits (CPUOFF)#define LPM1_bits (SCG0+CPUOFF)#define LPM2_bits (SCG1+CPUOFF)#define LPM3_bits (SCG1+SCG0+CPUOFF)#define LPM4_bits (SCG1+SCG0+OSCOFF+CPUOFF)#include "in430.h"#define LPM0 _BIS_SR(LPM0_bits) /* Enter Low Power Mode 0 */ #define LPM0_EXIT _BIC_SR_IRQ(LPM0_bits) /* Exit Low Power Mode 0 */ #define LPM1 _BIS_SR(LPM1_bits) /* Enter Low Power Mode 1 */ #define LPM1_EXIT _BIC_SR_IRQ(LPM1_bits) /* Exit Low Power Mode 1 */ #define LPM2 _BIS_SR(LPM2_bits) /* Enter Low Power Mode 2 */ #define LPM2_EXIT _BIC_SR_IRQ(LPM2_bits) /* Exit Low Power Mode 2 */#define LPM3 _BIS_SR(LPM3_bits) /* Enter Low Power Mode 3 */#define LPM3_EXIT _BIC_SR_IRQ(LPM3_bits) /* Exit Low Power Mode 3 */#define LPM4 _BIS_SR(LPM4_bits) /* Enter Low Power Mode 4 */#define LPM4_EXIT _BIC_SR_IRQ(LPM4_bits) /* Exit Low Power Mode 4 */#endif /* End #defines for C *//************************************************************* PERIPHERAL FILE MAP************************************************************//************************************************************* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS************************************************************/#define IE1_ (0x0000u) /* Interrupt Enable 1 */DEFC( IE1 , IE1_)#define U0IE IE1 /* UART0 Interrupt Enable Register */ #define WDTIE (0x01)#define OFIE (0x02)#define NMIIE (0x10)#define ACCVIE (0x20)#define URXIE0 (0x40)#define UTXIE0 (0x80)#define IFG1_ (0x0002u) /* Interrupt Flag 1 */DEFC( IFG1 , IFG1_)#define U0IFG IFG1 /* UART0 Interrupt Flag Register */ #define WDTIFG (0x01)#define OFIFG (0x02)#define NMIIFG (0x10)#define URXIFG0 (0x40)#define UTXIFG0 (0x80)#define ME1_ (0x0004u) /* Module Enable 1 */DEFC( ME1 , ME1_)#define U0ME ME1 /* UART0 Module Enable Register */ #define URXE0 (0x40)#define UTXE0 (0x80)#define USPIE0 (0x40)#define IE2_ (0x0001u) /* Interrupt Enable 2 */DEFC( IE2 , IE2_)#define U1IE IE2 /* UART1 Interrupt Enable Register */ #define URXIE1 (0x10)#define UTXIE1 (0x20)#define IFG2_ (0x0003u) /* Interrupt Flag 2 */DEFC( IFG2 , IFG2_)#define U1IFG IFG2 /* UART1 Interrupt Flag Register */#define URXIFG1 (0x10)#define UTXIFG1 (0x20)#define ME2_ (0x0005u) /* Module Enable 2 */DEFC( ME2 , ME2_)#define U1ME ME2 /* UART1 Module Enable Register */#define URXE1 (0x10)#define UTXE1 (0x20)#define USPIE1 (0x10)/************************************************************* WATCHDOG TIMER 看门狗定时器的寄存器定义************************************************************/#define __MSP430_HAS_WDT__ /* Definition to show that Module is available */#define WDTCTL_ (0x0120u) /* Watchdog Timer Control */DEFW( WDTCTL , WDTCTL_)/* The bit names have been prefixed with "WDT" */#define WDTIS0 (0x0001u) /* 选择WDTCNT的四个输出端之一*/#define WDTIS1 (0x0002u) /* 选择WDTCNT的四个输出端之一*/#define WDTSSEL (0x0004u) /* 选择WDTCNT的时钟源*/#define WDTCNTCL (0x0008u) /* 清除WDTCNT端：为1时，从零开始计数*/#define WDTTMSEL (0x0010u) /* 选择模式。

这篇笔记写的是RF1A的各种寄存器和指令，还有CC1101的数据包格式等。

指令：Command StrobesSRES 复位radio coreSFSTXON 启用和校准频率合成器SXOFF radio core进入睡眠状态SCAL 校准频率合成器，并把它关掉SRX 使能接收STX 使能发送SIDLE 退出RX / TX，关闭频率合成器，并退出WOR模式SWOR 启动自动RX轮询序列（唤醒Radio，WOR）SPWD radio core进入睡眠状态SFRX 刷新RX FIFO缓冲区SFTX 刷新TX FIFO缓冲区SWORRST 复位WOR定时器为Event1的值SNOP 空操作，可以用来读取radio core的状态字以上指令通过指令寄存器对radio core直接操作，在头文件里都有定义，直接使用即可，除SRES指令之外，其余指令都会返回radio core的状态头文件中的定义：其余指令：非Command StrobesSNGLREGRD 读单个寄存器SNGLREGWR 写单个寄存器REGRD 读寄存器REGWR 写寄存器STATREGRD 读radio core状态寄存器SNGLPATABRD 从功率放大表中读取单字节SNGLPATABWR 写单个字节到功率放大表PATABRD 读功率放大表PATABWR 写功率放大表SNGLRXRD 从接收FIFO中读取单个字节SNGLTXWR 单字节写入发送FIFORXFIFORD 读接收FIFOTXFIFOWR 写发送FIFO因为CC1101对寄存器的访问分单字节存取和突发访问存取两种方式，这两种方式指令有所区别，使用的时候需要注意一下。

以上指令也可以在头文件中找到定义，具体操作数及返回值参照用户手册。

Radio core 状态字当写寄存器的时候，MCU将指令或者数据通过相应的寄存器写入，radio core 则将状态字返回至状态寄存中，状态字的定义如下图所示。