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IRF4905S-P

IRF4905S/L

HEXFET ? Power MOSFET

PD - 9.1478A

l

Advanced Process Technology l Surface Mount (IRF4905S)

l Low-profile through-hole (IRF4905L)l 175°C Operating Temperature l Fast Switching l P-Channel

l Fully Avalanche Rated 8/25/97

S

D

G

Absolute Maximum Ratings

Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

The D 2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D 2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application.

The through-hole version (IRF4905L) is available for low-profile applications.

Description

V DSS = -55V R DS(on) = 0.02?

I D = -74A

2 D Pa

k

T O -262

Parameter

Typ.

Max.

Units

R θJC Junction-to-Case

–––0.75R θJA

Junction-to-Ambient ( PCB Mounted,steady-state)**

–––

40

Thermal Resistance

°C/W

Parameter

Max.

Units

I D @ T C = 25°C Continuous Drain Current, V GS @ -10V -74I D @ T C = 100°C Continuous Drain Current, V GS @ -10V -52A I DM

Pulsed Drain Current -260P D @T A = 25°C Power Dissipation 3.8W P D @T C = 25°C Power Dissipation 200W Linear Derating Factor 1.3W/°C V GS Gate-to-Source Voltage

± 20V E AS Single Pulse Avalanche Energy 930mJ I AR Avalanche Current

-38A E AR Repetitive Avalanche Energy 20mJ dv/dt Peak Diode Recovery dv/dt -5.0V/ns T J Operating Junction and

-55 to + 175T STG

Storage Temperature Range

Soldering Temperature, for 10 seconds

300 (1.6mm from case )

°C

IRF4905S/L

Starting T J = 25°C, L = 1.3mH

R G = 25?, I AS = -38A. (See Figure 12)

Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 )Notes:

** When mounted on 1" square PCB (FR-4 or G-10 Material ).

For recommended footprint and soldering techniques refer to application note #AN-994.

I SD ≤ -38A, di/dt ≤ -270A/μs, V DD ≤ V (BR)DSS ,

T J ≤ 175°C

Pulse width ≤ 300μs; duty cycle ≤ 2%.

Uses IRF4905 data and test conditions

Source-Drain Ratings and Characteristics

Electrical Characteristics @ T J = 25°C (unless otherwise specified)

IRF4905S/L

Fig 4. Normalized On-Resistance

Vs. Temperature

Fig 2. Typical Output Characteristics

Fig 1. Typical Output Characteristics Fig 3. Typical Transfer Characteristics

110

100

1000

0.1

1

10

100

D D S

-I , D r a i n -t o -S o u r c e C u r r e n t (A )

-V , Drain-to-Source Voltage (V)110

100

1000

0.1

1

10

100

D D S

-I , D r a i n -t o -S o u r c e C u r r e n t (A )

-V , Drain-to-Source Voltage (V)110

100

10004

5

6

7

8

9

10

G S

D

-I , D r a i n -t o -S o u r c e C u r r e n t (A )-V , Ga te-to-So urce Voltage (V)0.0

0.5

1.0

1.5

2.0

-60-40-20

20

40

60

80

100120140160180

J

T , Junction Temperature (°C)R , D r a i n -t o -S o u r c e O n R e s i s t a n c e

D S (o n )(N o r m a l i z e d )

IRF4905S/L

Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage

Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

01000

2000

3000

4000

5000

6000

7000

1

10

100

C , C a p a c i t a n c e (p F )

D S -V , Drain-to-Source Voltage (V)

04

8

12

16

20

40

80

120

160

200

G

G S -V , G a t e -t o -S o u r c e

V o l t a g e (V )

Q , Total G ate C harge (nC)110

100

1000

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

SD S D -I , R e v e r s e D r a i n C u r r e n t (A )

-V , Source-to-Drain Voltage (V)1

10

100

1000

1

10

100

-I , D r a i n C u r r e n t (A )

-V , Drain-to-Source Voltage (V)DS

D

IRF4905S/L

Fig 10a. Switching Time Test Circuit

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Case Temperature

R V DD

V V

IRF4905S/L

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

V Charge

-10V

DS

Current Sampling Resistors

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

I AS

IRF4905S/L Peak Diode Recovery dv/dt Test Circuit

V DD

* Reverse Polarity of D.U.T for P-Channel

V GS

*** V

GS

= 5.0V for Logic Level and 3V Drive Devices

Fig 14. For P-Channel HEXFETS

IRF4905S/L

D 2Pak Package Outline

D 2Pak

Part Marking Information

IRF4905S/L

Package Outline

TO-262 Outline

Part Marking Information

IRF4905S/L

Tape & Reel Information

D 2Pak

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897

IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590

IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111

IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086

IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371

https://www.doczj.com/doc/9c11067075.html,/Data and specifications subject to change without notice.

8/97

3

4

4

TR R

FE ED D IR EC TION

1.85(.073)

1.65(.065)

1.60 (.063)1.50 (.059)

4.10(.161)3.90(.153)

TR L

F EED D IR EC TIO N 10.90(.429)10.70(.421)

16.10(.634)15.90(.626)

1.75 (.069)1.25 (.049)

11.60 (.457)11.40 (.449)

15.42 (.609)15.22 (.601)

4.72 (.136)4.52 (.178)

24.30(.957)23.90(.941)

0.368(.0145)0.342(.0135)

1.60 (.063)1.50 (.059)

13.50 (.532)12.80 (.504)330.00(14.173) M AX.

27.40 (1.079)23.90 (.941)

60.00 (2.362) M IN.

30.40 (1.197) M A X.

26.40 (1.039)24.40(.961)

N O T ES :

1. C O M F O R M S T O EIA -418.

2. C O N T R O LLIN G D IM EN SIO N : M ILLIM E T ER.

3. D IM E N S IO N M EA S U R E D @ H U B.

4.IN C LU D E S F L AN G E D IS T O R T IO N @O U T E R ED G E.

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