SW2001Datasheet Designed for Illegal Copy Protection
Version1.0
2015-7-9
珠海智融科技有限公司ZHUHAI ISMARTWARE TECHNOLOGY CO.,LTD.
Revision History
Data Revision Code Description 2014-11V0.1Framework 2015-06V0.4Initial Version 2015-07V1.0Public Version
Copyright Statement
The digital copy of this document is protected by the Copyright Act(China),compiled and owned by iSmartWare(iSW).This profile may be consulted by you,provided you comply with the provisions of the Act and the following conditions of use:
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Table of Content
1.General Description (5)
2.Applications (5)
3.Features (5)
4.Schematic Circuit Diagram (6)
5.Chip Series Revision (6)
6.Pin Configuration and Function (7)
6.1Pin Configuration (7)
6.2Pin Descriptions (7)
7.Application Flow (8)
8.Absolute Maximum Ratings (9)
9.I2C Interface and Sleep (9)
10.Register List (11)
10.1REG00:Decrypt Control (11)
10.2REG10-1F:Cipher Text(Write Only)/Plain Text(Read Only) (11)
10.3REG A1-A7:Chip ID (11)
11.Mechanical and Packaging (12)
11.1Package Summary (12)
11.2Package Outline and Dimensions (13)
1.General Description
SW2001is one of the series of Encryption IC SW200X which is based on AES-128to prevent your intellectual property from been illegal copy.Typically,the Internal Chip-ID memory provides an unique56bits ID to product that could help to manage the product authorization.Generally,the SW2001always works as an slave that accessed by the processor through the series bus in the system.
2.Applications
POS and Two Way Radio
Security Device(electronic lock)
Digital Set-top Box(STB)
Tablet Personal Computer(Pad)
Printer Cartridge
Entertaining and Education Machine
Digital Video Recorder(DVR)
Portable Media Player(PMP)
3.Features
☆Symmetric Cryptography Algorithm:AES-128Algorithm
☆Series bus speed up to400KHz
☆56bits Chip-ID
☆<20uA@3.3V Standby Current
☆ 2.8V-5.5V Supply V oltage Range
☆Small SOT23-66L package
4.Schematic Circuit Diagram
5.Chip Series Revision
Model Type Main Functions
SW2001AES+Chip ID
SW2002AES+Chip ID+POR+WD
SW2003AES++Chip ID+LOCK+PWM
6.Pin Configuration and Function
6.1Pin Configuration
6.2Pin Descriptions
Item Name Type Function Description
1NC//
2GND G Ground
3SCK I Serial Clock Input
4SDA I/O Serial Data I/O
5VPP PI Power Supply for Internal Memory Program
6VCC PI Power Supply
7.Application Flow
HOST
SLA VE
KEY K
KEY K
Random M
Sleep Mode
C 1=Encryption (K,M)
C 2=Odd_Check (M)
Send C 1/C 2to Slave
Start Slave
Decryption
Completed
?
Read M’from Slave
YES
M=M’?
YES
Verify Success
System Stop NO
Access ?
YES NO
Wake Up
Start ?YES
NO
M’=Decryption (K,C 1)
C 2’=Odd_Check (M’)
C 2=C 2’?
Set Complete Flag
NO
No Access to 5s Sleep Mode
YES
Check Success
Check Fail
?
8.Absolute Maximum Ratings
Over operating free-air temperature range(unless otherwise specified)
Parameters Symbol MIN MAX UNIT Input Supply Voltage V IN 2.8 5.5V Voltage to Current Converter VCC 2.8 5.5V Operating Temperature-40125℃
Storage Temperature Range-40150℃
Electronic Static Discharge ESD2KV
【Notice】Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability
9.I2C Interface and Sleep
The SW2001support with one-byte read and one-byte write only.The bit2and bit3of device address(7 bits)is program by internal memory which is fixed as“011xx00”.SW2001will release the SDA when SDA holding low state for more than2seconds.
Sleep
Waveform:
The SW2001will enter into the “sleep mode”when device is in the idle state (idle=1)or not accessed for 5seconds.The SW2001will wake up to the “active mode”when receive the access signal from incoming external message.
Parameter Symbol MIN TYP MAX UNIT Sleep Mode on Time t SLON 4.27 5.12 6.56s Sleep Mode off Time
t SLOFF
s
10.Register List
10.1REG00:Decrypt Control
Default:0x00H
Bit Description R/W Default 7///
6///
5Decrypt_Status
Decrypt status
0:decrypt complete
1:decrypt in process
This bit will set automatically when bit0set to1,and cleared when
decryption completed.
R0x0
4-1AES decrypt reference bit R/W0x0
0Decrypt_Start
Decrypt start;
0:disable;
1:enable
This bit will be cleared automatically after decrypt started.
R/W0x0
10.2REG 10-1F:Cipher Text(Write Only)/Plain Text(Read Only)
These registers act as cipher text register before decrypt start,and act as plain text register after decrypt completed.The most significant byte of128bit text(cipher text or plain text)is stored in address0x10,the least significant byte of128bits is stored in address0x1F.
10.3REG A1-A7:Chip ID
Bit Description R/W Default 7-0Chip ID R0xFF
11.Mechanical and Packaging
The following pages include mechanical packaging information.This information is the most current data available for the designated devices.This data is subject to change without notice and revision of this document.
11.1Package Summary
11.2Package Outline and Dimensions
Symbol
Dimension in Millimeters
MIN NOM MAX
A-- 1.25 A10-0.15 A2 1.00 1.10 1.20 A30.600.650.70 b0.36-0.50 b10.360.380.45 c0.14-0.20 C10.140.150.16
D 2.826 2.926 3.026
E 2.60 2.80 3.00 E1 1.526 1.626 1.726 e0.900.95 1.00 e1 1.80 1.90 2.00 L0.350.450.60 L10.59REF
L20.25BSC
R0.10--R10.10-0.20θ0o-8oθ13o5o7oθ26o-14o