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Developing Critical Systems with PLD Components

Developing Critical Systems with PLD Components
Developing Critical Systems with PLD Components

Developing Critical Systems with PLD

Components

Adrian J.Hilton1and Jon G.Hall2

1formerly of Praxis High Integrity Systems,20Manvers Street,Bath BA11PX,

England

adi@https://www.doczj.com/doc/2714947365.html,

2Computing Research Centre,The Open University,Walton Hall,Milton Keynes

MK76AA,England

J.G.Hall@https://www.doczj.com/doc/2714947365.html,

Abstract.Understanding the roles that rigour and formality can have

in the design of critical systems is critical to anyone wishing to contribute

to their development.Whereas knowledge of these issues is good in soft-

ware development,in the use of hardware–speci?cally programmable

logic devices(PLDs)and the combination of PLDs and software–the

issues are less well known.Indeed,even in industry there are many di?er-

ences between current and recommended practice and engineering opin-

ion di?ers on how to apply existing standards.This situation has led to

gaps in the formal and rigorous treatment of PLDs in critical systems.

In this paper we examine the range of and potential for formal speci?ca-

tion and analysis techniques that address the requirements for veri?able

PLD programs.We identify existing formalisms that may be used,and

lay out the areas of contributions that academia and industry in collab-

oration can make that would allow high-integrity PLD programming to

be as practicable as high-integrity software development.

This paper also touches brie?y on some important practical,technical,

organisational,social,and psychological aspects of the introduction of

formal methods into industrial practice for hardware and system design.

It also provides an update and summary of the recent UK Defence Stan-

dard00-56,as it relates to hardware.

Key words:FPGA,PLD,survey,programmable logic,parallel,process al-gebra,programming languages,CSP,programmable hardware

1Introduction

Programmable Logic Devices are increasingly important components of high integrity systems.By o?oading tasks from the main CPU onto a PLD,higher system performance goals can be attained.They can be used to implement safety-speci?c functions that must be outside the direct address space of the main CPU.Technological changes mean that PLD development has become more like software development in terms of program size and complexity,as well as in the need to clarify a program’s purpose and structure.

Standards for safety-related electronic hardware design and development have,since1999,explicitly targeted Field Programmable Gate Arrays—such as the Xilinx Virtex family—and Complex Programmable Logic Devices(CPLDs)—such as the Altera FLEX10K family.The practices which they recommend vary in rigour and in practicability.Adherence to these standards is currently hindered by the immature state of PLD program design,development and anal-ysis techniques and tools relative to those available to safety-related software developers.There are now signs that the move towards the high-level program-ming of PLDs,coupled with the adoption of existing speci?cation notations and proof techniques,may enable more formal and rigourous PLD program develop-ment(for a brief survey,see Section2.4).

This paper will focus on the existing standards and techniques primarily used in European countries,although several of the standards examined have Amer-ican origin or usage too.Section2of this paper summarises the characteristics of PLDs and describes how and where they are used.In Section3we describe and analyse the main safety and security standards relevant to PLD program development.Section4summarises recent research relevant to safe or provably correct PLD program development.Finally,Section5summarises the paper, suggests a joint agenda for academia and industry,as well as other future work. 2Programmable Logic Devices

PLDs were a development of the simple Programmable Logic Array(PLA)which has been available in electronics design since the early1980s.The early history of?eld-programmable logic is reviewed by Moore in[1].The most common(and interesting)form of PLD currently in use is a Field Programmable Gate Array (FPGA)which form the focus of this paper.

2.1Device design characteristics

The key characteristics of an FPGA are that it can have its program con-tents changed upon power-up(hence“?eld-programmable”)and that its internal structure is a regular array of logic cells(hence“gate array”).An FPGA provides a logic device of relatively low complexity that can compute some function of the set of its digital inputs to produce a set of digital outputs.This is done in a highly-parallel manner.FPGAs have semi-permanent state,held in programmed lookup tables,typically implemented as static random access memory(SRAM). These tables are programmed by the download of lookup table data from an external source.

FPGAs di?er from other programmable logic devices(PLAs,PROMs or CPLDs)by allowing more complex internal data?ows.They di?er from Ap-plication Speci?c Integrated Circuits(ASICs)by trading speciality of design for speed of development and economy of small-scale production.

2.2Use of PLDs

PLDs are typically used in building a prototype system in place of a custom ASIC.It is signi?cantly cheaper and quicker to use PLDs when the alternative is a minimum production run of5000ASICs in a fabrication plant(“fab”).A small-scale single run of ASIC production can easily cost$750,000and take months from the submission of a VHDL design to the fab to the delivery of the silicon.

There are many current examples of successful mission critical PLD use. Actel[2]reported that their radiation-tolerant and radiation-hardened FPGAs are continuing to perform critical functions in the Mars Exploration Rovers, Spirit and Opportunity,after a year on the surface of Mars.There can be sig-ni?cant commercial gain in using PLDs rather than ASICs.Because they are ?eld-programmable,time-to-market can be reduced,since there is not the delay in setting up and making the ASIC production run,and there is little overhead if an error is subsequently found in the device.Their characteristics also increase the potential for longer time-in-market,through mid-life upgrades to the PLD code(without having to replace the hardware).Kevin Morris[3]emphasises these bene?ts:Recon?gurable programmable logic devices o?er the added advantage of post-launch design modi?cation that could make the di?erence between a working system and orbiting space junk.

The critical systems industry would like to implement systems based on PLDs for all the reasons stated above,but cannot if the resulting systems exhibit the common failure modes of PLDs.Gibbons and Ames[4]report on the use of an FPGA in a space-based tethering experiment where an unanticipated power-up characteristic of the chosen FPGA caused the e?ective loss of the satellite incorporating it.This occurred despite extensive testing,and one reason was that it was not possible to reproduce the transient spike twice within several hours–a classic transient fault.It is clear from this experience that FPGAs su?er many of the traditional failure modes of other devices and,therefore,that extensive testing is not su?cient for mission-or safety-critical FPGAs.

As well as demonstrating correctness,then,the role of formality is to assess the suitability of PLDs for such systems.

2.3Programming PLDs

The implementation of a PLD-based system can be done in many ways.The equivalent of microprocessor object code will be a device-speci?c“netlist”which speci?es the data to be loaded into each cell and router of the device.To reach netlist form,several intermediate compilation steps are normally required;the place-and-route work involved in this compilation is NP-hard.

The majority of PLDs are programmed in VHDL[5]or Verilog[6],either di-rectly or with a higher-level design language being compiled through them.These Hardware Description Languages(HDLs)have substantial standard libraries,al-lowing a certain amount of code reuse.They model the PLD as interconnected

blocks rather than providing higher-level functions such as iteration or proce-dure call.Even if a higher-level language or design tool is used,it will normally compile its input into VHDL or Verilog.

There is a subset relation between behavioural and synthesizable VHDL.The former is an expressive imperative language incorporating explicit iteration,al-ternation and a constructive type system.The latter is a small and simple subset (Register Transfer Level)which can be compiled directly into combinations of logic gates and latches.Going from the former to the latter is non-trivial,and in general it is too di?cult to automate the translation process.

Design languages at a level of abstraction above HDLs have three main vari-ants:

1.explicitly parallel general-purpose languages,such as occam[7];

2.domain-speci?c languages designed to solve a certain class of problems in an

inherently parallel way,such as Esterel[8];or

3.modi?cations of existing imperative languages,such as System-C[9]and

Handel-C[10].

The programming model underpinning occam,a development of CSP[11], has been developed initially into the Handel language,embedded in a functional programming syntax[12],and more recently into the commercially-supported Handel-C language[10].Although Handel-C has a C-like syntax,it incorporates explicit parallelism has a semantic model much closer to that of occam than to that of C,which may counter some of the arguments against using C for criti-cal system development.Another example,this time a compositional hardware language is Ruby[13],based on the idea that circuits are built from parts by a process of composition,which has mathematical properties similar to that de-?ned on functions and relations.A modern development of Ruby is Lava[14],a prototype HDL developed by and in use at Chalmers University in Sweden.It trades o?the expressiveness of behavioural VHDL or Verilog for compactness and simplicity of descriptions of common circuit layouts.

An example of a domain-speci?c language is the synchronous programming language Esterel[8],used to specify and implement action systems.This has been applied by Hammarberg et al.[15]in a demonstration hydraulic?uid detection system.Another example is CoreFire[16],in which developers write CoreFire programs in a“sticks and bubbles”graphical notation of data?ow,and compile them to high-performance applications which run on Annapolis Wild FPGA boards.

Commonly used imperative languages which have been compiled into PLDs include C[17],Java[18]and Ada[17,19].The speci?c di?culty in using these languages is in expressing PLD-speci?c concepts such as?ne-grain parallelism which is not normally part of the original language.System-C[9](and the already mentioned Handel-C)are examples of how C’s syntax can be extended to express parallel concepts.

2.4PLD formalisms

Substantial e?ort was made in the1980s and1990s to develop a hardware design language that supported formal reasoning and abstraction,two features absent from HDLs such as VHDL and Verilog.A good example of this approach is ELLA[20],a non-proprietary language with a formal basis.

ELLA is not a strict competitor to VHDL and Verilog,but in practice it is treated as such:At that time,the relatively small size of hardware designs made design in existing HDLs feasible,if di?cult,and this acted against the adoption of ELLA(and similar design languages).It may be that,as hardware designs and PLD dies continue to grow in size,high-integrity requirements will make ELLA et al.more necessary.This change was seen in software with the emergence of structured design methods as program sizes grew beyond what one developer could manage;it is reasonable that a similar e?ect will eventually be seen in programmable logic program design.

The formalisms that apply best to the massively parallel PLD structure are the(parallel)process algebras such as CSP[11]and CCS[21].The main problem in representing small-small digital logic constructs such as AND and OR gates with CSP is that CSP is not receptive;a CSP process representing a logic gate may refuse events representing voltage changes on its input wires,whereas the logic gate may not.A secondary problem is that CSP is asynchronous by design; processes only synchronise through shared events(or communication on chan-nels).Most PLD designs are synchronous,with design blocks sharing a single clock.Therefore the receptive and synchronous aspects of the PLD architecture would have to be represented arti?cially in a CSP model.A better approach is to use an algebra incorporating these features,and the authors have success-fully applied the synchronous receptive process algebra SRPT[22]in a re?nement system for PLD programming[23].

Recent work by Boulanger et al.[24]has attempted to use the B method to produce BHDL,a VHDL reformulation in B.This work is early and tool support is limited,but it represents a promising avenue for certain applications.

2.5Summary

We have seen that PLDs present a di?erent programming architecture to con-ventional microprocessors,and have examined di?erent programming methods for this synchronous highly parallel model.We now discuss the demands that safety and security certi?cation make for rigorous development and veri?cation of PLD programs.

3Current safety and security standards

The main safety standards relevant to PLD programming in Europe are:

–RTCA DO-254[25]which is an international civil aviation standard;

–UK Interim Defence Standard00-56[26]which is a UK standard for defence-related systems,superceding the older UK Interim Defence Standard00-54[27];

–IEC61508[28]which is a European standard intended to apply to a wide range of systems;and

–the Common Criteria[29]which is an international standard for developing secure systems.

The available standards vary signi?cantly in what they prescribe for PLDs and what techniques they suggest are applicable.Defence Standard00-54is the most prescriptive,but as noted above is likely to become less relevant with the new release of Defence Standard00-56.

The common requirements of the standards are:

1.to operate under an appropriate quality/safety management system;

2.to plan the development process and the safety argument in advance;

3.to consider both random and systematic failures;

4.to qualify tools involved directly in the compilation chain;

5.to use analytic techniques(“formal methods”)to verify high-integrity pro-

grams;and

6.to conduct the veri?cation based on identi?ed system hazards.

In this section we analyse the content of each of these standards in detail.

3.1RTCA DO-254/EUROCAE ED-80

The airborne electronic hardware development guidance document RTCA DO-254/EUROCAE ED-80[25]is the counterpart to the well-established civil avion-ics software standard RTCA DO-178B/EUROCAE ED-12B.It provides a guide to the development of programs and hardware designs for electronic hardware in avionics.It covers PLDs as well as Application-Speci?c Integrated Circuits (ASICs),Line Replaceable Units(LRUs)and other electronic hardware.As well as being applied to systems aimed for Federal Aviation Authority acceptance,it may be used as a quality-related standard in non-FAA projects.

Overview DO-254speci?es the life cycle for PLD program development and provides recommendations on suitable general practice.It is not a prescriptive standard;the emphasis is on choosing a pragmatic development process which nevertheless admits a clear argument to the certi?cation authority(CA)that the developed system is of the required integrity.

DO-254recommends a simple documentation structure with a set of planning documents that establish the design requirements,safety considerations,planned design and the veri?cation that is to occur.This would typically be presented to the CA early in the project in order to agree that the process is suitable.This plan will depend heavily on the assessed integrity level of the component which may range from Level D(low criticality)to Level A(most critical).Note that the DO-254recommendations di?er very little between Levels A and B.

High-integrity requirements Appendix B of DO-254speci?es the veri?ca-tion recommended for Level A and Level B components in addition to that done for Levels C and D.This is based on a Functional Failure Path Analysis (FFPA)which decomposes the identi?ed hazards related to the component into safety-related requirements for the design elements of the hardware program. The additional veri?cation which DO-254suggests may include some or all of: architectural mitigation:changing the design to prevent,detect or correct hazardous conditions;

product service experience:arguing reliability based on the operational his-tory of the component;

elemental analysis:applying detailed testing and/or manual analysis of safety-related design elements and their interconnections;

safety-speci?c analysis:relating the results of the FFPA to safety conditions on individual design elements and verifying that these conditions are not violated;and

formal methods:the application of rigorous notations and techniques to spec-ify or analyse some or all of the design.

If tools are used for compilation or veri?cation of the PLD software then DO-254requires a certain amount of tool quali?cation.This may incorporate separate analysis of the tool software,appeals to in-service history of the tool,or direct inspection of the tool output.At higher integrity levels,in-service history alone is likely to be insu?cient.

3.2UK Defence Standards

The UK Defence Standards have been rewritten so that the older programmable hardware standard00-54,and its software counterpart00-55,have been rolled together into Issue3of the00-56standard,and so00-56should be seen in the light of00-54.Issue3of00-56was released in January2005as an interim standard.This version[26]explicitly equates regular software and PLD programs as safety-related complex electronic elements(SRCEE)in Part2,§15.1.

The older Interim Defence Standard00-54[27]speci?ed safety-related hard-ware development in a similar way to DO-254.The main di?erence was that 00-54was far more prescriptive than DO-254,and assumed that the develop-ment takes place within a safety management process as described in Defence Standard00-56Issue2[30].

Overview00-54makes strict demands on the rigour and demonstrable correct-ness of PLD programs,and that these are signi?cantly stricter than those in DO-254.The new00-56is less prescriptive,instead requiring that“compelling evidence that safety requirements have been met.Where possible,objective, analytical evidence shall be provided.”(Part1,§11.3.1).

Risk is regulated(in the UK)on the basis of being reduced ALARP(As Low As is Reasonably Practical).This stems from a UK Court of Appeal decision on

the1949case Edwards vs.The National Coal Board[31]where Judge Asquith noted:

“...a computation must be made by the owner in which the quantum of risk is placed on one scale and the sacri?ce involved in the measures necessary for averting the risk(whether in money,time or trouble)is placed in the other,and that,if it be shown that there is a gross dis-proportion between them-the risk being insigni?cant in relation to the sacri?ce-the defendants discharge the onus on them.”

This is signi?cant because it means that if it is feasible and not dispropor-tionately expensive to do formal analysis,and there is a demonstrable gain in reliability from this,then a UK court is likely to expect it to be done for the system risk to be regarded as ALARP.

High-integrity requirements Formal speci?cation and analysis of PLD pro-grams were mandated at all safety integrity levels for00-54.This posed a practi-cal problem for developers since in1999(its year of issue)there were no known tool-supported speci?cation or proof notations which were generally applicable to PLD programming.Each project required a from-scratch selection of,and capability development in,notations and analysis techniques.This is risky and potentially expensive.

The new00-56,as noted above,makes no prescription for methods to be used.However,the risk involved in using the SRCEE is required to be ALARP and speci?cally requires evidence to validate the safety argument including(Part 1,§19.2):

1.direct evidence from analysis;

2.direct evidence from demonstration(testing and/or operation),including

quantitative evidence;

3.direct evidence extracted from the review process;

4.process evidence showing good practice in development,maintenance and

operation;and

5.qualitative evidence for good design,including expert testimony etc.

The quantitative aspect of item2is signi?cant because work by Little-wood[32]has shown that conventional testing cannot show that a system is highly reliable in a statistically signi?cant way,and so the use of formal meth-ods is justi?ed.This applies to systems at the SIL-3or SIL-4integrity levels,or Levels A and B in DO-254terms.

00-56also requires each tool in the compilation chain to have suitable argu-ments or analysis in place to show that it does not introduce signi?cant errors into the system.

3.3Other standards

IEC61508“Functional Safety of Electrical/Electronic/Programmable Elec-tronic Safety-Related Systems”[28]is a standard which covers a wide range of systems and their components.Part2in particular gives requirements for the development and testing of electrical,electronic and programmable devices.Here the programmable part of the systems is not addressed in detail;there are re-quirements for aspects of the design to be analysed,but no real requirements for implementation language or related aspects.Because of this,in the experience of the authors,DO-254is more directly usable for developers than is IEC61508 Part2.

PLDs have been shown to be particularly useful in implementing crypto-graphic functions,for instance the Advanced Encryption Standard(AES).The Common Criteria guidance for IT security evaluation[29]does not distinguish between software executing on a microprocessor,ASICs or programs executing on PLDs;they may all form part of the Target of Evaluation(ToE)and require equally rigorous reasoning with respect to the security requirements identi?ed in the Protection Pro?le or Security Target for the ToE.The formal and semi-formal assurance required for ASIC and software designs at Evaluation Assurance Levels 5to7is therefore required for PLD programs too.

4Recent research

Recent research relevant to safety-critical PLD program design includes:

1.speci?cation and proof of parallel systems,enabling a correct-by-construction

approach to program design;

2.model checking techniques to verify safety properties of an existing PLD

design at a HDL or netlist level;and

3.the design and use of high-level programming languages to enable PLD pro-

gramming at a more abstract level,possibly in a domain-speci?c language or tool.

4.1Speci?cation and proof techniques

Established parallel speci?cation notations such as CSP and LOTOS[33]are ca-pable of describing the highly parallel structure of a PLD program,but have not yet been applied generally as speci?cation notations for actual PLD programs.A contributory factor is likely to be the over-complexity of the notations compared to the simple synchronous structure of most PLD programs.

Earlier work by Breuer et al.[34]on production of a re?nement calculus directly targeting VHDL has a solid theoretical base,and(in theory)allows the production of VHDL designs which are demonstrably correct.This work also fell foul of over-complexity,and without tool support was impractical to apply e?ciently to PLD program designs.

The authors have used the SRPT synchronous receptive process algebra to implement a formal speci?cation and re?nement systems for synchronous PLD programs.This work,initially described in[23]and extended in[35],establishes re?nement as a practical technique for at least small PLD designs,and indicates that it may scale well for certain classes of design.It is targeted directly at the speci?cation and proof of PLD programs,but currently lacks tool support.

The?rst author has used CSP as a speci?cation language in a high integrity commercial PLD program development.Both developer and customer found that the CSP speci?cations clari?ed and identi?ed de?ciencies in a well-reviewed English functional requirements document,giving increased con?dence in the ?nal program.Additionally,it enabled experimental model checking with the FDR2tool;this identi?ed some errors in the developed program(which had been separately identi?ed by expensive testing).

Re?nement in parallel systems is an area of active research;the authors anticipate signi?cant developments in techniques and tool support in this area in the next few years.

4.2Model checking

Model checking is the application of graph theory and?nite state machines to decide whether a temporal logic formula is maintained across all possible system states.It has become practical to apply it to verifying key properties of complex modern processors,for example the non-?oating point operations of the Intel Pentium IV microprocessor as described by Schubert[36].It is e?ective at deciding whether a design conforms to certain safety properties,but is vulnerable to the state explosion problem where designs of increasing size quickly become impractical to model-check.It is bene?cial for checking a complete design but cannot usually be applied until near the end of a development.

Model checking tools such as Solidify from Saros Technologies are now start-ing to be used in PLD program veri?cation,and can provide assurance that the design has suitable safety properties across all possible states.This is a more powerful argument for safety than simulation,since it is practically impossible to cover all possible system states for any designs other than the very simple,but there remains the question of tool quali?cation.As noted in Section3.1,DO-254 requires either direct veri?cation of the tool or in-service history–inspection of the tool output does not help quali?cation in this case.Neither of these are currently available.

Solidify speci?cations are written in one of several commercial HDL speci?-cation languages,and the tool operates on behavioural VHDL,Verilog or RTL. This removes the need for a test bench simulating a system,allows quick veri?-cation that common errors are absent,and a range of extra checks with increased con?dence coming from additional time spent writing speci?cations to check.It can check against protocols such as the AMBA bus speci?cation.It is a promising approach and sets a baseline for expectations for other model checking tools.

Stepney[37]has shown how a subset of CSP compatible with the FDR2 model-checking tool can be transformed into a program in a Handel-C language

subset,thereby allowing a design to be model-checked for correctness before a compilable version of the design is produced.FDR2has a long in-service history and would be easier to qualify for medium levels of integrity.

Note that the use of model checking and other formal techniques by major industrial microprocessor designers such as Intel(Pentium4)and ARM indi-cates that they believe it to provide a commercial advantage.This may be due to the complexity of modern microprocessors precluding e?ective coverage by conventional testing.In this way the hardware?eld is more advanced than the software or programmable hardware?elds.

4.3High-level programming

Imperative Since1996there has been a steadily growing interest in compil-ing imperative languages into HDLs(and hence into PLDs).The most popular approaches have been based around C language syntax,presumably for its im-mediate appeal to most developers,although this syntax often hides complex parallel programming issues not present in sequential C.

Handel-C is a modern high-level PLD programming language that owes much to the occam parallel programming language[7](which has also been used to tar-get FPGAs[OCCAM to FPGAs,such as R.M.Pell and B.M.Cook,Occam on Field-Programmable Gate Arrays-Fast Prototyping of Parallel Embedded Systems.]).It has been used in a range of industrial applications including mili-tary and aerospace,although the authors do not know of any use of a Handel-C program in a safety-critical function.As noted in Section4.2above,a Handel-C subset can be the target of a compilation from model-checked CSP,and there is a toolset which can perform the usual veri?cation activities at each development stage.However,the Handel-C compiler is complex and as yet is not known to be amenable to quali?cation.

Gupta et al.[38]have described a synthesis process which transforms pointer-free non-recursive ANSI C to VHDL.Unusually,it places much of the paral-lel programming activity within the toolset;the programming language cannot express parallel concepts.Because of this,the approach su?ers from the well-documented de?ciencies of the C language with respect to safety and correctness. The fundamental question is how the developer can be sure that his program-ming intent has been captured and preserved by the compilation chain.

The conventional software programming language Ada95has been examined by the authors[39]and by Audsley and Ward[40]as a design and implementation language for PLDs.Audsley and Ward have addressed the compilation of legacy Ada code into a one-hot state machine,aiming to maintain the existing safety argument for the code by qualifying only the PLD-targeting compiler.This work is in progress but has demonstrated coverage of many Ada constructs including Ada’s parallel programming features(although,at the lower levels of design, SPARK Ada is arguably limited in its ability to model highly parallel code such as pipelined architectures).Ada has the advantage that its syntax is very close to the syntax of behavioural VHDL;however,synthesizable VHDL is more restrictive.

The authors have chosen a complementary approach,taking new programs written in the SPARK high-integrity annotated Ada95subset[41]and transform-ing identi?ed coherent subsections directly into PLD software while maintaining overall(and justi?able)program correctness[39].Ada’s strong numerical typing and SPARK’s ability to prove programs free from run-time errors combine to simplify the transformation process.The SPARK toolset has strong in-service quali?cation evidence,although there is no formally released SPARK-to-HDL compiler as yet so any quali?cation argument would have to relate the compiled HDL to the original SPARK.

Declarative Esterel is a language designed for programming action systems, and so is not conventionally imperative but not fully declarative.It has a formal synchronous semantics so Esterel programs can be meaningfully analysed for correctness and safety.It was used by Hammarberg and Nadjm-Tehrani[15]to demonstrate the use of an aircraft hydraulic system component.The Esterel program was compiled through VHDL,which is a common interim language for compilation high-level designs.This approach has the problem that veri?cation must justify the semantic gap between Esterel and VHDL.

Pebble[42]can be viewed as a simpli?ed synchronous(single clock)subset of VHDL.Its great strength is its simplicity;Pebble has been given a synchronous semantics by Hilton[23]and so can be meaningfully analysed for high integrity systems.This means that any compiler which targets Pebble can conceivably avoid quali?cation by comparing the source language with the Pebble output. Pebble normally compiles directly to VHDL.

Ruby,as noted in Section2.3,develops designs by composing sub-designs sequentially,in parallel and via functions.A recent marrying of Ruby and Pebble is Quartz[43]which uses a Ruby-like compositional design process and compiles the result into Pebble code.Quartz has a prototype compiler,as does Pebble, but they are not yet at the stage where they could be used in a high-integrity development.

5Discussion and conclusions

As part of an ongoing study into reducing avionics lifecycle costs,QinetiQ Ltd. have produced reports advising UK military Integrated Project Teams(IPTs) on the use of PLDs in Advanced Avionics Architectures.The report on PLD programming[44]recommends that IPTs:

–plan to develop and verify PLD programs in the same way as software pro-grams;

–plan the safety argument from the start,and build up evidence throughout development;

–use mature tools,amenable to quali?cation and supported throughout the project life;

–use programming languages with clearly de?ned syntax,and ideally a full semantics;

–investigate the use of formal notations and analysis techniques to increase veri?ability;and

–do not use PLDs just to avoid developing safety-critical software.

In this paper we have indicated how existing tools,languages and technologies for PLD program development measure up against existing safety standards,and have provided speci?c advice to project teams considering the above recommen-dations.We now consider how formal techniques may increase the demonstrable integrity level of PLD programs.

5.1Future work

Industry has a clear need for some level of formal veri?cation of PLD designs. Simulation alone is inadequate.Existing tools are not yet amenable to quali?ca-tion.Formal notations and proof systems do not have appropriate tool support. There needs,therefore,to be a combination of developments including:

1.the development and industrial use of design languages with formal de?ni-

tions;

2.the development of quali?able(formal)compilers for these languages(per-

haps building on related work in conventional software[45]);

3.the more widespread use of model checking in industrial designs;

4.the quali?cation of veri?cation tools,most importantly through a combina-

tion of in-service evidence and analysis of the tool design;and

5.the investigation of re?nement and proof techniques with a view to support-

ing complex PLD designs at the highest levels of integrity.

There is a clear need for academia and industry to work together towards this agenda,as each item contains development informed by practice,and practice captured in theory.A particular focus of this joint work should be to make these advances usable by a typical industrial development or veri?cation team,with the minimum of change in the existing development process.

5.2Safety and security standards

RTCA DO-254is a recent standard,and developers are now just starting to apply it in practice.The authors’experience with it to date is that it admits justi?cation of PLD program safety at Level A with the exact approach de-?ned by the developer.The range of veri?cation methods proposed for Level A and Level B PLD programs allows a comprehensive multi-facetted argument for program safety.

The emerging issue3of UK Defence Standard00-56and the Common Cri-teria documents are consistent with this requirement of formal reasoning at the higher integrity levels.The equating of programmable hardware with conven-tional microprocessor-based software in these standards means that the rigorous analysis and speci?cation techniques required for high-integrity software will re-quire analogues in high-integrity programmable hardware.

5.3Summary

In this paper we have described the current state of the art in the practice and theory of producing high-integrity PLD applications conforming to these standards.We have identi?ed the key de?ciencies in tools and languages and proposed ways in which they may be?xed.We have examined appropriate ar-eas of research and described how they could be developed to be usable in real system developments.All of the components needed for high-integrity PLD pro-gramming exist;future work must focus on combining them e?ectively. Acknowledgements

The authors would like to thank colleagues in their respective organisations for the assistance with this work.The work of the?rst author was completed while working for Praxis High Integrity Systems.That of the second author was completed under the auspices of the Computing Research Centre,The Open University.The comments of the many people who have read this paper have been very helpful.

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with复合结构专项练习96126

with复合结构专项练习(二) 一请选择最佳答案 1)With nothing_______to burn,the fire became weak and finally died out. A.leaving B.left C.leave D.to leave 2)The girl sat there quite silent and still with her eyes_______on the wall. A.fixing B.fixed C.to be fixing D.to be fixed 3)I live in the house with its door_________to the south.(这里with结构作定语) A.facing B.faces C.faced D.being faced 4)They pretended to be working hard all night with their lights____. A.burn B.burnt C.burning D.to burn 二:用with复合结构完成下列句子 1)_____________(有很多工作要做),I couldn't go to see the doctor. 2)She sat__________(低着头)。 3)The day was bright_____.(微风吹拂) 4)_________________________,(心存梦想)he went to Hollywood. 三把下列句子中的划线部分改写成with复合结构。 1)Because our lessons were over,we went to play football. _____________________________. 2)The children came running towards us and held some flowers in their hands. _____________________________. 3)My mother is ill,so I won't be able to go on holiday. _____________________________. 4)An exam will be held tomorrow,so I couldn't go to the cinema tonight. _____________________________.

with的复合结构和独立主格结构

1. with+宾语+形容词。比如:. The boy wore a shirt with the neck open, showing his bare chest. 那男孩儿穿着一件衬衫,颈部敞开,露出光光的胸膛。Don’t talk with your mouth full. 嘴里有食物时不要讲话。 2. with+宾语+副词。比如:She followed the guide with her head down. 她低着头,跟在导游之后。 What a lonely world it will be with you away. 你不在,多没劲儿呀! 3. with+宾语+过去分词。比如:He was listening to the music with his eyes half closed. 他眼睛半闭着听音乐。She sat with her head bent. 她低着头坐着。 4. with+宾语+现在分词。比如:With winter coming, it’s time to buy warm clothes. 冬天到了,该买些保暖的衣服了。 He soon fell asleep with the light still burning. 他很快就睡着了,(可)灯还亮着。 5. with+宾语+介词短语。比如:He was asleep with his head on his arms. 他的头枕在臂膀上睡着了。 The young lady came in, with her two- year-old son in her arms. 那位年轻的女士进来了,怀里抱着两岁的孩子。 6. with+宾语+动词不定式。比如: With nothing to do in the afternoon, I went to see a film. 下午无事可做,我就去看了场电影。Sorry, I can’t go out with all these dishes to wash. 很抱歉,有这么多盘子要洗,我不能出去。 7. with+宾语+名词。比如: He died with his daughter yet a school-girl.他去逝时,女儿还是个小学生。 He lived a luxurious life, with his old father a beggar . 他过着奢侈的生活,而他的老父亲却沿街乞讨。(8)With so much work to do ,I can't go swimming with you. (9)She stood at the door,with her back towards us. (10)He entered the room,with his nose red with cold. with复合结构与分词做状语有啥区别 [ 标签:with, 复合结构, 分词状语] Ciro Ferrara 2009-10-18 16:17 主要是分词形式与主语的关系 满意答案好评率:100%

高中三年自我鉴定范文

高中三年自我鉴定范文 高中三年,痛并快乐着,累却充实着,苦但愉悦着,要毕业了为这高中三年做义工自我鉴定,本文是WTT小雅为大家整理的高中三年自我鉴定范文篇,仅供参考。 高中三年自我鉴定范文篇一 蓦然回首,高中学习生活即将结束。回想三年里,父母的殷切期望,老师的谆谆教导,同学间的友爱相助。曾经付出的辛勤汗水,曾经的收获,曾经的幸福快乐。曾经少不更事懵懵懂懂的我,一幕幕似在眼前,令人感慨万千。今天的我,德智体美劳全面发展,从幼稚一步步走向了成熟。 我立场坚定正确,热爱祖国,热爱党。我自觉践行社会主义核心价值观,积极要求进步,踊跃参加学校各种社团组织。高一即通过竞选参加青州二中学生会,并成为纪检部部长,能够在学校领导安排协调下,团结学生会其他成员和各班同学,积极主动地开展学校日常纪律执勤,大型会议赛事秩序维护,组织安排等事务性工作。同时我也积极参加社会实践,将书本知识与实践知识相结合,使自己有适应社会的能力,应变能力有进一步提高。 我开朗活泼,品行端正,为人正直。能够自觉抵制各种不良习气。我做事积极主动,从不计较个人得失。对学校和班级交给的任务都能认真及时完成。我总是以学校和班级荣誉为重。高中二年级,我又通过公开竞选成为为学校学生会副主席,虽然学生

会事务繁多,但我能够合理安排课堂文化课学习和学生会工作,做到两不误,两头都干好。高二学期末,我光荣的被评为优秀学生会干部,青州二中优秀团员。 我学习态度端正,能够掌握正确的学习方法。课堂上认真听讲,目的明确,做好笔记,注重理解和掌握,强化练习,学会分类归纳,不断总结,摸索出适合自己的学习方法,养成良好的学习习惯。在学习中知难而进,敢于正视自己,积极主动地思考问题。课下高质量的完成各科作业,并能及时与任课教师交流沟通。 在较好地完成课堂学业同时,我积极发展个人爱好特长。参加学校篮球队,积极刻苦训练,不断提高个人篮球技艺水平,主动参加校内外各种篮球赛事,作为篮球队骨干队员,我勇挑重担,在20xx年代表青州市分别参加潍坊市级篮球赛和淄博市高中学校篮球邀请赛,为母校和青州市争光添彩。在课余时间里,我喜欢博览群书,开拓视野,增长知识,不断充实自己。还利用假期参加电脑培训,多次作为学生志愿者参加各种社会公益活动,自身品格修养能力得到提升和锻炼。 我能够团结其他同学,热心帮助有困难同学。我尊敬师长,孝敬父母。我总是力所能及的做好自己分内的事。我有很强的社会公德心。我行为文明,爱护公物。我为人朴实真诚,生活上勤俭节约,独立性较强。热爱集体,尊敬师长,对学校和班级交给的任务都能认真及时完成。踊跃参加各项社会公益活动,主动投

with的复合结构

基本用法 它是由介词with或without+复合结构构成,复合结构作介词with或without的复合宾语,复合宾语中第一部分宾语由名词或代词充当,第二部分补足语由形容词、副词、介词短语或非谓语动词充当 一、with或without+名词/代词+形容词 例句:1.I like to sleep with the windows open. 我喜欢把窗户开着睡觉。(伴随情况) 2.With the weather so close and stuffy, ten to one it'll rain presently. 大气这样闷,十之八九要下雨(原因状语) 二、with或without+名词/代词+副词 例句:1.She left the room with all the lights on. 她离开了房间,灯还亮着。(伴随情况) 2.The boy stood there with his head down. 这个男孩低头站在那儿。(伴随情况) 三、with或without+名词/代词+介词短语 例句:1.He walked into the dark street with a stick in his hand. 他走进黑暗的街道时手里拿着根棍子。(伴随情况) 2. With the children at school, we can't take our vacation when we want to. 由于孩子们在上学,所以当我们想度假时而不能去度假。(原因状语) 四、with或without+名词/代词+非谓语动词 1、with或without+名词/代词+动词不定式,此时,不定式表示将发生的动作。 例句: 1.With no one to talk to, John felt miserable. 由于没人可以说话的人,约翰感到很悲哀。(原因状语)

高中毕业自我鉴定范文大全

高中毕业自我鉴定范文大全 关于高中毕业自我鉴定范文大全 高中毕业自我鉴定范文(一) 紧张有序的高中生活即将与我告别。回想三年里有过多少酸甜苦辣,曾经付出了多少辛勤的汗水,但也得到了相应的汇报。在老师的启发教导下,我在德智体方面全面发展,逐渐从幼稚走向成熟。 在政治上,我有坚定正确的立场,热爱祖国,热爱党,认真学习并拥护党的各项方针政策,积极要求进步,思想觉悟高,爱憎分明,踊跃参加各项社会公益活动,主动投入捐款救灾行列,用微薄的力量,表达自己的爱心,做一个文明市民。 在学习上,我有刻苦钻研的学习精神,学习态度端正,目的明确,专心上课并做好笔记,注重理解和掌握,强化练习,学会分类归纳,不断总结,摸索出适合自己的学习方法,养成良好的学习习惯。在学习中知难而进,敢于正视自己的弱点并及时纠正,同时我也积极参加社会实践,将书本知识与实践知识相结合,使自己有适应社会的能力,应变能力有进一步提高。在课余时间里,我喜欢博览群书,开拓视野,增长知识,不断充实自己。还利用假期参加电脑培训,并取得结业证书,高三年被评为校级三好生。 生活上,我拥有严谨认真的作风,为人朴实真诚,勤俭节约,生活独立性较强。热爱集体,尊敬师长,团结同学,对班级交给的任务都能认真及时完成。 我的兴趣广泛,爱好体育、绘画等,积极参加各类体育竞赛,达到国家规定的体育锻炼标准。 高中三年生活有使我清醒地认识到自己的不足之处,如有时学习时间抓不紧,各科学习时间安排不尽合理。因此,我将加倍努力,不断改正缺点,挖掘潜力,以开拓进取、热情务实的精神面貌去迎接未来的挑战。 高中毕业自我鉴定范文(二) 时间过得太快,在我还没反应过来的时候,丰富多彩的三年高中生活就即将结束了,这三年是我人生中最重要的一段里程,它将永远铭记在我的脑海里。 我衷心拥护中国共产党的领导,热爱蒸蒸日上、迈着改革步伐前进的社会主义祖国,用建设有中国特色的社会主义理论武装自己,积极参加党章学习小组,逐步提高自己的政治思想觉悟,关心时事政治,思想健康进步。自觉遵守《中学生守则》和《中学生日常行为规范》。 在学习上,我有刻苦钻研的学习精神,学习态度端正,目的明确,专心上课并做好笔记,注重理解和掌握,强化练习,学会分类归纳,不断总结,摸索出适合自己的学习方法,养成良好的学习习惯。在学习中知难而进,敢于正视自己的弱点并及时纠正,同时我也积极参加社会实践,将书本知识与实践知识相结合,使自己有适应社会的能力,应变能力有进一步提高。 生活上,我拥有严谨认真的作风,为人朴实真诚,勤俭节约,生活独立性较强。热爱集体,尊敬师长,团结同学,对班级交给的任务都能认真及时完成。我的兴趣广泛,爱好体育、绘画等。 作为跨世纪的一代,我们即将告别中学时代的酸甜苦辣,迈入高校去寻找另一片更加广阔的天空。在这最后的中学生活里,我将努力完善自我,提高学习成绩,为几年来的中学生活划上完美的句号,也以此为人生篇章中光辉的一页。 高中毕业自我鉴定范文(三) 时光如梭,转眼即逝,高考已经结束,眼见着高中就要毕业,当我回首这三年来的生活时,才发现这三年来的生活竟是历历在目:

With的用法全解

With的用法全解 with结构是许多英语复合结构中最常用的一种。学好它对学好复合宾语结构、不定式复合结构、动名词复合结构和独立主格结构均能起很重要的作用。本文就此的构成、特点及用法等作一较全面阐述,以帮助同学们掌握这一重要的语法知识。 一、 with结构的构成 它是由介词with或without+复合结构构成,复合结构作介词with或without的复合宾语,复合宾语中第一部分宾语由名词或代词充当,第二部分补足语由形容词、副词、介词短语、动词不定式或分词充当,分词可以是现在分词,也可以是过去分词。With结构构成方式如下: 1. with或without-名词/代词+形容词; 2. with或without-名词/代词+副词; 3. with或without-名词/代词+介词短语; 4. with或without-名词/代词 +动词不定式; 5. with或without-名词/代词 +分词。 下面分别举例: 1、 She came into the room,with her nose red because of cold.(with+名词+形容词,作伴随状语)

2、 With the meal over , we all went home.(with+名词+副词,作时间状语) 3、The master was walking up and down with the ruler under his arm。(with+名词+介词短语,作伴随状语。) The teacher entered the classroom with a book in his hand. 4、He lay in the dark empty house,with not a man ,woman or child to say he was kind to me.(with+名词+不定式,作伴随状语)He could not finish it without me to help him.(without+代词 +不定式,作条件状语) 5、She fell asleep with the light burning.(with+名词+现在分词,作伴随状语) Without anything left in the with结构是许多英 语复合结构中最常用的一种。学好它对学好复合宾语结构、不定式复合结构、动名词复合结构和独立主格结构均能起很重要的作用。本文就此的构成、特点及用法等作一较全面阐述,以帮助同学们掌握这一重要的语法知识。 二、with结构的用法 with是介词,其意义颇多,一时难掌握。为帮助大家理清头绪,以教材中的句子为例,进行分类,并配以简单的解释。在句子中with结构多数充当状语,表示行为方式,伴随情况、时间、原因或条件(详见上述例句)。 1.带着,牵着…… (表动作特征)。如: Run with the kite like this.

With的复合结构

With的复合结构 介词with without +宾语+宾语的补足语可以构成独立主格结构,上面讨论过的独立主格结构的几种情况在此结构中都能体现。 1. with+名词代词+形容词 He doesn’t like to sleep with the windows open. = He doesn’t like to sleep when the windows are open. He stood in the rain, with his clothes wet. = He stood in the rain, and his clothes were wet. With his father well-known, the boy didn’t want to study. 2. with+名词代词+副词 Our school looks even more beautiful with all the lights on. = Our school looks even more beautiful if when all the lights are on. The boy was walking, with his father ahead. = The boy was walking and his father was ahead. 3. with+名词代词+介词短语 He stood at the door, with a computer in his hand. He stood at the door, computer in hand. = He stood at the door, and a computer was in his hand. Vincent sat at the desk, with a pen in his mouth. Vincent sat at the desk, pen in mouth. = Vincent sat at the desk, and he had a pen in his mouth. 4. with+名词代词+动词的-ed形式 With his homework done, Peter went out to play. = When his homework was done, Peter went out to play. With the signal given, the train started. = After the signal was given, the train started. I wouldn’t dare go home without the job finished. = I wouldn’t dare go home because the job was not finish ed. 5. with+名词代词+动词的-ing形式 The girl hid her box without anyone knowing where it was. = The girl hid her box and no one knew where it was. Without anyone noticing, he slipped through the window. = When no one was noticing, he slipped through the window. 6. with+名词代词+动词不定式 The little boy looks sad, with so much homework to do. = The little boy looks sad because he has so much homework to do. with the window closed with the light on with a book in her hand with a cat lying in her arms with the problem solved with the new term to begin

高考个人自我鉴定范文

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with复合宾语的用法(20201118215048)

with+复合宾语的用法 一、with的复合结构的构成 二、所谓"with的复合结构”即是"with+复合宾语”也即"with +宾语+宾语补足语” 的结构。其中的宾语一般由名词充当(有时也可由代词充当);而宾语补足语则是根据 具体的需要由形容词,副词、介词短语,分词短语(包括现在分词和过去分词)及不定式短语充当。下面结合例句就这一结构加以具体的说明。 三、1、with +宾语+形容词作宾补 四、①He slept well with all the windows open.(82 年高考题) 上面句子中形容词open作with的宾词all the windows的补足语, ②It' s impolite to talk with your mouth full of food. 形容词短语full of food 作宾补。Don't sleep with the window ope n in win ter 2、with+宾语+副词作宾补 with Joh n away, we have got more room. He was lying in bed with all his clothes on. ③Her baby is used to sleeping with the light on.句中的on 是副词,作宾语the light 的补足语。 ④The boy can t play with his father in.句中的副词in 作宾补。 3、with+宾语+介词短语。 we sat on the grass with our backs to the wall. his wife came dow n the stairs,with her baby in her arms. They stood with their arms round each other. With tears of joy in her eyes ,she saw her daughter married. ⑤She saw a brook with red flowers and green grass on both sides. 句中介词短语on both sides 作宾语red flowersandgreen grass 的宾补, ⑥There were rows of white houses with trees in front of them.,介词短语in front of them 作宾补。 4、with+宾词+分词(短语 这一结构中作宾补用的分词有两种,一是现在分词,二是过去分词,一般来说,当分词所表 示的动作跟其前面的宾语之间存在主动关系则用现在分词,若是被动关系,则用过去分词。 ⑦In parts of Asia you must not sit with your feet pointing at another person.(高一第十课),句中用现在分词pointing at…作宾语your feet的补足语,是因它们之间存在主动关系,或者说point 这一动作是your feet发出的。 All the after noon he worked with the door locked. She sat with her head bent. She did not an swer, with her eyes still fixed on the wall. The day was bright,with a fresh breeze(微风)blowing. I won't be able to go on holiday with my mother being ill. With win ter coming on ,it is time to buy warm clothes. He soon fell asleep with the light still bur ning. ⑧From space the earth looks like ahuge water covered globe,with a few patches of land stuk ing out above the water而在下面句子中因with的宾语跟其宾补之间存在被动关系,故用过去分词作宾补:

高中毕业自我鉴定范文二十三篇

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