A Modular Client-Server Discrete Event Simulator for Networked Computers
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RE22R2AMR.T h e i n f o r m a t i o n p r o v i d e d i n t h i s d o c u m e n t a t i o n c o n t a i n s g e n e r a l d e s c r i p t i o n s a n d /o r t e c h n i c a l c h a r a c t e r i s t i c s o f t h e p e r f o r m a n c e o f t h e p r o d u c t s c o n t a i n e d h e r e i n .T h i s d o c u m e n t a t i o n i s n o t i n t e n d e d a s a s u b s t i t u t e f o r a n d i s n o t t o b e u s e d f o r d e t e r m i n i n g s u i t a b i l i t y o r r e l i a b i l i t y o f t h e s e p r o d u c t s f o r s p e c i f i c u s e r a p p l i c a t i o n s .I t i s t h e d u t y o f a n y s u c h u s e r o r i n t e g r a t o r t o p e r f o r m t h e a p p r o p r i a t e a n d c o m p l e t e r i s k a n a l y s i s , e v a l u a t i o n a n d t e s t i n g o f t h e p r o d u c t s w i t h r e s p e c t t o t h e r e l e v a n t s p e c i f i c a p p l i c a t i o n o r u s e t h e r e o f .N e i t h e r S c h n e i d e r E l e c t r i c I n d u s t r i e s S A S n o r a n y o f i t s a f f i l i a t e s o r s u b s i d i a r i e s s h a l l b e r e s p o n s i b l e o r l i a b l e f o r m i s u s e o f t h e i n f o r m a t i o n c o n t a i n e d h e r e i n .Product data sheetCharacteristicsRE22R2AMROn-delay Timing Relay - 0.05s…300h - 24…240V AC/DC - 2C/OMainRange of product Zelio TimeProduct or component typeModular timing relay Discrete output type Relay Device short name RE22Nominal output current8 AComplementaryContacts type and composition 1 C/O timed or instantaneous contact, cadmium free 1 C/O timed contact, cadmium free Time delay type A AwTime delay range0.3...3 s 1...10 s 0.05...1 s 3...30 s 10...100 s 30...300 s 3...30 min 30...300 min 3...30 h 30...300 hControl typeExternal potentiometer Diagnostic button Rotary knob[Us] rated supply voltage 24...240 V AC/DC at 50/60 Hz Release input voltage <= 2.4 V Voltage range 0.85...1.1 Us Supply frequency 50...60 Hz (+/- 5 %)Connections - terminalsScrew terminals : 2 x 0.2...2 x 1.5 mm², AWG 24...AWG 16 flexible cable with ca-ble endScrew terminals : 1 x 0.2...1 x 2.5 mm², AWG 24...AWG 14 flexible cable with ca-ble endScrew terminals : 2 x 0.5...2 x 2.5 mm², AWG 20...AWG 14 solid cable without cable endScrew terminals : 1 x 0.5...1 x 3.3 mm², AWG 20...AWG 12 solid cable without cable endTightening torque 0.6...1 N.m conforming to IEC 60947-1Housing material Self-extinguishingRepeat accuracy +/- 0.5 % conforming to IEC 61812-1Temperature drift +/- 0.05 %/°C Voltage drift+/- 0.2 %/VSetting accuracy of time delay +/- 10 % of full scale at 25 °C conforming to IEC 61812-1Control signal pulse width 30 ms100 ms (with load in parallel)Insulation resistance 100 MOhm at 500 V DC conforming to IEC 60664-1Recovery time120 ms (on de-energisation)Immunity to microbreaks <= 10 ms Power consumption in VA3 VA at 240 V ACPower consumption in W 1.5 W at 240 V DCSwitching capacity in VA2000 VAMinimum switching current10 mA 5 V DCMaximum switching current8 AMaximum switching voltage250 V ACElectrical durability100000 cycles for 2 A at 24 V DC-1100000 cycles for 8 A at 250 V AC-1Mechanical durability10000000 cyclesRated impulse withstand voltage 5 kV for 1.2...50 µs conforming to IEC 60664-1Power on delay< 100 msCreepage distance 4 kV/3 conforming to IEC 60664-1Overvoltage category III conforming to IEC 60664-1Mounting position Any positionMounting support35 mm DIN rail conforming to EN/IEC 60715Status LED Yellow LED (slow flashing) for timing in progress and output relay energisedYellow LED (fast flashing) for timing in progress and output relay de-energisedYellow LED (steady) for output relay energisedGreen LED backlight (steady) for dial pointer indicationProduct weight0.105 kgEnvironmentDielectric strength 2.5 kV for 1 mA/1 minute at 50 Hz between relay output and power supply withbasic insulation conforming to IEC 61812-1Standards IEC 61812-1UL 508Directives2004/108/EC - electromagnetic compatibility2006/95/EC - low voltage directiveProduct certifications CCCCECSAGLULRCMEACChina RoHSAmbient air temperature for operation-20...60 °CAmbient air temperature for storage-40...70 °CIP degree of protection IP50 (front panel) conforming to IEC 60529IP20 (terminals) conforming to IEC 60529IP40 (housing) conforming to IEC 60529Pollution degree 3 conforming to IEC 60664-1Vibration resistance20 m/s² (f = 10...150 Hz) conforming to IEC 60068-2-6Shock resistance 5 gn (in operation) (duration = 11 ms) conforming to IEC 60068-2-2715 gn (not operating) (duration = 11 ms) conforming to IEC 60068-2-27 Relative humidity95 % at 25...55 °CElectromagnetic compatibility Immunity to microbreaks and voltage drops (test level: 100 % - 20 ms) conform-ing to IEC 61000-4-11Immunity to microbreaks and voltage drops (test level: 30 % - 500 ms) conform-ing to IEC 61000-4-11Fast transient bursts (test level: 2 kV, level 3 - direct contact) conforming to IEC61000-4-4Conducted RF disturbances (test level: 10 V, level 3 - 0.15...80 MHz) conformingto IEC 61000-4-6Radiated radio-frequency electromagnetic field immunity test (test level: 10 V/m,level 3 - 80 MHz...1 GHz) conforming to IEC 61000-4-3Electrostatic discharge (test level: 8 kV, level 3 - air discharge) conforming to IEC61000-4-2Electrostatic discharge (test level: 6 kV, level 3 - contact discharge) conforming toIEC 61000-4-2Surge immunity test (test level: 2 kV, level 3 - common mode) conforming to IEC61000-4-5Surge immunity test (test level: 1 kV, level 3 - differential mode) conforming toIEC 61000-4-5Fast transients immunity test (test level: 1 kV, level 3 - capacitive connecting clip)conforming to IEC 61000-4-4Product data sheetRE22R2AMR Dimensions DrawingsDimensionsProduct data sheetRE22R2AMR Connections and SchemaWiring DiagramProduct data sheetRE22R2AMRTechnical DescriptionFunction A: Power On-DelayDescriptionOn energisation of power supply, the timing period T starts. After timing, the output(s) R close(s).The second output (R2) can be either timed (when set to "TIMED") or instantaneous (when set to "INST").Function: 1 OutputFunction: 2 OutputsFunction Aw : Power On-Delay With Retrigger / Restart ControlDescriptionOn energisation of power supply, the timing period T starts.At the end of the timing period T, the output(s) R close(s).Energization of Y1 makes the output(s) R open(s).Deenergization of Y1 restarts timing period T.At the end of timing period T, the output(s) R close(s).The second output (R2) can be either timed (when set to "TIMED") or instantaneous (when set to "INST")Function: 1 OutputFunction: 2 OutputsLegendRelay de-energisedRelay energisedOutput openOutput closedUSupply-TTiming period-R1/2 timed outputsR2-R2The second output is instantaneous if the right position is selected inst.-Retrigger / Restart controlY1-RE22R2AMR.。
VCL-Ethernet over SDH (Ethernet over STM-1)Product BrochureORION TELECOM NETWORKS INC.RIONTELECOMNETWORKSHeadquarters: Phoenix, Arizona Orion Telecom Networks Inc.20100, N 51st Ave, Suite B240,Glendale AZ 85308Phone: +1 480-816-8672Fax: +1 480-816-0115E-mail:**********************Website: Regional Office: Miami, Florida Orion Telecom Networks Inc.4000 Ponce de Leon Blvd. Suite 470,Coral Gables, FL 33146 U.S.A.Phone: 1-305-777-0419, Fax: 1-305-777-0201E-mail:**********************Website: Product OverviewVCL-Ethernet over SDH (STM-1)Features1U height, 19-Inch standard rack-mountable chassis Service interfaces2 x STM-1 optical interfaces, MSA compliant SFP (pluggable) optical module (LC connector) based design, which supports onsite optical port replacement2 x STM-1 electrical interfaces, SFP electrical module (Mini BNC connector) Optional 4 x 10/100BaseT Ethernet (electric) interface 10/100BaseT (FE) Ethernet Interface Options4 Ports, 4 Channels (4 VCG), and 4 Ports, 1 Channel (1 VCG)Provides complete diagnostics facilities to the user for monitoring optical ports and provide reading of optical transmit power, optical receive power, laser temperature, bias current in voltage alarms etc.Performance Monitoring and Alarms - Error counts for B1, B2, B3Performance Analysis - Error Seconds (ES), Several Error Seconds (SES), Unavailable seconds UAS, Higher Order Virtual Container - Remote Error Indication (HOVC-REI), Higher Order Virtual Container - Pointer Justification Event (HOVC-PJE)Management and Maintenance interfaces10/100BaseT Ethernet management interface RS232 serial management interface Remote (Telnet) management interfaceWindows XP based Graphical User Interface (GUI)Windows 7 based Graphical User Interface (GUI)SNMP V2 MonitoringEngineering Order Wire (EOW) interface (RJ-11)NMS (Network Management System) for monitoring multiple units from a single / central location.Orion’s Ethernet over SDH (STM-1) Equipment is a modular platform unit with two pluggable 155.52Mbps optical / electrical interfaces, which may be used in a point-to-point, chain or ring application to provide a compact, cost effective and flexible solution to deliver multiple Ethernet channels.Ethernet over SDH (STM-1) – Available bandwidth on four Ethernet ports (4VCG) on an STM-1 link (126Mbps bandwidth aggregated on 4 Ethernet ports).Interface card options include the 4x100BaseT Ethernet interface card (1 VCG, 4 Ports 1 Channel), 4x100BaseT Ethernet interface card (4 VCG, 4 Ports 4 Channels) and Gigabit Ethernet interface card options along with Engineering Order Wire is available. The user removable / replaceable STM-1 Optical / Electrical interface option makes it easy to meet various and changing user requirements. Valiant’s STM-1, Ethernet and Gigabit Ethernet over SDH Transmission Equipment provides full capability to cross-connect at E1 level between all tributaries. The equipment can be used as TerminalMultiplexer (TM) to build a point-to-point, chain or ring SDH transmission network.FeaturesTiming modeSynchronization with STM-1 line timingExternal timing source option - 120 Ohms 2MBps (External Bits Clock)External timing source - 120 Ohms 2MHz (External TTL Clock) - Factory ConfigurableInternal Clock - ITU-T G.813 internal oscillator (Stratum 3)The timing source can be auto-switched according to default or operator programmed settings Ethernet Standards ConformityGeneric Framing Procedure GFP-F compliant with ITU-T G.7041VCAT compliant with ITU-T G.707 and LCAS compliant with ITU-T G.7042Ethernet flow control on WAN port and LAN portLarge buffer size upto 410,000 bytesMaximum Frame length (MTU size):1536 bytes with 4 port 1 channel (1 VCG) Ethernet CardMaximum Frame length (MTU size):2036 bytes with 4 port 4 channel (4 VCG) Ethernet CardAuto MID/MID-X for Ethernet InterfacesSupport 802.1Q based VLAN tagging (4 ports 1 channel (1 VCG) Ethernet Card only)Support Port based VLAN tagging (4 ports 1 channel (1 VCG) Ethernet Card only)Performance AnalysisAll Received PacketsAll Transmitted PacketsReceived Dropped PacketsSupports 1+1 Line Protection and Automatic Protection Switching (APS) with less than 50ms recoverySupports point-to-point, ring and chain topology (4 VCG card only)Local management and network-based management via a unified platformSupports Remote Power Down Detection and Auto Laser ShutdownSupports STM-1 loop-back for troubleshooting850nm multi-Mode, 1310nm Single Mode and 1550nm Single Mode optical interface options offeredEthernet mapping adopts GFP/VC-12 virtual concatenated technology; according with MSTP criterionProvides Ethernet over SDH mapping through standard GFP and VC-12 virtual concatenation (VCAT)Ethernet bandwidth can be adjusted by the user between 2MBps ~126 Mbps (VC-12 mapping) Supports MAC Address list filtration, learning and updating functionEasy to operateRedundant power supply card options AC+DC, DC+DC and AC+AC.110V AC - 240V AC (50/60 Hz) power options available-48VDC power option available-24VDC power option availablePower consumption less than 12W.VCL-Ethenet over SDHRouter 1Router 2SDHSTM-1LinkVCL-Ethenet over SDHSTM-1LinkRouter 1Router 2Point to point network (Shared Link Mode)1 VCG Card ApplicationPoint to point network (Discrete Link Mode)4 VCG Card ApplicationVCL-Ethenet over SDHSDHSTM-1LinkVCL-Ethenet over SDHSTM-1LinkRouterRouter RouterRouterNetwork ApplicationPower IndicatorCurrent Status (integrity and activity) IndicatorUrgent Alarm IndicatorMinor Alarm IndicatorOptical Signal Loss Alarm IndicatorRemote Device Power-down IndicatorEthernet Card Status IndicatorGeneral Alarm Indicator for Ethernet Card(including Link-down of Ethernet Port)Auto Laser Shutdown (ALS) IndicatorEngineering Order-Wire (EOW) IndicatorEthernet Link IndicatorEthernet Speed IndicatorDry contact via 9-pin, D-type male connectorBuzzer AlarmSNMP Diagnostic and MonitoringAlarm and Indicator MonitoringTechnical SpecificationsNetwork Topology and InterfacesNetwork topology Point to point network, Ring and ChainService interfaces STM-1 SDH single optical or double optical ports(1+1 protection) supported- 10/100BaseT Ethernet- 10/100/1000BaseT or 1000Base-FX GigESTM-1 Electrical Interface - Technical SpecificationsData Rate 155.52 MbpsStandard ITU-T G.703 CompliantLine Code CMIPhysical Connector Mini BNCAutomatic 1+1 line protection Less than 50 ms switching / recoverySTM-1 Optical Interface - Technical SpecificationsData Rate155.52 MbpsStandard ITU-T G.957 compliantBit rate155.520MbpsCoding NRZConnector LCLight source Class 1 LaserWave length850nm/1310nm/1550nm (optional) - 1310nm Std. Transmit power S 1.1, L 1.1, L 1.2(- 11 dBm to - 2.5 dBm - as may be ordered) Receive sensitivity S 1.1, L 1.1, L 1.2(- 28 dBm to - 34 dBm - as may be ordered) Automatic 1+1 Line Protection Less than 50 ms switching / recoveryAutomatic Laser Shut Down Option User selectable optionsSTM-1 Monitoring and Performance AnalysisPerformance Monitoring and Alarms Error counts for B1, B2, B3Performance Analysis Error Seconds (ES), Several ErrorSeconds (SES), Unavailable Seconds UAS,Higher Order Virtual Container - RemoteError Indication (HOVC-REI), Higher OrderVirtual Container - Pointer Justification Event(HOVC-PJE)Optical InterfacesType Wavelength Mean Receiver Receiver Connector Configuration (nm)launched sensitivity overloadpower (dBm)(dBm)(dBm)Double1310-8 ~ -12-36-3LC Standard (S1.1) fibers, Two13100 ~ -5-36-3LC Optional (L1.1) DirectionSingle1310/1550-8 ~ -14-30-3LC Optional fiber, One1310/15500 ~ -5-30-3LC Optional Direction1 VCG - Ethernet Interface Specification: 10/100BaseT (Electrical)Number of Interfaces4Number of VCG/Channel1Interface Types10/100BaseTEthernet Mode Half/FullMDI/MDI-X Support YesVCAT Compliance ITU-T G.707LCAS Compliance ITU-T G.7042GFP-F ITU-T G.7041Frame Size1536 bytesTransmission Bit Rate10/100 MbpsConnectors RJ-45 Electrical802.1Q MAC packet transparent transmission supportedEthernet data rate can be adjusted from 2M to 100M4 VCG - Ethernet Interface Specification: 10/100BaseT (Electrical)Number of Interfaces4Number of VCG/Channels4Interface Types10/100BaseTEthernet Mode Half/FullMDI/MDI-X Support YesVCAT Compliance ITU-T G.707LCAS Compliance ITU-T G.7042GFP-F ITU-T G.7041Frame Size2036 bytesTransmission Bit Rate10/100 MbpsConnectors RJ-45 Electrical802.1Q MAC packet transparent transmission supportedEthernet data rate can be adjusted from 2M to 126MEthernet port (1 VCG/4 VCG/GigE) Performance AnalysisAll Received PacketsAll Transmitted PacketsReceived Dropped PacketsClock Synchronization OptionsClock Synchronization options Synchronization with STM-1 line timingExternal timing source option - 120 Ohms 2MBps (ExternalBits Clock)External timing source - 120 Ohms 2MHz (External TTLClock) - Factory ConfigurableInternal Clock - ITU-T G.813 internal oscillator (Stratum 3)The timing source can be auto-switched according to defaultor operator programmed settingsEngineering Order Wire (EOW)Engineering Order Wire (EOW)RJ-11 connectorNMSGraphical User Interface (GUI) Windows XP / Windows Vista compatibleSNMP V2 based NMSPower Supply OptionsDC Mains Input - 48VDC (range -36V DC to -75V DC)AC Main Input100V AC to 240V AC, 50 / 60 HzPower Protection1+0 (AC, DC), 1+1 (AC+AC, AC+DC, DC+DC) Power Consumption < 12 WattsOperating Conditions00Ambient temperature -10C ~ +60CRelative humidity<90% (Non condensing)Mechanical SpecificationsRack Mounting Standard 19 Inch. DIN RackHeight44 mm.Depth256 mm.Width 440 mm.Weight 3.25 kgOrdering InformationA. VCL-Ethernet over SDH (STM-1) Common EquipmentB. Ethernet Options S. No.PartDescription Remarks 1VCL-ETH-o-SDHVCL-Ethernet over SDH (STM-1)19-inch 1U High Rack Mount version Supports:- 2 x STM-1 Ports (1+1) [SFP based - without SFPs]- 1 x System Core Cables, Installation accessories,Documentation, System User Manual/ Disk etc (Set)-OAM: EOW, SNMP , EMS, NMS* Add Power Supply Option from below (C)S. No.Part DescriptionRemarks 10169E 4 x Ethernet Port [100Mbps, Electrical RJ45 (F),1VCG (1 Channel) + VLAN]20212E 4 x Ethernet Port [100Mbps, Electrical RJ45 (F), 4VCG (4 Channel)]30264E4 x Ethernet Port [100Mbps, Electrical RJ45 (F),4VCG (4 Channel) +VLAN]CORE UNIT without PSUs Any one optionS. No.Part DescriptionRemarks 1AC220 1 x 100-240V AC Power Supply Input 2Any DC048 1 x (-) 48V DC Power Supply Input 3ACDC 1 x 100-240V AC Power Supply Input one 1 x (-) 48V DC Power Supply Inputoption.4AC220R 2 x 100-240V AC Power Supply Input [Redundant]5DC048R2 x (-) 48V DC Power Supply Input [Redundant]C. Power Supply OptionsS. No.PartDescriptionRemarks 1VCL-EMOD 0193155Mbps SFP Transceiver, SDH/STM-1,SONET/OC-3, Fast Ethernet, S-1.1, Duplex LC, 1310nm, 15Km, SMF2VCL-EMOD 0194155Mbps SFP Transceiver, SDH/STM-1,SONET/OC-3, Fast Ethernet, L-1.1, Duplex LC, 1310nm, 40Km, SMF3VCL-EMOD 0217155Mbps SFP Transceiver, SDH/STM-1,SONET/OC-3, Fast Ethernet, L-1.2, Duplex LC, 1550nm, 80Km, SMF4VCL-EMOD 0156155Mbps SFP Transceiver, SDH/STM-1,SONET/OC-3, LR-2/LR-3, Fast Ethernet, L-1.2, Duplex LC, 1550nm, 120Km, SMF5VCL-EMOD 0243155Mbps SFP Transceiver, SDH/STM-1,SONET/OC-3, L-1.2, Duplex LC, 1550nm, 150Km, SMF6VCL-EMOD 0195155Mbps SFP Copper Transceiver, STM-1e (Es1) [Electrical], 75Ω DIN 1.0/2.3 female coaxial, MSA,Grounds Isolated, RoHSD STM-1 SFP Options Maximum 2 SFPs per CORE UNIT.S. No.PartDescriptionRemarks 1VCL-HRNS 1229VCL-HRNS 1238VCL-HRNS 1242VCL-HRNS 1243VCL-HRNS 1239VCL-HRNS 1258VCL-HRNS 1216VCL-ECON 11729VCL-ECON 117310VCL-ECON 11861VCL-ECON 11872VCL-ECON 11973VCL-ECON 1198Optical Patch Cord Connectorized Cable [2LC-2LC, 3m, SM]2Optical Patch Cord Connectorized Cable 2LC-2LC, 10m, SM]3Optical Patch Cord Connectorized Cable [LC-FC, 10m, SM]4Optical Patch Cord Connectorized Cable [2LC-2FC, 10m, SM]5Optical Patch Cord Connectorized Cable [LC-SC, 10m, SM]6Optical Patch Cord Connectorized Cable [2LC-2SC, 10m, SM]7Mini-BNC-to-Big-BNC Connectorized Cable [3m]8Connector (Attenuator LC-LC (10 db.))Connector (Attenuator LC-LC (20 db.))Connector (Attenuator FC-FC (10 db.))1Connector (Attenuator FC-FC (20 db.))1Connector (Attenuator SC-SC (10 db.))1Connector (Attenuator SC-SC (20 db.))E Cables and Accessories Options As per Site Require ment.Ethernet over SDH (STM-1)Technical specifications are subject to changes without notice.Revision 11 - March 20, 201411Note:Orion Telecom Networks Inc. - 2014Headquarters: Phoenix, ArizonaOrion Telecom Networks Inc.20100, N 51st Ave, Suite B240,Glendale AZ 85308Phone: +1 480-816-8672Fax: +1 480-816-0115E-mail:**********************Website: Regional Office: Miami, Florida Orion Telecom Networks Inc.4000 Ponce de Leon Blvd. Suite 470,Coral Gables, FL 33146 U.S.A.Phone: 1-305-777-0419, Fax: 1-305-777-0201E-mail:**********************Website: 。
ERP(enterprise resource planning )企业资源计划系统,是指建立在信息技术基础上,以系统化的管理思想,为企业决策层及员工提供决策运行手段的管理平台。
ERP的专业词汇1safety stock安全库存safety lead time 安全提前期ERP的专业词汇2Office Automation (OA)办公自动化carrying cost保管费closed-loop MRP 闭环MRP(MRP=manufacturing resource planning 制造资源规划)ERP的专业词汇3standard cost system 标准成本体系resupply order 补库单unfavorable/adverse variance 不利差异concurrent engnineering 并行工程ERP的专业词汇4financial accounting 财务会计financial entity 财务实体vloume variance 产量差异prodcut data management (PDM)产品数据管理系统ERP专业词汇5shop floor control 车间作业控制shop order, work order车间定单cost roll-up 成本滚动计算法costed BOM 成品物料单(BOM=bill of materials材料单)yield 成品率ERP专业词汇5group technology 成组技术repetitive manufacturing 重复式生产rough-cut capacity planning (RCCP) 粗能力计划move time, transit time 传递时间ERP专业词汇6group technology 成组技术repetitive manufacturing 重复式生产rough-cut capacity planning (RCCP) 粗能力计划move time, transit time 传递时间ERP专业词汇7Deming circle 戴明环back scheduling 倒排计划wait time 等待时间low-level code 低层码electronic date interchange 电子数据交换(EDI) ERP专业词汇8order point system 订货点法acquisition cost, ordering cost 订货费make-to-order 订货生产(MTO)assemble-to-order 订货组装(ATO)fixed period requirements 定期用量法ERP专业词汇9独立需求independent demand短缺损失cost of stockout额定能力rated capacity反查物料单where-used list反冲法backflushingERP专业词汇10非规范化管理informal system废品率scrap分布式控制系统distributed control system (DCS) 分布式MRP distributed MRP (DMRP)分销资源计划distribution resource planning (DRP) 分销需求计划distribution requirements planning ERP专业词汇11供方计划员vendor scheduler, supplier scheduler 供应链supply chain供应链管理supply chain management (SCM)供应链合作伙伴关系supply chain partnership (SCP) ERP专业词汇12工效学ergonomics工艺线路routing工作流work flow工作日历shop calendar工作中心work center工作准则与工作规程policy and procedureERP专业词汇13固定批量法fixed order quantity(FOQ)固定资产fixed assets关键过程域key process areas (KPA)关键工作中心critical work center关键路径法critical path method(CPM)ERP专业词汇14管理会计management accounting管理信息系统management information system (MIS)规范化管理系统formal system后勤保证体系logistics呼叫中心computer telephony integration (CTI)ERP专业词汇15会议室模拟conference room pilot汇总物料清单summarized BOM基本组件feature计划产出量planned order receipts计划定单planned order计划接收量scheduled receiptsERP专业词汇16计划能力planned capacity计划评审技术program evaluation research technology (PERT)计划期planning horizon计划时界planned time fence (PTF)计划投入量planned order releases计划物料单planning BOMERP专业词汇17季节储备seasonal stock计算机辅助工艺设计computer-aided process planning (CAPP)计算机辅助软件工程computer-aided software engineering (CASE)计算机辅助设计computer-aided design (CAD)计算机辅助制造computer-aided Manufacturing (CAM)计算机集成制造系统computer integrated manufacturing system (CIMS) ERP专业词汇18机群式布置车间job shop加工时间run time价值链value chain间接费分配overhead apportionment/allocation间接费率overhead rate, burden factor, absorption rate建议成本proposed cost净改变法net changeERP专业词汇19经济订货f法economic order quantity (EOQ)经济订货周期Economic Order Interval (EOI)紧迫系数critical ratio净需求net requirement净需求计算netting精益生产lean production经营规划business plan决策支持系统decision support system (DSS)ERP专业词汇20开支差异spending variance, expenditure variance可供销售量available to promise (ATP)客户关系管理customer relationship management (CRM)客户机服务器client server客户交货提前期customer delivery leadtime可选件option库存inventory库存(资金)周转次数inventory turnover / turns快速换模法single-minute exchange of dies (SMED)ERP专业词汇21累计提前期cumulative lead time离散型生产discrete manufacturing例外管理法management by exception连续流程continous process领料提货单picking list流动负债current liabilities流动资产current assetsERP专业词汇22毛需求gross requirements美国生产与库存管理协会American Production and Inventory Control Society, Inc. (APICS) 面向客户制造管理系统Customer Oriented Manufacturing Management System (COMMS) 敏捷制造Agile manufacturing模块化物料单modular BOM模拟成本simulated cost母件parent itemERP专业词汇23能力成熟度模型capability maturity model (CMM)能力利用水平capacity level能力管理capacity management能力需求计划capacity requirements planning帕拉图原理Pare to Principle排队时间queue time派工单dispatch timeERP专业词汇24配套出售件kitting批量规则lot sizing批量库存lot size inventory批流程batch process偏置天数days offset瓶颈资源bottleneckERP专业词汇25其它应收款other receivables企业资源计划enterprise resource planning (ERP)请购单requisition全面质量管理total quality management(TQM)确认订单firm-planned order确认计划需求时界firm-planned time fenceERP专业词汇26人力资源管理human resouce management (HRM)人力资源计划human resouce planning (HRP)柔性制造系统flexible manufacturing system (FMS)设计物料清单engineering BOM生产周期production cycle成产和决策管理信息系统production and decision information system (PADIS) 生产作业控制production activity controlERP专业词汇27时段time bucket时界time fence时区time zone所有者权益owner's equity顺排计划forward scheduling缩减率shrinkage缩排式物料清单indented BOMERP专业词汇28提前期lead time提前期偏置lead time offset投入/产出控制input/output control囤积库存hedge inventory脱期定单back order拖欠定单backlog未结定单open orderERP专业词汇29物料material, item物料管理material management物料核定机构material review board物料经理material manager物料可用量material available物料清单bill of materials物料需求计划material requirements planning (MRP)物料主文件material master, item masterERP专业词汇30无形资产intangible assets无时段系统bucketless system无限排负荷infinite loading下达定单released order现货生产make to stock (MTS)现金cash on hand先进制造技术advanced manufacturing technology相关需求件dependent demand销售力量自动化sales force automation销售与运作规划sales and operations planningERP专业词汇31虚拟企业Virtual Enterprise (VE) or virtual organization 虚拟件phantom需求管理dmand management需求时界demand time fence (DTF)需求周期demand cycle需求能力required capacity循环盘点cycle counting业绩评价performance measurement银行存款cash on bankERP专业词汇32应付票据notes payable应付帐款accounts payable应收票据notes receivable应收帐款accounts receivable应用服务外包application service provider (ASP)因需定量法lot-for-lot应用模拟live pilotERP专业词汇33优化生产技术optimized production technology (OPT) 优先级priority有限能力计划finite capacity scheduling (FCS)有限排负荷finite loading有限顺排finite forward scheduling预计可用库存量projected available balance预期储备anticipation inventory原型测试prototyping约束理论theory of constraints (TOC)ERP专业词汇34在途库存transportation inventory制造物料清单manufacturing BOM制造执行系统manufacturing executive system (MES) 周期定量法period order quantity (POQ)主生产计划master production planning (MPS)主生产计划员master scheduler专项生产engineer to order (ETO)总提前期total lead time。
Serial dilutions or titrations of analytes and other assay components are key to assembling biochemical and cell-based assays in drug discovery and life science research. These assays are used, for example, in assay development to determine appropriate concentration ranges, in secondary screening to evaluate pharmacological response, and in early Absorption, Distribution, Metabolism, Excretion and Toxicity (ADMET) to determine toxicological effects. The ability to rapidly and accurately produce dilution curves in an automated system is essential to improving assay throughput and quality. The JANUS ® Automated Workstation equipped with the Modular Dispense Technology ® (MDT) permits users to rapidly assemble microplate assays with a variety of 96- and 384-well dispense tools.Optional JANUS MDT Serial Dilution Tools (SDT) enable users to perform analyte pipetting in either a single row or column pattern using a single row or column of disposable tips from a standard box of tips. Moreover, Modular Dispense Technology permits rapid, "on-the-fly" swapping between standard 96- or 384-well heads and these serial dilution heads.Serial Dilution Tools deliver maximum flexibility in the liquid handling processes. These tools have the same dynamic pipetting range (0.5 μL – 235 μL) as the standard MDT pipetting heads, are used with the same disposable tip options, and accommodate 96-, 384-, and 1536-well plate formats.Application Workstationsa p p l i c a t i o n n o t eSerial Dilutions on theJANUS Automated Workstation with Modular Dispense T echnologyAuthorsL ee Brady, Dianne Brazzill, Jim Fronek, and Steven Liebold1P erkinElmer, Inc.Downers Grove, IL 60515 USAThis application note presents case studies outlining perfor-mance capabilities, as well as applications-specific results, ofthe Serial Dilution Tools. This data includes pipetting accuracyand precision for a range of volumes, row and column configu-rations, plate types, and disposable tip sizes. Experimental datafrom AlphaLISA® standard curves constructed using the toolsdemonstrate enhanced versatility.Case Study 2: Liquid Serial DilutionPerformance AnalysisMaterials and Methods: Fully automated serial dilutions wereperformed using the JANUS Automated Workstation, a P235Row/Column Serial Dilution Tool and disposable P235 pipettetips. A stock solution of 10 nM fluorescein isothiocyanate(FITC, 1X phosphate buffered saline, pH 9.0) was serially dilut-ed (two-fold) with 80% DMSO to a final concentration of1/64th the stock concentration. Dilutions were performed onthree replicate plates. Controls included positive (undiluted 10nM FITC dye) and negative (80% DMSO buffer).Fluorescence readings were obtained using a PerkinElmerEnvision Multilabel Pate Reader for single 96-well plate(row format) serial dilutions. Results were plotted as observedfluorescence (relative fluorescence units, RFU) versus expectedRFU (based upon the signal obtained with 10 nM FITC).Results and Discussion: In order to evaluate the efficiencyand reproducibility of an analyte pipetting, we used a modelfluorescence-based assay. Fluorescent tags are widely utilizedin applications such as nucleic acid and protein quantification,cellular metabolism and separation technologies. Theseprocedures often require serially diluted gradients to serve asstandard curves, or in the case of enzymatic reactions, optimi-zation of enzyme/substrate ratios. The use of fluorescent tags Case Study 1: Pipetting Precision and AccuracyMaterials and Methods: The pipetting accuracy and precisionwere evaluated for each of the Serial Dilution Tools (P30 row/column, P50 row, P50 column, and P235 row/column) installedon a JANUS Automated Workstation. Serial Dilution Tools weretested in either row and/or column format for a range of volumesusing corresponding PerkinElmer disposable tip sizes.Pipetting accuracy was evaluated gravimetrically using a MettlerToledo AT 261 Delta Range balance under controlled tempera-ture and humidity conditions. Destination plates were preparedwith known volumes of 80% DMSO filled using a PerkinElmerFlexDrop™ IV EX Precision Reagent Dispenser. Fixed volumes of2% Orange-G dye solution (80% DMSO, Sigma-Aldrich, St.Louis, MO) were pipetted into destination plates with the SDT.Results for each condition were reported as percent accuracy,averaged across triplicate 96- (Nunc clear 96-well flat bottom),or 384- (Greiner Bio One clear 384-well flat bottom) well plates.Pipetting precision evaluations utilized the above-mentionedOrange-G dye-containing plates. Immediately following gravi-metric accuracy measurements, dispensed Orange-G dye plateswere loaded, and absorbance readings were obtained, using aPerkinElmer EnVision® Multilabel Plate Reader. Pipetting precision(% CV) was determined using optical density values across eachof the triplicate (N=3) 96- or 384-well plates.Results and Discussion: The ability to dispense analytes witha high level of precision and accuracy is critical for any application.We evaluated the JANUS Serial Dilution Tools to demonstratepipetting accuracy and precision in either row and/or columnpipetting format(s) at common volume ranges and plate types.Results indicated that the Serial Dilution Tools performed withvery high accuracy and precision (Table 1).Table 1. Examples of Summary of Serial Dilution Tool sample pipettingperformance data.23offers a quantitative method of evaluating targeted molecules and provides a convenient and cost-effective methodology for evaluating sample protocols prior to introducing more expen-sive or scarce reagents.The SDT P235 was used to serially dilute FITC fluorescent dye in row format. Results demonstrate a highly reproducible pipetting pattern for serial dilutions (Figure 1). Reproducibility of automated procedures allows users to perform complex dilution sequences, with reduced potential for human error or potential loss of valuable compound in repeated experiments.Case Study 3: Performance with Immunoassay AnalytesMaterials and Methods: AlphaLISA ® Insulin and vascular endothelial growth factor (VEGF) immunoassay kits wereobtained from PerkinElmer BioSignal (Montreal, Canada). Serial dilutions of analyte standards containing insulin or VEGF were performed automatically on a JANUS with a P50 Column SDT, and manually, using a multichannel pipette.AlphaLISA Insulin Immunoassay Serial Dilutions . A column of 8 wells (PerkinElmer half-area white OptiPlates) containing insulin stock standards (10 μUnits/μL) was serially diluted two-fold (25 μL + 25 μL) in column format with AlphaLISA diluent buffer. AlphaLISA VEGF Immunoassay Serial Dilutions . In an identical manner as the above-mentioned insulin immunoassay, a stock concentration of vascular endothelial growth factor (VEGF) standard (1.5 x 10E-5g/ml) was serially diluted in column for-mat with AlphaLISA diluent buffer.Results and Discussion: As an example of partial plate pro-cessing capability, we used the SDT to perform single column pipetting to generate serially diluted analyte standard curves for AlphaLISA (Amplified Luminescent Proximity Homogeneous Assay) immunoassays for insulin and VEGF. AlphaLISA is a no-wash ELISA assay alternative developed by PerkinElmer [1]. Insulin and VEGF are two common biomarkers whose concen -trations are monitored for research diagnostic and screening applications.The JANUS Automated Workstation equipped with a P50Column SDT was used to effectively construct standard curves for both analytes. Manually generated standard curves com-pared favorably with those automated using the SDT (Figure 2). Results were consistent with previously reported AlphaLISA data generated for insulin and VEGF standard curves per -formed using a JANUS 8-tip Varispan™ pipetting arm [3-4].ConclusionsJANUS Modular Dispense Technology Serial Dilution Tools pro-vide an adaptable array of row and column pipetting options for standard curves, serial and direct dilutions, and discrete row / column sample additions. These pipetting capabilities are highly utilized in a number of areas including compound library screening in drug discovery, as well as in assay development and high density combinatorial assays.Figure 2. Serially diluted standard curves for AlphaLISA detection of vascular endothelial growth factor (VEGF, A) and insulin (B) using the P50 Column Serial Dilution Tool or an 8-channel manual pipette. Data are the mean of 8 replicate wells per column.Figure 1. Reproducibility of fluorescence dye serial dilutions . Two-fold serial dilutions of FITC (10 nM stock diluted to 1/64th ) were performed in row format using the JANUS MDT P235 Row/Column Serial Dilution Tool. Data are the mean ± SEM for each data point among the three replicate plates. Observed relative fluorescence units (RFU) were plotted against the expected RFU values based upon fluorescence of 10 nM FITC. Linear regression of these values indicate tight correlation with expected RFU values.For a complete listing of our global offices, visit /ContactUsCopyright ©2009, PerkinElmer, Inc. All rights reserved. PerkinElmer ® is a registered trademark of PerkinElmer, Inc. All other trademarks are the property of their respective owners.008289A_01 Printed in USAPerkinElmer, Inc. 940 Winter StreetWaltham, MA 02451 USA P: (800) 762-4000 or (+1) 203-925-4602JANUS Modular Dispense Technology Serial Dilution Tools:• Have the same dynamic pipetting range(0.5 μL – 235 μL) as other MDT pipetting heads • Use with the same disposable tip options as current MDT heads • Accommodate 96-, 384-, and 1536-well plate formats• Are interchangeable with all JANUS MDT pipetting heads, providing flexibility for seamless “on-the-fly” head swap operations without need for user inter-vention.• AlphaLISA standard curves generated with the JANUS Serial Dilution Tools strongly compare with those performed manually. The JANUS Serial Dilution Tools, together with full-plate pipetting using a standard MDT head, provides uninterrupted walk-away automation for the high throughput laboratory environment.References1. AlphaLISA brochure at 2. D. Brazzill and G. Reznik. “Automated High Throughput Insulin Detection” PerkinElmer Application Note3. D. Brazzill, Claire Normand, Stephane Parent, Veronique Brechler, and G. Reznik (2008) Automation of Insulin and VEGF AlphaLISA’s using JANUS MDT and Varispan Pipetting Arms. Poster presentation: Society for Biomolecular Sciences Annual Meeting.4. S. Dahan, N. Gauthier, C. Normand, Marjolaine Roy, Veronique Brechler, and Stephane Parent (2008) Automation and Miniaturization of Immunoassays for Drug Discovery: AlphaLISA, a Sensitive No-Wash Assay. Poster presenta-tion: Society for Biomolecular Sciences Annual Meeting.。
高等数学英语词汇高等数学英语词汇引导语:高等数学指相对于初等数学而言,数学的对象及方法较为繁杂的'一部分。
以下是店铺分享给大家的高等数学英语词汇,欢迎阅读!Aabelian group:阿贝尔群; absolute geometry:绝对几何; absolute value:绝对值; abstract algebra:抽象代数; addition:加法; algebra:代数; algebraicclosure:代数闭包; algebraic geometry:代数几何;algebraic geometry and analytic geometry:代数几何和解析几何; algebraic numbers:代数数; algorithm:算法; almost all:绝大多数; analytic function:解析函数; analytic geometry:解析几何; and:且;angle:角度; anticommutative:反交换律; antisymmetric relation:反对称关系; antisymmetry:反对称性; approximately equal:约等于; Archimedean field:阿基米德域; Archimedean group:阿基米德群; area:面积; arithmetic:算术; associative algebra:结合代数; associativity:结合律; axiom:公理; axiom of constructibility:可构造公理; axiom of empty set:空集公理;axiom of extensionality:外延公理; axiom of foundation:正则公理; axiom of pairing:对集公理; axiom of regularity:正则公理; axiom of replacement:代换公理; axiom of union:并集公理; axiom schema of separation:分离公理; axiom schema of specification:分离公理;axiomatic set theory:公理集合论; axiomatic system:公理系统;BBaire space:贝利空间; basis:基; Bézout's identity:贝祖恒等式; Bernoulli's inequality:伯努利不等式 ; Big O notation:大O符号; bilinear operator:双线性算子; binary operation:二元运算; binary predicate:二元谓词; binary relation:二元关系; Booleanalgebra:布尔代数;Boolean logic:布尔逻辑; Boolean ring:布尔环; boundary:边界; boundary point:边界点;bounded lattice:有界格;Ccalculus:微积分学; Cantor's diagonal argument:康托尔对角线方法; cardinal number:基数;cardinality:势; cardinality of the continuum:连续统的势; Cartesian coordinate system:直角坐标系; Cartesian product:笛卡尔积; category:范畴; Cauchy sequence:柯西序列; Cauchy-Schwarz inequality:柯西不等式; Ceva's Theorem:塞瓦定理; characteristic:特征;characteristic polynomial:特征多项式; circle:圆; class:类; closed:闭集; closure:封闭性或闭包; closure algebra:闭包代数; combinatorial identities:组合恒等式; commutativegroup:交换群; commutative ring:交换环; commutativity::交换律; compact:紧致的;compact set:紧致集合; compact space:紧致空间; complement:补集或补运算; completelattice:完备格; complete metric space:完备的度量空间; complete space:完备空间; complexmanifold:复流形; complex plane:复平面; congruence:同余; congruent:全等; connectedspace:连通空间; constructible universe:可构造全集; constructions of the real numbers:实数的构造; continued fraction:连分数; continuous:连续; continuum hypothesis:连续统假设;contractible space:可缩空间; convergence space:收敛空间; cosine:余弦; countable:可数;countable set:可数集; cross product:叉积; cycle space:圈空间; cyclic group:循环群;Dde Morgan's laws:德·摩根律; Dedekind completion:戴德金完备性; Dedekind cut:戴德金分割;del:微分算子; dense:稠密; densely ordered:稠密排列; derivative:导数; determinant:行列式; diffeomorphism:可微同构; difference:差; differentiablemanifold:可微流形;differential calculus:微分学; dimension:维数; directed graph:有向图; discrete space:离散空间; discriminant:判别式; distance:距离; distributivity:分配律; dividend:被除数;dividing:除; divisibility:整除; division:除法; divisor:除数; dot product:点积;Eeigenvalue:特征值; eigenvector:特征向量; element:元素; elementary algebra:初等代数;empty function:空函数; empty set:空集; empty product:空积; equal:等于; equality:等式或等于; equation:方程; equivalence relation:等价关系; Euclidean geometry:欧几里德几何;Euclidean metric:欧几里德度量; Euclidean space:欧几里德空间; Euler's identity:欧拉恒等式;even number:偶数; event:事件; existential quantifier:存在量词; exponential function:指数函数; exponential identities:指数恒等式; expression:表达式; extended real number line:扩展的实数轴;Ffalse:假; field:域; finite:有限; finite field:有限域; finite set:有限集合; first-countablespace:第一可数空间; first order logic:一阶逻辑; foundations of mathematics:数学基础;function:函数; functional analysis:泛函分析; functional predicate:函数谓词;fundamental theorem of algebra:代数基本定理; fraction:分数;Ggauge space:规格空间; general linear group:一般线性群; geometry:几何学; gradient:梯度;graph:图; graph of a relation:关系图; graph theory:图论; greatest element:最大元;group:群; group homomorphism:群同态;HHausdorff space:豪斯多夫空间; hereditarily finite set:遗传有限集合; Heron's formula:海伦公式; Hilbert space:希尔伯特空间;Hilbert's axioms:希尔伯特公理系统; Hodge decomposition:霍奇分解; Hodge Laplacian:霍奇拉普拉斯算子; homeomorphism:同胚; horizontal:水平;hyperbolic function identities:双曲线函数恒等式; hypergeometric function identities:超几何函数恒等式; hyperreal number:超实数;Iidentical:同一的; identity:恒等式; identity element:单位元; identity matrix:单位矩阵;idempotent:幂等; if:若; if and only if:当且仅当; iff:当且仅当; imaginary number:虚数;inclusion:包含; index set:索引集合; indiscrete space:非离散空间; inequality:不等式或不等; inequality of arithmetic and geometric means:平均数不等式; infimum:下确界; infiniteseries:无穷级数; infinite:无穷大; infinitesimal:无穷小; infinity:无穷大; initial object:初始对象; inner angle:内角; inner product:内积; inner product space:内积空间; integer:整数; integer sequence:整数列; integral:积分; integral domain:整数环; interior:内部;interior algebra:内部代数; interior point:内点; intersection:交集; inverse element:逆元;invertible matrix:可逆矩阵; interval:区间; involution:回旋; irrational number:无理数;isolated point:孤点; isomorphism:同构;JJacobi identity:雅可比恒等式; join:并运算;K格式: Kuratowski closure axioms:Kuratowski 闭包公理;Lleast element:最小元; Lebesgue measure:勒贝格测度; Leibniz's law:莱布尼茨律; Liealgebra:李代数; Lie group:李群; limit:极限; limit point:极限点; line:线; line segment:线段; linear:线性; linear algebra:线性代数; linear operator:线性算子; linear space:线性空间; linear transformation:线性变换; linearity:线性性; list of inequalities:不等式列表; list oflinear algebra topics:线性代数相关条目; locally compact space:局部紧致空间; logarithmicidentities:对数恒等式; logic:逻辑学; logical positivism:逻辑实证主义; law of cosines:余弦定理; L??wenheim-Skolem theorem:L??wenheim-Skolem 定理; lower limit topology:下限拓扑;Mmagnitude:量; manifold:流形; map:映射; mathematical symbols:数学符号; mathematicalanalysis:数学分析; mathematical proof:数学证明; mathematics:数学; matrix:矩阵;matrix multiplication:矩阵乘法; meaning:语义; measure:测度; meet:交运算; member:元素; metamathematics:元数学; metric:度量; metric space:度量空间; model:模型; modeltheory:模型论; modular arithmetic:模运算; module:模; monotonic function:单调函数;multilinear algebra:多重线性代数; multiplication:乘法; multiset:多样集;Nnaive set theory:朴素集合论; natural logarithm:自然对数; natural number:自然数; naturalscience:自然科学; negative number:负数; neighbourhood:邻域; New Foundations:新基础理论; nine point circle:九点圆; non-Euclidean geometry:非欧几里德几何; nonlinearity:非线性; non-singular matrix:非奇异矩阵; nonstandard model:非标准模型; nonstandardanalysis:非标准分析; norm:范数; normed vector space:赋范向量空间; n-tuple:n 元组或多元组; nullary:空; nullary intersection:空交集; number:数; number line:数轴;Oobject:对象; octonion:八元数; one-to-one correspondence:一一对应; open:开集; openball:开球; operation:运算; operator:算子; or:或; order topology:序拓扑; ordered field:有序域;ordered pair:有序对; ordered set:偏序集; ordinal number:序数; ordinarymathematics:一般数学; origin:原点; orthogonal matrix:正交矩阵;Pp-adic number:p进数; paracompact space:仿紧致空间; parallel postulate:平行公理;parallelepiped:平行六面体; parallelogram:平行四边形; partial order:偏序关系; partition:分割; Peano arithmetic:皮亚诺公理; Pedoe's inequality:佩多不等式; perpendicular:垂直;philosopher:哲学家; philosophy:哲学; philosophy journals:哲学类杂志; plane:平面; pluralquantification:复数量化; point:点; Point-Line-Plane postulate:点线面假设; polarcoordinates:极坐标系; polynomial:多项式; polynomial sequence:多项式列; positive-definitematrix:正定矩阵; positive-semidefinite matrix:半正定矩阵; power set:幂集; predicate:谓词; predicate logic:谓词逻辑; preorder:预序关系; prime number:素数; product:积;proof:证明; proper class:纯类; proper subset:真子集; property:性质; proposition:命题; pseudovector:伪向量; Pythagorean theorem:勾股定理;QQ.E.D.:Q.E.D.; quaternion:四元数; quaternions and spatial rotation:四元数与空间旋转;question:疑问句; quotient field:商域; quotient set:商集;Rradius:半径; ratio:比; rational number:有理数; real analysis:实分析; real closed field:实闭域; real line:实数轴; real number:实数; real number line:实数线; reflexive relation:自反关系; reflexivity:自反性; reification:具体化; relation:关系; relative complement:相对补集;relatively complemented lattice:相对补格; right angle:直角; right-handed rule:右手定则;ring:环;Sscalar:标量; second-countable space:第二可数空间; self-adjoint operator:自伴随算子;sentence:判断; separable space:可分空间; sequence:数列或序列; sequence space:序列空间; series:级数; sesquilinear function:半双线性函数; set:集合; set-theoretic definitionof natural numbers:自然数的集合论定义; set theory:集合论; several complex variables:一些复变量; shape:几何形状; sign function:符号函数; singleton:单元素集合; social science:社会科学; solid geometry:立体几何; space:空间; spherical coordinates:球坐标系; squarematrix:方块矩阵; square root:平方根; strict:严格; structural recursion:结构递归;subset:子集; subsequence:子序列; subspace:子空间; subspace topology:子空间拓扑;subtraction:减法; sum:和; summation:求和; supremum:上确界; surreal number:超实数; symmetric difference:对称差; symmetric relation:对称关系; system of linearequations:线性方程组;Ttensor:张量; terminal object:终结对象; the algebra of sets:集合代数; theorem:定理; topelement:最大元; topological field:拓扑域; topological manifold:拓扑流形; topological space:拓扑空间; topology:拓扑或拓扑学; total order:全序关系; totally disconnected:完全不连贯;totally ordered set:全序集; transcendental number:超越数; transfinite recursion:超限归纳法; transitivity:传递性; transitive relation:传递关系; transpose:转置; triangleinequality:三角不等式; trigonometric identities:三角恒等式; triple product:三重积; trivialtopology:密着拓扑; true:真; truth value:真值;Uunary operation:一元运算; uncountable:不可数; uniform space:一致空间; union:并集;unique:唯一; unit interval:单位区间; unit step function:单位阶跃函数; unit vector:单位向量;universal quantification:全称量词; universal set:全集; upper bound:上界;Vvacuously true:??; Vandermonde's identity:Vandermonde 恒等式; variable:变量;vector:向量; vector calculus:向量分析; vector space:向量空间; Venn diagram:文氏图;volume:体积; von Neumann ordinal:冯·诺伊曼序数; von Neumann universe:冯·诺伊曼全集;vulgar fraction:分数;ZZermelo set theory:策梅罗集合论; Zermelo-Fraenkel set theory:策梅罗-弗兰克尔集合论; ZF settheory:ZF 系统; zero:零; zero object:零对象;下载全文。
《离散数学》双语专业词汇表Abelia n group :交换(阿贝尔)群absorption property 吸收律acyclic:无(简单)回路的adjace nt vertices 令B接结点adjace nt vertices 令B接结点adjace nt vertices 令B接结点algorithm verification :算法证明algorithm :算法alphabe t字母表alternating group:交替群an alogous类似的analysis of algorithm 算法分析antisymmetric 反对称的approach 方法,方式argument 自变量associative 可结合的associative 可结合的asymmetric 非对称的backtracking 回溯base 2 exponential function 以2 为底的指数函数basic step 基础步biconditional, equivalence 双条件式,等价bijection, one-to-one correspondence 双射,一一对应binary operation on a set A 集合 A 上的二元运算binary operation 二元运算binary relation 二元关系(complete) binary tree (完全)二元(叉)树bland meats 未加调料的肉block, cell 划分块,单元Boolean algebra 布尔代数Boolea n fun cti on:布尔函数Boolea n matrix :布尔矩阵Boolean polynomial, Boolean expression 布尔多项式(表达式)Boolean produc t 布尔乘积bounded lattice 有界格brace:花括号bridge:桥,割边by con ve ntio n:按常规,按惯例cancellation property:消去律capacity :容量cardi nality :基数,势category:类别,分类cate nation:合并,拼接ceili ng fun ction :上取整函数certain even:t 必然事件characteristic equation 特征方程characteristic function:特征函数chromaticnumber of G: G 的色数chromatic poly no mial:着色多项式circuitdesig n:线路设计circuit :回路closed under the operation 运算对…是圭寸闭的closed with respect to 对… 是圭寸闭的closure:闭包collision :冲突coloring graphs:图的着色colum n:列combi natio n:组合com mon divisor:公因子commutative:可交换的commutative:可交换的commuter:经常往来于两地的人comparable可比较的compatible with :与… 相容compatible:相容的complement of B with respect to A:A 与B 的差集compleme nt:补元complementary relation:补关系complete graph 完全图complete match 完全匹配complete n-tree 完全n-元树component sentence 分句comp onen:分图compositi on:复合compositio n:关系的复合compound statement 复合命题con diti onal stateme nt, implicatio n:条件式,蕴涵式congruenee relation 同余关系con grue nt to:与…同余conjecture :猜想conju nctio n:合取connected连通的conn ected连通的connection 连接connectivity relation 连通性关系consecutively 相继地consequent, conclusion 结论,后件constructive proof 构造性证明contain(in)包含(于)contingency 可满足式contradiction, absurdity 永假(矛盾)式contrapositive 逆否命题conv ersatio n of flow :流的守恒converse逆命题conversely:相反地coordi nate :坐标coset: 陪集countable(uncountable:) 可数(不可数) counterexample 反例coun ti ng:计数criteria :标准,准贝U custom :惯例cut:害U cycle :回路cyclic permutatio n:循环置换,轮换de Morgan ' s laws德摩根律declarative sentence 陈述句degree of a vertex 结点的度depot:货站,仓库descendant 后代diagonal matrix:对角阵die :骰子digraph:有向图dime nsion:维(数) direct flight :直飞航班discipli ne:学科disconnected不连通的discrete graph(null graph) 零图disjoint sets:不相交集disjunction:析取dista nee距巨离distinguish 区分distributive lattice 分配格distributive :可分配的distributive :可分配的divisio n :除法dodecahedron 正十二面体domai n:定义域doubly linked l i st :双向链表dual:对偶edge 边edge 边element, member 成员,元素empty relation 空关系empty sequence(string) 空串empty set 空集end point 端点entry(element) 元素equally likely 等可能的,等概率的equivalence class 等价类equivalent relation 等价关系Euclidian algorithm 欧几里得算法,辗转相除法Euler path(circuit) 欧拉路径(回路) event 事件everywhere defined 处处有定义的excess capacity 增值容量existence proof 存在性证明existential quantification 存在量词化expected value 期望值explicit 显式的extensively 广泛地,全面地extremal element 极值元素factor 因子factorial 阶乘finite (infinite) set :有限(无限)集finite group :有限(阶)群floor function :下取整函数free semigroup gen erated by A 由A 生成的自由半群frequency of occurrenee 出现次数(频率) fun cti on, mapp ing, tran sformatio n:函数,映射,变换GCD(greatest com mon divisor):最大公因子gen de:性另generalize:推广generic elemen:t 任一元素graduate schoo:l 研究生院graph:(无向)图graph:无向图greatest(least) element 最大(小)元greedy algorithm :贪婪算法group:群growth of function :函数增长Hamiltonian path(circuit):哈密尔顿路径(回路) hashi ng function:杂凑函数Hasse diagram 哈斯图height:树高homomorphic image:同态像homomorphism:同态hypothesis:假设,前提,前件idempote nt:等幕的idempote nt:幕等的identity function on A: A 上的恒等函数ide ntity(eleme nt):么(单位)元iden tity :么元,单位元impossibleeve n t不可能事件in clusio n-exclusio n prin ciple :容斥原理in-degree 入度in direct method:间接证明法induction step :归纟内步in formal brand:不严格的那种inorder search 中序遍历in tersectio n:交intuitively :直觉地in verse:逆关系in verse:逆元in verse:逆元inverter:反向器invertible function :可逆函数invo luti on property:对合律irreflexive :反自反的isolated vertex:孤立结点isomorphism :同构isomorphism :同构join :,保联,并join :并Karnaugh map:卡诺图Kernel:同态核key:键Klein 4 group: Klein 四元群Konisberg Bridge problem:哥尼斯堡七桥问题Kruskal 's algorith: mKruskal 算法labeled digraph标记有向图lattice :格LCM(least common multiple):最小公倍数leaf(leave):叶结点least upper(greatest lower) bound 上(下)确界level:层,lexicographic order:字典序likelihood :可能性lin ear array(list):线性表lin ear graph:线性图linear homogeneous relation of degree :k k 阶线性齐次关系lin ear order(total order):线序,全序linearly ordered set, chain 线(全)序集,链lin ked list :链表lin ked-list represe ntatio n:链表表示logarithm function to the base n 以n 为底的对数logical connective:命题联结词logically equivalent: (逻辑)等价的logically follow :是…的逻辑结论logicia n:逻辑学家loop:自回路lower order:低阶mai n diag on a:主对角线map-colori ng problem: 地图着色问题match ing fun cti on:匹配函数matching problems 匹配问题mathematical structure(system) 数学结构(系统)matrix :矩阵maximal match :最大匹酉己maximal(minimal) element :极大(小)元maximum flow:最大流mee t保交,交mee t 交minimal spanning tree:最小生成树mi nterm:极小项modular lattice :模格modulus:模modus ponens:肯定律modus toile ns:否定律mo noid :含么半群,独异点multigraph:多重图multiple :倍数multiplicati on table:运算表multi-valued function :多值函数mutually exclusive:互斥的,不相交的n atural homomorphism :自然同态nearest neighbo:r 最邻近结点n egati on:否定(式)normal subgroup正规(不变)子群n otatio n:标记notio n:概念n-tree:n-元树n-tuple:n-元组odd(even) permutation 奇(偶)置换offspring:子女结点one to one 单射,一对一函数on to:至U上函数,满射operation on sets 集合运算optimal soluti on:最佳方法or(and, not)gate 或(与,非)门order of a group: 群的阶order relati on:序关系ordered pair: 有序对,序偶ordered tree 有序树ordered triple :有序三元组ordinance 法规out-degree 出度pare nt:父结点partial order:偏序关系partially ordered set, pose:t 偏序集partition, quotient se t 划分,商集path:路径path:通路,路径permutatio n:置换,排列pictorially :以图形方式pige on hole prin ciple :鸽巢原理planar graph:(可)平面图plausible:似乎可能的pointer:指针Polish form:(表达式的)波兰表示polyno mial:多项式positional bi nary tree:位置二元(叉)树positional tree:位置树postorder search 后序遍历power se:幕集predicate:谓词preorder search 前序遍历prerequisite:预备知识prescribe:命令,规定Prim 's algorithmPrim 算法prime:素(数)principle of mathematical induction:(第一)数学归纳法probabilistic :概率性的probability(theory):概率(论) product partial order:积偏序product set, Caretesian se:t 叉积,笛product:积proof by con tradict ion :反证法proper colori ng:正规着色propositi onal fun cti on :命题公式propositi onal variable :命题变元pseudocode 伪码(拟码)pump ing stati on:抽水站quantifier:量词quotie nt group :商群random acces:s 随机访问random selection (choose an object at random:)随机选择range:值域rational number:有理数reachability relatio n:可达性关系reasoning 推理recreational area 游乐场所recursive :递归recycle:回收,再循环reflexive closure :自反闭包reflexive:自反的regular expression 正则表达式regular graph 正规图,正则图relatio n:关系relati on ship :关系relay statio n:转送站remainder:余数representation 表示restrictio n :限希9 reverse Polish form (表达式的)逆波兰表示(left) right coset:(左)右陪集root:根,根结点rooted tree (有)根树row:行R-relative set:R 相关集rules of referenee 推理规贝Urunning time :运行时间same orde r 同阶sample space样本空间semigroup :半群sensible:有意义的sensible有意义的seque nee 序歹U sequential access 顺序访问set eorresp onding to a seque nee 对应于序列的集合set inelusion(eontainment) 集合包含set 集合siblings 兄弟结点simple eyele 简单回路simple path(eireuit) 基本路径(回路) simple path 简单路径(通路) sink 汇sophistieated 复杂的souree 源spanning tree 生成树,支撑树square matrix 方阵statement, proposition 命题storage eell 存储单元string 串,字符串strong induetion 第二数学归纳法subgraph 子图subgroup 子群sublattiee 子格submonoid 子含么半群subseript 下标subsemigroup 子半群subse t子集substituti on:替换subtree 子树summarize 总结,概括symmetric closure:对称闭包symmetric differe nee:对称差symmetric group:对称群symmetric: 对称的tacitly :默认tautology:永真(重言)式tedious:冗长乏味的termi nology :术语the capacity of a cu:割的容量topological sort ing:拓扌卜排序transitive closure:传递闭包tran sitive:传递的transport network:运输网络tran spositi on:对换traverse 遍历,周游tree searchi ng树的搜索(遍历)tree:树truth table:真值表TSP(traveling salesperson problem)货郎担问题unary operation:一元运算undirected edge 无向边undirected edge 无向边un directed tree 无向树union 并unit element 么(单位)元universal quantification 全称量词化universal set 全集upper(lower) boun d:上(下)界value of a flow:流的值value, image:值,像,应变量Venn diagram:文氏图verbally:用言语vertex(vertices):结点vertex(vertices):结点,顶点virtually :几乎Warshal ' s algorithnWarshall 算法weight:权weight :Wweighted graph:(赋)权图well-defined:良定,完全确定word:词zero elemen:t 零元。
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评估assurance保障,保险astounding令人惊骇的astronaut宇航员asymmetric非对称的asynchronous非同步的,异步的at will随心所欲atom原子attachment添加,附加attain 达至Uattenuate 衰减attenuation 衰减attest表明,作证Auditing审计,查账authentication 认证,确认authenticity 真实性authoritative权威性的autocorrelation 自相关automate使自动autonomous自治的,自主的autoregressive model 自回归模型avalanche 雪崩Bbackbone骨干,基干back-end 后端backprojection 反向投影backup备份,后备ballistic motion 冲击运动bandlimited 限带的barricade 路障base die 基底baseband 基带base基极baud波特BCD二一十进制beam 发送,传送,光束beat-note差拍信号Benefit利益,福利benign良好的,有利的bias current偏置电流bias偏置bibliography参考书目bicyclepedal自行车的脚蹬子bidirectional 双向的bifurcation 分叉bilinear双线性binary二进制的binocular望远镜biomass生物量biomedical生物特征的biometrics生物统计学biosignal生物医学信号bipolar有两极的,双极的bitcode比特字,比特码bitrate比特率black holes黑洞blend混合blending混合,混合物blessing赐福,祝福block diagram 方框图block阻止,阻塞bluetooth 蓝牙boardroom会议室bold黑体的,粗体的bolt用螺栓固定住bonfire 篝火bookkeeping 簿记borehole 钻孑L boron 硼bottleneck 瓶颈boundary边界,分界线bounded有界的brand品牌breach破坏,违反breadboard 面包板breakneck极快的,很危险的breakthrough 突破browser浏览器buffer缓冲器bulkhead船的舱壁bundle捆,包扎burst爆发bus总线by virtue of…凭借…CCaller电话接听者camcorder手持摄像机canal运河,沟渠capacitance 电容capture捕获,获取cardiology 心脏病学caregiver护理人员carrier 载波carry进位Cartesian迪卡尔(坐标)的casually随便地catastrophe大灾难,大祸categorize 分类causal因果关系的cavity空腔celestial天空的cell phone蜂窝式电话cell-size蜂窝大小cellular蜂窝状的census人口普查cepstrum 倒谱ceramic 陶瓷cerebrospinal 脑脊髓的channel capacity 信道容量character 个性characterize描绘,刻画性质charge电荷checkers 跳棋chew咀嚼chip码片choke窒息,阻气门chronic disease 慢性病cipher密码,暗号circa (c., ca., cir.circ.)大约circulation循环,流传cite引述,引用cladding光纤包层clarify 澄清classification 分类classified information 机密信息clear input 清零端clearance许可,清除client/server客户/服务器clinical临床的clock pulse时钟脉冲clog up阻塞closed-loop gain 闭环增益clout权力,影响,力量clump 簇,团clutter 杂乱coachman 教练coax cable同轴电缆cockpit驾驶舱codec编解码器coefficient 系数cognitive认知的coherent相干的coin创造,杜撰collaborate合作,勾结collector集电极co-located位于同一地方的color burst色同步信号color space颜色空间combat抗击commercial商业的,商品的,广告comparable 可比的compartment 船舱compatibility兼容性compatible 兼容compelling 强制的competitive有竞争力的competitor竞争对手complacency自鸣得意complementary互补的,补充的complexity复杂性,复杂度component成分,组成部分compound 复合comprehensible可理解的compression 压缩computer aidedtomography (CAT)计算机断层扫描concatenate连在一起,级联concentric 同心的concrete具体的condemn宣告,宣判conducive有益的,有助的conferencing举行会议confidentiality 机密性configuration 酉己置configure酉己置confinement 限制conformable适合的,顺从的connectivity 互联性conservative 保守的consistent 一致的console控制台consonant 辅音constellation星座图,星罗棋布constituent成分constraint约束,限制constrict 收缩construct构造,构造物construct构成物consultation 咨询contend斗争,争辩content(v.)满足,满意context上下文,背景contiguous 邻接的contour等高线convection 对流converge收敛,汇集于一点conveyance运送,运输conveyer传输带convolution 卷积convolutional coding 卷积编码coordinate 坐标coordination 协调cordlessphone 无绳电话Core核心corporate公司的,合伙的correlate相关,作相关处理correspondence 通信,信件corrupt使腐烂,腐败的corruption腐败,毁坏corrupt 毁坏cost effective经济的,合算的counter计数器counterpart对等物,对等的角色courier信使,送急件的人cover-up 掩盖cracker破译者,攻击者crack使爆裂crash崩溃credit归功于,相信cross-correlation 互相关cross-sectional断面的,截面的cross-talk窜音,干扰cryptanalysis 密码分析cryptography密码学,密码术crystal 晶体culpability有过失,有罪curse诅咒,咒语curve-fitting 曲线拟合customization 专用化customize 定制cybernetics 控制论cyberspace网上空间cylinder柱体,圆柱cylindrical圆柱形的DD flip-flop D 触发器data sheet技术规格表data traffic 数据流Database数据库dBi (decibel isotropic)全向性分贝deceive 欺骗decimal十进制的decimate 抽取dedicated researcher 奉献于事业的研究者dedicated专用的,奉献的deficiency 缺陷degrade 退化,降级delay spread 延迟扩展deliberation深思熟虑dematrix求矩阵反变换demilitarized解除武装的demltiplexer解复用器demodulate 解调demodulation 解调Denial否认,拒绝deploy部署deployment 部署deposit存放,堆积derivative导数,微商derive 推导dermatology皮肤病学descriptive描述性的desirability可取性,值得despread解除扩频destine 注定destructive破坏性的detector检测器,检波器deviant不正常的deviation偏移,偏差diagnose 诊断diagnosis 诊断diagnostic 诊断的dialup拨号diameter 直径dictate 口授,说明die骰子dielectric介电的,电介质dielectric介电的,电介质的die 印模,模子difference equation 差分方程differential equation 微分方程differentiate 区分diffract衍射,绕射diffuse 扩散digest消化,理解digitization 数字化digitizer 数字化仪Diligence 勤奋dimension 维,尺度diode二极管dipole偶极子directionality 方向性disastrous灾难性的discern辨别,看清楚discharge 放电discipline学科,纪律disclosure 披露discontinuity 不连续性discrepancy 差异discrepancy偏差,偏离discrete离散的discretion慎重,斟酌处理权discretization 离散化discriminator鉴别器,鉴频器dispatch 派遣dispersion 色散disruption瓦解,扰乱disseminate散布,传播dissipation ^消耗distributed分布式的,分散的distribution 分发disturbance扰动,干扰diverge 发散diverse多变化的,多元的diversion 转移diversity多样,差异性DJ (disk jockey)播音员,节目主持dominate支配,占优势doom注定doped掺杂质的doping掺杂(质) Doppler shift多普勒频移dotproduct点积,标量积doughnut油炸圆饼dour阴沉的,严厉的downfall衰败,跌落drainage 排水drain漏极drastically激烈地,彻底地drawback 缺点dreaded可怕的drift漂移duct管道Due应得的duration持续时间dynamic binding 动态绑定dynamic range 动态范围dynamics动力学dynamo发电机EEarth-orbiting绕地球轨道运转的e-health电子保健eject喷射,强制离开electrodynamics 电动力学elevate 提升elevation contour 海拔等高线eliminate消除,淘汰elliptical orbit 椭圆轨道elliptical 椭圆的embed嵌入embrace拥抱,包含emerge出现,浮现emergence 出现emission发射,散发emit放射,射出emitter发射极empirical凭经验的,经验性的emulate效法,模仿emulation仿真,仿效encapsulate 封装encompass包含,包围,完成encrypt 力口密encryption 力口密endeavor努力,尽力endoscope内窥镜,内诊镜engineer设计,策划enhancement 增强entail需要,使必须,引起entity实体entropy熵,平均信息量envelope function 包络函数envelope 包络equalization 均衡equivalent等效的,相当的erbium 铒erosion腐蚀,侵蚀err犯错误erroneous错误的erudition 博学escalation扩大,增大eschew避开etch蚀刻eternal永恒的,不灭的Ethernet以太网ethical伦理的,道德的Euclidean distance欧几里德距离eustatic (全球)海面升降的evanescent 渐逝的evasion 逃避excitation 激励exclusively无例外地executive执行的,执行者exemplify 例证exhaust 耗尽experiential凭经验的expertise 专长explicit明确的,清楚的explicit显的,明白的exponent 指数extrapolate推断,夕卜延extravaganza发狂言行,异乎寻常Ffabricate制造,伪造facilitate使容易,促进fading衰落Faith新任,忠实faithfully如实地,正确地falling edge (脉冲的)下降沿fatality灾祸,死亡事故fault故障favor支持feasibility可行性,可能性feature size 特征尺寸feature-filled富有特色的feed horn馈送电波的喇叭天线feed line 馈线femtosecond 毫微微秒(1015sec)ferrite core memory 铁磁芯存储器fertilize施肥,滋养fiber纤维,光纤fidelity保真度,逼真field-effect 场效应field-programmable gate arrays现场可编程门阵列field-programmablegate array (FPG A)现场可编程门阵列field-test现场测试,实地测试filtering 滤波fingerprint 指纹finite set有限的集FIR (finite impulseresponse filter)有限冲击响应滤波器firewall防火墙fixed-point arithmetic 定点运算,整数运算flair天赋,资质,潇洒flaw缺陷,瑕疵flexible柔顺的,灵活的flip-flop双稳态触发器floating point 浮点floodlight 泛光灯fluctuate 起伏fluctuation波动,起伏flywheel 飞轮Focused training 强化训练forensic法医的,司法取证forensic司法,法医(取证)的Forensics司法,法医,取证formant语音的共振峰formulate 表述,用公式表达forward转发,转送fraction小部分,分数fractional部分的,分数的fraction片断,小数fragment碎片,分成碎片frame 帧free-to-airTV不加密不收费电视friction 摩擦,摩擦力frightening 可怕的fringe加边饰,条纹fruition结果实,成就frustrating令人沮丧的fuel燃起,燃料functionality 功能function 函数fur-bearinganimal 毛皮动物furrow沟,皱纹,辙Ggain增益gamble赌博,投机garble篡改,歪曲,使混乱gateway通道,网关gate栅极gating用门电路作逻辑运算gauge测量,使…符合标准general practitioner 全科医生generalization普遍化,推广,概括generalized 通用化genesis 起源genetics遗传学genre流派,类型Genuine 真的geostationary orbit对地静止轨道geosynchronous地球同步的germanium 锗gigahertz 吉赫(109Hz)glean收集获得glider滑翔机graded-index渐变(梯度)折射率gradient梯度,渐变的grandmaster 大师granular颗粒状grating 光栅gravitational 重力的gross product总产值,总产量guard interval 保护间隔gynecology 妇科学gyroscope陀螺仪gyrotron振动陀螺仪Hhabitat栖息地handoff切换,移交handshaking 握手hardware description language(HDL)硬件描述语言hatch孵化,舱口headend数据转发器headway进展,前进heliograph 日光仪helium氦气herein在此,如此heritage世袭财产,遗产heuristic启发的,启发程序hexadecimal 16 进制的hexagon六边形hifi (high fidelity)高保真(音乐)highlight突出,突显,强调hindsight事后聪明histogram直方图holding circuit 保持电路homodyne零差式的host主机hub中心,网络集线器Hubble telescope哈勃望远镜hue色调Huffman encoding Huffman 编码hull外壳,船身hunch预感,直觉的想法hybrid混合,混合物hydrologic 水文的hydrology水文学hydrophone 水听器hype广告,人为刺激hypothesis 假设Iignition燃烧,点火IIR (infinite impulse responsefilter)无限冲击响应滤波器image registration 图像配准imagery像,图像imagingradiometer 辐射成像仪imitator仿冒者immune免疫的,不受影响的immutable不可变更的impartial公正的,不偏不倚的impedance 阻抗impede妨碍,阻止imperative势在必行的impinge撞击,射到impose施加impress印,铭刻,加载in absentia 缺席的In agreement with …与--- 一致/不冲突In nature性质上in series 串接inadequacy不够,不足inadequate 不够的inadvertently漫不经心地in-building建筑物内的incident入射的incompetence 无能increment 增量incur招致,蒙受,引起index of refraction 折射率indexing mechanism 索弓|机制indistinguishable 难以分辨的induce感应,遭致inductance 电感infection 传染inference 推论inferior差的,处于劣势的infinity无穷大inflation 通货膨胀informatics信息科学information hiding 信息隐藏informative提供信息的informed 有知识的,有见闻的infrared红外线,红外的infra-red红外线的,红外线infrastructure 基础设施ingredient成分,因素inherently内在地,本质上inheritance遗产,遗传inhibition 禁止,压制inhomogeneity 不均匀性initiative主动的行动insane 有精神病的,愚蠢的instantaneously 瞬时地instantaneous 瞬时的insulate 绝缘insulate绝缘,隔离intact完好的,完整的integer 整数integral 积分integrate求积分integrated circuits 集成电路integrator 积分机integrity完整性intelligence 智能,情报intelligent 智能的Intensity 强度interact交互作用interactivity 交互interactivity 交互性interchangeably可互换地,不区分地interconnected 互联的interdisciplinary 跨学科的interface 接口interlace相间,隔行扫描interleave 交织interleaving 交叉,交织interleaving 交织,交错intermediary中间的,媒介的interminable无限的,冗长的intermittently 间歇地internal medicine 内科学interoperability 互操作性interpolate 内插interrogator询问者,质询者interrupt 中断intersection 交叉点intertwining 缠绕在一起interval 间隔intervene插入,干预intervening 期间的intrigue引起兴趣,吸引introductory介绍性的,引导性的intrusion 入侵intuitive直觉的inundation洪水,大水invasive入侵的,侵略性的inverse反转的,逆irrefutable不能反驳的irregular不规则的,无规律的irrevocable不可变更的isotope同位素ISP互联网业务供应商Jjaggedness起伏不平,不规则jamming 干扰jitter抖动,颤抖Julius Caesar朱利叶斯•恺撒junk垃圾justify证明是必要的Kkeep pace with…与…保持一致步伐kernel核,核心keying键控(法) kink扭结,绞缠klystron速调管Llaptop computer膝上电脑/笔记本电脑laser激光latch锁存(器)latency等待时间,时间延迟latency延迟,潜伏期law suit司法诉讼lax宽松的,不严格的layout布局,布线leading edge (脉冲的)前沿legacy祖先遗留之物legible可识别的,清楚的legion军团,众多的人lend itself to…有助于,适合于lend oneself to有助于,适宜于levee大堤lidar激光雷达likelihood可能性,似然性limelight众人注目的中心linearity 线性line-of-sight 视线linkage联合,结合lithographic平板印刷的litigious好诉讼的,好争论的live concert实况音乐会live multimedia实时多媒体load leveling负载平衡logarithm 对数logarithmic 对数的login登录lookup table 查找表lossless无损的lossy有损耗的loudspeaker 扬声器lump块,使…成块lumpedelement 集总元件lumped system集总系统Mmachine vision 机器视觉magneticresonance 磁共振magneticresonanceimaging (MRI)磁共振成像magnetron磁电管,磁控管magnitude大小,数量maiden name婚前的姓/娘家的姓mainframe大型计算机mainstream 主流maintainability可维护性Malicious恶意的malignant恶性的malware恶意软件mandatory命令的,必须的mangrove 红树manifestation 显示,证明manipulate处理,操作manipulation 操作,处理mantissa 尾数map映射marginally有限度地Marital婚姻的maritime航海的market share市场份额Mars火星marsh沼泽,湿地marvel奇异之事maser迈泽massive巨大的matrix矩阵mature成熟mean均值measure测度,度量mechanism 机制median filter中值滤波mediocre不好不坏的,通常medium access control (MAC)媒体访问控制megabyte兆字节megaphone扩音器melt熔化mental精神的,智力的merge合并metabolism新陈代谢metallic金属的metallization 金属化metamorphose使变形,变态meteorological 气象的methodical有方法的,有系统的metropolitan 都市的micrometer 微米(10 6 m)micron微米microstrip antenna 微带天线middleware 中间件mill作坊,工厂millennium 千年mimic模仿mimic模仿miniature小型的miniaturization 小型化minority 少数minutia 细节(minutiae)misfiring误触发mismatch失配,不匹配mitigate 使缓和,减轻mixer混频器mobility移动性modality形态,式样modem调制解调器modular-2 模2 的module模块modulo模,取模的moisture湿气,水份moment 矩mono单一,单声道monochromatic 单色的monochrome 单色的monotypic 单型的moral道德,寓意morbidity发病率Morse code莫尔斯电码mortal人的,不免一死的mosaic马赛克,拼图motherboard 母板motion blur运动模糊motivation动机,推动力MRI磁共振成像multi-carrier 多载波multicast组播,多播multimedia authoring 多媒体制作multimode fibers 多模光纤multipath fading 多径衰落multipath 多径multiplex多样的,多路复用multiplex 复用multiplication 乘法multiply 相乘multiprocessor 多处理器multi-spectral 多光谱的multitude多数,大众mutual information 互信息Nnand与非nanometer 纳米(10 9 m)narration叙述,解说navigate 航行negligence疏忽,玩忽行为negligible可忽略的netlist电子设计中的联接性network traffic网络数据流neurobiology神经生物学neurology神经病学neuron神经元,神经细胞niche有利可图的专门市场non-field programmable非现场可编程的nonlinearity 非线性normal垂直的,法线的normalize归一化,标准化normative规范的,标准的nor或非notion概念novelty新奇,新鲜事物number base 数制numerical数值的nutrient 营养Oobjective 目的object-oriented面向对象的oblique倾斜的obsolete过时的,陈旧的obstetrics 产科obviate避免,使成为不必要oceanographer 海洋学家offline离线的,非实时的offset voltage drift补偿电压的漂移offset偏移量olfactory嗅觉的,嗅觉器官onboard logic (电路)板上逻辑ongoing进行中的Ongoing正在进行的op amp运放的简写opaque不透明的operationalamplifier 运算放大器operator算子,算符optical fiber 光纤orientation 方向originate 发源originate来源于orthogonal 正交的orthogonality 正交性orthomode transducer 直接式收发转换器oscillate 振荡oscillator 振荡器otology耳科学out of focus未聚焦,聚焦不良的outbound向外的outdated过时的outpace赶过,超越output swing输出电压变化范围outset开头,最初outward 向外overconfidence 过分自信overhead 开销overlap 重叠overlook忽视,俯视ozone臭氧Ppacket (数据)包pager寻呼机paging寻呼pan-tilt-zoom平摇、俯仰、变焦parabolic抛物线的paradigm范例,样式parallel logic circuitry 并行逻辑电路parallel 并行parallel并行,平行parameter 参数parameters 参数parasitic寄生的parity奇偶性partition分割,分区passive被动的,无源的patch 片pathology病理学pattern 模式payroll工资单,员工清单pediatrics 小儿科penetrate穿透,渗透Penetration穿透,入侵perception感觉,感知,领悟perceptual 感官的peripheral外围的,外围设备perpendicular 垂直的perspective透视图,透视的pertinent相关的,切题的perusal精读,细读pervade弥漫于,流行于phase相位,相角Phenomenal显著的,异常的phosphorous 磷的photoelectric effect 光电效应photomask光掩模photometrically在摄影光度方面photon光子physician内科医生physiology 生理学pico-cell微微蜂窝pilot signal导频信号pilot引导,试用pinpoint准确地定位pitch音调,程度pixel像素placement 放置plasma等离子体platform 平台platitude陈词滥调,老生常谈plausible貌似合理的plea请求,恳求plug插入polar极坐标的polarization 极化,偏振polarization 偏振,极化polymorphism 多形态polysilicon 多层硅pool把…集中使用popularization大众化,流行portability 便携性portrayal描绘,肖像pose摆放,提出,陈述potential 潜力power of two 2的幂power 幂precision精度,精确的predominant占主导地位的prefix 前缀preform预制品prelude 序言premature未成熟的premise 前提premises (经营)场地premise 前提presampling 预采样prescribed 预定的presentation layer 表示层preset预置presetable可预置的prevalent流行的prior to…在•…之前priority queueing按优先级的排序prism 棱镜privilege 特权procure获得,取得product 乘积productivity生产力,工作效率Profession 职业professional field 专业领域Professional专业人员professionally 专业地profile轮廓,姿态programmable controller (PC)可编程控制器programmable可编程的projection 投影proliferate 激增proliferation 激增promote推销,促进prompt提示,激励propagation delay 传播延迟propagation 传播proportion 比例protocol协议,规约prototype原型,样机protrude 突出provably可证明地proximity接近,亲近proxy server代理服务器pseudo random noise 伪随机噪声psychiatry精神病学psycho-acoustic心理声学的PTZcameraPTZ 摄像机punch card穿孔卡片purchase 购买purpose-designed针对目的设计的pursue追求,从事Qquadrangle 四边形quadrature正交,90 相位差quantify量度,表示数量quantitatively 定量地quantization量化quantum量子,量化quest追求,探索queue排队,队列Rradiant辐射的radio astronomy 射电天文学radiograph 射线图radiographic射线图像radioisotope放射性同位素radiology放射学radiometer 辐射计rain fade降雨衰减raster光栅rationality合理性,理性reactive ion etching反应离子刻蚀reactive反应的,反动的real number 实数reasoning 推理reassessment重新评估recipient接收者reconfigurable可重新设置的reconnaissance 侦察reconstruction 重建rectangular 矩形的recur复发,再发生recurrence 重复recurring循环的redundancy 冗余,多余redundant冗余的,多余的reflected反射的reflection 反射reflective 反射的reflex反射,映像refractive index 折射率refractive 折射的regime政权,体制,情态regions-of-interest 感兴趣区register寄存器registration 对准regulations规则,条例regulatory调整的,控制的rehabilitation 康复reinforcement 力口强relaxation松弛,弛豫relay中继,接力release发布,版本relevance有关,适当relief texture凹凸的纹理rematrix重新进行矩阵变换render表示,表现,再现render表现,渲染rendition表现,渲染repeater中继器,转发器replica复制品replication 复制Requisite必需品,必要条件researchinstallation 研究机构reside驻留resistance 电阻resolution 分辨率resonance谐振,共振resonant谐振的resonator谐振器responsive应答的,回答的retrospective 回顾的reveal披露,显示revenue收入,税收revision 修正ridge 脊rigid坚硬的,刚性的rigorous严格的rip撕,拉,劈ripple carry adder纹波进位加法器ripple波纹,波动,飘动rival对手RMS (root mean square)均方根RMS: Royal Mail Ship 皇家邮轮roam漫游robot机器人robotic surgery机器人外科robust牢固,稳健robust稳健的,鲁棒的robustness稳健性,鲁棒性rock-solid磐石般坚固的roll out 展开round robin循环(复用)round四舍五入router路由器routing路由,联线royalty版税,庄严,王权rubric题目,标题Ssalinity 盐度sampler 样品sampling 采样sanitize消毒,使无害saturate 饱和saturation 饱和度scapegoat替罪羊scatter 散射scatterometer 散射计scenario情节,方案scenario情节,剧本,方案scenario情节,方案scenery风景,景物scope范围score得分scramble打乱,使混杂screening筛选,普查sediment沉淀物,沉积seismic地震的seismology 地震学semaphore 旗语seminal开创性的sensitivity敏感性,灵敏度sensor array传感器阵列sensor 传感器,感光器sensory感觉的,传递感觉的serial串行serial-in parallel-out 串进并出serial-in serial-out 串进串出Server服务器shading阴影,明暗shed放射,摆脱shift register移位寄存器shim填片shop floor车间现场shutter 快门signature签字,标识signify表示,象征signify告知,预示silicon 硅simulated annealing 模拟退火simultaneous 同时的single mode fiber 单模光纤sinusoid正弦曲线sinusoidal 正弦的skew歪斜slab厚片,板层sledgehammer 大锤slew rate转换率,斜率slideshow幻灯放映SoC (System onChip)片上系统software title 软件产品solder焊接,焊料sonar声呐sophistication 复杂(性)sophistication 复杂性source源极space shuttle 航天飞机space-borne repeater 天空转发器spacer定位架子sparse稀疏,稀少spatial domain 空间域spatial空间的speaker identification 说话人辨认speaker recognition 说话人识另ijspeaker verification 说话人确认special-purpose 专用species 种,类specification 指标speckle散斑,斑点spectacular 惊人的spectrometer分光光度计spectroradiometer 分光光谱仪speech recognition 语音识另ijspell拼写,迷住splice结合,焊接spoke轮辐sponsor支持,赞助,资助spreadsheet电子表格spur刺激,激励spurious假的,伪造的spurt冲刺,喷射spyware间谍软件squawk box聊天室,论坛stack堆栈standalone独立的,可独立存在的standard deviation 标准差state of the art 最新的static electric 静电的stationary静止的,不变的statute法令,成文法律stem阻止,堵住step-index阶跃(突变)折射率stereo vision 立体视觉stereo立体声stimulus (pl. stimuli)刺激stimulus 刺激strain应力strategy 策略streak条纹striking惊人的,醒目的striking显著的,引人注目的strip剥离stumbling笨手笨脚的sub-carrier 子载波sub-field分领域,子领域submarine海底的,潜水艇sub-pixel亚像素subscription 订购subset子集substantial实质性的,重要的substitute 代替substrate 基底subtle细微的,微妙的subtraction 减法supercomputer超级计算机superheterodyne超夕卜差的superimpose叠加,重叠superior优越的superposition 叠力口superset 超集supply rails电源供给线suppress 抑制surf冲浪,浏览网络surveillance 监视survivability存活,存活可能性susceptible易受影响的swamp沼泽,进退两难之地sweepgenerator扫描发生器switch交换器,交换switching rate 切换速度syllable 音节syllogism三段论,推演synchronization 同步synchronize使同步,同时发生synchronous同步的synchrony 同步(性)syntactical 句法的syntax句法synthesis合成,综合synthesizer合成器Ttactile触觉(的)tamper损害,篡改tape library 磁带库tap-proof防窃听的telehealth远程保健telemedicine远程医疗telemetry遥测^ tele-otoscope 远程耳镜teleradiology远程放射学tele-stethoscope 远程听诊器teletype电传打字机telnet远程登录template模板,样板terahertz 特赫,1012 赫兹terminate 终止terminology 术语terms of contract 合同条款terrestrial地面的,地球上的terrorism恐怖主义tether拴,束缚the literature 文献(总称)thematic题目的,主旋律的theorem 定理theorize使…成为理论threshold 门限,阈值thresholding用阈值分割图像throughput 吞吐量time and attendance station 考勤系统time budget时间限制time slot 时隙time-critical对时间要求苛刻的time-invariant 时不变的timing diagram 时序图tint色彩tolerance偏差,容差,宽容度tomography 断层成像术 underestimate 低估 vowel 元音tooling 工具作业underestimation 低估 voxel 体(像)素topographic 地形的,地形学的 undergo 经历voyager 旅行者,探索者 topology 拓扑,布局universal 普遍的,宇宙的 vulnerable 易受攻击的towed streamer 拖曳飘带式水听器 阵unjustified 不可验证的 unmanned 无人的Wtrace 痕迹、微量 unpack 解开wafer 晶片,薄酥饼 track 跟踪unprecedented 前所未有的,空前 wagon 四轮马车tradeoff 折中,妥协 的Wall Street Journal 华尔街日报 trailing edge 后沿,下降沿 unquoted 未注明的waveform 波形 transact 处理,交易 unsigned band 未签约的乐队 waveguide 波导transaction 办理,交割 untie 解开,松开wavelet 小波 transceiver 收发器up converter 上变频器wee 微小的transducer 传感器,变换器 up-down counter 可逆计数器 weighted coding 加权编码 transferfunctions 传递函数 useability 可用性weighted 加权的 transfer 迁移,传递 used up 竭尽全力的,用尽了 well-suited 很适合于 transient 瞬态的utilization 利用wetland 湿地transistor 晶体管 translation 平移 Vwhereby (关系副词)靠那个 wide-ranging 范围广的 transmission line 传输线 vacuum tube 真空管,电子管 wiretapping 搭线窃听 transmission 透射vacuum 真空,真空的 woofer 低音喇叭transmitted 透射的,发射的 valve 阀word of data 数据中的“字” transparent 透明的,可透过的 van 货车,篷车word processor 文字处理软件 transponder 应答器,转发器 vapor deposition 汽相淀积,蒸镀 worm 蠕虫transverse 横向的 vapor 汽,蒸汽 worst-case value 最不利的数值trash 垃圾,废弃traveling wave tube 行波管 variable 变量 variation 变种 ZTriad 三个一组,三合一vegetation 植物 zero-crossing 过零点 tricky 机敏的,狡猾的 trigger 触发 trimming 微调Trojan horse 特洛伊木马Trojan 特洛伊(木马) tTerahertz 特赫(1012Hz ) tumble 摔跤 tunable 可调节的 tune 调谐 turnaround 周转,转向UUHF (ultra-high frequency )特高频 ultraviolet 紫外线,紫外的 umbrella term 有多种含义的名词 unambiguous 不模糊的,不含糊的 unary 元的 unauthorized 未被授权的 uncertainty 不确定性uncommitted 未指定的,不受约束underappreciated 认识不足的,被低估的vendor 供应商 verification 确认versatility 多用途,多样性 version 版本 veterinarian 兽医 vice versa 反之亦然 vicinity 邻近,附近video conferencing 视频(电视)会 议video stream 视频(数据)流video-conferencing 视频会议 virtualshorting plane 虚拟短路平 面virtual system 虚拟系统 virtual 虚拟的,实际起作用的 virtually 事实上,几乎是 virus 病毒 visual perception 视觉 visualization 可视化,形象化 viz.(拉丁语 videlicet )就是说volume 音量voluntary 自发的,自愿的zonation 成带,分区。
ASUS desktops – leading in satisfaction with reliabilityBased on PCWorld USA 2012 reader survey of tech satisfaction, reliability, and service.BM6820Reliable, secure, and efficientcommercial desktopsManagementSmart PerformancePowered by top-grade components and technologies, the ASUS Pro Series helps you easily multitask your officework with Intel® 2nd/3rd generation Core™ processors.AI Suite IIAI Suite is a user-friendly, all-in-one interface that integrates ASUS utilities. It allows users to check systeminformation, update BIOS, and access other ASUS-exclusive utilities.Built-in COM and Parallel Ports*The BM6820 features a modular design that offers more flexible support for hard drives, RAM, PCI cards, andUSB devices — ideal for ever-expanding businesses. The COM and parallel ports are both on motherboard withoptional cable required, freeing up PCI slots for additional upgrades. An easy-to-service chassis design helpsmaximize uptime by making upgrades and routine maintenance effortless.(*optional)SecurityChassis Intrusion Alert*Brings up special security notices the next time you boot your computer in the event the case has been openedwithout your knowledge, further ensuring the safety of components and data.(*optional)F9 One Key RecoveryWith the F9 single click, you can use the recovery partition quickly restores your Desktop PC’s software to itsoriginal working state. (copying your data files and making note of any customized configuration settings beforeusing the system recovery partition are required.)Reliability100% Solid CapacitorsASUS Pro Series desktops are made with the world's best motherboards and employ premium solid capacitors.High quality components provide utmost durability, improved longevity, and enhanced thermal performance.Stringent Quality TestsAll commercial models are tested to operate in the 0°-50゚C range and in even the most humid environmentssafely for over 70 consecutive hours. To simulate shipping, Pro Series products are dropped from differentangles to ensure unwavering solid quality.BM6820 SpecificationOperating System Windows 8 ProWindows® 7 Professional Windows® 7 Home Premium Linpus Linux (Optional)CPU The 2nd generation Intel® Core™ i3/i5/i7, Celeron®, Pentium Processors The 3rd generation Intel® Core™ i3/i5/i7, Celeron®, Pentium ProcessorsChipset Intel® H61 Raid N/AGraphics Intel® HD Integrated Graphics 4000/2500/3000/2000 Discrete graphics card (Optional)Memory 2 x DIMM dual channel DDR3 1600*1/1333/1066MHz Support max.8GBExpansion Slots 1 x PCI/1 x PCI-e x 16/ 2 x PCI-e x 1 Serial ATA 4 x SATA IIStorage Support up to 2TB (SATA 7200 RPM)Drive Bays 2 x 5.25" (ODD)4 x 3.5" (1 x Card reader/2 x HDD)LAN / LAN Chip Intel® 82579V GB LAN Support Wake On Lan functionAudio VIA VT1705, High-Definition Audio,6 ChannelsInterface Front I/O Port 4 x USB 2.0/ 1 x Microphone/ 1 x Headphone/ 1 x Card Reader (Optional) Rear I/O Port4 x USB 2.02 x PS/21 x DVI-D1 x D-Sub (VGA Out)1 x RJ45 LAN1 x 6 Channel Audio (3 ports)1 x Parallel Port (optional)1 x COM Port (Serial Port)(on board I/O)Power Supply 300W (Optional) / Peak 350W / Peak 350W 80 Plus (Optional)/500W(Optional) Dimension (mm) W x H x D 180 x 364 x 398 mm (29.6L with bezel)Dimension (mm) with Carton W x H x D 295 x 490 x 520 mmWeight with Carton (Kg) 13.5 kgsAccessories 1 x Keyboard (USB/PS2)/1 x Mouse (USB/PS2)/1 x Warranty Card/1 x Power Cord 1 x User Manual (QIG)/1 x Driver CD/1 x Recovery CD (ship with OS)/1 x Mouse PadSoftware PC-cillin Trial VersionOffice 2010 Starter or Office 2010 (60-day trial) Nero Essentials (for ODD sku only)ASUS Utility ASUS AI Suite II/ ASUS Update/ ASUS Q-fan II/ASUS EPU/F9 One Key Restore ASUS WebStorage/ASUS Secure Delete/ASUS AI Recovery(Optional)Certifications Energy Star, FCC, CE, BSMI, CCC, CB, C-Tick, UL, EPEAT, PSB, VCCINote Support:Kensington Security Slot.Chassis Intrusion (Optional)*1: Memory speed up to 1600MHz when using Ivy Bridge CPU. EPEAT country list please refer to: /•Smart Performance•AI Suite II•Built-in COM and Parallel Ports(optional) •Chassis Intrusion Alert(optional)•F9 One Key Recovery•Stringent Quality Tests。
A Modular Client-Server Discrete Event Simulator for Networked Computers∗David Wangerin,Christopher DeCoro,Luis M.Campos,Hugo Coyote and Isaac D.Scherson {dwangeri,cdecoro,lmcampos,coyote,isaac}@Department of Information and Computer ScienceUniversity of California,IrvineIrvine,CA92697-3425,USAAbstractA novel simulation framework is described that uses a client-server paradigm combined with a discrete event sim-ulator to allow the simulation modules to be distributed around a centralized core.The framework also simplifies the creation of new simulations by achieving the goals of being general purpose,easily extensible,modular,and dis-tributed.A prototype of the Client-Server Discrete Event Simulator(CS-DEVS)has been developed as a proof of concept.Two examples are presented to demonstrate the power of the new paradigm and prove the correctness of CS-DEVS.Thefirst example is a modeling of the classical bank queuing simulation.The second example models the simulation of a distributed computing system,with complete modules for workload generation,architecture description, and scheduling and load balancing algorithms.1.IntroductionIn the current simulation literature,few simulators are designed to be general purpose enough to serve a wide range of discrete event simulation tasks while at the same time remaining easily extensible and having features such as network transparency and an open and well-defined in-terface.Tofill this need,we have developed the concept of the Client-Server Discrete Event Simulator(CS-DEVS)and implemented a preliminary prototype.CS-DEVS is a general-purpose discrete event simulator framework that allows for distributed computation over a network.It operates from a centralized core that serves to synchronize and facilitate communication between a set of distributed modules(event generators,resource handlers, etc.)in addition to being the discrete event manager.Thus, CS-DEVS is comprised of both a simulator core and a set ∗This work was supported in part by NASA-JPL and NASA-GSFC un-der grants number1216595and NAG5-9695respectively of standard runtime libraries for each module.The modules can be either used from a repository of pre-existing mod-ules or written from a template to perform a specific task. The methods for communicating through the core are well defined,so modules created by different users can seam-lessly and easily interact with each other.CS-DEVS allows dynamic runtime binding between disparate modules.This binding can be between a set of modules on a single ma-chine or on machines located anywhere on the Internet.It is important to note that modules do not communi-cate directly with each other;rather all communications are directed through the core.The core handles all messages to and from modules,as well as the timing of when mes-sages are sent.Indirect communication is a key concept to CS-DEVS,as modules do not know and do not care about whom they are communicating with.To realize the useful-ness of indirect communication,consider a situation where multiple modules are generating messages of the same type. Since receiving modules do not care about the source of messages,all the messages are handled identically,regard-less of which module generated each message.CS-DEVS,like all discrete event simulators,handles simulation time in a non-linear fashion.Execution time is not dependent on the length of the simulation time,but is dependent on the number of events that occur in the sim-ulation.A second effect of using discrete events is that modules can submit events before they will actually hap-pen.Since modules are not dependant on a clock,each module is able to execute at maximum possible speed.The core decides when events are triggered and thus synchro-nizes all modules without using an explicit clock or other timer methods.Modules do not act randomly by submit-ting events at undefined times,but rather submit events in response to other events.This method gives consistent behavior for all simulations and makes CS-DEVS robust enough to be capable of handling delays in communications that could cause synchronization problems in other styles of simulators.This paper details the theory and implementation of CS-DEVS and displays how simulations can take advantage of the distributed nature of CS-DEVS.Two examples are given that both demonstrate the process of developing simulations for the framework and validate the advantageous features of CS-DEVS.2.Related work2.1.YADDESYaddes is an acronym for Yet Another Distributed Dis-crete Event Simulator[4].The Yaddes system is a tool for constructing discrete event simulations.The principle fea-tures of the Yaddes system are the Yaddes simulation spec-ification language and compiler,libraries that support time synchronization methods,a pseudorandom number gener-ator package,and a distributed statistics collection and re-porting package.The Yaddes user prepares a specification of the desired simulation.Yaddes then compiles the specifi-cation into a collection of C language subroutines.These subroutines are then compiled using the C compiler and then linked to a synchronization method library to form a complete program that performs the desired simulation.The advantage of the Yaddes system over other discrete event simulation packages is that it uses a modeling ap-proach that supports several different synchronization meth-ods.In particular,the synchronization methods currently provided are:sequential(event list driven)simulation,dis-tributed simulation using multiple event lists,conservative (ChandyMisra)distributed simulation,and optimistic(vir-tual time based)distributed simulation.The Yaddes user need not be concerned with the synchronization method used.In fact,every Yaddes specification can be executed using any method merely by linking to the appropriate li-brary.Provided that the specifications are coded properly, the results of a simulation are independent of the synchro-nization method used.2.2.OMNeT++OMNeT++is a discrete event simulation tool[6].It is primarily designed to simulate computer networks,multi-processors and other distributed systems,but it may be use-ful for modeling other systems too.The goal of the OM-NeT++project is to create a free discrete event simulation system that can be a real alternative to expensive commer-cial products in the same application area.OMNeT++is comprised of several components,including a simulation kernel library,a compiler for the NED topology description language(nedc),utilities(random number seed generation tool,makefile creation tool,etc.),and sample simulations.2.3.SIMSCRIPT II.5SIMSCRIPT is a commercial discrete event simulator that has been in use for over thirty years.SIMSCRIPT con-tains a full development environment,development tools, and sample applications.The development environment is built around the programming language SIMSCRIPT II.5.The language is a free-form,English-like simula-tion development and modeling language.SIMSCRIPT II.5is designed use with discrete-event and combined dis-crete/continuous simulations.3.A client-server simulation frameworkCS-DEVS uses a client-server approach to simulations. By combining the client-server paradigm with a discrete event simulator,simulation modules can be distributed across a network.If the dependencies between modules can be minimized,modules can execute at peak efficiency and take advantage of a distributed computing environment. The simulator core acts as a server to provide a consistent set of functions to many different modules,and modules act as clients that use the server’s functionality to accomplish a task.3.1.Simulator coreCS-DEVS distinguishes itself from other simulators in that it uses a centralized core to synchronize all commu-nications.Modules never communicate directly with each other but rather send and receive all events through the core. This paradigm allows the core to beflexible enough to han-dle virtually any type of simulation,as the core is focused exclusively on the timing of events and not on the details of any events.The paradigm also allows all modules to be concerned with only the internal operations of the module and not timing and communications details.The core is deceptively simple in both its operations and its implementation.The core consists of a single events queue,a master clock for the simulation,and a list of event types that should be sent to each module.When events are submitted to the core,they are placed in the events queue according to their execution time.Events are only sent to modules when they are at the front of the queue.By main-taining a time-based priority queue for the events,many synchronization problems are removed,as events can never happen out of order.The master clock is tied to the events queue and can be thought of as a side-effect of the main-tenance of the events queue.Time is only advanced when all events for the current time have been executed and all modules have responded to the current events.Since the core waits for responses from modules before dispatching the next event,synchronization problems can never arise.Time is not advanced linearly,but jumps to the time of the next event in the queue.The list of event types to be sent to modules is afilter that ensures that modules only receive the events that affect them.In this way,modules only know about events that are directly related to their operations and a good separation of concerns can be achieved.In addi-tion,the core only waits for responses from modules that can possibly submit new events.It is important to note that the core does not handle any processing of data for events and does not have pre-determined event types.Any data can be attached to events, but the only data of concern to the core is when the event should occur and what is the type of the event.These two data items are standardized in a particular format for events being submitted to the core,and any additional data con-tained in the event submission is generically considered to be extraneous data for the event.The core never examines the extraneous data and thus the data cannot affect the tim-ing or execution of the core.In addition,the core can handle any type of event without needing any modifications or tai-loring to a particular simulation.3.2.Simulation modulesThe interface for modules is also quite simple.Modules register with the core by stating the module name and the types of events it needs to receive.The name is only used for tacking purposes by the core and is not seen by any other modules.After the modules are registered with the core, they submit events to the core and receive events when they are executed.The format of submitted events is the type of event,the relative time of when the event will occur,and any other data that is needed to describe the event.3.3.Simulation messagesThe core and modules communicate through a small set of structured messages.Some messages,such as module registration,are used only for the management of simula-tions.The majority of messages are submit event messages and event occurring messages,which are directly related to the execution of a simulation.The submit event message has the format of the event type,the relative time of when the event will occur,and any other data for the event.The event occurring message has the format of the type of event, the current time(in absolute time),and the other data that is attached to the event.All other events have a format that is abstracted through the programmer’s interface to the mod-ule.The exact format of all messages is detailed in A Gen-eral Purpose Discrete Event Simulator[1]All modules communicate with the core through TCP/IP network connections.Modules can be located on either the same computer as the core or on different computersat-Figure1.An overview of the layout of the sim-ulator core and modulestached to a network.The passing of messages over the net-work is handled by the programmer’s interface to modules. Since modules do not need to be on the same computer as the core,and the core does not need to be customized to spe-cific simulations,modules can be independently developed by different programmers at different locations and still in-teract seamlessly.3.4.Simulation controlflowMany synchronization problems can arise in simulations when modules respond at different speeds and thus have events occur at different times.CS-DEVS overcomes these problems through the use of relative time and a carefully crafted controlflow.3.5.Relative time versus absolute timeA key concept to the core is that all modules work by relative time and not absolute time.The timefield of events submitted to the core is in the format of how many time units in the future the event will happen.This prevents any modules from scheduling events in the past,and thus roll-backs are not necessary.Atfirst,this handling of time may seem to be a limitation of the core rather than a feature,but closer examination will reveal than any type of simulation can be handled within this framework.In simulations,no actions are completely random.All actions are determined either independently of other actions or are determined in response to another ac-tion.For consistency,these two types of actions will be re-ferred to as independent events and reactive events,respec-tively.An example of an independent event would be a sim-ulation of computer hardware faults where a fault will occur every two to ten seconds.The timing of faults does not de-pend on what is happening in the hardware,and thus the timing of all faults can be determined independently from any other events occurring in the simulation.In fact,within the framework of CS-DEVS,all faults could even be deter-mined at the start of a simulation and all fault events could be submitted at once.An example of a reactive event would be a simulation of a computer user where the user performs an action within either one second or one minute of a com-puter action.Whenever a computer action is executed,the user module will decide if the user will react within one sec-ond or one minute,and submit an event accordingly.Note that even though the user is acting in a fashion that may seem random(the choice between reacting in one second or one minute could be data independent),the exact response can be determined at the specific time of the computer ac-tion.3.6.SimulationflowThe controlflow of the simulator ensures that no mod-ules can become unsynchronized with the timing of the sim-ulation.Since all modules work in relative time to the cur-rent simulation time,the main concern of the controlflow is ensuring that modules respond in a synchronized fashion.Simulations begin by the core issuing a message that a simulation is going to begin.All modules then submit a list of initial events or no events.The simulation will not begin until all modules have responded.Once all initial events are entered,the event queue is checked for thefirst event. The master clock is updated to the time of thefirst event and the event is sent to all modules that need to receive the event.All modules that receive the event will either submit new events or no events.When all modules that received the event have responded,the core once again checks the event queue for the next event,updates the master clock, and sends out the events to any modules that need the event. This process continues until all events have been processed (or the core is interrupted by a user).By waiting for all modules to respond before advancing to the next event,there is no possibility of any event being scheduled at an incorrect time.It also alleviates any prob-lems related to network latency or slow computers needing extra time to compute events.Since events are only sent to modules that need the events,the overhead of waiting for module responses is reduced to a minimum.4Simulation of a bankA standard example often used in literature on simulation is the modeling of daily operations of a bank,with multi-ple tellers serving multiple customers from one or multiple lines.We use this common example to provide a simple in-troduction to the process of developing CS-DEVS modules.The simulated bank,like any real bank,has a set of cus-tomers that arrive and wish to perform certain tasks,such as deposits,withdrawals and money transfers.When a cus-tomer arrives at the bank,he or she will enter a line.If mul-tiple lines are available,the customer will choose to enter the shortest line.Once in a line,the customer will patiently wait until they are in the front of the line,at which time they will be sent to a teller to handle their business.The teller will complete the customer’s tasks in afinite amount of time,and once the tasks are completed,the customer will leave,the teller will service another customer,and so on for the rest of the banking day.The underlying purpose of the bank simulation is to al-low a user to test the effectiveness of various queuing and scheduling schemes.These include:a singlefirst-in,first-out line for all tellers(as is most common in a real-world bank),an individual line for each teller(similar to the lines often seen in a supermarket)and various other systems,in-cluding dynamically re-prioritized lines and scheduling sys-tems without thefirst-in,first-out restriction.This section describes how this general idea of a bank simulation maps onto the specific set of functionality pro-vided by CS-DEVS.Specifically,this involves describing each of the modules in the system,the events created and re-ceived by each module,and the response each module will perform given a particular event.4.1Bank simulation modulesThe bank simulation is divided into four modules:the Customers and Tellers,the Bank Line,and the Bank Audi-tor.The Customers module will produce a set of customers that will arrive at the bank at certain intervals to carry out their business.Once a customer enters the bank,the Bank Line module will assign the customer to a particular line, maintain the queue of customers in each line,and assign customers to tellers when tellers are available.The Tellers module will manage the servicing of each customer and de-termine how long each teller service will take.Monitoring all of this activity is the Bank Auditor module.It tracks the statistics regarding the bank and produces a report of items including average customer wait time,average line length, and utilization of tellers.4.1.1CustomersThe Customers module is charged with the responsibility of determining when customers will arrive at the bank.The individual algorithm for determining this is internal to the module.In our specific example,the Customers module will be given a distribution range for the total number of customers in a given bank day,and a distribution range for the length of task each customer will need performed. These distributions may be specified as either uniformly distributed across the range,or normally distributed around a mean value.In this way,the details of the customer’s business is ab-stracted from the rest of the bank simulation,allowing the simulation to focus on its main goal of testing different scheduling systems.While the customer may have a deposit or withdrawal,the Customers module will abstract this by assigning a specific time to the individual customer.Since the arrival of customers is not dependant on any events that occur within the bank,the Customers module will generate and submit all customers at the beginning of the simulation.The core will manage when the cus-tomers are passed to the Bank Line module.Even though it will appear that the Customers module is active through-out the simulation(since customers will appear at the bank throughout the simulated day),it is only needed at the start of the simulation and only needs to make one large commu-nication to the core.The only type of event generated by the Customers mod-ule is the Customer Arrival event.The Customers module does not respond to any events,so it does not need to listen for any events.4.1.2Bank lineThe most variety is seen in the Bank Line module.This module has a large set of different algorithms that allows the user of the simulation to experiment with different schedul-ing schemes.In this specific simulation,the Bank Line module has three different algorithms:a single line algo-rithm,a multiple independent line algorithm,and a dynamic priority-based line algorithm.When a Customer Arrival event indicates that a new cus-tomer has entered into the bank,the Bank Line will direct that customer to the appropriate queue.Which queue,and to which position in that queue,is determined by the schedul-ing algorithm.The single-line algorithm is the simplest scheduling scheme.All customers enter the back of a single line,and all customers are dispatched to tellers from the front of the line.Customers may not change positions in the line,and must wait in afirst-in,first-out fashion.This scheme is the one most often used in real banks.In contrast to the single-line algorithm,the multiple-independent-line algorithm has one line for each active teller at the bank.Each individual line operates under the same rules as the single-line algorithm and thus acts as a FIFO queue.When a new customer enters the bank,the Bank Line module will place the customer in the shortest available line.If a teller becomes inactive and there are cus-tomers in that teller’s line,the customers will be distributed to the remaining lines as through they were new customers. This scheme is not often seen in real banks,but is com-monly used in supermarkets and fast food restaurants.Like the single-line algorithm,the dynamic priority-based-line algorithm uses a single line,but does not oper-ate in afirst-in,first-out fashion.The algorithm determines when a customer will be serviced based upon the length of the transactions the customer wants to perform and can change customers’positions in the line at any time.Cus-tomers with the shortest transaction time will be placed at the front of the line.Further,when a customer has waited in the line for an extended period of time,the algorithm in-creases the customer’s priority,such that that customer will preempt other customers with lower priority.This system would be unacceptable for a line at a bank,but is often used in telephone service systems(where the line is not visible to the customers).When the Bank Line module is informed by the Tellers module,through a Teller Available event,that a particular teller is available to service a customer,the Bank Line re-sponds by removing the appropriate customer from the line and sending that customer over to the teller,indicated by the Send To Teller event.4.1.3TellersThe Tellers module manages the availability of tellers and the amount of time each teller will take to service a cus-tomer.All tellers are considered equal in their working ef-ficiency and the number of tellers present during any day does not change.The Tellers module will initially submit a Teller Avail-able event for each teller that is able to service a customer. The Bank Line module assigns customers to tellers through Send To Teller events.When a customer is sent to a teller, the customer is serviced for an amount of time as specified by the customer,and then a Teller Available event is issued to indicate that the teller is ready for another customer. 4.1.4Bank auditorThe Bank Auditor module collects statistics about the per-formance of the simulated bank.It listens to all events and tracks the actions of customers and tellers.Whenever an event occurs,the Bank Auditor module updates its statistics on the average customer wait time,average line length,andutilization of tellers.The Bank Auditor module is,for all intents and purposes,invisible to all other modules.It does not generate any events and listens to all events.4.2Bank simulation eventsThe communication between each module is performed using a set of user-defined events.These events serve both functional and informational purposes.Functional events, such as Send To Teller perform a specific task upon the data, and trigger specific changes in modules other than their rmational events,on the other hand,serve to notify another module of a specific occurrence,which can then be used for statistics tracking,such as the Customer Arrival event.4.2.1Bank-open EventThis event is sent at the start of a simulation by the Tellers module.It will inform the Bank Line of the current number of tellers,and serve to allow the simulation to be restarted.4.2.2Customer-arrival EventWhenever a customer enters the bank,the Customers mod-ule sends a Customer Arrival event.This event contains a customer record that contains a customer identification number,the arrival time of the customer,and the duration of the customer’s particular tasks.This record will be passed around the simulation,stored during the course of the cus-tomer’s time at the bank,and used to compute statistics once that customer leaves.4.2.3Teller-available EventOnce customers arrive at the bank,they expect to be ser-viced by tellers.To indicate that a teller is ready,the Tellers module will submit a Teller Available message,which will indicate the number of the particular teller.The Bank Line will receive this message,and when the lines are non-empty, use this information to determine which customer will be sent to which teller.4.2.4Send-to-teller EventAfter the Tellers module has sent a Teller Available event, the Bank Line module responds by assigning a customer to a particular teller,using the Send To Teller event.This event will contain the number of the teller to which the customer is being sent,as well as the customer record submitted in the Customer Arrival event(section4.2.2)Figure2.Theflow of messages between mod-ules4.3Bank simulation controlflowStep1:Simulation starts when the Tellers module submitsa Bank Open event,containing the number of tellersavailable,and indicating that the bank is open for busi-ness.Step2:Now that the bank is open,the customers begin to arrive,as the Customers module generates customer records,and submits a set of Customer Arrival events. Step3:Once the customers arrive at the bank,the Bank Line module receives the Customer Arrival events,and adds the customers to the line(or lines)according to the pre-assigned scheduling algorithm.Additionally, tellers indicate their availability,through Teller Avail-able events.Step4:If tellers are currently available,the Bank Line module will use its scheduling algorithm to select an appropriate customer and teller,and send the customer over to that teller,indicated with a Send To Teller event.Step5:After the customer proceeds to the teller,the teller will help that customer with their business,and once that business is complete,the customer will leave the bank and the teller will again become available.The simulation indicates this when the Tellers module sub-mits a Teller Available event.Step6:As long as more customers arrive at the bank,the simulation repeats Step3through Step5.At the end of the banking day,once no more customers arrive at the bank,the bank closes,and the simulation terminates.5Distributed computing simulation While the simulation of a bank is a common textbook example of discrete-event simulation,a more practical use of CS-DEVS,and indeed one of the main goals for the simulator,is the simulation of distributed computing algo-rithms,specifically for distributed and multi-computer op-erating systems.The simulation needs to accurately model the working of a computer network,either through an inter-processor network or inter-computer network,the schedul-ing and load balancing algorithms for each processor and the entire network,and the types of programs being run on the computer network.5.1Distributed computing modulesThe simulation contains three distinct modules:the ar-chitecture module,which handles all details of the inner workings of processors and memory systems,the sched-uler module,which contains the scheduling and load bal-ancing algorithms,and the workload module,which gener-ates models of programs to be run on the computer system.By separating the modules into these three groups,the simulation can be used to test either the effectiveness of scheduling algorithms,the performance of computer pro-cessors and networks,or the execution of various types of programs on a multiprocessor system.5.1.1ArchitectureThe architecture module contains a representation of the number and type of processors used and the network con-necting the processors.The specific details of the archi-tecture implementation are abstracted by the module,and made irrelevant to other modules.An architecture may be specified as a shared-bus multiprocessor system or a cluster system,and still export the same interface to the rest of the simulation.The Architecture module handles all details of tasks be-ing sent to processors,tasks being processed,and tasks be-ing removed from processors.When a task is assigned to a processor,a start-task event is sent to the Architecture mod-ule.The module then processes the task until either the task is completed or the end of a time slice occurs.A task is removed from a processor through either a task-complete event or a time-slice-end event.Details of inter-processor communications are also ab-stracted through the Architecture module.Any transmis-sion of data that does not involve moving a task is handled through the data-transfer events and data-transfer-complete events.To describe the inter-connection networks and processor computing power,two different models can be used.One model is a high level description of an architecture with only four parameters and the other model is a low level descrip-tion with many more details and settings.The high level model is a description called LogP[3][2]. The description contains four tency is the time required to send data between any two nodes.Over-head is the processing time associated with setting up to send and receive data.Gap is the minimum wait time be-tween sending messages.P is the relative processing speed of each processor.All connections and all processors are considered to be identical.The low level model has descriptions for all network connections and all processors.The network is represented with an adjacency matrix.Each entry in the matrix is a value for the connection speed.Note that with an adjacency matrix,each node can have different connection speeds for each incoming and outgoing connection.Each processor has a value associated with it that indicates its processing speed.5.1.2SchedulerIt is the responsibility of the scheduler module to both schedule tasks to run on particular processors and to sched-ule data transfers between processors.When the scheduler receives a task-arrival event from the Workload module,the scheduler must determine which processors are available and how and where the task should be scheduled to run. Additionally,the scheduler must determine from the infor-mation in the task-arrival event if the task has any data de-pendencies from previous tasks,and if so,it must initiate a data transfer,and cannot schedule that process to run until that data transfer is complete.5.1.3WorkloadWhereas the scheduler module is charged with the respon-sibility of scheduling tasks,it is the workload module itself that generates those tasks.The workload is also responsi-ble for assigning tasks into separate jobs,if applicable.This may be useful for certain scheduling system,such as gang scheduling,which attempts to run all tasks from a particular job simultaneously.To indicate the arrival of a job or a task to the system, the workload module uses the job-arrival and task-arrival messages.Each of these messages contains an identifier of the particular job or task.The task-arrival message also contains a Task object.This task object contains the length of the task,which is used in the simulation to determine how much time is remaining for that particular task to run. The Task object also indicates data dependencies between this task and other tasks,which are identified with their task identifiers.It is then the responsibility of the Scheduler,not。