MIC4100中文资料

1.2：手册的范围本手册涵盖了软件设置和操作。

更多的复本可供订购，订购编号为04000/003C。

•获取技术支持及备件的联系方式请见本手册封底。

•随仪器提供一份安装手册，内容包括了技术指标、日常维护和备件信息，订购编号为04000/005C。

•维护手册是专为专业技术人员而编写的，购编号为04000/002C警告用户应当注意到Xentra仪器内部没有需要用户维护的部件。

仪器外壳保护用户免遭电击或其它危害。

所有维护工作应当由专业技术人员进行。

图A分析仪正视图1．样气过滤器(可选) 4．键盘2．流量计(可选) 5 ．显示对比度调节3．显示6．样气调节针阀(可选) 图BXentra的显示1．标题7．报警图标2．模块位置(2字符) 8．预热图标3．测量值(6字符) 9．自动标定图标4．工程单位(3字符) 10．维护图标5．组份名称(6字符) 11．故障图标6．测量显示条目图C自动标定的典型时序(示例中，标气1为零点气，标气2为量程气) 1．自动标定开始，标气1通入分析仪2．标气1测量中3．标气2通入分析仪4．标气2测量中5．标气1再次通入分析仪6．再次测量标气17．样气体通入分析仪吹扫传感器(后吹扫)图D用户界面菜单结构图1概述11.1警告、注意和提示 11.2手册的范围 11.3用户界面介绍 42初始设置72.1开机和关机步骤72.2分析仪功能的一般操作72.3设定密码82.4设定时间和日期83主要设置93.1组份名称和单位的定义93.2报警10 3.3继电器的分配 11 3.4外部模拟量输入的设置 133.5模拟量输出 133.6定义和选择测量显示屏幕 15 3.7响应时间 16 3.8串行通讯输出163.9氮氧化物(NOx)浓度的计算17 4标定 184.1标定简介 18 4.2设定低点和高点标定的允许误差 19 4.3手动标定和检查19 4.4顺磁模块压力传感器的标定 22 4.5自动标定和自动检查的设置 24 5查看配置和历史文件 285.1显示当前的报警和故障 28 5.2显示报警设定 28 5.3设定显示输出 2 9 5.4显示分析仪历史记录30 5.5显示分析仪标识和诊断信息 32用户界面介绍用户界面由键盘和大屏幕LCD组成。

复合材料的应用范围十分广泛，这当然也包括航空航天领域。

4100 ExoScan FTIR 已被证明是一种适用于测量复合材料热损伤的无损检测技术（“使用手持式 Agilent 4100 ExoScan FTIR 测量复合材料的热损伤”，J. Seelenbinder ）。

ExoScan 系统可以识别复合材料基体中环氧聚合物成分化学结构的变化。

ExoScan 软件将这些数据与预开发的方法进行比较，据此找出这些数据上的变化与暴露程度的关系。

通过这种方式，该系统可以作为无损分析仪用于确定复合材料热损伤的深度和广度，这对于复合材料的修复过程特别有价值。

我们提供的工具包中包含波音 787 飞机的维修手册 (SRM) 中规定使用 4100 ExoScan 测量 787 中碳纤维复合材料热损伤的方法。

软件中内置的方法包含了 SRM 中列出的所有未打磨和打磨后复合材料的测量方法。

这些方法的校准过程均按照波音认证标准执行。

方法中的合格/不合格阈值也根据 SRM 规定进行设置。

安捷伦 4100 EXOSCAN FTIR 光谱仪 用于波音飞机中所使用复合材料的分析产品说明专用于波音 787 飞机的 4100 ExoScan FTIR （部件号：G8036A ）工具包中包含了以下硬件：4100 Exoscan FTIR ，配有专用漫反射接口附件、空白背景及聚苯乙烯参考盖、Socket Somo 650 PDA 、电缆、与 PDA 和 Exoscan 配套的电源和电池充电器、硬件和软件使用手册、已经预置在 PDA 中的 MicroLab PC 和 MicroLab Mobile 操作软件。

除了硬件之外，还提供了以下方法和验证标准：有关在波音 787 上使用 ExoScan FTIR 的更多信息，请参见以下出版物：• Arnaud, C. H. (2011).Handheld IR in the Hangar.Chemical and Engineering News, Vol 89 (34), 43-45. • Boeing (2011) Boeing 787 Service Repair Manual Part 9,51-00-03.• Seelenbinder, J. (2009)。

Simplex4100ES产品手册10096*****+86 21-***-*****北京138 3 7 ***** +86 10-***-*****广州161 A 1701 ***** +86 20-***-*****武汉568 49 17 ***** +86 27-***-*****Form No. S - BRO *****CN1. 新普利斯简介 (2)2. 4100ES火灾报警控制器 (3)2.1 系统构成2.2 系统容量2.3 主要技术特点2.4 产品认证2.5 主要部件2.5.1 CPU中央处理器单元(Master Controller)2.5.2 用户操作面板2.5.3 系统主电源(SPS)2.5.4 扩展电源(XPS)2.5.5 电源分配模块2.5.6 回路卡2.5.7 控制器机箱2.5.8 微型打印机组件2.5.9 多线手动控制盘2.5.10 网络卡(NIC)2.5.11 基本配置2.5.12 扩展模块安装参考8.6 四输入/两输出模块8.7 通讯隔离模块8.8 电源隔离模块9. 报警输入输出设备 ............. 319.1 手动报警按钮9.2 *****x防暴型手动按钮9.3 消火栓按钮9.4 声光报警器10. 三频红外火焰探测器........ 3311. 消防电话 ........................ 3511.1 多线制电话主机11.2 多线制电话分机11.3 多线制电话插孔11.4 多线制电话手柄11.5 总线制电话总机11.6 总线制电话分机11.7 总线制电话插孔12. 消防应急广播设备 .. (38)12.1 多线广播控制盘12.2 广播录放盘12.3 功率放大器12.4 音箱3. 4100ES网络 ........................... 163.1 概述3.2 环型和星型架构配置3.3 网络回路3.4 系统功能附录．接线图 (40)4. 火灾显示盘 (18)5. 气体灭火控制器 (19)6. 图文显示终端 (20)7. 现场外围设备 (21)7.1 智能光电感烟探测器7.2 智能感温探测器7.3 智能型探测器通用底座7.4 非地址式感烟探测器7.5 非地址式感温探测器7.6 非地址式探测器通用底座8. 智能模块 (26)8.1 区域适配模块8.2 可编址监视模块8.3 可编址信号模块(IAM)8.4 单输出模块8.5 单输入单输出模块目录1.新普利斯简介2. 4100ES 型火灾报警控制器4100ES系列火灾报警控制器（联动型）是Simplex公司专门针对中、大型及超大型项目开发和推出的消防报警控制器。

Agilent 4100ExoScan FTIR操作手册声明© Agilent Technologies, Inc. 2009, 2011, 2013, 2017根据美国和国际版权法，未经Agilent Technologies, Inc. 事先许可和书面同意，不得以任何形式或通过任何方法（包括电子存储和检索以及翻译成其他语言）复制本手册的任何部分。

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限制性权利的说明如果软件在美国政府的项目主合同和转包合同中使用，则所交付并许可使用的软件是 DFAR 252.227-7014（1995 年 6 月）中定义的“商用计算机软件”，或 FAR2.101(a) 中定义的“商用品”，或 FAR 52.227-19（1987 年 6 月）或任何同等机构法规或合同条款中定义的“限制性计算机软件”。

本软件的使用、复制或公布受Agilent Technologies 标准商用许可条款的限制，非国防部 (DOD)机构和美国政府机构所受限制以FAR 52.227-19(c)(1-2)（1987 年6 月）中定义的“限制性权利”为准。

共同特性：■完全数字化的会议系统主机■基于TAIDEN独创的MCA-STREAM数字音频处理及传输技术■符合IEC60914国际标准■以高性能双CPU为核心的嵌入式硬件架构，系统更稳定，运算更快捷■音频信号采用专用的高性能 DSP进行处理，输出音频的效果接近CD音质■麦克风灵敏度、EQ独立可调■内置4种音频模式：普通/议会/发布会/剧院■内置可调节的音频压限功能■系统可控制多达4096台分机单元■每个会议单元具备全球唯一的ID号，可方便安装并避免ID号重复■可将任一台代表发言单元设定为 VIP单元，只要整个会议系统中已开启的话筒总数不超过6台（包括主席/代表/VIP单元），VIP 代表发言单元就可以自由开启■带背光的256X32 LCD显示屏可显示表决结果、操作模式、语种等信息，并提供简/繁体中文、英文、法文、俄文等多种语言的系统设置菜单■内置内部通话功能■具备多种音频信号输入输出方式：两个独立的，相位相反的 RCA输出接口，可连接成平衡输出方式，实现远距离低噪声传输录音输入/输出端口各一个一个平衡线路输入接口（ 6.4mm ）■一个报警信号输入接口，当公共广播报警系统启动时，可自动暂停会议，并向与会单元发送报警信息■六路会议单元输出端口，每路可以支持30个PCF，一台主机总计可支持180个PCF■通过连接多台扩展主机HCS-4100ME/20 （每台扩展主机支持180个PCF ），可连接4096台发言或者表决单元■配合摄像机、视频切换台，使用电脑预设后，可进行摄像自动跟踪■可脱离电脑单独使用，作为一套基本的会议系统，具备以下功能：发言人数限制功能（1/2/4），可以设置同时开启的代表发言单元可为发言代表设定发言时间限制（1-240分钟）“OPEN模式，达到开机数量后有请求发言登记功能“OVERRID”模式，达到开机数量后可将正在发言的话筒越权关闭“VOICE （声控）模式，灵敏度连续可调，自动关闭时间可调，内置“Flashon"技术，声音启控更快速“APPLY模式，由系统中具有控制功能的主席单元批准或否决代表发言申请在“OPEN/OVERRIDE/APPLY模式下，可设置主席单元为讲台”模式，始终保持常开状态表决功能（赞成/反对/弃权）■连接电脑配合系统控制软件使用，具备更多功能：可集中进行话筒管理可进行投票表决，并具多种表决形式：同意/反对方式表决方式：赞成/弃权/反对选举方式：1/2/3/4/5 响应方式：--/-/0/+/++ 可进行多种模式个人出席签到（门禁签到/坐席签到）根据用户选购的HCS-4100/20系统配套软件模块，可实现相应的多种会议管理功能■系统主机可设IP地址，与控制电脑之间采用先进的 TCP/IP连接控制方式，可以实现会议系统的远程控制、远程诊断和远程升级■具备双机热备份功能，可将一台会议系统主机设置为备份主机并连接到系统中，当一台会议系统主机出现意外时，备份主机会自动启用，保证会议无间断顺利进行■多台系统主机可以分别作为独立的会议系统，也可以方便地扩展组成一个大型的会议系统，实现灵活的多房间配置功能■内置会议单元测试功能，可在会前对各会议单元的麦克风、表决按键、扬声器及LED指示灯进行检测■系统具有自动修复功能，支持线路的"热插拔”■在PC机万一产生故障时，会议控制主机自动退回到独立控制状态，实现基本的会议管理控制，保证会议的继续进行■具备2个RS-232接口，用于连接智能中控系统及系统诊断■可安装在19英寸标准机柜技术参数HCS-4100MG/20全数字化标准型会议控制主机特性:■在一条专用6芯电缆（也可用通用的带屏蔽超五类线代替）上可传输多达64路的高品质数字音频信号■可实现多达64（ 1+63）通道的同声传译功能，配合通道选择器和/或红外语言分配系统，可容纳更多的听众参与会议■通过连接多台扩展主机HCS-4100ME/20 （每台扩展主机支持180个PCF ），可连接：378台翻译单元（可以设置63个翻译间，每间最多6台翻译单元）任意数量的通道选择器■配合模拟音频输出器HCS-4110M/20，可输出多通道的模拟音频信号，供红外同传系统或录音使用■可脱离电脑单独使用，作为一套基本的会议系统，可实现同声传译功能■具有麦克风分组输出功能，可连接多路扩声系统，每路扩声系统可得到完全独立的音频信号，从而可实现调节距离某话筒较近的音箱发出该话筒的声压较小（N-1功能）；还可实现分组录音功能■具有AES/EBU，SPDIF数字音频输入输出接口HCS-4100MG /20……全数字化标准型会议控制主机（带表决功能，64通道，256X32 LCD，AES/EBU，SPDIF数字音频接口，麦克风分组输出）HCS-4100MA/20 全数字化标准型会议控制主机特性:■在一条专用6芯电缆（也可用通用的带屏蔽超五类线代替）上可传输多达64路的高品质数字音频信号■可实现多达64 （1+63）通道的同声传译功能，配合通道选择器和/或红外语言分配系统，可容纳更多的听众参与会议■通过连接多台扩展主机HCS-4100ME/20 （每台扩展主机支持180个PCF ），可连接：378台翻译单元（可以设置63个翻译间，每间最多6台翻译单元）任意数量的通道选择器■配合模拟音频输出器HCS-4110M/20，可输出多通道的模拟音频信号，供红外同传系统或录音使用■可脱离电脑单独使用，作为一套基本的会议系统，可实现同声传译功能■具有6路独立的MIC.输出接口（RCAx6），配合会议系统专用数字硬盘录像机 HCS-4130M，可对同时开启的最多6支话筒分别录音■具有1组6路话筒混音输出平衡接口（ RCX 2）■具有AES/EBU，SPDIF数字音频输入输出接口HCS-4100MA/20-全数字化标准型会议控制主机（带表决功能，64通道，256X32 LCD，AES/EBU，SPDIF数字音频接口，6路话筒独立输出）HCS-4100MB/20全数字化标准型会议控制主机特性:■在一条专用6芯电缆（也可用通用的带屏蔽超五类线代替）上可传输多达64路的高品质数字音频信号■可实现多达64（ 1+63）通道的同声传译功能，配合通道选择器和/或红外语言分配系统，可容纳更多的听众参与会议■通过连接多台扩展主机HCS-4100ME/20 （每台扩展主机支持180个PCF ），可连接：378台翻译单元（可以设置63个翻译间，每间最多6台翻译单元）任意数量的通道选择器■配合模拟音频输出器HCS-4110M/20，可输出多通道的模拟音频信号，供红外同传系统或录音使用■可脱离电脑单独使用，作为一套基本的会议系统，可实现同声传译功能全数字化标准型会议控制主机（带表决功能，64通道，256X32 LCD ）HCS-4100MC/20全数字化标准型会议控制主机HCS-4100MB /20HCS-4100MC/20' 全数字化标准型会议控制主机（带表决功能，256X32 LCD ）■配合会议控制主机HCS-4100MG/MA/MB/MC/20 用于扩展连接会议单元■基于TAIDEN独创的MCA-STREAM数字音频处理及传输技术■符合IEC 60914国际标准■ 六路会议单元输出端口，每路可以支持30个PCF，一台扩展主机总计可支持180个PCF■连接：一个6P-DIN标准插座（输入），用于连接系统主机或上一台会议扩展主机一个6P-DIN标准插座（输出），可连接会议单元（其电源供应来自输入接口的电力）或下一台会议扩展主机■可安装在19英寸标准机柜话筒容量<4096频率响应30 〜16000 Hz信噪比>96 dBA通道串音>85 dB动态范围>94 dB总谐波失真<0.05%主电源110 V OR 220 V AC音频输入LINE IN: 0.775 V 平衡REC.IN: 0.775 V 非平衡音频输出0.775 V REC. OUTPUT x 10.775 V ORIGINAL.OUTPUT RCA x 2输出负载>1 k Q最大功耗410 W连接方式专用电缆（6芯）连接头DIN6P+卡套可靠性优颜色灰白色尺寸长瀝＞高（mm）430X325X99重量11.5 kgHCS-4100ME/20 全数字化标准型会议系统扩展主机系统连接图电.驰i1! a.U ■! M ^L1 ails LjfiifMA'S.Am HF和」心"***•( <^E Btt JHGS-41QQMA/20CBLfiPP^DOHCS-4100ME/20C BuCPS a^'tGZD 且-t 卓集咎F=5Q特性：■将会议控制主机输出的数字音频信号转换成多路模拟音频信号输出，供红外同传系统或录音使用■带背光的256X32 LCD显示屏可显示8路输出通道号及语种名称信息，并提供简/繁体中文、英文三种语言的系统设置菜单■模拟音频输出器有8组输出接口，每组输出有两个独立的、相位相反的RCA接口，可连接成平衡输出，也可独立输出■具有一路单声道耳机输出接口（3.5mm ）及通道选择旋钮，可连接耳机监听各通道语音信号，并具有音量调节功能■连接：一个6P-DIN标准插座（输入），用于连接会议控制主机一个6P-DIN标准插座（输出），可连接会议单元（其电源供应来自输入接口的电力）或连接下一台模拟音频输出器■可安装在19英寸标准机柜技术参数通道数量8 CH频率响应80 〜16000 Hz信噪比>85 dBA通道串音>85 dB动态范围>94 dB总谐波失真<0.05%主电源110 V 或 220 V AC音频输出0.775 V RCA x 2/CH输出负载>1 k Q最大功耗120 W连接方式专用电缆（6芯）连接头DIN6P+卡套可靠性优颜色灰白色尺寸长x宽槁（mm）430X325X99重量7.5 kg8 通道模拟音频输出器系统连接图EI4« =.3CI PC*HCS-5100MCIjUgdT ■HCSJI110Mi!30HCEI-«£B5K2iK更£0 ©回• a B wHC：生S1MT——■•■・・J曲Tk!严？HCS-4110M/20。

FEATURES• 256K x 16 organization(MX27C4096, JEDEC pinout)• 512K x 8 or 256K x 16 organization(MX27C4100,ROM pin out compatible)• +12.5V programming voltage• Fast access time: 100/120/150 ns • Totally static operation• Completely TTL compatible • Operating current: 60mA • Standby current: 100uA • Package type:-40 pin plastic DIP -44 pin PLCC -40 pin SOPGENERAL DESCRIPTIONThe MX27C4100/4096 is a 5V only, 4M-bit, One Time Programmable Read Only Memory. It is organized as 256K words by 16 bits per word(MX27C4096), 512K x 8or 256K x 16(MX27C4100), operates from a single + 5volt supply, has a static standby mode, and features fast single address location programming. All programming signals are TTL levels, requiring a single pulse. For programming outside from the system, existing EPROMprogrammers may be used. The MX27C4100/4096supports a intelligent fast programming algorithm which can result in programming time of less than two minutes.This EPROM is packaged in industry standard 40 pin dual-in-line packages, 40 lead SOP, and 44 lead PLCC packages.PIN CONFIGURATIONSSOP/PDIP(MX27C4100)BLOCK DIAGRAM (MX27C4100)MX27C4100/27C40964M-BIT [512K x 8/256K x 16] CMOS EPROMM X 27C 410012345678910111213141516171819204039383736353433323130292827262524232221A8A9A10A11A12A13A14A15A16BYTE/VPP GND Q15/A-1Q7Q14Q6Q13Q5Q12Q4VCCA17A7A6A5A4A3A2A1A0CE GND OE Q0Q8Q1Q9Q2Q10Q3Q11VCC GNDWORD MODE(BYTE = VCC)CE OE Q15/A-1MODE Q0-Q14SUPPLY CURRENT H X High Z Non selected High Z Standby(ICC2)L H High Z Non selected High Z Operating(ICC1)LLDOUTSelectedDOUTOperating(ICC1)NOTE : X = H or LTRUTH TABLE OF BYTE FUNCTION(MX27C4100)BYTE MODE(BYTE = GND)CE OE Q15/A-1MODE Q0-Q7SUPPLY CURRENT H X X Non selected High Z Standby(ICC2)L H X Non selected High Z Operating(ICC1)LLA-1 inputSelectedDOUTOperating(ICC1)SYMBOL PIN NAME A0~A17Address Input Q0~Q14Data Input/Output CE Chip Enable Input OE Output Enable InputBYTE/VPP Word/Byte Selection/Program Supply Voltage Q15/A-1Q15(Word mode)/LSB addr. (Byte mode)VCC Power Supply Pin (+5V)GNDGround PinPIN DESCRIPTION(MX27C4100)PIN DESCRIPTION(MX27C4096)SYMBOL PIN NAME A0~A17Address Input Q0~Q15Data Input/Output CE Chip Enable Input OE Output Enable Input VPP Program Supply Voltage VCC Power Supply Pin (+5V)GNDGround PinThe verification should be performed with OE and CE at VIL(for MX27C4096), OE at VIL and CE at VIH(for MX27C4100) and VPP at its programming voltage.AUTO IDENTIFY MODEThe auto identify mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and device type. This mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25°C ± 5°C ambient temperature range that is required when programming the MX27C4100/4096.To activate this mode, the programming equipment must force 12.0 ± 0.5 V on address line A9 of the device.Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during auto identify mode.Byte 0 ( A0 = VIL) represents the manufacturer code,and byte 1 (A0 = VIH), the device identifier code. For the MX27C4100/4096, these two identifier bytes are given in the Mode Select Table. All identifiers for manufacturer and device codes will possess odd parity, with the MSB (Q15) defined as the parity bit.READ MODEThe MX27C4100/4096 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection.Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE).Data is available at the outputs tOE after the falling edge of OE's, assuming that CE has been LOW and addresses have been stable for at least tACC - t OE.WORD-WIDE MODEWith BYTE/VPP at VCC ± 0.2V outputs Q0-7 present data Q0-7 and outputs Q8-15 present data Q8-15, after CE and OE are appropriately enabled.FUNCTIONAL DESCRIPTIONTHE PROGRAMMING OF THE MX27C4100/4096When the MX27C4100/4096 is delivered, or it is erased, the chip has all 4M bits in the "ONE" or HIGH state. "ZEROs" are loaded into the MX27C4100/4096through the procedure of programming.For programming, the data to be programmed is applied with 16 bits in parallel to the data pins.VCC must be applied simultaneously or before VPP,and removed simultaneously or after VPP. When programming an MXIC EPROM, a 0.1uF capacitor is required across VPP and ground to suppress spurious voltage transients which may damage the device.FAST PROGRAMMINGThe device is set up in the fast programming mode when the programming voltage VPP = 12.75V is applied, with VCC = 6.25 V and OE = VIH (Algorithm is shown in Figure 1). The programming is achieved by applying a single TTL low level 100us pulse to the CE input after addresses and data line are stable. If the data is not verified, an additional pulse is applied for a maximum of 25 pulses. This process is repeated while sequencing through each address of the device. When the programming mode is completed, the data in all address is verified at VCC = VPP = 5V ± 10%.PROGRAM INHIBIT MODEProgramming of multiple MX27C4100/4096's in parallel with different data is also easily accomplished by using the Program Inhibit Mode. Except for CE and OE, all like inputs of the parallel MX27C4100/4096 may be common. A TTL low-level program pulse applied to an MX27C4100/4096 CE input with VPP = 12.5 ± 0.5 V will program the MX27C4100/4096. A high-level CE input inhibits the other MX27C4100/4096s from being programmed.PROGRAM VERIFY MODEVerification should be performed on the programmed bits to determine that they were correctly programmed.BYTE-WIDE MODEWith BYTE/VPP at GND ± 0.2V, outputs Q8-15 are tri-stated. If Q15/A-1 = VIH, outputs Q0-7 present data bits Q8-15. If Q15/A-1 = VIL, outputs Q0-7 present data bits Q0-7.STANDBY MODEThe MX27C4100/4096 has a CMOS standby mode which reduces the maximum VCC current to 100 uA. It is placed in CMOS standby when CE is at VCC ± 0.3 V. The MX27C4100/4096 also has a TTL-standby mode which reduces the maximum VCC current to 1.5 mA. It is placed in TTL-standby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input.TWO-LINE OUTPUT CONTROL FUNCTIONTo accommodate multiple memory connections, a two-line control function is provided to allow for:1. Low memory power dissipation,2. Assurance that output bus contention will notoccur.It is recommended that CE be decoded and used as the primary device-selecting function, while OE be made a common connection to all devices in the array and connected to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device.SYSTEM CONSIDERATIONSDuring the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1 uF ceramic capacitor (high frequency, low inherent inductance) should be used on each device between Vcc and GND to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7 uF bulk electrolytic capacitor should be used between VCC and GND for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array.MODE SELECT TABLE (MX27C4100)BYTE/MODE CE OE A9A0Q15/A-1VPP(5)Q8-14Q0-7Read (Word)VIL VIL X X Q15 Out VCC Q8-14 Out Q0-7 Out Read (Upper Byte)VIL VIL X X VIH GND High Z Q8-15 Out Read (Lower Byte)VIL VIL X X VIL GND High Z Q0-7 Out Output Disable VIL VIH X X High Z X High Z High Z Standby VIH X X X High Z X High Z High Z Program VIL VIH X X Q15 In VPP Q8-14 In Q0-7 In Program Verify VIH VIL X X Q15 Out VPP Q8-14 Out Q0-7 Out Program Inhibit VIH VIH X X High Z VPP High Z High Z Manufacturer Code(3)VIL VIL VH VIL 0B VCC 00H C2H Device Code(3)VILVILVHVIH1BVCC38H00HNOTES: 1. VH = 12.0 V ± 0.5 V2. X = Either VIH or VIL3.A1 - A8 = A10 - A17 = VIL(For auto select)4.See DC Programming Characteristics for VPP voltage during programming.NOTES: 1. VH = 12.0V ± 0.5V2. X = Either VIH or VIL3. A1 - A8, A10 - A17 = VIL(for auto select)4. See DC Programming Characteristics for VPP voltages.5.BYTE/VPP is intended for operation under DC Voltage conditions only.6.Manufacture code = 00C2H Device code = B800HMODE SELECT TABLE (MX27C4096)PINSMODE CE OE A0A9VPP OUTPUTS ReadVIL VIL X X VCC DOUT Output Disable VIL VIH X X VCC High Z Standby (TTL)VIH X X X VCC High Z Standby (CMOS)VCC ±0.3V X X X VCC High Z Program VIL VIH X X VPP DIN Program Verify VIH VIL X X VPP DOUT Program Inhibit VIH VIH X X VPP High Z Manufacturer Code(3)VIL VIL VIL VH VCC 00C2H Device Code(3)VILVILVIHVHVCC0151HNOTICE:Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended period may affect reliability.NOTICE:Specifications contained within the following tables are subject to change.DC/AC Operating Conditions for Read OperationABSOLUTE MAXIMUM RATINGSRATINGVALUE Ambient Operating Temperature -40o C to 85o C Storage Temperature -65o C to 125o C Applied Input Voltage -0.5V to 7.0V Applied Output Voltage -0.5V to VCC + 0.5V VCC to Ground Potential -0.5V to 7.0V A9 & VPP-0.5V to 13.5VMX27C4100/4096-10-12-15Operating TemperatureCommercial 0°C to 70°C 0°C to 70°C 0°C to 70°C Industrial-40°C to 85°C -40°C to 85°C -40°C to 85°C Vcc Power Supply5V ± 5%5V ± 10%5V ± 10%DC CHARACTERISTICSSYMBOL PARAMETER MIN.MAX.UNIT CONDITIONS VOH Output High Voltage 2.4V IOH = -0.4mA VOL Output Low Voltage 0.4V IOL = 2.1mAVIH Input High Voltage 2.0VCC + 0.5V VIL Input Low Voltage -0.30.8V ILI Input Leakage Current -1010uA VIN = 0 to 5.5V ILO Output Leakage Current -1010uA VOUT = 0 to 5.5V ICC3VCC Power-Down Current 100uA CE = VCC ± 0.3V ICC2VCC Standby Current 1.5mA CE = VIHICC1VCC Active Current 60mA CE = VIL, f=5MHz, Iout = 0mA IPPVPP Supply Current Read10uACE = OE = VIL, VPP = 5.5V CAPACITANCE TA = 25o C, f = 1.0 MHz (Sampled only)SYMBOL PARAMETER TYP.MAX.UNIT CONDITIONS CIN Input Capacitance 812pF VIN = 0V COUT Output Capacitance 812pF VOUT = 0V CVPPVPP Capacitance1825pFVPP = 0VAC CHARACTERISTICS27C4100/4096-1027C4100/4096-1227C4100/4096-15SYMBOL PARAMETER MIN.MAX.MIN.MAX.MIN.MAX.UNIT CONDITIONS tACC Address to Output Delay100120150ns CE = OE = VIL tCE Chip Enable to Output Delay100120150ns OE = VILtOE Output Enable to Output Delay455065ns CE = VILtDF OE High to Output Float,030035 050nsor CE High to Output FloattOH Output Hold from Address,00 0nsCE or OE which ever occurred firstAC CHARACTERISTICS(Continued)27C4100-1027C4100-1227C4100-15 SYMBOL PARAMETER MIN.MAX.MIN.MAX.MIN.MAX.UNITCONDITIONStBHA BYTE Access Time100120150nstOHB BYTE Output Hold Time000nstBHZ BYTE Output Delay Time707070nstBLZ BYTE Output Set Time101010nsDC PROGRAMMING CHARACTERISTICS TA = 25o C ± 5°CSYMBOL PARAMETER MIN.MAX.UNIT CONDITIONS VOH Output High Voltage 2.4V IOH = -0.40mA VOL Output Low Voltage0.4V IOL = 2.1mAVIH Input High Voltage 2.0VCC + 0.5VVIL Input Low Voltage-0.30.8VILI Input Leakage Current-1010uA VIN = 0 to 5.5V VH A9 Auto Select Voltage11.512.5VICC3VCC Supply Current (Program & Verify)50mAIPP2VPP Supply Current(Program)30mA CE = VIL, OE = VIH VCC1Fast Programming Supply Voltage 6.00 6.50VVPP1Fast Programming Voltage12.513.0VAC PROGRAMMING CHARACTERISTICS TA = 25o C ± 5°CSYMBOL PARAMETER MIN.MAX.UNIT CONDITIONS tAS Address Setup Time 2.0ustOES OE Setup Time 2.0ustDS Data Setup Time 2.0ustAH Address Hold Time0ustDH Data Hold Time 2.0ustDFP Output Enable to Output Float Delay0130nstVPS VPP Setup Time 2.0ustPW PGM Program Pulse Width95105ustVCS VCC Setup Time 2.0ustOE Data valid from OE150nsORDERING INFORMATIONPLASTIC PACKAGEPART NO.ACCESS TIME OPERATING STANDBY OPERATING PACKAGE(ns)CURRENT MAX.(mA)CURRENT MAX.(uA)TEMPERATUREMX27C4100PC-10100601000°C to 70°C40 Pin DIP(ROM pin out) MX27C4100PC-12120601000°C to 70°C40 Pin DIP(ROM pin out) MX27C4100PC-151********°C to 70°C40 Pin DIP(ROM pin out) MX27C4100MC-10100601000°C to 70°C40 Pin SOP(ROM pin out) MX27C4100MC-12120601000°C to 70°C40 Pin SOP(ROM pin out) MX27C4100MC-151********°C to 70°C40 Pin SOP(ROM pin out) MX27C4096PC-10100601000°C to 70°C40 Pin DIP(JEDEC pin out) MX27C4096PC-12120601000°C to 70°C40 Pin DIP(JEDEC pin out) MX27C4096PC-151********°C to 70°C40 Pin DIP(JEDEC pin out) MX27C4096QC-10100601000°C to 70°C44 Pin PLCCMX27C4096QC-12120601000°C to 70°C44 Pin PLCCMX27C4096QC-151********°C to 70°C44 Pin PLCCMX27C4100PI-1010060100-40°C to 85°C40 Pin DIP(ROM pin out) MX27C4100PI-1212060100-40°C to 85°C40 Pin DIP(ROM pin out) MX27C4100PI-1515060100-40°C to 85°C40 Pin DIP(ROM pin out) MX27C4100MI-1010060100-40°C to 85°C40 Pin SOP(ROM pin out) MX27C4100MI-1212060100-40°C to 85°C40 Pin SOP(ROM pin out) MX27C4100MI-1515060100-40°C to 85°C40 Pin SOP(ROM pin out) MX27C4096PI-1010060100--40°C to 85°C40 Pin DIP(JEDEC pin out) MX27C4096PI-1212060100-40°C to 85°C40 Pin DIP(JEDEC pin out) MX27C4096PI-1515060100-40°C to 85°C40 Pin DIP(JEDEC pin out) MX27C4096QI-1010060100-40°C to 85°C44 Pin PLCCMX27C4096QI-1212060100-40°C to 85°C44 Pin PLCCMX27C4096QI-1515060100-40°C to 85°C44 Pin PLCCRevision HistoryRevision No.Description Pgae Date3.01) Eliminate Interactive Programming Mode6/13/19972) 40-CDIP package quartz lens, change to square shape.3.1IPP1 100uA to 10uA7/17/1997 3.2Cancel 32pin ceramic DIP Package P1,2,4,13,14FEB/25/2000 3.3Modify Commercial range 0~55°C-->0~70°C P9MAY/03/2000 3.4Cancel "Ultraviolet Erasable" wording in General Description P1AUG/22/2001To modify Package Information P14~16MX27C4100/27C4096 M ACRONIX I NTERNATIONAL C O., L TD.HEADQUARTERS:TEL:+886-3-578-6688FAX:+886-3-563-2888EUROPE OFFICE:TEL:+32-2-456-8020FAX:+32-2-456-8021JAPAN OFFICE:TEL:+81-44-246-9100FAX:+81-44-246-9105SINGAPORE OFFICE:TEL:+65-348-8385FAX:+65-348-8096TAIPEI OFFICE:TEL:+886-2-2509-3300FAX:+886-2-2509-2200M ACRONIX A MERICA, I NC.TEL:+1-408-453-8088FAX:+1-408-453-8488CHICAGO OFFICE:TEL:+1-847-963-1900FAX:+1-847-963-1909http : //。

第一部分系统综述介绍S imlex 4100/4120是单个微机为基础，运用最新的安全技术的防火报警控制设备，该系统设备已通过美国U.L.认证,具有省电和自动巡监功能,并且可防止交流电源停电，并自动记录且显示该状态。

根据用户的选择,本设备可控制1270个点。

这个基本的系统包括一个主机板，现场接线端子，80个字符的LCD显示，电源和机箱。

根据不同要求，可配置各类卡或组件。

4100/4120系统单机最大可监控1270点。

4100主机和4120主机的区别在于是否有网卡，是否是网络的一台主机。

当主机不在网络中时为4100，当主机在网络中时称4120。

4100/4120主机的指采用了最新最快的微机处理器。

组态数据存在于可电擦除的FLACK EPROM中，使用现场修改组态数据更加简单。

主机板上更有备有电池的RAM 以保存重要的历史数据，哪怕完全将主机关闭。

4100/4120系统中采用的是开关电源，此电源提供24VDC 8安培的容量给负载设备和系统运行，提供4安培电流给蓄电池充电。

另外，此电源通过机内通开线路和主机板直接通讯，向主机板报告系统电压、当前电流和充电情况等30多个参数。

当系统存在不正常情况时，本机发出声音指示，并通过LCD显示出具体位置和电容。

4100/4120的面板上LCD显示器可显示出本系统的情况。

这个LCD显示器能显示出各种提示，通过菜单方式来指导用户按照程序操作以排除非正常状态。

本系统可完全现场编程组态，并且用户可按照建筑的实际情况和当地的规范要求进行变化。

系统操作描述4100/4120操作面板，后称面板，如下图所示：●绿色“PowerＯＮ”发光二极管（后称ＬＥＤ）指示交流电供电正常。

●其它ＬＥＤ不亮。

●ＬＣＤ上字符显示如下，表示系统处于正常状态。

如果面板上的报警发光二极管二类报警发光二极管,监视发光二极管或故障发光二极管闪光,并且有声音报警就说明有不正常的情况出现,ＬＣＤ显示可提供有关探测点的状况(报警, 二类报警监视和故障)。

第一节简介1.1简介本手册包括了仕富梅4102和4104气体纯度分析仪的安装，运行和配置资料。

相关细节详见4100维修手册。

1.2词汇表FSD 满刻度偏差，可能会超出测量范围，如顺磁气体传感器组件的100%氧和氧化锆气体传感器组件的999 999 vpm氧。

DV 死区（Dead volume）Top level menu 第一菜单V ARS 每个传感器的变量UDEF 用户定义的资料I1 … I4 内部气体传感器组件1.3概述底盘是一个可安装气体传感器组件的平台，能精确测量温度。

对于标准化气体传感器，其量程范围和浓度标准应依据用户的需求而定。

底盘还提供电源，连接和其他支持气体传感器组件的功能，接收起为计算样气浓度提供的输出。

计算出的浓度将显示在LCD显示屏上或者直接模拟输出。

4100是专为现代工业和实验室而设计的，它坚固、耐用，成本低，操作简单、安全，便于维修。

分析仪是由微电脑操作，适用范围广，通过前面板的快捷键控制即可。

快捷键旁是一大的液晶显示（LCD），用于显示温度，报警和其他数据。

4100的可选特性如下：●通过流量计和针阀监测和控制样气流量。

对于氧化锆传感器，针阀不适用。

●样气过滤器保护气体传感器组件免受微粒污染（不适用于氧化锆）。

●样气流量报警监测样气流量，当流量低于设定值时报警。

●在无人介入时，自动标定管可自行标定。

●附加的信号输出卡用于扩展模拟输出和继电器输出。

此型号的所有技术特性详见手册附录B的技术数据表。

启动和运行的操作如下：安装（第二节）分析仪运行的动力源和地点。

初始化配置（第三节）本节为用户界面指南，确定在标定前密码和时钟设置完成。

时钟的设置是为了确保标定记录的准确。

标定（第四节）本节主要是手动标定，自动标定，手动标定检查，自动标定检查。

主要配置（第五节）本节为报警级次，模拟输出，继电器和其他参数的设定。

检查（第六节）在系统设置不变的条件下，如何显示模拟输出设定，继电器分配，报警，故障与分析仪的相一致。

HP Photosmart C4100 All-in-One series ⸔ⶹ䆚HP Photosmart C4100 All-in-One series基础知识手册© 2006 Hewlett-Packard DevelopmentCompany, L.P.出版号：Q8100-90278Hewlett-Packard 公司通告本文档包含的信息如有更改，恕不另行通知。

保留所有权利。

除版权法允许之外，未经惠普公司事先书面许可，不得对本手册进行复制、改编或翻译。

HP 产品与服务的唯一担保已在这些产品与服务随附的书面担保声明中阐明。

此处的任何信息将不会构成额外担保的制定。

HP 将不会对本文包含的技术或编辑错误或者疏忽负责。

Adobe 和 Acrobat 徽标 是 AdobeSystems Incorporated 的商标。

Corporation 或其子公司在美国及其他国家/地区的商标或注册商标。

®®Windows®、Windows NT®、Windows Me®、Windows XP® 和Windows 2000® 是 MicrosoftCorporation 在美国的注册商标。

Intel® 和 Pentium® 是 IntelEnergy Star® 和 Energy Star 徽标® 是美国环保署在美国的注册商标。

目录1HP All-in-One 概述 (2)HP All-in-One 总览 (2)控制面板功能 (3)使用 HP Photosmart 软件 (5)查找更多信息 (5)访问屏幕帮助 (6)放入原件和纸张 (6)避免卡纸 (9)复印 (9)扫描图像 (10)打印 10 × 15 厘米（4 × 6 英寸）的照片 (10)从软件程序中打印 (12)更换墨盒 (12)清洁 HP All-in-One (15)2疑难排解和支持 (17)卸载并重新安装软件 (17)硬件安装问题疑难排解 (18)清除卡纸 (20)墨盒疑难排解 (21)在给 HP 客户支持中心打电话之前 (22)3技术信息 (24)系统要求 (24)纸张规格 (24)打印规格 (24)复印规格 (25)扫描规格 (25)物理规格 (25)电源规格 (25)环境规格 (25)有声信息 (25)环保产品管理计划 (25)规范声明 (25)保修 (27)基础知识手册11HP All-in-One 概述使用 HP All-in-One 可以快速、轻松地完成各类任务，如复印、扫描文档或打印存储卡上的照片。

GP4100シリーズクイックガイド畫面製作．設定的“基礎＂祕笈給第一次使用Proface 的客戶們-GP4100系列快速操作指南3.4吋超・小型人機顯示器GP4100系列GP4100系列的介紹從下一頁，就讓我們開始來為您解說GP4100系列的＞＞那就一起來體驗看看囉！從下一頁，就讓我們開始來為您解說GP4100系列的畫面製作及設定方法。

GP4100系列的介紹＞2畫面製作軟體GP-Pro EX如何取得？＞3GP-Pro EX使用看看吧！＞4文字輸入及繪圖＞5製作開關･指示燈的圖案＞6製作數值顯示的畫面＞7可簡單一目瞭然掌握狀態的圖形化表現＞8利用訊息方式，警報碼一覽表顯示＞9-10在PC上確認製作畫面的動作（模擬）＞12將畫面傳輸至GP4100系列＞13安裝操作盤時的注意事項＞14-15GP4100系列商品一覽表＞15本機搭載B ×1編輯Through 本機搭載B ×1編輯Through 目次・USB Type A ×1・USB mini B ×1・序列埠×1※接續驅動程式，請參照網站上資訊按鍵上極小的文字，也能清晰按鍵上極小的文字，也能清晰值，值，本體搭載USB連接埠(Type A X 1)畫面本體搭載USB連接埠(Type A X 1)畫面畫面製作軟體GP-Pro EX如何取得？GP-Pro EX のインストール方法1. GP-Pro EX和傳輸工具的安裝起動安裝畫面後，會顯示設定選單。

點選[GP-Pro EX]後，就會開始安裝。

使用Limited Edition，不需要商品序號及驗證碼。

安裝GP-Pro EX之後，會自動開始進行安裝傳輸工具。

安裝傳輸工具之後，PC重新開機後，就能使用傳輸工具。

GP-Pro EX 使用看看吧！從GP-Pro EX 的主要視窗可以做所有的操作。

可以選擇作業項目。

可點選icon來製作畫面。

icon可以自由搭配。

在基本畫面範圍內繪圖，規劃Parts 。

M393-0154E总有机体碳测量仪TOC-4100操作说明书岛津制作室环境计测事业部1.前言首先，为您采用总有机体碳测量仪TOC-4100表示感谢。

TOC-4100是根据作为TOC测定法JIS*等方面广泛使用的“燃烧氧化—红外线分析法”原理，测定水中碳量的装置。

为能正确使用本装置，请在使用前仔细阅读本操作说明书，读后，请放在需要时随时可取的地方妥善保存。

※有关的JIS规格JIS K-0102 《工厂排水试验方法》JIS K-0805 《有机体碳（TOC）自动测量器》JIS K-0551 《超纯水中的有机体碳（TOC）试验方法》1.1使用上的注意事项使用本装置时，必须严格遵守下列注意事项。

1.1.1 运转时的注意事项1）电炉升温时，电炉中央部附近（燃烧管插入口附近）温度极高，绝对不要用手触摸。

<防止烫伤>2）电炉升温时，载气必须流通。

3）装置左侧面上连接排水出口的外部配管，尽量使用流量阻力小的配管，而且不要高于排水出口的位置。

用阻力大的配管会因排水不畅，造成装置内部溢出。

<防止部件腐蚀>1.1.2 维护检修时注意事项及其它1）装卸、更换燃烧管时，必须等到电炉温度降至室温以下再进行。

<防止烫伤>2）电炉未装燃烧管的状态下，电炉不要升温。

不得已升温时，试样注入口用部件（白色塑料部件），为避免受到来自炉心部（约680℃）的放射热而变形，应该先取下，或用石英等隔热材料将炉心部的孔盖住。

<防止部件损伤>3）安装连接8通阀和6通阀的各接头时，不能用手拧紧。

使用工具强拧紧时，内部的阀体会因力量过大而变形，造成阀内部修楼。

<防止损坏部件>4）往8通阀上连接配管，装卸试样管内部配管等，或驱动部分进行维修时，装置必须停止运转。

在运转时触摸或取下配管，会因驱动部突然发动而造成受伤，或从管内喷出液体。

<防止受伤，防止部件腐蚀>1.2规格TOC-4100测定项目：TC和NPOC（除去IC的TOC测定法）附加选购件可追加IC，TOC（＝TC－IC，=NPOC+POC）测定原理：燃烧催化剂氧化/CO2检测（NDIR）测定范围：0～5ppmf.s至0～1000ppmf.s（根据稀释功能，最大0～20000ppmf.s）重现性：±2％f.s以内/日（温度变化5℃以内时）零位稳定性：±2％f.s以内/周线性：±2％f.s以内测定周期：最短4天（NPOC）※1试样注入方式：注射泵，滑动式注入IC除去法：在注射器内酸性—通气处理试样稀释功能：在注射器内稀释，稀释率为2～20倍自动校正功能：1~2支（2支时，稀释用水作为零标准液使用）的标准液自动校正，附加选购件最大可使用6支标准液。

GP-4100 系列彩色型号安装指南NHA87720_08_CS3中文安全信息重要信息 (5)型号型号...............................................................7全球代码.. (7)概述装箱物品...........................................................8关于本手册 (8)部件标识与功能部件标识与功能 (9)规格电气规格..........................................................10环境规格. (10)接口接口注意..........................................................11串口.. (11)安装面板开孔尺寸......................................................15安装需求..........................................................16安装过程. (18)接线接线 (24)连接至 USB 接口连接至 USB 接口...................................................29USB 电缆紧固夹. (30)使用产品前请务必阅读附页上的“警告/注意信息”。

RTC 电池组概述 (33)连接 RTC 电池组 (33)更换电池 (35)维护清洁此产品 (36)标准标准 (37)文中45中文安全信息重要信息注意在尝试安装、操作或维护设备之前，请仔细阅读下述说明并通过查看来熟悉设备。

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MIC4100/1100V Half Bridge MOSFET DriversMicrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • General DescriptionThe MIC4100/1 are high frequency, 100V Half Bridge MOSFET driver ICs featuring fast 30ns propagation delay times. The low-side and high-side gate drivers are independently controlled and matched to within 3ns typical. The MIC4100 has CMOS input thresholds, and the MIC4101 has TTL input thresholds. The MIC4100/1 include a high voltage internal diode that charges the high-side gate drive bootstrap capacitor.A robust, high-speed, and low power level shifter provides clean level transitions to the high side output. The robust operation of the MIC4100/1 ensures the outputs are not affected by supply glitches, HS ringing below ground, or HS slewing with high speed voltage transitions. Under-voltage protection is provided on both the low-side and high-side drivers.The MIC4100 is available in the SOIC-8L package with a junction operating range from –40°C to +125°C.Data sheets and support documentation can be found on Micrel’s web site at .Features• Bootstrap supply max voltage to 118V DC • Supply voltage up to 16V• Drives high- and low-side N-Channel MOSFETs with independent inputs• CMOS input thresholds (MIC4100) • TTL input thresholds (MIC4101) • On-chip bootstrap diode• Fast 30ns propagation times• Drives 1000pF load with 10ns rise and fall times • Low power consumption• Supply under-voltage protection• 3Ω pull up , 3Ω pull down output resistance • Space saving SOIC-8L package• –40°C to +125°C junction temperature rangeApplications• High voltage buck converters • Push-pull converters• Full- and half-bridge converters • Active clamp forward converters___________________________________________________________________________________________________________Typical Application9V to 16V Bias100V SupplyOrdering InformationPart NumberStandard Pb-Free Input Junction Temp. Range PackageMIC4100BM MIC4100YM CMOS –40° to +125°CSOIC-8LMIC4101BM MIC4101YM TTL –40° to +125°C SOIC-8L Pin ConfigurationVDD HB HO HSLOVSSLIHI SOIC-8L (M)Pin DescriptionPin Number Pin Name Pin Function1 VDD Positive Supply to lower gate drivers. Decouple this pin to VSS (Pin 7). Bootstrapdiode connected to HB (pin 2).2 HB High-Side Bootstrap supply. External bootstrap capacitor is required. Connectpositive side of bootstrap capacitor to this pin. Bootstrap diode is on-chip.3 HO High-Side Output. Connect to gate of High-Side power MOSFET.4 HS High-Side Source connection. Connect to source of High-Side power MOSFET.Connect negative side of bootstrap capacitor to this pin.5 HI High-Sideinput.6 LI Low-Sideinput.7 VSS Chip negative supply, generally will be ground.8 LO Low-Side Output. Connect to gate of Low-Side power MOSFET.Absolute Maximum Ratings(1)Supply Voltage (V DD, V HB – V HS)......................-0.3V to 18V Input Voltages (V LI, V HI).........................-0.3V to V DD + 0.3V Voltage on LO (V LO)..............................-0.3V to V DD + 0.3V Voltage on HO (V HO)......................V HS - 0.3V to V HB + 0.3V Voltage on HS (continuous)..............................-1V to 110V Voltage on HB.. (118V)Average Current in VDD to HB Diode.......................100mA Junction Temperature (T J)........................–55°C to +150°C Storage Temperature (T s)..........................-60°C to +150°C EDS Rating(3)..............................................................Note 3 Operating Ratings(2)Supply Voltage (V DD)........................................+9V to +16V Voltage on HS...................................................-1V to 100V Voltage on HS (repetitive transient)..................-5V to 105V HS Slew Rate............................................................50V/ns Voltage on HB...................................V HS + 8V to V HS + 16V and............................................V DD - 1V to V DD + 100V Junction Temperature (T J)........................–40°C to +125°C Junction Thermal ResistanceSOIC-8L(θJA)...................................................140°C/WElectrical Characteristics(4)V DD = V HB = 12V; V SS = V HS = 0V; No load on LO or HO; T A = 25°C; unless noted. Bold values indicate –40°C< T J < +125°C.Parameter SymbolCondition MinTypMaxUnits Supply CurrentV DD Quiescent Current I DD LI = HI = 0V 40150200µAV DD Operating Current I DDO f = 500kHz 2.5 3.4 mATotal HB Quiescent Current I HB LI = HI = 0V 25150200µATotal HB Operating Current I HBO f = 500kHz 1.4 2.53mAHB to V SS Current, Quiescent I HBS V HS = V HB = 110V 0.05 1 µA HB to V SS Current, Operating I HBSO f = 500kHz 10 µA Input Pins: MIC4100 (CMOS Input )Low Level Input Voltage Threshold V IL435.3VHigh Level Input Voltage Threshold V IH5.7 78VInput Voltage Hysteresis V IHYS0.4V Input Pulldown Resistance R I100 200 500 KΩInput Pins: MIC4101 (TTL)Low Level Input Voltage Threshold V IL0.8 1.5VHigh Level Input Voltage Threshold V IH1.52.2VInput Pulldown Resistance R I100 200 500 KΩParameter Symbol Condition Min Typ Max Units Under Voltage Protection V DD Rising Threshold V DDR 6.5 7.4 8.0 V V DD Threshold Hysteresis V DDH 0.5 VHB Rising Threshold V HBR6.07.08.0VHB Threshold HysteresisV HBH0.4 VBootstrap DiodeLow-Current Forward Voltage V DL I VDD-HB = 100µA 0.4 0.550.70 VHigh-Current Forward Voltage V DH I VDD-HB = 100mA 0.7 0.81.0 VDynamic ResistanceR DI VDD-HB = 100mA1.0 1.52.0 ΩLO Gate DriverLow Level Output Voltage V OLL I LO = 100mA0.22 0.30.4 VHigh Level Output Voltage V OHL I LO = -100mA, V OHL = V DD - V LO 0.25 0.30.45 VPeak Sink Current I OHL V LO = 0V 2 A Peak Source CurrentI OLLV LO = 12V2AHO Gate DriverLow Level Output Voltage V OLH I HO = 100mA0.22 0.30.4 VHigh Level Output Voltage V OHH I HO = -100mA, V OHH = V HB – V HO 0.25 0.30.45 VPeak Sink Current I OHH V HO = 0V 2 A Peak Source Current I OLHV HO = 12V2AParameter Symbol Condition Min Typ Max UnitsSwitching SpecificationsLower Turn-Off PropagationDelay (LI Falling to LO Falling) t LPHL(MIC4100) 27 45 ns Upper Turn-Off PropagationDelay (HI Falling to HO Falling) t HPHL(MIC4100) 27 45 ns Lower Turn-On PropagationDelay (LI Rising to LO Rising)t LPLH(MIC4100) 27 45 ns Upper Turn-On PropagationDelay (HI Rising to HO Rising) t HPLH(MIC4100) 27 45 ns Lower Turn-Off PropagationDelay (LI Falling to LO Falling) t LPHL(MIC4101) 31 55 ns Upper Turn-Off PropagationDelay (HI Falling to HO Falling) t HPHL(MIC4101) 31 55 ns Lower Turn-On PropagationDelay (LI Rising to LO Rising)t LPLH(MIC4101) 31 55 ns Upper Turn-On PropagationDelay (HI Rising to HO Rising) t HPLH(MIC4101) 3155 nsDelay Matching: Lower Turn-Onand Upper Turn-Offt MON3 810 nsDelay Matching: Lower Turn-Offand Upper Turn-On t MOFF3 810 nsEither Output Rise/Fall Timet RC , t FCC L = 1000pF10nsEither Output Rise/Fall Time(3V to 9V)t R , t FC L = 0.1µF0.4 0.60.8 µsMinimum Input Pulse Width thatChanges the Outputt PWNote 650 nsBootstrap Diode Turn-On orTurn-Off Timet BS10nsNotes:1. Exceeding the absolute maximum rating may damage the device.2. The device is not guaranteed to function outside its operating rating.3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k Ω in series with 100pF.4. Specification for packaged product only.5. All voltages relative to pin7, V SS unless otherwise specified6. Guaranteed by design. Not production tested.Timing DiagramsHI, L IHO,LOLIHILOHONote: All propagation delays are measured from the 50% voltage level.Typical CharacteristicsTypical Characteristics (cont.)Functional DiagramVVFigure 1. MIC4100 Functional Block DiagramFunctional DescriptionThe MIC4100 is a high voltage, non-inverting, dual MOSFET driver that is designed to independently drive both high-side and low-side N-Channel MOSFETs. The block diagram of the MIC4100 is shown in Figure 1.Both drivers contain an input buffer with hysteresis, a UVLO circuit and an output buffer. The high-side output buffer includes a high speed level-shifting circuit that is referenced to the HS pin. An internal diode is used as part of a bootstrap circuit to provide the drive voltage for the high-side output.Startup and UVLOThe UVLO circuit forces the driver output low until the supply voltage exceeds the UVLO threshold. The low-side UVLO circuit monitors the voltage between the VDD and VSS pins. The high-side UVLO circuit monitors the voltage between the HB and HS pins. Hysteresis in the UVLO circuit prevents noise and finite circuit impedance from causing chatter during turn-on.Input StageThe MIC4100 and MIC4101 have different input stages, which lets these parts cover a wide range of driver applications. Both the HI and LI pins are referenced to the VSS pin. The voltage state of the input signal does not change the quiescent current draw of the driver.The MIC4100 has a high impedance, CMOS compatible input range and is recommended for applications where the input signal is noisy or where the input signal swings the full range of voltage (from Vdd to Gnd). There is typically 400mV of hysteresis on the input pins throughout the VDD range. The hysteresis improves noise immunity and prevents input signals with slow rise times from falsely triggering the output. The threshold voltage of the MIC4100 varies proportionally with the VDD supply voltage.The amplitude of the input signal affects the VDD supply current. Vin voltages that are a diode drop less than the VDD supply voltage will cause an increase in the VDD pin current. The graph in Figure 2 shows the typical dependence between I VDD and Vin for Vdd=12V.Figure 2The MIC4101 has a TTL compatible input range and is recommended for use with inputs signals whose amplitude is less than the supply voltage. The threshold level is independent of the VDD supply voltage and there is no dependence between I VDD and the input signal amplitude with the MIC4101. This feature makes the MIC4101 an excellent level translator that will drive high threshold MOSFETs from a low voltage PWM IC.Low-Side DriverA block diagram of the low-side driver is shown in Figure3. The low-side driver is designed to drive a ground (Vss pin) referenced N-channel MOSFET. Low driver impedances allow the external MOSFET to be turned on and off quickly. The rail-to-rail drive capability of the output ensures a low Rdson from the external MOSFET.A high level applied to LI pin causes the upper driver fet to turn on and Vdd voltage is applied to the gate of the external MOSFET. A low level on the LI pin turns off the upper driver and turns on the low side driver to ground the gate of the external MOSFET.VddExternalFETFigure 3High-Side Driver and Bootstrap CircuitA block diagram of the high-side driver and bootstrap circuit is shown in Figure 4. This driver is designed to drive a floating N-channel MOSFET, whose source terminal is referenced to the HS pin.External FETC BFigure 4A low power, high speed, level shifting circuit isolates the low side (VSS pin) referenced circuitry from the high-side (HS pin) referenced driver. Power to the high-side driver and UVLO circuit is supplied by the bootstrap circuit while the voltage level of the HS pin is shifted high.The bootstrap circuit consists of an internal diode and external capacitor, C B . In a typical application, such as the synchronous buck converter shown in Figure 5, the HS pin is at ground potential while the low-side MOSFET is on. The internal diode allows capacitor C B to charge up to Vdd-Vd during this time (where Vd is the forward voltage drop of the internal diode). After the low-side MOSFET is turned off and the HO pin turns on, the voltage across capacitor C B is applied to the gate of the upper external MOSFET. As the upper MOSFET turns on, voltage on the HS pin rises with the source of the high-side MOSFET until it reaches Vin. As the HS and HB pin rise, the internal diode is reverse biased preventing capacitor C B from discharging.VoutFigure 5Application InformationPower Dissipation ConsiderationsPower dissipation in the driver can be separated into three areas:• Internal diode dissipation in the bootstrap circuit •Internal driver dissipation• Quiescent current dissipation used to supply theinternal logic and control functions. Bootstrap Circuit Power DissipationPower dissipation of the internal bootstrap diode primarily comes from the average charging current of the C B capacitor times the forward voltage drop of the diode. Secondary sources of diode power dissipation are the reverse leakage current and reverse recovery effects of the diode.The average current drawn by repeated charging of the high-side MOSFET is calculated by:frequencyswitching drive gate V at Charge Gate Total Q :where HB gate )(==×=S Sgate AVE F f f Q IThe average power dissipated by the forward voltage drop of the diode equals:dropvoltage forward Diode V :where F )(=×=FAVE F fwd V I PdiodeThe value of V F should be taken at the peak current through the diode, however, this current is difficult to calculate because of differences in source impedances. The peak current can either be measured or the value of V F at the average current can be used and will yield a good approximation of diode power dissipation.The reverse leakage current of the internal bootstrap diode is typically 11uA at a reverse voltage of 100V and 125C. Power dissipation due to reverse leakage is typically much less than 1mW and can be ignored.Reverse recovery time is the time required for the injected minority carriers to be swept away from the depletion region during turn-off of the diode. Power dissipation due to reverse recovery can be calculated by computing the average reverse current due to reverse recovery charge times the reverse voltage across the diode. The average reverse current and power dissipation due to reverse recovery can be estimated by:TimeRecovery Reverse t Current Recovery Reverse Peak I :where 5.0rr RRM )()(==×=×××=REVAVE RR RR S rr RRM AVE RR V I Pdiode f t I IThe total diode power dissipation is:RR fwd total Pdiode Pdiode Pdiode +=An optional external bootstrap diode may be used instead of the internal diode (Figure 6). An external diode may be useful if high gate charge MOSFETs are being driven and the power dissipation of the internal diode is contributing to excessive die temperatures. The voltage drop of the external diode must be less than the internal diode for this option to work. The reverse voltage across the diode will be equal to the input voltage minus the Vdd supply voltage. A 100V Schottky diode will work for most 72Vinput telecom applications. The above equations can be used to calculate power dissipation in the external diode, however, if the external diode has significant reverse leakage current, the power dissipated in that diode due to reverse leakage can be calculated as:supplypower the of frequency switching fs / t Cycle Duty D Voltage Reverse Diode V T and V at flow current Reverse I :where )1(ON REV J REV R =====−××=SREV R REV f D V I PdiodeThe on-time is the time the high-side switch is conducting. In most power supply topologies, the diode is reverse biased during the switching cycle off-time.HILIFigure 6Gate Driver Power DissipationPower dissipation in the output driver stage is mainly caused by charging and discharging the gate to source and gate to drain capacitance of the external MOSFET. Figure 7 shows a simplified equivalent circuit of the MIC4100 driving an external MOSFET.CBFigure 7 Dissipation during the external MOSFET Turn-On Energy from capacitor C B is used to charge up the input capacitance of the MOSFET (Cgd and Cgs). The energy delivered to the MOSFET is dissipated in the three resistive components, Ron, Rg and Rg_fet. Ron is the on resistance of the upper driver MOSFET in the MIC4100. Rg is the series resistor (if any) between the driver IC and the MOSFET. Rg_fet is the gate resistance of the MOSFET. Rg_fet is usually listed in the power MOSFET’s specifications. The ESR of capacitor C B and the resistance of the connecting etch can be ignored since they are muchless than Ron and Rg_fet.The effective capacitance of Cgd and Cgs is difficult to calculate since they vary non-linearly with Id, Vgs, and Vds. Fortunately, most power MOSFET specifications include a typical graph of total gate charge vs. Vgs. Figure 8 shows a typical gate charge curve for an arbitrary power MOSFET. This chart shows that for a gate voltage of 10V, the MOSFET requires about 23.5nC of charge. The energy dissipated by the resistive components of the gate drive circuit during turn-on is calculated as:MOSFETtheofecapacitancgatetotaltheisCissQg1/2EsoVCQbut221whereVVCissEgsgs××=×=××=1086420510152025Gate ChargeQ g -Total Gate Charge (nC)VGS-Gate-to-SourceVoltage(V)Figure 8The same energy is dissipated by Roff, Rg and Rg_fet when the driver IC turns the MOSFET off. Assuming Ron is approximately equal to Roff, the total energy and power dissipated by the resistive drive elements is:The power dissipated inside the MIC4100/1 is equal to the circuitdrive gate the of frequency switching the is fs MOSFET on the voltage source to gate the is Vgs Vgsat charge gate total the is Qg off and on MOSFET the switching by dissipated power the is P cycleswitching per dissipated energy the is E Qg Qg E driver driver dirver wherefs V P andV gs driver gs ××=×=ratio of Ron & Roff to the external resistive losses in Rg and Rg_fet. Letting Ron =Roff, the power dissipated in the MIC4100 due to driving the external MOSFET is:fetRg Rg Ron RonP Pdiss driverdrive _++=Supply Current Power Dissipations ipated by the MIC4100 due to supply Total power dissipation and Thermal Considerations s The die temperature may be calculated once the total Power is dissipated in the MIC4100 even if is there i nothing being driven. The supply current is drawn by the bias for the internal circuitry, the level shifting circuitry and shoot-through current in the output drivers. The supply current is proportional to operating frequency and the Vdd and Vhb voltages. The typical characteristic graphs show how supply current varies with switching frequency and supply voltage.The power diss current isIhb Vhb Idd Vdd Pdiss ply ×+×=supTotal power dissipation in the MIC4100 or MIC4101 i equal to the power dissipation caused by driving the external MOSFETs, the supply current and the internal bootstrap diode.total drive ply total Pdiode Pdiss Pdiss Pdiss ++=suppower dissipation is known.JA total A J Pdiss T T θ×+=C/W)(air ambient o junction t from resistance thermal the is θMIC4100/1the of n dissipatio power the is Pdiss C)( emperature junction t the is T mperature ambient te maximum the is T :JC total J A °°wherePropagation Delay and Delay Matching and other Timing ConsiderationsPropagation delay and signal timing is an important t only to minimize propagation time between the control e or a t is less than the minimum pulse width may ime required for the C B ed for both the low side (Vdd) and high side (HB) supply pins. These capacitors external consideration in a high performance power supply. The MIC4100 is designed no delay but to minimize the mismatch in delay between the high-side and low-side drivers. Fast propagation delay between the input and output drive waveform is desirable. It improves overcurrent protection by decreasing the response signal and the MOSFET gate drive. Minimizing propagation delay also minimizes phase shift errors in power supplies with wide bandwidth control loops.Many power supply topologies use two switching MOSFETs operating 180º out of phase from each other. These MOSFETs must not be on at the same tim short circuit will occur, causing high peak currents and higher power dissipation in the MOSFETs. The MIC4100 and MIC4101 output gate drivers are not designed with anti-shoot-through protection circuitry. The output drives signals simply follow the inputs. The power supply design must include timing delays (dead-time) between the input signals to prevent shoot-through. The MIC4100 & MIC4101 drivers specify delay matching between the two drivers to help improve power supply performance by reducing the amount of dead-time required between the input signals.Care must be taken to insure the input signal pulse width is greater than the minimum specified pulse width. An input signal tha result in no output pulse or an output pulse whose width is significantly less than the input.The maximum duty cycle (ratio of high side on-time to switching period) is controlled by the minimum pulse width of the low side and by the t capacitor to charge during the off-time. Adequate time must be allowed for the C B capacitor to charge up before the high-side driver is turned on.Decoupling and Bootstrap Capacitor SelectionDecoupling capacitors are requir supply the charge necessary to drive the MOSFETs as well as minimize the voltage ripple on these pins. The capacitor from HB to HS serves double duty by providing decoupling for the high-side circuitry as well as providing current to the high-side circuit while the high-side external MOSFET is on. Ceramic capacitors are recommended because of their low impedance and small size. Z5U type ceramic capacitor dielectrics are not recommended due to the large change in capacitance over temperature and voltage. A minimum value of 0.1uf is required for each of the capacitors, regardless of the MOSFETs being driven. Larger MOSFETs may require larger capacitance values for proper operation. The voltage rating of the capacitors depends on the supply voltage, ambient temperature and the voltage derating used for reliability. 25V rated X5R or X7R ceramicThe bypass he MOSFET. capacitors are recommended for most applications. The minimum capacitance value should be increased if low voltage capacitors are use since even good quality dielectric capacitors, such as X5R, will lose 40% to 70% of their capacitance value at the rated voltage.Placement of the decoupling capacitors is critical. The bypass capacitor for Vdd should be placed as close as possible between the Vdd and Vss pins.capacitor (C B ) for the HB supply pin must be located as close as possible between the HB and HS pins. The etch connections must be short, wide and direct. The use of a ground plane to minimize connection impedance is recommended. Refer to the section on layout and component placement for more information.The voltage on the bootstrap capacitor drops each time it delivers charge to turn on the MOSFET. The voltage drop depends on the gate charge required by t Most MOSFET specifications specify gate charge vs. Vgs voltage. Based on this information and a recommended ∆V HB of less than 0.1V, the minimum value of bootstrap capacitance is calculated as:pinHB at the drop Voltage ∆V V at Charge Gate Total Q :where HB HB gate ==∆≥HBgate B V Q CThe decoupling capacitor for the Vdd input may be calculated in with the same formula; however, the two capacitors are usually equal in value.pere peak currents round the current ust also keep HB Grounding, Component Placement and Circuit Layout Nanosecond switching speeds and am in and around the MIC4100 and MIC4101 drivers require proper placement and trace routing of all components.Improper placement may cause degraded noise immunity, false switching, excessive ringing or circuit latch-up.Figure 9 shows the critical current paths when the driver outputs go high and turn on the external MOSFETs. It also helps demonstrate the need for a low impedance g plane. Charge needed to turn-on the MOSFET gates comes from the decoupling capacitors C VDD and C B . Current in the low-side gate driver flows from C VDD through the internal driver, into the MOSFET gate and out the Source. The return connection back to the decoupling capacitor is made through the ground plane. Any inductance or resistance in the ground return path causes a voltage spike or ringing to appear on the source of the MOSFET. This voltage works against the gate drive voltage and can either slow down or turn off the MOSFET during the period where it should be turned on.Current in the high-side driver is sourced from capacitor C B and flows into the HB pin and out the HO pin, into the gate of the high side MOSFET. The return path for is from the source of the MOSFET and back to capacitor C B . The high-side circuit return path usually does not have a low impedance ground plane so the etch connections in this critical path should be short and wide to minimize parasitic inductance. As with the low-side circuit, impedance between the MOSFET source and the decoupling capacitor causes negative voltage feedback which fights the turn-on of the MOSFET.It is important to note that capacitor CB must be placed close to the HB and HS pins. This capacitor not only provides all the energy for turn-on but it m pin noise and ripple low for proper operation of the high-side drive circuitry.Low-side drive turn-onTurn-On Current PathsFigure 9Figure 10 shows the critical cu t paths when the driver o low and turn ernal MOSFETs. Short, w impedance connections are important during turn-off rren off the ext outputs g lo for the same reasons given in the turn-on explanation. Current flowing through the internal diode replenishes charge in the bootstrap capacitor, CB.Low-side drive turn-offTurn-Off Current PathsFigure 11 Figure 10The following circuit guidelines should be adhered to foroptimum circuit performance:1. The Vcc and HB bypass capacitors must beplaced close to the supply and ground pins. It iscritical that the etch length between the high sidedecoupling capacitor (C B) and the HB & HS pinsbe minimized to reduce lead inductance.2. A ground plane should be used to minimizeparasitic inductance and impedance of the returnpaths. The MIC4100 is capable of greater than 2Apeak currents and any impedance between theMIC4100, the decoupling capacitors and theexternal MOSFET will degrade the performance ofthe driver.3. Trace out the high di/dt and dv/dt paths, as shownin Figures 9 and 10 and minimize etch length andloop area for these connections. Minimizing theseparameters decreases the parasitic inductanceand the radiated EMI generated by fast rise andfall times.A typical layout of a synchronous Buck converter powerstage (Figure 11) is shown in Figure 12.。

KINTEX UltraScale开发平台用户手册ACKU040核心板2 / 24芯驿电子科技（上海）有限公司文档版本控制文档版本修改内容记录REV1.0创建文档目录文档版本控制 (2)一、ACKU040核心板 (4)(一)简介 (4)(二)FPGA芯片 (5)(三)DDR4 DRAM (5)(四)QSPI Flash (10)(五)时钟配置 (11)(六)LED灯 (12)(七)电源 (12)(八)结构图 (14)(九)连接器管脚定义 (14)3 / 244 / 24芯驿电子科技（上海）有限公司一、 ACKU040核心板(一) 简介ACKU040(核心板型号，下同)核心板，FPGA 芯片是基于XILINX 公司的XC7K325系列的XCKU040-2FFVA1156I 。

核心板使用了4片Micron 的1GB 的DDR4芯片MT40A512M16LY-062EIT,总的容量达4GB 。

另外核心板上也集成了2片128MBit 大小的QSPI FLASH ，用于启动存储配置和系统文件。

这款核心板的6个板对板连接器扩展出了359个IO ，其中BANK64和BANK65的104个IO 的电平是3.3V ，其它BANK 的IO 都是1.8V 。

另外核心板也扩展出了20对高速收发器GTH 接口。

对于需要大量IO 的用户，此核心板将是不错的选择。

而且IO连接部分，FPGA 芯片到接口之间走线做了等长和差分处理，并且核心板尺寸仅为80*60（mm ），对于二次开发来说，非常适合。

ACKU040核心板正面图5 / 24(二) FPGA 芯片核心板使用的是Xilinx 公司的KINTEX UltraSacale 芯片，型号为XCKU040-2FFVA1156I 。

速度等级为2，温度等级为工业级。

此型号为FFVA1156封装，1156个引脚，引脚间距为1.0mm 。

Xilinx KINTEX UltraSacale 的芯片命名规则如下图1-2-1所示：图1-2-1 KINTEX UltraSacale FPGA 型号命名规则定义其中FPGA 芯片XCKU040的主要参数如下所示：名称具体参数 逻辑单元Logic Cells 530,250 查找表(CLB LUTs) 242,400 触发器(CLB flip-flops) 484,800 Block RAM （Mb ）大小 21.1 DSP 处理单元（DSP Slices ）1,920 PCIe Gen3 x8 3GTH Transceiver20个，16.3Gb/s max速度等级 -2 温度等级工业级(三) DDR4 DRAM核心板上配有四片Micron(美光）的1GB 的DDR4芯片,型号为MT40A512M16LY-062EIT 。