CAT811LEUS-T中文资料
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Cambridge CMOS Sensorsis nowMember of theams GroupContact information:Headquarters:ams AGTobelbader Strasse 308141 Premstaetten, AustriaTel: +43 (0) 3136 500 0e-Mail: *****************Key Benefits∙Simple circuity fordetermining temperature ∙Cost effective andminimal PCB footprint∙Integrated MCU with ADC ∙I2C digital interface∙Optimised low-powermodes∙Compact 2.7x4.0 mm LGA package∙Proven technologyplatform∙On-board processing to reduce requirement onhost processor∙Fast time-to-market∙Extended battery life∙Reduced componentcount∙Suitable for small form factor designs∙Highly reliable solution Applications∙IAQ monitoring forSmarthome, Smartphonesand accessoriesVoltage Divider and ADCTo enable the NTC circuit a voltage divider circuit is constructed between the VDD, AUX and Sense pins. Refer to Figure 1 below.Figure 1 CCS811 NTC Voltage Divider CircuitThe CCS811 has an internal ADC that can measure the voltages at VDD, AUX and Sense, enabling the CCS811 to calculate the voltages across the Reference Resistor (R REF) and the NTC Resistor (R NTC).For optimal usage of ADC resolution, the value of RREF and the nominal value of RNTC should be approximately the same; the suggested value is 100kΩ.As temperature increases, RNTC decreases. This causes the voltage value sampled on the AUX signal to decrease. The opposite is true when temperature decreases, RNTC increases.Hardware Connection When NTC Is Not RequiredIf the system where the CCS811 is deployed uses another means of obtaining temperature, such as combined temperature and humidity sensor, or if temperature is not measured in the system, then there is no requirement to connect the AUX and Sense pins to the thermistor. There is also no requirement to connect the reference resistor between AUX and VDD. Pins 4 and 5 must still be connected together for normal operation.Determining Thermistor ResistanceThe CCS811 retrieves samples on the Sense and AUX ADCs concurrently, thus obtaining the two voltages, V REF and V NTC. This allows the user to determine the resistance of the NTC thermistor. The following proof using Ohm’s Law can be therefore be used to find the resistance, R NTC , of the NTC thermistor.Iref =VrefRrefIntc =VntcRntcAs Iref = IntcVref Rref =VntcRntcTℎerfore Rntc = Vntc ∗RrefVrefEquation 1 R NTC ProofThe CCS811 NTC mailbox (ID = 6) provides the application with the V REF and V NTC values sampled by the AUX and Sense pins respectively. The format of this data is shown in Table 2 NTC Mailbox Data Encoding.Table 2 NTC Mailbox Data EncodingBoth V REF and V NTC are in millivolts. As R REF is a discrete component with a known magnitude of resistance, and as the CCS811 has provided the V REF and V NTC values it is therefore very simple to determine the R NTC value. In the simplest case when V REF and V NTC are equal, R NTC is equal to R REF .EquationsUsing the Simplified Steinhart Equation to Determine TemperatureAfter determining the value of R REF the thermistor’s data sheet must be consulted in order to understand how this can be used to calculate the ambient temperature. The most common method for this is to use a simplified version of the Steinhart equation. In that case the data sheet will contain an equation of the form shown in Equation 2 Simplified Steinhart Equation.B=log(RRo) 1T−1ToEquation 2 Simplified Steinhart EquationThe equation contains a number of parameters that are found in the NTC thermistor’s data sheet. It also contains some parameters that the user must provide. These are described below in Table 3 Simplified Steinhart Equation Parameter Descriptions.Table 3 Simplified Steinhart Equation Parameter DescriptionsNote that B, T O and R O are constant values that can be found in the thermistor’s data sheet. Also observe that R is the resistance of the thermistor at the current temperature. This value is available to the application after reading the data in the CCS811 NTC mailbox and using Equation 1. Therefore the only unknown value is the temperature, T. This allows Equation 2 to be solved for T by rearranging as shown in Equation 3 Temperature Calculation.1 T =1To+1Blog(RRo)Equation 3 Temperature CalculationThe temperature can then be calculated in software as described in the subsequent sections.P a g e|4© Cambridge CMOS Sensors Ltd, Deanland House, Cowley Road, Cambridge, CB4 0DL, UKThe first step in calculating temperature is to perform a read to the NTC mailbox, this will look something similar to the following, adapt accordingly to the applications drivers and API:i2c_write(CCS_811_ADDRESS, NTC_REG, i2c_buff, size=0);i2c_read(CCS_811_ADDRESS, i2c_buff, size=4);The first I2C transaction is a setup write to the NTC mailbox (the argument NTC_REG has the value 6) with no data. This is followed by a 4 byte read, that access the NTC mailbox and stores these 4 bytes of data to a byte/character array called i2c_buff. Please see CC-000803 Programming and Interfacing Guide for more details on handling the CCS811 I2C interface and timing requirements.The V REF and V NTC in i2c_buff can then be passed to a function that implements Equation 1.#define RREF 100000rntc = calc_rntc((uint16_t)(i2c_buff[0]<<8 | i2c_buff[1]),(uint16_t)(i2c_buff[2]<<8 | i2c_buff[3]));uint32_t calc_rntc(uint16_t vref, uint16_t vntc){return (vntc * RREF / vref);}The value of RREF is the R O taken from the thermistors data sheet. As i2c_buff is an array of chars in this example it will have to be converted to 2x16 bit scalars in order to be passed to the function. It is recommended to do the shifting as this will work on both a big and little endian host processor.The returned rntc value can then be used to determine the temperature.Application Software Running on a CPU with Floating Point SupportIf the CPU running the application has floating point support and sufficient program memory for the floating point calculations and/or library functions then the c standard math library can be used to help implement Equation 3.An example is shown below:#define RNTC_25C 100000#define BCONSTANT 4250#define RNTC_TEMP 25double calc_temp_from_ntc(uint32_t rntc){double ntc_temp;ntc_temp = log((double)rntc / RNTC_25C); // 1ntc_temp /= BCONSTANT; // 2ntc_temp += 1.0 / (RNTC_TEMP + 273.15); // 3ntc_temp = 1.0 / ntc_temp; // 4ntc_temp -= 273.15; // 5return ntc_temp;}Recall Equation 3:1 T =1To+1Blog(RRo)The application developer can extract from thermistors data sheet the constant values in order to solve for temperature. RNTC_25C, BCONSTANT and RNTC_TEMP correspond to R O, B and T O respectively. These can then be written to a c header file used in the application software.Comments for each of the 5 steps in the software example above are as follows:1.Calculate log(R/R O) using the maths library, use the R NTC value calculated from Equation 12.Divide log(R/R O) by the thermistor’s B constant3.Add 1/T O to the interim result, the equation requires all temperatures are in Kelvin. Adding 273.15 toT O converts the value in the thermistor’s data sheet, normally 25o C (RNTC_TEMP), to Kelvin4.The result of 3 is the reciprocal of the temperature so this step yields the current temperature inKelvin5.Convert from Kelvin to o CApplication Software Running on a CPU With No Floating Point SupportIf the application CPU does not have floating point support or there is insufficient program memory available for the library and/or floating point calculations, then the temperature can be determined using linear interpolation between two point on the thermistor’s temperat ure versus resistance curve. Finding the two points can be done as follows:1.The thermistors data sheet can be consulted to find the resistance at various points on the graph,normally in increments of 5o C2.Pre-calculate the resistances at various temperatures required by the application in increments of x o C,where x is application specific.The application software can store the resistance values in an array or lookup table and use the resistance, R NTC calculated using Equation 1, as an input into the look up table. The look up operation must be programmed to return the two resistance points. Basically the goal is to determine which two resistance values R NTC lies between in the lookup mechanism used by the application. Then linear interpolation can then be used to determine a reasonably accurate temperature value.For example assuming that a 100kΩ therm istor has a resistance of 210k at 10o C and 270k at 5o C. Let’s also assume Equation 1 yielded a value of 222000Ωfor R NTC. The following can be used to approximate the temperature.1.The application must determine how many steps between the two points are required. Forexample assuming 100 steps then subtract the high and low resistance and divide by 100:step_size =(270000 – 210000) / 100 = 600Thus each 0.05o C increment in temperature corresponds to 600Ω decrease in resistance betweenthese 2 points2.Calculate how may steps R NTC is from the higher resistance:rntc_steps =(270000 – 222000) / step_size = 803.To avoid errors using integer types, use a few orders of magnitude greater: i.e. lower temp*1000(5x1000 = 5000). As each step is 50 milli o C (0.05x1000) the temperature is therefore:T = 5000 + rntc_steps∗50 = 9000,i.e.9 degrees Celsius.The temperature determined using the NTC thermistor circuit and the equations in the sections above can be used for temperature compensation on the CCS811.When writing the temperature to the ENV_DATA register it is necessary to also write the humidity. If the humidity is not known then the default value corresponding to 50% relative humidity must be written to ENV_DATA. For example if the temperature is 30o C and no RH data is available then the user must write four bytes as follows:0x64, 0x00, 0x6E, 0x00The first two bytes are the RH data in the format required by the CCS811 ENV_DATA register. The next two bytes are the temperature +25o C in the format required by ENV_DATA. Please consult the data sheet for more information. Additionally a full example of using ENV_DATA is available in application note CC-000803-AN Programming and Interfacing Guide.The contents of this document are subject to change without notice. Customers are advised to consult with Cambridge CMOS Sensors (CCS) Ltd sales representatives before ordering or considering the use of CCS devices where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded. CCS will not be responsible for damage arising from such use. As any devices operated at high temperature have inherently a certain rate of failure, it is therefore necessary to protect against injury, damage or loss from such failures by incorporating appropriate safety measuresAbbreviationsReferences。
MIL-S8TA8-Port 10/100/1000 BASE-T Unmanaged Switch User GuideRev. A22012-09-17Regulatory Approval- FCC Class A- UL 1950- CSA C22.2 No. 950- EN60950- CE- EN55022 Class A- EN55024Canadian EMI NoticeThis Class A digital apparatus meets all the requirements of the Canadian Interference-Causing Equipment Regulations.Cet appareil numerique de la classe A respecte toutes les exigences du Reglement sur le materiel brouilleur du Canada.European NoticeProducts with the CE Marking comply with both the EMC Directive (89/336/EEC) and the Low Voltage Directive (73/23/EEC) issued by the Commission of the European Community Compliance with these directives imply conformity to the following European Norms:EN55022 (CISPR 22) - Radio Frequency InterferenceEN61000-X - Electromagnetic ImmunityEN60950 (IEC950) - Product SafetyFive-Year Limited WarrantyTransition Networks warrants to the original consumer or purchaser that each of it's products,and all components thereof, will be free from defects in material and/or workmanship for aperiod of five years from the original factory shipment date. Any warranty hereunder isextended to the original consumer or purchaser and is not assignable.Transition Networks makes no express or implied warranties including, but not limited to, anyimplied warranty of merchantability or fitness for a particular purpose, except as expressly setforth in this warranty. In no event shall Transition Networks be liable for incidental orconsequential damages, costs, or expenses arising out of or in connection with theperformance of the product delivered hereunder. Transition Networks will in no case coverdamages arising out of the product being used in a negligent fashion or manner.TrademarksThe MiLAN logo and Transition Networks trademarks are registered trademarks of Transition Networks in the United States and/or other countries.To Contact Transition NetworksFor prompt response when calling for service information, have the following information ready:- Product serial number and revision- Date of purchase- Vendor or place of purchaseYou can reach Transition Networks technical support at:E-mail:**********************Telephone: +1.800.260.1312 x 200Fax: +1.952.941.2322Transition Networks6475 City West ParkwayEden Prairie, MN 55344United States of AmericaTelephone: +1.800.526.9267Fax: : +1.952.941.2322*******************© Copyright 2006 Transition NetworksThis equipment has been tested and found to comply with the limits for a class A device, pursuant to part 15 of the FCC rules. These limits are designed to provide reasonable protection against harmful interference in a commercial installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with instructions, may cause harmful interference on radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case, the user will be requires to correct the interference at the user’s own expense.Content Introduction (1)Features (1)Package Contents (2)Hardware Description (3)Physical Dimensions (3)Front Panel (3)LEDs Indicators (3)Rear Panel (4)Installation (6)Attaching Rubber Feet (6)Mounting on the Wall (6)Power On (7)Technical Specification (8)IntroductionThe 8-port 10/100/1000BASE-T Switch with Auto MDI/MDIX is an unmanaged multi-port Switch that can be used to build high-performance switched networks. This switch is a store-and-forward device that offers low latency for high-speed networking. The Switch is designed for the core of the network backbone computing environment to solve traffic block problems at SME (small, medium enterprise) businesses.The 8-port 10/100/1000BASE-T Switch features a “store-and-forward”switching technology. This allows the switch to auto-learn and store source addresses in an 8K-entry MAC address table.Features⏹Conforms to IEEE 802.3, 802.3u, 802.3ab and 802.3x⏹8 Gigabit copper SOHO switch, compact size with universal internalpower⏹Auto-MDIX on all ports⏹16 Gbps back-plane⏹ N-Way Auto-Negotiation⏹8K MAC address table⏹Back pressure half duplex⏹Flow control full duplex⏹ Store-and-Forward switching architecture⏹ 144Kbytes memory buffer⏹True non-blocking switching⏹Support 8Kbytes Jumbo Frame1Package ContentsUnpack the contents of the switch and verify them against the checklist below.⏹ 8-port Switch⏹Power Cord.⏹User Guide.8-port Switch Power Cord User manualPackage ContentCompare the contents of your switch package with the standard checklist above. If any item is missing or damaged, please contact your local dealerfor service.23Hardware DescriptionPhysical DimensionsThe physical dimensions of the Switch is 165mm x 100mm x 32.5 mm (L x W x H)Front PanelThe front panel of the 8-Port Gigabit switch consists of LED-indicators (100/1000, Link/Activity, Full duplex/Collision) for each Gigabit port and power LED-indicator for unit.RJ-45 Ports (Auto MDI/MDIX): 8 10/100/1000 N-way auto-sensing for 10Base-T, 100Base-TX or 1000Base-T connections. (In general, MDI means connecting to another Hub or Switch while MDIX means connecting to a workstation or PC. Therefore, Auto MDI/MDIX allows you to connect to another Switch or workstation without changing to non-crossover or crossover cabling.)LEDs IndicatorsThe LED Indicators gives real-time information of systematic operation status. The following table provides descriptions of LED status and their meaning.Green PowerOnOff Power is not connectedGreen The port is operating at the speed of 1000Mbps.Orange The port is operating at the speed of 100Mbps.Off No device attached or in 10Mbps modeGreen The port is connecting with the device.Blinking The port is receiving or transmitting data.Off Nodeviceattached.Orange The port is operating in Full-duplex mode.Blinking Packet collision occurred on this port.Off No device attached or in half-duplex mode. Rear PanelThe rear panel of the 8-port Gigabit Switch consists of 8 auto-negotiation 10/100/1000Mbps Ethernet RJ-45 connectors (support Automatic4MDI/MDIX function).RJ-45 Ports (Auto MDI/MDIX): 8 port auto-negotiation 10/100/1000 Mbps Ethernet RJ-45 connectors[Auto MDI/MDIX means that you can connect to another Switch or workstation without changing non-crossover or crossover cabling.]5InstallationThis section shows the installation procedures of the switch.Set the Switch on a sufficiently large flat space with a power outlet nearby.The surface where you put your Switch should be clean, smooth, level, and sturdy. Make sure there is enough clearance around the Switch to allow attachment of cables, power cord and air circulation.Attaching Rubber FeetA. Make sure mounting surface on the bottom of the Switch is grease anddust free.B. Remove adhesive backing from your Rubber Feet.C. Apply the Rubber Feet to each corner on the bottom of the Switch.These footpads can prevent the Switch from shock/vibration. Mounting on the WallThe switch can be mounted on the wall. The switch has two wallmountbrackets included in the package.Power OnConnect the cord of power to the power socket on the rear panel of the Switch. The other side of power cord connects to the power outlet. Check the power indicator on the upper panel to see if power is properly supplied.7Technical SpecificationThe following table provides the technical specification of 8-ports Gigabit Switch.IEEE 802.3 10BASE-T EthernetIEEE 802.3u 100BASE-TX Fast EthernetIEEE 802.3ab Gigabit EthernetIEEE 802.3x Flow Control and Back-pressureCSMA/CDStore-and-Forward switching architecture14,880 pps for 10Mbps148,800 pps for 100Mbps1,488,000 pps for 1000MbpsRJ-45; Auto-MDIX on all ports8K Mac address table144Kbytes memory bufferSupports 8Kbytes jumbo packet size16Gbps810BASE-T: 2-pair UTP/STP Cat. 3, 4, 5 cable EIA/TIA-568 100-ohm (100m)100BASE-TX: 2-pair UTP/STP CAT. 5 cable EIA/TIA-568 100-ohm (100m)Gigabit Copper: 4 pair UTP/STP CAT. 5 cable EIA/TIA 568 100-ohm (100M)Per port: 100/1000, Link/Activity, Full duplex/ CollisionPer unit: PowerAC 110~240V, 50/60Hz7.6 Watt (maximum)0℃ to 45℃ (32℉ to 113℉)-40℃ to 70℃ (-40℉ to 158℉)10% to 90% (Non-condensing)0% to 95% (Non-condensing)165mm x 100mm x 32.5mm (L x W x H) Compliance with FCC Class A, CE Compliance UL, cUL,CE/EN609509。
General DescriptionThe MAX811/MAX812 are low-power microprocessor (μP) supervisory circuits used to monitor power supplies in μP and digital systems. They provide excellent circuit reliability and low cost by eliminating external compo-nents and adjustments when used with 5Vpowered or 3V-powered circuits. The MAX811/MAX812 also provide a debounced manual reset input.These devices perform a single function: They assert a reset signal whenever the V CC supply voltage falls below a preset threshold, keeping it asserted for at least 140ms after V CC has risen above the reset threshold. The only difference between the two devices is that the MAX811 has an active-low RESET output (which is guaranteed to be in the correct state for V CC down to 1V), while the MAX812 has an active-high RESET output. The reset comparator is designed to ignore fast transients on V CC. Reset thresholds are available for operation with a variety of supply voltages.Low supply current makes the MAX811/MAX812 ideal for use in portable equipment. The devices come in a 4-pin SOT143 package.Applications●Computers●Controllers●Intelligent Instruments●Critical μP and μC Power Monitoring●Portable/Battery-Powered Equipment Benefits and Features●Integrated Voltage Monitor Increases SystemRobustness with Added Manual Reset•Precision Monitoring of 3V, 3.3V, and 5VPower-Supply Voltages•140ms Min Power-On-Reset Pulse Width•RESET Output (MAX811), RESET Output(MAX812)•Guaranteed Over Temperature•Guaranteed RESET Valid to V CC = 1V (MAX811)•Power-Supply Transient Immunity●Saves Board Space•No External Components•4-Pin SOT143 Package●Low Power Consumption Simplifies Power-SupplyRequirements•6μA Supply Current*This part offers a choice of five different reset threshold voltages. Select the letter corresponding to the desired nominal reset threshold voltage, and insert it into the blank to complete the part number.Devices are available in both leaded and lead(Pb)-free packaging. Specify lead-free by replacing “-T” with “+T” when ordering.RESET THRESHOLDSUFFIX VOLTAGE (V)L 4.63M 4.38T 3.08S 2.93R2.63PART*TEMP RANGE PIN-PACKAGEMAX811_EUS-T-40°C to +85°C 4 SOT143MAX812_EUS-T-40°C to +85°C 4 SOT1431243V CCMR(RESET) RESETGNDMAX811MAX812SOT143TOP VIEW( ) ARE FOR MAX812NOTE: SEE PACKAGE INFORMATION FOR MARKING INFORMATION. MAX811/MAX8124-Pin μP Voltage Monitorswith Manual Reset InputPin ConfigurationOrdering InformationClick here for production status of specific part numbers.19-0411; Rev 6; 5/18Terminal Voltage (with respect to GND)V CC.....................................................................-0.3V to 6.0V All Other Inputs .....................................-0.3V to (V CC + 0.3V) Input Current, V CC, MR......................................................20mA Output Current, RESET or RESET ....................................20mA Continuous Power Dissipation (T A = +70°C)SOT143 (derate 4mW/°C above +70°C) .....................320mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range ............................-65°C to +160°C Lead Temperature (soldering, 10sec) .............................+300°C(V CC = 5V for L/M versions, V CC = 3.3V for T/S versions, V CC = 3V for R version, T A = -40°C to +85°C, unless otherwise noted. Typical values are at T A = +25°C.) (Note 1)PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITSOperating Voltage Range V CC T A = 0°C to +70°C 1.0 5.5V T A = -40°C to +85°C 1.2Supply Current I CC MAX81_L/M, V CC = 5.5V, I OUT = 0615µA MAX81_R/S/T, V CC = 3.6V, I OUT = 0 2.710Reset Threshold V TH MAX81_LT A = +25°C 4.54 4.63 4.72V T A = -40°C to +85°C 4.50 4.75MAX81_MT A = +25°C 4.30 4.38 4.46T A = -40°C to +85°C 4.25 4.50MAX81_TT A = +25°C 3.03 3.08 3.14T A = -40°C to +85°C 3.00 3.15MAX81_ST A = +25°C 2.88 2.93 2.98T A = -40°C to +85°C 2.85 3.00MAX81_RT A = +25°C 2.58 2.63 2.68T A = -40°C to +85°C 2.55 2.70Reset Threshold Tempco30ppm/°CV CC to Reset Delay (Note 2)V OD = 125mV, MAX81_L/M40µs V OD = 125mV, MAX81_R/S/T20Reset Active Timeout Period t RP V CC = V TH(MAX)140560ms MR Minimum Pulse Width t MR10µs MR Glitch Immunity (Note 3)100ns MR to Reset PropagationDelay (Note 2)t MD0.5µsMR Input Threshold V IHV CC > V TH(MAX), MAX81_L/M2.3V V IL0.8V IHV CC > V TH(MAX), MAX81_R/S/T0.7 x V CCV IL0.25 x V CCMR Pull-Up Resistance102030kΩRESET Output Voltage (MAX812)V OH I SOURCE = 150µA, 1.8V < V CC < V TH(MIN)0.8 x V CCV V OLMAX812R/S/T only, I SINK = 1.2mA,V CC = V TH(MAX)0.3MAX812L/M only, I SINK = 3.2mA,V CC = V TH(MAX)0.4MAX811/MAX8124-Pin μP Voltage Monitorswith Manual Reset Input Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Electrical Characteristics。
三甲基氯化锡tmt衍生化特征离子三甲基氯化锡(TMT)衍生物是在有机合成中广泛应用的一类化合物,它们具有独特的结构和性质,可用于催化剂、材料科学和医药化学领域。
本文将重点介绍TMT衍生化特征离子的相关知识,包括其结构特点、合成方法、应用领域以及相关研究进展。
一、TMT衍生化特征离子的结构特点TMT衍生化特征离子通常是由TMT基团和其他官能团组成的化合物,其结构特点主要包括以下几个方面:1. TMT基团TMT基团的化学结构为R3SnCl(R为有机基团),由于其结构中含有Sn-Cl键,因此TMT基团在有机合成中具有良好的反应活性和催化活性。
2.其他官能团TMT衍生化特征离子通常还含有其他官能团,如羧酸基团、醇基团、酰胺基团等,这些官能团的存在使TMT衍生物在不同的化学环境中具有不同的反应特性和催化性能。
以上是TMT衍生化特征离子的结构特点,这些特点使得TMT衍生物在有机合成和材料科学领域具有广泛的应用前景。
二、TMT衍生化特征离子的合成方法TMT衍生化特征离子的合成方法多样,主要包括以下几种类型:1.从三甲基氯化锡出发最常见的合成方法是将三甲基氯化锡与相应的亲核试剂(如羧酸、醇、胺等)进行反应,可以得到相应的TMT衍生化特征离子。
2.从有机锡化合物出发有机锡化合物与亲核试剂反应也可得到TMT衍生化特征离子,这种方法尤其适用于含有有机锡基团的化合物。
3.其他合成方法除了以上两种合成方法外,还可以利用金属催化、还原反应等方法合成TMT衍生化特征离子,这些方法多样,适用范围广泛,能够满足不同需求。
以上是TMT衍生化特征离子的合成方法,这些方法为TMT衍生物的生产提供了多样化的选择,为其在不同领域的应用打下了坚实基础。
三、TMT衍生化特征离子的应用领域TMT衍生化特征离子具有良好的催化性能和反应活性,因此在有机合成、材料科学和医药化学领域有着广泛的应用,具体表现在以下几个方面:1.有机合成TMT衍生物可作为有机合成中的催化剂和中间体,广泛应用于碳-碳键形成反应、氧化反应、还原反应等多种有机合成反应中,为合成复杂有机分子提供了便利。
低电压复位检测器
■产品简介
HG811系列是一款具有电压检测功能的微处理器复位芯片,它带有使能控制端,用于监控微控制器或其他逻辑系统的电源电压。
它可以在上电掉电和节电情况下,或在电源电压低于预设的检测电压V th时,向系统提供复位信号。
同时,在上电或电源电压恢复到高于预设的检测电压V th时,或使能MR
�����电压由低电平变为高电平时,V RESET���������输出将延时T rp时间后输出变为高电平。
HG811系列芯片当输入电压低于检测电压V th时,V RESET
���������输出为低电平;当使能控制端MR�����电压为低电平时,V RESET
���������输出也为低电平。
应用简单,无需外部器件。
■产品特点
■ 产品用途
■ 封装形式和管脚定义功能
■ 型号选择
V th容差封装形式
+2.5%
■ 应用电路 ■ 上电复位时间
■ 极限参数
■ 电学特性
HG811 (Ta=25℃,除非特别指定)
■ 封装信息
重要声明:
华冠半导体保留未经通知更改所提供的产品和服务。
客户在订货前应获取最新的相关信息,并核实这些信息是否最新且完整的。
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过氧化氢酶(CAT)活性检测试剂盒说明书微量法货号:BC0205规格:100T/96S产品组成:使用前请认真核对试剂体积与瓶内体积是否一致,有疑问请及时联系吉至工作人员。
试剂名称规格保存条件提取液液体110mL×1瓶4℃保存试剂一液体30mL×1瓶4℃保存试剂二液体110μL×1瓶4℃保存溶液的配制:1、试剂二:液体置于试剂瓶内EP管中,使用前需先离心。
2、检测工作液的配制:A、使用96孔UV板,取试剂二25μL中加入5mL试剂一,充分混匀,作为工作液(约26T),现用现配;也可根据样本量按比例配制(提供一个15mL空瓶)。
B、使用微量石英比色皿,取试剂二25μL中加入6.5mL试剂一,充分混匀,作为工作液(约34T),现用现配;也可根据样本量按比例配制(提供一个15mL空瓶)。
产品说明:CAT(EC1.11.1.6)广泛存在于动物、植物、微生物和培养细胞中,是最主要的H2O2清除酶,在活性氧清除系统中具有重要作用。
H2O2在240nm下有特征吸收峰,CAT能够分解H2O2,使反应溶液240nm下的吸光度随反应时间而下降,根据吸光度的变化率可计算出CAT活性。
注意:实验之前建议选择2-3个预期差异大的样本做预实验。
如果样本吸光值不在测量范围内建议稀释或者增加样本量进行检测。
需自备的仪器和用品:紫外分光光度计/酶标仪、台式离心机、可调式移液器、微量石英比色皿/96孔(UV板)、研钵/匀浆器、冰和蒸馏水。
操作步骤:一、样本处理(可适当调整待测样本量,具体比例可以参考文献)1、细菌、细胞或组织样本的制备:a、细菌或培养细胞:收集细菌或细胞到离心管内,离心后弃上清;按照每500万细菌或细胞加入1mL提取液,超声波破碎细菌或细胞(功率200W,超声3s,间隔10s,重复30次);8000g4℃离心10min,取上清,置冰上待测。
b、组织:按照组织质量(g):称取约0.1g组织,加入1mL提取液进行冰浴匀浆。
INTRODUCING THE CURRENT PROBEThe Fluke 80i-110s is a clamp-on AC/DC Current Probe that reproduces current waveforms found in modern commercial and industrial power distribution sys-tems. The probe's performance is optimized for accurate reproduction of currents at line frequency and up to the 50th harmonic waveform. The 80i-110s is also compatible with any instrument capable of millivolt measurements. The Current Probe (shown in Figure 1) provides the following benefits:•Accurate AC, DC and AC+DC current measurements for Electrical, Electronic and Automotive applications.•Shielded for high noise immunity around electronic motor drives and ignition systems.•Wide measurement range from 50 milliamps to 100 amps, useful to 10 milliamps.•Jaw shaped for easy access to cramped spaces.•Safety-designed 600 volt insuIated BNC - compatible with Fluke ScopeMeter£test tools, Power Harmonic analyzers, and oscilloscopes.•Selectable output of 10 millivolts per 1 amp for the 100 A range, and 100 millivolts per 1 amp for the 10 A range.Figure 1.80i-110s AC/DC Current ProbeUSING THE CURRENT PROBE SAFELYATTENTIONCarefully read the following safety information before attempting to operate or service the Current Probe.•Never use the probe on circuits rated higher than 600V in Installation Category II (CAT II) or 300V in Installation Category III (CAT III). (See "Safety Specifications".) Use extreme caution when clamping around uninsulated conductors or bus bars.•Keep your fingers off the probe jaws.•Check the magnetic mating surfaces of the probe jaws; these should be free of dust, dirt, rust, and other foreign matter.•Do not use a probe that is cracked, damaged, or has a defective cable. Such probes should be made inoperative by taping the clamp shut to prevent operation.In this Users Manual, a WARNING identifies conditions and actions that pose haz-ard(s) to the user. A Caution identifies conditions and actions that may damage the current probe. International electrical symbols used are explained below.The 80i-110s is designed to meet the requirements of IEC Publication 1010 and oth-er safety standards (see "Safety Specifications"). Follow all warnings to ensure safe operation.Use of this equipment in a manner not specified herein may impair the protection provided by the equipment.DC - Direct Current Caution(see explanation in manual)AC - Alternating Current Equipment protected throughoutby DOUBLE INSULATION orREINFORCED INSULATIONEarthRecycling Conformit é Europ éenneELECTRICAL SPECIFICATIONSAll Electrical Specifications are valid at a temperature of 23 q C r 3 q C (73 q F r 5 q F).Current Ranges:0 to 10A dc or ac peak0 to 100A dc or ac peakOutput Signals:10A range:100 mV/A100A range:10 mV/AWorking voltage (Clamps jaws to Ground):600V ac rms on Installation Category II per IEC 1010-1 circuits.300V ac rms on Installation Category III per IEC 1010-1 circuits.Floating Voltage (Output cable and connector to Ground):600V ac rms on Installation Category II per IEC 1010-1 circuits.300V ac rms on Installation Category III per IEC 1010-1 circuits.Basic Accuracy (DC to 1kHz):Extended Accuracy:For other frequencies, refer to the appropriate input current range and add the error listed below to the "Basic Accuracy" error .Input Current (DC or AC peak)Error (after zero check)100 mV/A 10 mV/A0 to 10A 0 to 40A 40 to 80A 80 to 100A <3% of reading +50 mA --- -<4% of reading +50 mA <12% of reading +50 mA <15% of reading Frequency Additional Error100 mV/A 10 mV/A1 to 5 kHz 5 to 20 kHz >20 kHz 3%12%not specified 3%12%not specifiedInput Load Impedance (of host instrument):>1 M: in parallel with up to 100 pF.Useful Bandwidth (-3 dB):0 to 100 kHzRise or Fall Time:<4 P sec.Output noise level:10 mV/A typ. 480 P V pk-pk100 mV/A typ. 3 mV pk-pkMax. non destructive current:0 to 2 kHz140A peak2 to 10 kHz110A peak10 to 20 kHz70 A peak20 to 50 kHz30A peak50 to 100 kHz20A peakTemperature coefficient:2000 ppm/q C max. for temperature from 0 to 50 q C (32 to 132 q F)GENERAL SPECIFICATIONS Dimensions:67 x 231 x 36 mm (2.6 x 9.1 x 1.4 inches) Weight:330g (11.6 oz.), battery includedOutput Cable:1.6 meters (63 inches)Maximum Conductor Size:11.8 mm (.46 inch)Maximum Jaw Opening:12.5 mm (.49 inch)Temperature:operating: 0 to 50q C (32 to 122q F)nonoperating: -30 to 70q C (-22 to 158q F)Relative Humidity (Operating):0 to 85% (0 to 35q C; 32 to 95q F)0 to 45% (35 to 50q C; 95 to 122q F)Altitude:operating: 0 to 2000 meters (0 to 6560 feet)nonoperating: 0 to 12000 meters (0 to 40000 feet) Demagnetize Probe:Open and close the probe jaws several times。
ASM811SEUS-T中文资料ASM811, ASM812October 2003rev 1.04 Pin μP Voltage Supervisor with Manual ResetGeneral DescriptionThe ASM811/ASM812 are cost effective low power supervisors designed to monitor voltage levels of 3.0V, 3.3V and 5.0V power supplies in low-power microprocessor (μP),microcontroller (μC) and digital systems. They provide excellent reliability by eliminating external components and adjustments.A reset signal is issued if the power supply voltage drops below a preset reset threshold and is asserted for at least 140ms after the supply has risen above the reset threshold. The ASM811has an active-low output RESET that is guaranteed to be in the correct state for V CC down to 1.1V. The ASM812 has an active-high RESET output. The reset comparator is designed to ignore fast transients on V CC . A debounced manual reset input allows the user to manually reset the systems to bring them out of locked state.Low power consumption makes the ASM811/ASM812 ideal for use in portable and battery operated equipment. The ASM811/ASM812 are available in a compact 4-pin SOT-143 package and thus use minimal board space.Six voltage thresholds are available to support 3V to 5Vsystems:FeaturesNew 4.0V threshold option ?9μA supply currentMonitor 5V, 3.3V and 3V supplies ?Manual reset input140ms min. reset pulse width ?Guaranteed over temperature Active-low reset valid with 1.1V supply (ASM811)?Small 4-pin SOT-143 package ?No external componentsPower-supply transient-immune designRESET THRESHOLD Suffix Voltage L 4.63M 4.38J 4.00T 3.08S 2.93R2.63ApplicationsComputers and Controllers ?Embedded controllersPortable/Battery operated systems ?Intelligent instruments Wireless communication systems ?PDAs and handheld equipment ?Automotive systems ?Safety SystemsTypical Operating CircuitV CCV CCV CC μPRESET InputRESET(RESET)GNDGND(RESET)MRASM811, ASM812October 2003rev 1.0Pin Diagram:Block DiagramPin DescriptionPin #Pin Name FunctionASM811ASM81211GND Ground.2 -RESETRESET is asserted LOW if V CC falls below V TH and remains LOW for T RST after V CC exceeds the Threshold. In addition, RESET is active LOW as long as the manual reset is low.-2RESETRESET is asserted HIGH if V CC falls below V TH and remains HIGH for T RST after V CC exceeds the threshold. In addition, RESET is active HIGH as long as the manual reset is low.33MRManual Reset Input. A logic LOW on MR asserts reset. Reset remains active as long as MR is LOW and for T MRST after MR returns HIGH. The active low input has an internal 20k ? pull-up resistor. The input should be left open if not used. It can be driven by TTL or CMOS logic or shorted to ground by a switch.44V CCPower supply input voltage (3.0V, 3.3V, 5.0V)Detailed DescriptionA proper reset input enables a microprocessor /microcontroller to start in a known state. ASM811/812 assert reset to prevent code execution errors during power-up, power-down and brown-out conditions.Reset TimingThe reset signal is asserted- LOW for the ASM811 and HIGH for the ASM812- when the V CC supply voltage falls below the threshold trip voltage and remains asserted for 140ms minimum after the V CC has risen above the threshold.Manual Reset (MR) InputA logic low on MR assserts RESET LOW on the ASM811 and RESET HIGH on the ASM812. MR is internally pulled high through a 20k ? resistor and can be driven by TTL/CMOS gates or with open collector/drain outputs. MR can be left open if not used. MR may be connected to ground through a normally-open momentary switch without an external debounce circuit.A 0.1μF capacitor from MR to ground can be added for additional noise immunity.123SOT143ASM811(ASM812)GNDRESETV CC(RESET)4MR+-RESET Generator-+V CCRESET (RESET)GNDASM811(ASM812)4.38V 4.00V 3.08V 2.93V 2.63V4.38V 4.63V MR 20k ?V CCASM811, ASM812October 2003rev 1.0Reset Output OperationIn μP / μC systems it is important to have the processor and the system begin operation from a known state. A reset output to a processor is provided to prevent improper operation during power supply sequencing or low voltage brown-out conditions.The ASM811/812 are designed to monitor the system power supply voltages and issue a reset signal when the levels are out of range. RESET outputs are guaranteed to be active for V CC above 1.1V. When V CC exceeds the reset threshold, an internal timer keeps RESET active for the reset timeout period, after which RESET becomes inactive (HIGH for the ASM811 and LOW for the ASM812). If V CC drops below the reset threshold, RESET automatically becomes active.Alternatively, external circuitry oran operator can initiate this condition using the Manual Reset (MR) pin. MR can be left open if it is not used. MR can be driven by TTL/CMOS logic or even an external switch.Valid Reset with V CC under 1.1VTo ensure logic inputs connected to the ASM811 RESET pin are in a known state when V CC is under 1.1V, a 100k ? pull-down resistor at RESET is needed. The value is not critical.A 100k ? pull-up resistor to V CC is needed with the ASM812.Application InformationNegative VCC TransientsTypically short duration transients of 100mV amplitude and 20μs duration do not cause a false RESET. A 0.1μF capacitor at V CC increses transient immunity.Bidirectional Reset Pin InterfacingThe ASM811/812 can interface with μP / μC bi-directional reset pins by connecting a 4.7k ? resistor in series with the ASM811/812 reset output and the μP/μC bi-directional reset input pin.Power supplyBUFBuffered RESETV CCASM811GNDGNDRESET RESET InputμC or μP 4.7k ?Bi-directional I/O PinFigure 4: Bi-directional Reset Pin InterfaceMR V CCPower SupplyASM811RESET GND100k ?V CCPower SupplyASM812RESET GNDMRMR100k ?V CC5V 0V 5V 0V 5V 0VMRRESETRESETFigures 2 & 3: RESET valid with V CC under 1.1Vrev 1.0Absolute Maximum Ratings, Table 1:Absolute Maximum Ratings, Table 2:ParameterMin Max UnitsPin Terminal Voltage With Respect T o GroundV CC-0.3 6.0V RESET, RESET and MR-0.3V CC + 0.3V Input current at V CC and MR 20mA Output current: RESET, RESET 20mA Rate of Rise at V CC100V/μsNote: These are stress ratings only and the functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability.ParameterMinMax Units Power Dissipation (T A = 70°C)Derate SOT-143 4mW/°C above 70°C 320uW Operating temperature range -40105°C Storage temperature range-65160°C Lead temperature (Soldering, 10 sec)300°CNote: These are stress ratings only and the functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability.rev 1.0Electrical Characteristics:Unless otherwise noted, V CC is over the full voltage range, T A = -40°C to 105°C.Typical values at T A = 25°C, V CC = 5V for L/M/J devices, V CC = 3.3V for T/S devices and V CC = 3V for R devices.Symbol Parameter Conditions Min Typ Max UnitV CC Input Voltage RangeT A = 0°C to 70°CT A = -40°C to 105°C1.11.25.55.5VVI CC Supply Current (Unloaded)T A= -40°C to 85°CT A = -40°C to 85°CT A = 85°C to 105°CT A = 85°C to 105°CV CC < 5.5V, L/M/JV CC < 3.6V, R/S/TV CC < 5.5V, L/M/JV CC < 3.6V, R/S/T96.815102520μAV TH Reset Threshold L devicesT A = 25°CT A = -40°C to 85°C T A = 85°C to 105°C 4.564.504.404.634.704.754.86V M devicesT A = 25°CT A = -40°C to 85°C T A = 85°C to 105°C 4.314.254.164.384.454.504.56J devicesT A = 25°CT A = -40°C to 85°C T A = 85°C to 105°C 3.933.893.804.004.064.20T devicesT A = 25°CT A = -40°C to 85°C T A = 85°C to 105°C 3.043.002.923.083.113.153.23S devicesT A = 25°CT A = -40°C to 85°C T A = 85°C to 105°C 2.892.852.782.932.963.003.08R devicesT A = 25°CT A = -40°C to 85°C T A = 85°C to105°C 2.592.552.632.662.702.76TC VTH Reset Threshold Temp.Coefficient30ppm/°C V CC to Reset Delay V CC = V TH to (V TH - 125mV), 60μsReset Active Timeout PeriodT A = 0°C to 70°C140100240560840ms T A = -40°C to 105°Ct MR MR Minimum Pul se Width10μs Notes:1. Production testing done at TA = 25°C. Over-temperature specifications guaranteed by design only using six sigma design limits.2. RESET output is active LOW for the ASM811 and RESET output is active HIGH for the ASM812.3. Glitches of 100ns or less typically will not generate a reset pulse.rev 1.0MR Glitch Immunity Note 3100nst MD MR to RESET PropogationDelayNote 20.5μsV IHMR Input Threshold V CC > V TH (MAX),ASM811/812L/M/J2.3VV IL0.8V IHMR Input Threshold V CC > V TH (MAX),ASM811/812R/S/T0.77V CCVV IL0.25V CC MR Pullup Resistance102030k?V OL Low RESET Output Voltage(ASM811)V CC= V TH min., I SINK = 1.2mA, ASM811R/S/T0.30.40.3V V CC= V TH min., I SINK = 3.2mA,ASM811L/M/JV CC > 1.1V, I SINK = 50μAV OH High RESET Output Voltage(ASM811)V CC > V TH max., I SOURCE = 500μA, ASM811R/S/T0.8V CCV CC - 1.5V V CC > V TH max., I SOURCE = 800μA,ASM811L/M/JV OL Low RESET Output Voltage(ASM812)V CC= V TH max., I SINK = 1.2mA,ASM812R/S/T0.30.4V V CC= V TH max., I SINK = 3.2mA,ASM812L/M/JV OH High RESET Output Voltage(ASM812)1.8V < V CC < V TH min., I SOURCE = 150μA0.8V CC V T RST Active Reset Timeout Period V CC > V TH140240msec T MRST Manual Active Reset Time-out Period MR returns HIGH180msecSymbol Parameter Conditions Min Typ Max Unit Notes:1. Production testing done at TA = 25°C. Over-temperature specifications guaranteed by design only using six sigma design limits.2. RESET output is active LOW for the ASM811 and RESET output is active HIGH for the ASM812.3. Glitches of 100ns or less typically will not generate a reset pulse.rev 1.0Typical Operating CharacteristicsUnless otherwise noted, V CC is over the full voltage range, T A = -40°C to 105°C. Typical values at T A = 25°C, V CC = 5V for L/M/J devices, V CC = 3.3V for T/S devices and V CC = 3V for R devices.rev 1.0Package Dimensions:Plastic SOT-143 (4-Pin)Inches MillimetersMin Max Min MaxA0.0310.0470.787 1.194A10.0010.0050.0250.127 B0.0140.0220.3560.559 B10.0300.0380.7620.965 C0.00340.0060.0860.152 D0.1050.120 2.667 3.048 E0.0470.055 1.194 1.397 e0.0700.080 1.778 2.032 e10.0710.079 1.803 2.007 H0.0820.098 2.083 2.489 L0.0040.0120.1020.305E HeDAA1e CLa = 0° -8°Be1B1rev 1.0Ordering Information:Related Products:Part Number 1Reset Threshold (V)Temperature RangePin-PackagePackage Marking (XX Lot Code)ASM811 ACTIVE LOW RESETASM811LEUS-T 4.63-40°C to +105°C 4-SOT143SMXX ASM811MEUS-T 4.38-40°C to +105°C 4-SOT143SNXX ASM811JEUS-T 4.00-40°C to +105°C 4-SOT143SOXX ASM811TEUS-T 3.08-40°C to +105°C 4-SOT143SPXX ASM811SEUS-T 2.93-40°C to +105°C 4-SOT143SQXX ASM811REUS-T2.63-40°C to +105°C4-SOT143SRXXASM812 ACTIVE HIGH RESETASM812LEUS-T 4.63-40°C to +105°C 4-SOT143SSXX ASM812MEUS-T 4.38-40°C to +105°C 4-SOT143STXX ASM812JEUS-T 4.00-40°C to +105°C 4-SOT143SUXX ASM812TEUS-T 3.08-40°C to +105°C 4-SOT143SVXX ASM812SEUS-T 2.93-40°C to +105°C 4-SOT143SWXX ASM812REUS-T2.63-40°C to +105°C4-SOT143SXXXNotes:1. Tape and Reel packaging is indicated by the -T designation.ASM809ASM810ASM811ASM812Max Supply Current 15μA 15μA 15μA 15μA Package Pins 3344Manual RESET inputPackage TypeSOT - 23SOT - 23SOT - 143SOT - 143Active-HIGH RESET OutputActive-LOW RESET OutputAlliance Semiconductor Corporation 2575, Augustine Drive,Santa Clara, CA 95054Tel: 408 - 855 - 4900Fax: 408 - 855 - Copyright ? Alliance Semiconductor All Rights ReservedPart Number: ASM811, ASM812Document Version: v 1.0Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of theapplication or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.ASM811, ASM812。
SL811HSSL811HSEmbedded USB Host/Slave ControllerTABLE OF CONTENTS1.0 CONVENTIONS (4)2.0 DEFINITIONS (4)3.0 REFERENCES (4)4.0 INTRODUCTION (4)4.1 Block Diagram (4)4.2 SL811HS Host or Slave Mode Selection [Master/Slave Mode] (5)4.3 Features (5)4.4 Data Port, Microprocessor Interface (6)4.5 Interrupt Controller (6)4.6 Buffer Memory (6)4.7 PLL Clock Generator (6)4.8 USB Transceiver (8)5.0 SL811HS REGISTERS (8)5.1 Register Values on Power-up and Reset (9)5.2 USB Control Registers (9)5.3 SL811HS Control Registers (12)6.0 SL811HS AND SL811HST-AC PHYSICAL CONNECTIONS (16)6.1 SL811HS Physical Connections (16)6.2 SL811HST-AC Physical Connections (19)7.0 ELECTRICAL SPECIFICATIONS (22)7.1 Absolute Maximum Ratings (22)7.2 Recommended Operating Condition (22)7.3 External Clock Input Characteristics (X1) (22)7.4 DC Characteristics (23)7.5 USB Host Transceiver Characteristics (23)7.6 Bus Interface Timing Requirements (24)8.0 PACKAGE DIAGRAMS (28)LIST OF FIGURESFigure 4-1. SL811HS USB Host/Slave Controller Functional Block Diagram (5)Figure 4-2. Full-Speed 48-MHz Crystal Circuit (7)Figure 4-3. Optional 12-MHz Crystal Circuit (7)Figure 6-1. SL811HS USB Host/Slave Controller—Pin Layout (16)Figure 6-2. SL811HST-AC USB Host/Slave Controller Pin Layout (19)LIST OF TABLESTable 6-1. SL811HS Pin Assignments and Definitions (17)Table 6-2. SL811HST-AC Pin Assignments and Definitions (20)License AgreementUse of this document and the intellectual properties contained herein indicates acceptance of the following License Agreement. If you do not accept the terms of this License Agreement, do not use this document, or the associated intellectual properties, or any other material you received in association with this product, and return this document and the associated materials within fifteen (15) days to Cypress Semiconductor Corporation or (CY) or CY’s authorized distributor from whom you purchased the product.1.You can only legally obtain CY’s intellectual properties contained in this document through CY or its authorized distributors.2.You are granted a nontransferable license to use and to incorporate CY’s intellectual properties contained in this documentinto your product. The product may be either for your own use or for sale.3.You may not reverse-engineer the SL811HS or otherwise attempt to discover the designs of SL811HS.4.You may not assign, distribute, sell, transfer or disclose CY’s intellectual properties contained in this document to any otherperson or entity.5.This license terminates if you fail to comply with any of the provisions of this Agreement. You agree upon termination to destroythis document, stop using the intellectual properties contained in this document and any of its modification and incorporated or merged portions in any form, and destroy any unused SL811HS chips.Warranty Disclaimer and Limited LiabilityCypress (CY), hereafter referred to as the manufacturer, warrants that its products substantially conform to its specifications for a period of ninety (90) days from delivery as evidenced by the shipment records. The manufacturer's sole obligation and liability for breaching the foregoing warranty shall be to replace or correct the defective products so that it substantially conforms to its specifications. Any modification of the products by anyone other than the manufacturer voids the foregoing warranty. No other warranties are expressed and none shall be implied. The manufacturer makes no warrant for the use of its products. In order to minimize risks associated with customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. The manufacturer’s products are not designed, authorized, or warranted suitable for use in life-support devices or systems or other critical applications. The manufacturer specifically excludes any implied warranties of merchantability and fitness for a particular purpose unless prohibited by law. In no event shall the manufacturer's liability to you for damages hereunder for any cause whatsoever exceed the amount paid by you for the products. In no event will the manufacturer be liable for any loss of profits or other incidental or consequential damages arising out of the use or inability to use the product even if the manufacturer have been advised of the possibility of such damages.The manufacturer reserves the right to make changes at any time, without notice, to improve design or performance and supply the best product possible. The manufacturer assumes no responsibility for any errors that may appear in its technical document on the products nor does it make a commitment to update the information contained in its technical document. Nothing contained in the technical documents of the products shall be construed as a recommendation to use any products in violation of existing patents, copyrights or other rights of third parties. No license is granted by implication or otherwise under any patent, patent rights or other rights, of the manufacturer.1.0 Conventions1,2,3,4Numbers without annotations are decimals.Dh, 1Fh, 39h Hexadecimal numbers are followed by an “h.”0101b, 010101b Binary numbers are followed by a “b.”bRequest, n Words in italics indicate terms defined by USB Specification or by this Specification.2.0 DefinitionsUSB U niversal S erial B usSL811HS The SL811HS is a Cypress USB Host/Slave Controller, providing multiple functions on a single chip.This part is offered in both a 28-pin PLCC package (SL811HS) and a 48-pin TQFP package(SL811HST-AC). Throughout this document, “SL811HS” refers to both packages unless otherwisenoted.Note: This chip does not include CPU.SL11The SL11 is a Cypress USB Peripheral Device Controller, providing multiple functions on a single chip.This part is offered in both a 28-pin PLCC package (SL11) and a 48-pin TQFP package (SL11T-AC).Throughout this document, “SL11” refers to both packages unless otherwise noted.Note: This chip does not include a CPU.SL11H The SL11H is a Cypress USB Host/Slave Controller, providing multiple functions on a single chip. This part is offered in both a 28-Pin PLCC package (SL11H) and a 48-Pin TQFP package (SL11HT-AC).Throughout this document, “SL11H” refers to both packages unless otherwise noted.Note: This chip does not include CPU.LSB L east S ignificant B itMSB M ost S ignificant B itR/W R ead/W ritePLL P hase L ock L oopRAM R andom A ccess M emorySIE S erial I nterface E ngineACK Handshake packet indicates a positive acknowledgment.NAK Handshake packet indicating a negative acknowledgmentUSBD U niversal S erial B us D riverSOF S tart o f F rame is the first transaction in each frame. It allows endpoints to identify the start of the frame and synchronize internal endpoint clocks to the host.CRC C yclic R edundancy C heckHOST The host computer system on which the USB Host Controller is installed3.0 References[Ref 1] USB Specification 1.1: .4.0 Introduction4.1Block DiagramThe SL811HS is an Embedded USB Host/Slave Controller capable of communicate with either full-speed or low-speed USB peripherals. The SL811HS can interface to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification 1.1.The SL811HS USB Host/Slave Controller incorporates USB Serial Interface functionality along with internal full-/low-speed trans-ceivers. The SL811HS supports and operates in USB full-speed mode at 12 Mbps, or at low-speed 1.5-Mbps mode.The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. Inter-nally, the SL811HS contains a 256-byte RAM data buffer which is used for control registers and data buffer.The available package types offered are a 28-pin PLCC (SL811HS) and a 48-pin TQFP package (SL811HST-AC). Both packages operate at 3.3 VDC. The I/O interface logic is 5V-tolerant.4.2SL811HS Host or Slave Mode Selection [Master/Slave Mode]SL811HS can work in two modes —host or slave. For slave-mode operation and specification, please refer to the SL811S specification. This data sheet only covers host-mode operation.4.3Features•The only USB Host/Slave controller for embedded systems in the market with a standard microprocessor bus interface.•Supports both full-speed (12 Mbps) and low-speed (1.5 Mbps) USB transfer 4.3.1USB Specification Compliance •Conforms to USB Specification 1.14.3.2CPU Interface•Operates as a single USB host or slave under software control•Low-speed 1.5 Mbps, and full speed 12 Mbps, in both master and slave modes •Automatic detection of either low- or full-speed devices•8-bit bidirectional data, port I/O (DMA supported in slave mode) •On-chip SIE and USB transceivers •On-chip single root HUB support•256-byte internal SRAM buffer, ping-pong operation•Operates from 12- or 48-MHz crystal or oscillator (built-in DPLL)•5 V-tolerant interface•Suspend/resume, wake up, and low-power modes are supported •Auto-generation of SOF and CRC5/16•Auto-address increment mode, saves memory Read/Write cycles •Development kit including source code drivers is available •Backward-compatible with SL11H, both pin and functionality •3.3V power source, 0.35 micron CMOS technology•Available in both a 28-pin PLCC package (SL811HS) and a 48-pin TQFP package (SL811HST-AC).D+D-GENERATORUSB Root-HUB XCVRS4.4Data Port, Microprocessor InterfaceThe SL811HS microprocessor interface provides an 8-bit bidirectional data path along with appropriate control lines to interface to external processors or controllers. The control lines, Chip Select, Read and Write input strobes and a single address line, A0, along with the 8-bit data bus, support programmed I/O or memory mapped I/O designs.Access to memory and control register space is a simple two step process, requiring an address Write with A0 set = “0,” followed by a register/memory Read or Write cycle with address line A0 set = “1.”In addition, DMA bidirectional interface in slave mode is available with handshake signals such as DREQ, ACK, WR, RD, CS and INTR. Please refer to the SL811S spec.The SL811HS Write or Read operation terminates when either nWR or nCS goes inactive. For devices interfacing to the SL811HS, that deactivate the Chip Select nCS before the Write nWR, the data hold timing should be measured from the nCS and will be the same value as specified. Thus, both Intel − and Motorola-type CPUs can work easily with the SL811HS without any external glue logic requirements.4.5Interrupt ControllerThe SL811HS interrupt controller provides a single output signal (INTRQ) that can be activated by a number of events that may occur as result of USB activity. Control and status registers are provided to allow the user to select single or multiple events, which will generate an interrupt (assert INTRQ), and lets the user view interrupt status. The interrupts can be cleared by writing to the appropriate register (the Status Register at address 0x0d).4.6Buffer MemoryThe SL811HS contains 256 bytes of internal buffer memory. The first 16 bytes of memory represent control and status registers for programmed I/O operations. The remaining memory locations are used for data buffering (max. 240 Bytes).Access to the registers and data memory is through an external microprocessor, 8-bit data bus, in either of two addressing modes, indexed or, if used with multiplexed address/data bus interfaces, direct access. With indexed addressing, the address is first written to the device with the A0 address line LOW, then the following cycle with A0 address line HIGH is directed to the specified address. USB transactions are automatically routed to the memory buffer. Control registers are provided, so that pointers and block sizes in buffer memory can be can set up.4.6.1Auto Address Increment ModeThe SL811HS supports auto-increment mode for Read or Write Cycles, A0 mode. In A0 mode, the Micro Controller sets up the address only once. On any subsequent DATA Read or Write access, the internal address pointer will advance to the next DATA location.4.6.1.1For exampleWrite 0x10 to SL811HS in address cycle (A0 is set LOW)Write 0x55 to SL811HS in data cycle (A0 is set HIGH) -> Write 0x55 to location 0x10Write 0xaa to SL811HS in data cycle (A0 is set HIGH) -> Write 0xaa to location 0x11Write 0xbb to SL811HS in data cycle (A0 is set HIGH) -> Write 0xbb to location 0x12The advantage of auto address increment mode is that it reduces the number of SL811HS memory Read/Write cycles required to move data to/from the device. For example, transferring 64-bytes of data to/from SL811HS using auto increment mode, will reduce the number of cycles to 1 Address Write and 64 Read/Write Data cycles, compared to 64 Address Writes and 64 Data Cycles for Random Access.4.7PLL Clock GeneratorEither a 12-MHz or a 48-MHz external crystal can be used with the SL811HS. Two pins, X1 and X2, are provided to connect a low-cost crystal circuit to the device as shown in Figure 4-2 and Figure 4-3. If an external 48-MHz clock source is available in the application, it can be used instead of the crystal circuit by connecting the source directly to the X1 input pin. When a clock is used, the X2 pin is left unconnected.Figure 4-2. Full-Speed 48-MHz Crystal CircuitFigure 4-3. Optional 12-MHz Crystal CircuitNote:1.CM (Clock Mode) pin of the SL811HS should be tied to GND when 48-MHz Xtal circuit or 48-MHz clock source is used.4.7.1Typical Crystal RequirementsThe following are examples of “typical requirements”. Please note that these specifications are generally found as standard crystal values and are therefore less expensive than custom values. If crystals are used in series circuits, load capacitance is not applicable. Load capacitance of parallel circuits is a requirement.12-MHz Crystals:Frequency Tolerance:±100 ppm or betterOperating Temperature Range:0°C to 70°CFrequency:12 MHzFrequency Drift over Temperature:± 50 ppmESR (Series Resistance):60ΩLoad Capacitance:10 pF min.Shunt Capacitance:7 pF max.Drive Level:0.1–0.5 mWOperating Mode:fundamental48-MHz Crystals:Frequency Tolerance:±100 ppm or betterOperating Temperature Range:0°C to 70°CFrequency:48 MHzFrequency Drift over Temperature:± 50 ppmESR (Series Resistance):40 ΩLoad Capacitance:10 pF min.Shunt Capacitance:7 pF max.Drive Level:0.1–0.5 mWOperating Mode:third overtone4.8USB TransceiverThe SL811HS has a built in transceiver that meets USB Specification 1.1. The transceiver is capable of transmitting and receiving serial data at USB full speed (12 Mbits) and low speed (1.5 Mbits). The driver portion of the transceiver is differential while the receiver section is comprised of a differential receiver and two single-ended receivers. Internally, the transceiver interfaces to the Serial Interface Engine (SIE) logic. Externally, the transceiver connects to the physical layer of the USB.5.0 SL811HS RegistersOperation of the SL811HS is controlled through 16 internal registers. A portion of the internal RAM is devoted to the control register space, and access is through the microprocessor interface. The registers provide control and status information for transactions on the USB, microprocessor interface, and interrupts.Any Write to control register 0FH will enable the SL811HS full features bit. This is an internal bit of the SL811HS that enables additional features not supported by the SL11H. For SL11H hardware backward compatibility, this register should not be accessed.The table below shows the memory map and register mapping of both the SL11H and SL811HS. The SL11H is shown for users upgrading to the SL811HS.The registers in the SL811HS are divided into two major groups. The first group is referred to as USB Control registers. These registers enable and provide status for control of USB transactions and data flow. The second group of registers provides control and status for all other operations.5.1Register Values on Power-up and ResetThe following registers initialize to zero on power-up and reset:•USB-A/USB-B Host Control Register [00H, 08H] bit 0 only •Control Register 1 [05H]•USB Address Register [07H]•Current Data Set/Hardware Revision/SOF Counter LOW Register [0EH]All other registers power-up and reset in an unknown state and should be initialized by firmware.5.2USB Control RegistersCommunication and data flow on the USB uses the SL811HS ’s USB A-B Control Registers. The SL811HS can communicate with any USB Device functions and any specific endpoints via the USBA or USBB register sets.The USB A-B Host Control Registers can be used in a Ping-Pong arrangement to manage traffic on the USB. The USB Host Control Register also provides a means to interrupt an external CPU or Micro Controller when one of the USB protocol transac-tions is completed. The table above shows the two sets of USB Host Control Registers, the “A ” set and “B ” set. The two register sets allow for overlapped operation. When one set of parameters is being set up, the other is transferring. On completion of a transfer to an endpoint, the next operation will be controlled by the other register set.Note . On the SL11H, the USB-B set control registers are not used. The USB-B register set can be used only when SL811HS mode is enabled by initializing register 0FH.The SL811HS USB Host Control has two groups of five registers each, which map in the SL811HS memory space. These registers are defined in the following tables.Register Name SL11H and SL811HSSL11H (hex)AddressSL811HS (hex)AddressUSB-A Host Control Register 00H 00H USB-A Host Base Address 01H 01H USB-A Host Base Length02H 02H USB-A Host PID, Device Endpoint (Write)/USB Status (Read)03H 03H USB-A Host Device Address (Write)/Transfer Count (Read)04H 04H Control Register105H 05H Interrupt Enable Register 06H 06 H Reserved RegisterReserved Reserved USB-B Host Control Register Reserved 08H USB-B Host Base Address Reserved 09H USB-B Host Base LengthReserved 0AH USB-B Host PID, Device Endpoint (Write)/USB Status (Read)Reserved 0BH USB-B Host Device Address (Write)/Transfer Count (Read)Reserved 0CH Status Register0DH 0DH SOF Counter LOW (Write)/HW Revision Register (Read)0EH 0E H SOF Counter HIGH and Control Register2Reserved 0F H Memory Buffer10H-FFH10H-FFH•Bit 3 is reserved for future usage.•The SL811HS uses bit 5 to enable transfer of a data packet after a SOF packet is transmitted. When this bit set “1,” the next enabled packet will be sent after next SOF. If set = “0” the next packet is sent immediately if the SIE is free.•The SL811HS automatically generates preamble packets when bit 7 is set. This bit is only used to send packets to a low-speed device through a hub. To communicate to a full speed device, this bit is set to zero. For example, when SL811HS communicates to a low-speed device via the HUB:—SL811HS SIE should set to operate at 48 MHz, i.e., bit 5 of register 05H should be set = “0.”—Bit 6 of register 0FH should be set = “0,” set correct polarity of DATA+ and DATA – state for Full Speed.—Bit 7, Preamble Bit, should be set = “1” in Host Control register.•When SL811HS communicates directly to low-speed device:—SL811HS. Bit 5 of register 05H should be set = “1.”—Bit 6 of register 0FH should be set = “1,” DATA+ and DATA – polarity for low speed.—The state of bit 7 is ignored in this mode.5.2.3Example of SL811HS USB Packet TransferSL811HS memory set-up as shown:03h-04h Register will contain PID and Device endpoint and Device Address.10h-FFh USB Data as required.5.2.1SL811HS Host Control RegistersRegister Name SL11H and SL811HSL11H (hex)AddressSL811HS (hex)AddressUSB-A Host Control Register 00H 00H USB-A Host Base Address 01H 01H USB-A Host Base Length02H 02H USB-A Host PID, Device Endpoint (Write)/USB Status (Read)03H 03H USB-A Host Device Address (Write)/Transfer Count (Read)04H 04H USB-B Host Control Register Reserved 08H USB-B Host Base Address Reserved 09H USB-B Host Base LengthReserved 0AH USB-B Host PID, Device Endpoint (Write)/USB Status (Read)Reserved 0BH USB-B Host Device Address (Write)/Transfer Count (Read)Reserved0CH5.2.2USB-A/USB-B Host Control Registers [00H, 08H]Bit PositionBit Name Function0Arm Allows enabled transfers when set = “1.” Cleared to “0” when transfer is complete.1Enable When set = “1” allows transfers to this endpoint. When set “0” USB transactions are ignored. If Enable = “1” and Arm = '0' the endpoint will return NAKs to USB transmissions. 2Direction When set = “1” transmit to Host. When “0” receive from Host.3Reserved 4ISO When set to “1” allows Isochronous mode for this endpoint.5SOF “1” = Synchronize with the SOF transfer 6Data Toggle Bit “0” if DATA0, “1” if DATA1.7PreambleIf set = “1” a preamble token is transmitted prior to transfer of low-speed packet. If set =“0,” preamble generation is disabled.5.2.4SOF Packet GenerationThe SL811HS automatically computes CRC5 by hardware. No CRC or SOF is required to be generated by external firmware for SL811HS.5.2.5USB-A/USB-B Host Base Address [01H, 09H]The USB-A/USB-B Base Address is a Pointer to the SL811HS memory buffer location for USB reads and writes. When trans-ferring data OUT (Host to Device), the USB-A and USB-B can be set up prior to setting ARM on the USB-A or USB-B Host Control register. See the software implementation example.5.2.6USB-A/USB-B Host Base Length [02H, 0AH]The USB A/B host base register contains the maximum packet size to be transferred between the SL811HS and a slave USB peripheral. Essentially, this designates the largest packet size that can be transferred by the SL811HS. Base Length designates the size of data packet to be sent. For example, in Bulk mode the maximum packet length is 64 bytes. In ISO mode, the maximum packet length is 1023, since the SL811HS only has an 8-bit length; the maximum packet size for the ISO mode using the SL811HS is 255 – 16 bytes. When the Host Base Length register is set to zero, a Zero-Length packet will be transferred.5.2.7USB-A/USB-B Host PID, Device Endpoint (Write)/USB Status (Read) [03H, 0BH]This register has two modes. When read, this register provides packet status and it contains information relative to the last packet that has been received or transmitted. The register is defined as follows.Bit Position Bit Name Function0ACK Transmission Acknowledge1Error Error detected in transmission2Time-out Time-out occurred3Sequence Sequence Bit. “0” if DATA0, “1” if DATA14Setup“1” indicates Setup Packet5Overflow Overflow condition - maximum length exceeded during receives6NAK Slave returns NAK7STALL Slave set STALL bitWhen written, this register provides the PID and Endpoint information to the USB SIE engine to be used in the next transaction. All sixteen Endpoints can be addressed by the SL811HS.D7D6D5D4D3D2D1D0PID3PID2PID1PID0EP3EP2EP1EP0PID3-04-bit PID Field (See Table Below)EP3-04-bit Endpoint Value in Binary.PID TYPE D7-D4SETUP1101 (D Hex)IN1001 (9 Hex)OUT0001 (1 Hex)SOF0101 (5 Hex)PREAMBLE1100 (C Hex)NAK1010 (A Hex)STALL1110 (E Hex)DATA00011 (3 Hex)DATA11011 (B Hex)5.2.8USB-A/USB-B Host Transfer Count Register (Read), USB Address (Write) [04H, 0CH]This register has two functions. When read, this register contains the number of bytes left over (from “Length” field) after a packet is transferred. If an overflow condition occurs, i.e., the received packet from slave USB device was greater than the Length field specified, a bit is set in the Packet Status Register indicating the condition. When written, this register will contain the USB Device Address to which the Host wishes to communicate.D7D6D5D4D3D2D1D00DA6DA5DA4DA3DA2DA1DA0DA6-DA0Device address, up to 127 devices can be addressedDA7Reserved bit should be set zero.5.3SL811HS Control RegistersRegister Name SL11H and SL811H SL11H (hex) Address SL811HS (hex) Address Control Register105H05HInterrupt Enable Register 06H06 HReserved Register 07H07 HStatus Register0DH0DHSOF Counter LOW (Write)/HW Revision Register (Read)0EH0E HSOF Counter HIGH and Control Register2Reserved0F HMemory Buffer10H-FFH10H-FFH5.3.1Control Register 1, Address [05H]The Control Register 05H enables/disables USB transfer operation with control bits defined as follows.Bit Bit Name Function0SOF ena/dis“1” enable auto Hardware SOF generation, “0”= disable1Reserved2Reserved3USB Engine Reset USB Engine reset = “1.” Normal set “0”4J-K state force See the table below5USB Speed“0” set-up for full speed, “1” set-up LOW-SPEED6Suspend “1” enable, “0” = disable7Reserved•At power-up this register will be cleared to all zeros.•In the SL811HS, bit 0 is used to enable HW SOF auto-generation (bit 0 was not used in the SL11H).5.3.2J-K Programming States [bits 3 and 4 of Control Register 05H]The J-K force state control and USB Engine Reset bits can be used to generate USB reset condition on the USB. Forcing K-state can be used for Peripheral device remote wake-up, Resume and other modes. These two bits are set to zero on power-up.5.3.3Low-speed/Full Speed Modes [bit 5 Control Register 05H]The SL811HS is designed to communicate with either full or low-speed devices. At power-up bit 5 will be set LOW, i.e., for full speed. There are two cases when communicating with a low-speed device. When a low-speed device is connected directly to the SL811HS, bit 5 of Register 05H should be set to logic “1” and bit 6 of register 0FH, Output-Invert, needs to be set to “1” in order to change the polarity of D+ and D –. When a low-speed device is connected via a HUB to SL811HS, bit 5 of Register 05H should be set to logic “0” and bit 6 of register 0FH should be set to logic “0” in order to keep the polarity of D+ and D – for full speed. In addition, make sure that bit 7 of USB-A/USB-B Host Control Registers [00H, 08H] is set to “1.”5.3.4Low-power Modes [bit 6 Control Register 05H]When bit-6 (Suspend) is set to “1,” the power of the transmit transceiver will be turned off, the internal RAM will be in the suspend mode, and the internal clocks will be disabled. Note . Any activity on the USB bus (i.e., K-State, etc.) will resume normal operation.To resume normal operation from the CPU side, a data Write cycle (i.e., A0 set HIGH for a data Write cycle) should be done.5.3.5Interrupt Enable Register, Address [06H]The SL811HS provides an Interrupt Request Output, which can be activated on a number of conditions. The Interrupt Enable Register allows the user to select conditions that will result in an Interrupt being issued to an external CPU. A separate Interrupt Status Register is provided. It can be polled in order to determine those conditions that initiated the interrupt. (See Interrupt Status Register description.) When a bit is set to “1” the corresponding interrupt is enabled.•Bits 0–1 are used for the USB A/B controller interrupt.•Bit 4 is used to enable/disable the SOF timer. To utilize this bit function, bit 0 of register 05H must be enabled and the SOF counter registers 0EH and 0FH must be initialized.•Bit 5 is used to enable/disable the device inserted/removed interrupt.•When bit-6 of register 05H is set = “1,” bit 6 of this register enables the Resume Detect Interrupt. Otherwise, this bit is used to enable Device detection status as defined in the Interrupt Status Register bit definitions.Note:2.Force K-State for low speed.3.Force J-State for low speed.Bit 4Bit 3Function00Normal operating mode01Force USB Reset, D+ and D – are set LOW (SE0)10Force J-State, D+ set HIGH, D – set LOW [2]11Force K-State, D – set HIGH, D+ set LOW [3]Bit PositionBit Name Function0USB-A USB-A Done Interrupt 1USB-B USB-B Done Interrupt2Reserved 3Reserved 4SOF Timer 1 = Enable Interrupt on 1-ms SOF Timer 5Inserted/Removed Slave Insert/Remove Detection 6Device Detect/ResumeEnable Device Detect/Resume Interrupt。
CAT811, CAT8124-Pin Microprocessor Power Supply Supervisors FEATURESs Precision monitoring of+5.0 V (+/- 5%, +/- 10%, +/- 20%),+3.3 V (+/- 5%, +/ 10%),+3.0 V (+/- 10%) and+2.5 V (+/- 5%) power suppliess Offered in two output configurations: - CAT811: Active LOW reset- CAT812: Active HIGH resets Manual reset input s Direct replacements for the MAX811 and MAX812 in applications operating over the industrial temperature ranges Reset valid down to VCC= 1.0 Vs 6 µA power supply currents Power supply transient immunitys Compact 4-pin SOT143 packages Industrial temperature range: -40˚C to +85˚C© 2004 by Catalyst Semiconductor, Inc., Patent Pending Characteristics subject to change without notice Doc. No. 3005, Rev. PAPPLICATIONSs Computerss Serverss Laptopss Cable modemss Wireless communications s Embedded control systemss White goodss Power meterss Intelligent instrumentss PDAs and handheld equipmentDESCRIPTIONThe CAT811 and CAT812 are µP supervisory circuits that monitor power supplies in digital systems. The CAT811 and CAT812 are direct replacements for the MAX811 and MAX812 in applications operating over the industrial temperature range; both have a manual reset input.These devices generate a reset signal, which is asserted while the power supply voltage is below a preset threshold level and for at least 140 ms after the power supply level has risen above that level. The underlying floating gate technology, AE2(TM) used by Catalyst Semiconductor, makes it possible to offer any custom reset threshold value. Seven industry standard threshold levels are offered to support +5.0 V, +3.3 V, +3.0 V and +2.5 V systems.The CAT811 features a RESET push-pull output (active LOW) and the CAT812 features a RESET push-pull output (active HIGH).Fast transients on the power supply are ignored and the output is guaranteed to be in the correct state at V cc levels as low as 1.0 V.The CAT811/812 are fully specified over the industrial temperature range (-40˚C to 85˚C) and are available in a compact 4-pin SOT143 package.PIN CONFIGURATIONTHRESHOLD SUFFIX SELECTORNominal Threshold Threshold Suffix Voltage Designation4.63V L4.38V M4.00V J3.08V T2.93V S2.63V R2.32V ZHA L OG E N F REETML EA D F R E EGND V CCRESET12CAT811, CAT812Doc. No. 3005, Rev. PPatent PendingORDERING INFORMATIONInsert threshold suffix (L, M, J, T, S, R or Z) into the blank position. Example: CAT811LTBI-T for 4.63 V, and lead-free SOT143 package.TOP MARKINGWhere YM stands for Year and Month.re b m u N t r a P g n i r e d r O y t i r a l o P T E S E R e g a k c a P le e R r e p s t r a P T -S U E _118T A C l l u P -h s u P T E S E R 341T O S ,n i p -4k 301T -S U E _118T A C l l u P -h s u P T E S E R 341T O S ,n i p -4k 01T -I B T _118T A C l l u P -h s u P T E S E R n e e r G 341T O S ,n i p -4k 301T -I B T _118T A C l l u P -h s u P T E S E R ne e r G 341T O S ,n i p -4k 01T -S U E _218T A C T E S E R l l u P -h s u P 341T O S ,n i p -4k 301T -S U E _218T A C T E S E R l l u P -h s u P 341T O S ,n i p -4k 01T -I B T _218T A C l l u P -h s u P T E S E R ,n i p -4341T O S n e e r G k 301T -I B T _218T A C l l u P -h s u P TE S E R ,n i p -4341T O S ne e r G k01341T O S ne e r G 341T O S L 118T A C M Y M A M Y H D M 118T A C M Y N A M Y J D J 118T A C M Y Z A M Y K C T 118T A C M Y P A M Y L D S 118T A C M Y Q A M Y M D R 118T A C M Y R A M Y N D Z 118T A C M Y Y A M Y P C L 218T A C M Y S A M Y R D M 218T A C M Y T A M Y T D J 218T A C M Y U A M Y U D T 218T A C M Y V A M Y V D S 218T A C M Y W A M Y W D R 218T A C M Y X A M Y X D Z218T A C MY I C MY Y C3CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P4Doc. No. 3005, Rev. PPatent Pending5CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P6Doc. No. 3005, Rev. PPatent Pending7CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P8Doc. No. 3005, Rev. PPatent Pending9CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P10CAT811, CAT812Doc. No. 3005, Rev. PPatent PendingREVISION HISTORYDate Rev.Reason10/22/03L Updated Ordering Information 12/22/2003MUpdated FeaturesReplaced power-up reset timeout vs. temperature graph with updated oneRelaced VCC Transient Response graph with updated one3/22/04NUpdated Features Updated DescriptionUpdated Ordering Information Added Top MarkingsUpdated Absolute Maximum Ratings Updated Electrical Characteristics Updated Detailed Description3/25/2004OChanged Preliminary designation to Final Updated Top MarkingsUpdated Electrical Characteristics (Reset Active Timeout Period Max)Copyrights, Trademarks and PatentsTrademarks and registered trademarks of Catalyst Semiconductor include each of the following:DPP ™AE 2 ™Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents issued to Catalyst Semiconductor contact the Company ’s corporate office at 408.542.1000.CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a situation where personal injury or death may occur.Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate typical semiconductor applications and may not be complete.Publication #:3005Revison:P Issue date:3/25/04Type:FinalPatent Pending Catalyst Semiconductor, Inc.Corporate Headquarters1250 Borregas AvenueSunnyvale, CA 94089Phone: 408.542.1000Fax: 408.542.1200。
Meilun Cell Counting Kit-8细胞增殖及毒性检测试剂盒(CCK-8),增强型产品编号:MA0218规格:100T/ 500T/ 10000T/ 1000T/ 5000T产品内容产品简介Cell Counting Kit-8(简称CCK-8),是一种基于WST-8而广泛应用于细胞增殖和细胞毒性的快速、高灵敏度检测的试剂盒。
CCK-8试剂中含有WST-8(化学名:2-(2-甲氧基-4-硝基苯基)-3-(4-硝基苯基)-5-(2,4-二磺酸苯)-2H-四唑单钠盐)是一种类似于MTT 的化合物,它在电子耦合试剂1-甲氧基-5-甲基吩嗪鎓硫酸二甲酯(1-Methoxy PMS )存在条件下,可以被线粒体内的脱氢酶还原为具有高度水溶性的橙黄色甲瓒产物Formazan (参考图1),生成的Formazan 数量与活细胞的数量成正比。
因此可利用这一特性直接进行细胞增殖和毒性分析,细胞增殖越多越快,则颜色越深;细胞毒性越大,则颜色越浅。
图1. CCK-8检测原理图 (EC=electron coupling reagent ,即电子耦合试剂)CCK-8与以往的增殖/毒性测定试剂相比,具有明显优点(参考表1)。
美仑CCK-8试剂盒具有灵敏度高、反应时间短、线性范围宽、数据可靠、重现性好等特点,可以广泛应用于药物筛选、细胞增殖测定、细胞毒性测定、肿瘤药敏试验。
CCK-8增强型溶液 1 ml 5 ml 10 ml×10 10 ml×1 5 ml ×10说明书1 份1 份1 份1 份1 份表1. 增殖/毒性测定试剂的比较MTT法XTT法WST-1法CCK-8法甲瓒产物的水溶性差(需加有机溶剂溶解)好好好检测灵敏度高很高很高最高检测时间较长较短较短最短检测波长560-600nm 420-480nm 420-480nm 430-490nm细胞毒性高,细胞形态完全消失很低,细胞形态不变很低,细胞形态不变很低,细胞形态不变试剂稳定性一般较差一般很好批量样品检测可以非常适合非常适合非常适合便捷程度一般便捷便捷非常便捷操作步骤制作标准曲线(测定细胞具体数量时)1. 制备细胞悬液:细胞计数。
CAT811, CAT8124-Pin Microprocessor Power Supply Supervisors FEATURESs Precision monitoring of+5.0 V (+/- 5%, +/- 10%, +/- 20%),+3.3 V (+/- 5%, +/ 10%),+3.0 V (+/- 10%) and+2.5 V (+/- 5%) power suppliess Offered in two output configurations: - CAT811: Active LOW reset- CAT812: Active HIGH resets Manual reset input s Direct replacements for the MAX811 and MAX812 in applications operating over the industrial temperature ranges Reset valid down to VCC= 1.0 Vs 6 µA power supply currents Power supply transient immunitys Compact 4-pin SOT143 packages Industrial temperature range: -40˚C to +85˚C© 2004 by Catalyst Semiconductor, Inc., Patent Pending Characteristics subject to change without notice Doc. No. 3005, Rev. PAPPLICATIONSs Computerss Serverss Laptopss Cable modemss Wireless communications s Embedded control systemss White goodss Power meterss Intelligent instrumentss PDAs and handheld equipmentDESCRIPTIONThe CAT811 and CAT812 are µP supervisory circuits that monitor power supplies in digital systems. The CAT811 and CAT812 are direct replacements for the MAX811 and MAX812 in applications operating over the industrial temperature range; both have a manual reset input.These devices generate a reset signal, which is asserted while the power supply voltage is below a preset threshold level and for at least 140 ms after the power supply level has risen above that level. The underlying floating gate technology, AE2(TM) used by Catalyst Semiconductor, makes it possible to offer any custom reset threshold value. Seven industry standard threshold levels are offered to support +5.0 V, +3.3 V, +3.0 V and +2.5 V systems.The CAT811 features a RESET push-pull output (active LOW) and the CAT812 features a RESET push-pull output (active HIGH).Fast transients on the power supply are ignored and the output is guaranteed to be in the correct state at V cc levels as low as 1.0 V.The CAT811/812 are fully specified over the industrial temperature range (-40˚C to 85˚C) and are available in a compact 4-pin SOT143 package.PIN CONFIGURATIONTHRESHOLD SUFFIX SELECTORNominal Threshold Threshold Suffix Voltage Designation4.63V L4.38V M4.00V J3.08V T2.93V S2.63V R2.32V ZHA L OG E N F REETML EA D F R E EGND V CCRESET12CAT811, CAT812Doc. No. 3005, Rev. PPatent PendingORDERING INFORMATIONInsert threshold suffix (L, M, J, T, S, R or Z) into the blank position. Example: CAT811LTBI-T for 4.63 V, and lead-free SOT143 package.TOP MARKINGWhere YM stands for Year and Month.re b m u N t r a P g n i r e d r O y t i r a l o P T E S E R e g a k c a P le e R r e p s t r a P T -S U E _118T A C l l u P -h s u P T E S E R 341T O S ,n i p -4k 301T -S U E _118T A C l l u P -h s u P T E S E R 341T O S ,n i p -4k 01T -I B T _118T A C l l u P -h s u P T E S E R n e e r G 341T O S ,n i p -4k 301T -I B T _118T A C l l u P -h s u P T E S E R ne e r G 341T O S ,n i p -4k 01T -S U E _218T A C T E S E R l l u P -h s u P 341T O S ,n i p -4k 301T -S U E _218T A C T E S E R l l u P -h s u P 341T O S ,n i p -4k 01T -I B T _218T A C l l u P -h s u P T E S E R ,n i p -4341T O S n e e r G k 301T -I B T _218T A C l l u P -h s u P TE S E R ,n i p -4341T O S ne e r G k01341T O S ne e r G 341T O S L 118T A C M Y M A M Y H D M 118T A C M Y N A M Y J D J 118T A C M Y Z A M Y K C T 118T A C M Y P A M Y L D S 118T A C M Y Q A M Y M D R 118T A C M Y R A M Y N D Z 118T A C M Y Y A M Y P C L 218T A C M Y S A M Y R D M 218T A C M Y T A M Y T D J 218T A C M Y U A M Y U D T 218T A C M Y V A M Y V D S 218T A C M Y W A M Y W D R 218T A C M Y X A M Y X D Z218T A C MY I C MY Y C3CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P4Doc. No. 3005, Rev. PPatent Pending5CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P6Doc. No. 3005, Rev. PPatent Pending7CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P8Doc. No. 3005, Rev. PPatent Pending9CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P10CAT811, CAT812Doc. No. 3005, Rev. PPatent PendingREVISION HISTORYDate Rev.Reason10/22/03L Updated Ordering Information 12/22/2003MUpdated FeaturesReplaced power-up reset timeout vs. temperature graph with updated oneRelaced VCC Transient Response graph with updated one3/22/04NUpdated Features Updated DescriptionUpdated Ordering Information Added Top MarkingsUpdated Absolute Maximum Ratings Updated Electrical Characteristics Updated Detailed Description3/25/2004OChanged Preliminary designation to Final Updated Top MarkingsUpdated Electrical Characteristics (Reset Active Timeout Period Max)Copyrights, Trademarks and PatentsTrademarks and registered trademarks of Catalyst Semiconductor include each of the following:DPP ™AE 2 ™Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents issued to Catalyst Semiconductor contact the Company ’s corporate office at 408.542.1000.CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a situation where personal injury or death may occur.Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate typical semiconductor applications and may not be complete.Publication #:3005Revison:P Issue date:3/25/04Type:FinalPatent Pending Catalyst Semiconductor, Inc.Corporate Headquarters1250 Borregas AvenueSunnyvale, CA 94089Phone: 408.542.1000Fax: 408.542.1200 元器件交易网。
4脚微控制器电源监控电路-CAT811/812特性z对以下电源进行精密监控:+5.0V (+/- 5﹪, +/- 10﹪, +/- 20﹪),+3.3V (+/- 5﹪, +/- 10﹪),+3.0V (+/- 10﹪) 和+2.5V (+/- 5﹪)z提供2种输出配置:-CAT811:低有效复位-CAT812:高有效复位z手动复位输入z在工业级温度范围的应用中可直接代替MAX811和MAX812z Vcc低至1.0V时复位有效z6uA的电源电流z抗电源的瞬态干扰z紧凑的4脚SOT143封装z工业级温度范围:-40℃~+85℃应用z计算机z服务器z手提电脑z线调制解调器(Cable modem)z无线通信z嵌入式控制系统z白色家电z功率计z智能仪器z PDA和手持式设备描述CAT811和CAT812是微控制器监控电路,用来监控数字系统的电源。
在工业级温度范围的应用中可直接代替MAX811和MAX812。
CAT811和CAT812都含有手动复位输入管脚。
CAT811和CAT812产生一个复位信号,这个信号在电源电压低于预置的阈值时和电源电压上升到该阈值后的140ms内有效。
由于Catalyst半导体运用了底层浮动闸(floating gate)技术AE2TM,因此器件可以提供任何特定的复位阈值。
7个工业标准的阈值可支持+5.0V、+3.3V、+3.0V和+2.5V的系统。
CAT811的RESET是推挽输出(低有效),CAT812的RESET也是推挽输出(高有效)。
电源的快速瞬态变化可忽略,当Vcc低至1.0V时输出可保证仍处于正确状态。
CAT811/812可工作在整个工业级温度范围内(-40℃~+85℃),包含4脚SOT143的封装形式。
阈值后缀选择器指定阈值电压阈值后缀名称4.63V L4.38V M4.00V J3.08V T2.93V S2.63V R2.32V Z管脚配置订购信息在器件型号的空白处插入后缀(L, M, J, T, S, R或Z)。
CAT811, CAT8124-Pin Microprocessor Power Supply Supervisors FEATURESs Precision monitoring of+5.0 V (+/- 5%, +/- 10%, +/- 20%),+3.3 V (+/- 5%, +/ 10%),+3.0 V (+/- 10%) and+2.5 V (+/- 5%) power suppliess Offered in two output configurations: - CAT811: Active LOW reset- CAT812: Active HIGH resets Manual reset input s Direct replacements for the MAX811 and MAX812 in applications operating over the industrial temperature ranges Reset valid down to VCC= 1.0 Vs 6 µA power supply currents Power supply transient immunitys Compact 4-pin SOT143 packages Industrial temperature range: -40˚C to +85˚C© 2004 by Catalyst Semiconductor, Inc., Patent Pending Characteristics subject to change without notice Doc. No. 3005, Rev. PAPPLICATIONSs Computerss Serverss Laptopss Cable modemss Wireless communications s Embedded control systemss White goodss Power meterss Intelligent instrumentss PDAs and handheld equipmentDESCRIPTIONThe CAT811 and CAT812 are µP supervisory circuits that monitor power supplies in digital systems. The CAT811 and CAT812 are direct replacements for the MAX811 and MAX812 in applications operating over the industrial temperature range; both have a manual reset input.These devices generate a reset signal, which is asserted while the power supply voltage is below a preset threshold level and for at least 140 ms after the power supply level has risen above that level. The underlying floating gate technology, AE2(TM) used by Catalyst Semiconductor, makes it possible to offer any custom reset threshold value. Seven industry standard threshold levels are offered to support +5.0 V, +3.3 V, +3.0 V and +2.5 V systems.The CAT811 features a RESET push-pull output (active LOW) and the CAT812 features a RESET push-pull output (active HIGH).Fast transients on the power supply are ignored and the output is guaranteed to be in the correct state at V cc levels as low as 1.0 V.The CAT811/812 are fully specified over the industrial temperature range (-40˚C to 85˚C) and are available in a compact 4-pin SOT143 package.PIN CONFIGURATIONTHRESHOLD SUFFIX SELECTORNominal Threshold Threshold Suffix Voltage Designation4.63V L4.38V M4.00V J3.08V T2.93V S2.63V R2.32V ZHA L OG E N F REETML EA D F R E EGND V CCRESET12CAT811, CAT812Doc. No. 3005, Rev. PPatent PendingORDERING INFORMATIONInsert threshold suffix (L, M, J, T, S, R or Z) into the blank position. Example: CAT811LTBI-T for 4.63 V, and lead-free SOT143 package.TOP MARKINGWhere YM stands for Year and Month.re b m u N t r a P g n i r e d r O y t i r a l o P T E S E R e g a k c a P le e R r e p s t r a P T -S U E _118T A C l l u P -h s u P T E S E R 341T O S ,n i p -4k 301T -S U E _118T A C l l u P -h s u P T E S E R 341T O S ,n i p -4k 01T -I B T _118T A C l l u P -h s u P T E S E R n e e r G 341T O S ,n i p -4k 301T -I B T _118T A C l l u P -h s u P T E S E R ne e r G 341T O S ,n i p -4k 01T -S U E _218T A C T E S E R l l u P -h s u P 341T O S ,n i p -4k 301T -S U E _218T A C T E S E R l l u P -h s u P 341T O S ,n i p -4k 01T -I B T _218T A C l l u P -h s u P T E S E R ,n i p -4341T O S n e e r G k 301T -I B T _218T A C l l u P -h s u P TE S E R ,n i p -4341T O S ne e r G k01341T O S ne e r G 341T O S L 118T A C M Y M A M Y H D M 118T A C M Y N A M Y J D J 118T A C M Y Z A M Y K C T 118T A C M Y P A M Y L D S 118T A C M Y Q A M Y M D R 118T A C M Y R A M Y N D Z 118T A C M Y Y A M Y P C L 218T A C M Y S A M Y R D M 218T A C M Y T A M Y T D J 218T A C M Y U A M Y U D T 218T A C M Y V A M Y V D S 218T A C M Y W A M Y W D R 218T A C M Y X A M Y X D Z218T A C MY I C MY Y C3CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P4Doc. No. 3005, Rev. PPatent Pending5CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P6Doc. No. 3005, Rev. PPatent Pending7CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P8Doc. No. 3005, Rev. PPatent Pending9CAT811, CAT812Patent PendingDoc. No. 3005, Rev. P10CAT811, CAT812Doc. No. 3005, Rev. PPatent PendingREVISION HISTORYDate Rev.Reason10/22/03L Updated Ordering Information 12/22/2003MUpdated FeaturesReplaced power-up reset timeout vs. temperature graph with updated oneRelaced VCC Transient Response graph with updated one3/22/04NUpdated Features Updated DescriptionUpdated Ordering Information Added Top MarkingsUpdated Absolute Maximum Ratings Updated Electrical Characteristics Updated Detailed Description3/25/2004OChanged Preliminary designation to Final Updated Top MarkingsUpdated Electrical Characteristics (Reset Active Timeout Period Max)Copyrights, Trademarks and PatentsTrademarks and registered trademarks of Catalyst Semiconductor include each of the following:DPP ™AE 2 ™Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents issued to Catalyst Semiconductor contact the Company ’s corporate office at 408.542.1000.CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a situation where personal injury or death may occur.Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate typical semiconductor applications and may not be complete.Publication #:3005Revison:P Issue date:3/25/04Type:FinalPatent Pending Catalyst Semiconductor, Inc.Corporate Headquarters1250 Borregas AvenueSunnyvale, CA 94089Phone: 408.542.1000Fax: 408.542.1200 元器件交易网。