LTC6401IUD-20TRPBF中文资料

66251270-EN - V1.4 - 15/06/1616400 SeriesArt. 6488 - Installation instructionsArt. 6488 4.3" hands free colour display digital videophone

27mm191mm

111mm

BUS1BUS2GND12MGNDVACNO-DOL+DOLGND ALBALPT3PT267812354

ONSW1SW31234ONSW2

PT1

PT4

JP1Fig. 1 DESCRIPTIONAn intelligent hands free videophone using 4.3” full colour active matrix LCD monitor for VX2300.Including 4 buttons “service”, “privacy/bus relay activation”, “door-open/intercommunicating call” and “answer/camera recall” plus 3 LED’s for visual indication of all functions.Adjustments & programmable options: call tone volume on 3 levels (low, medium, high), picture hue, brightness and contrast, call tone melody, number of rings, privacy duration and address. Also includes a local bell function. The Art. 6488 is surface mount.

PUSH BUTTONS (FIG. 1)Service push button.When pressed it links internally the terminals “C” and “NO” on the connection terminals.

Absolute Maximum Ratings at Ta=25℃Values ParameterSymbolR G B Test Condition UnitMin1.603.900.41Typ.Luminous Flux1ΦvMax.3.408.470.99R :I F =25mAG :I F =30mA B :I F =15mA lmViewing Angle 2θ1/2Typ.130R :I F =25mA G :I F =30mA B :I F =15mA °Min618517455Typ.Dominant Wavelength2λdMax.629532465R :I F =25mA G :I F =30mA B :I F =15mAnmTyp.x0.68790.1317~0.21500.1555λd (Min)Typ.y0.31150.68900.0283Typ.x0.70550.0805~0.18250.1443Color Coordinateλd (Max)Typ.y 0.29400.78500.0461R :I F =25mAG :I F =30mA B :I F =15mAMinTyp.628523458Peak WavelengthλpMax.R :I F =25mAG :I F =30mA B :I F =15mAnmMin1.8 3.12.6Typ. 2.23.4 3.0Forward V oltage3V F Max.2.53.55 3.4R :I F =25mA G :I F =30mA B :I F =15mAVReverse Current I RMax.10V R =5VμA Spectrum Radiation Bandwidth∆λTyp.203322R :I F =25mAG :I F =30mA B :I F =15mAnmNote :1.Tolerance of Luminous Intensity +/-10%2.Tolerance of Dominant Wavelength +/-1nm3.Tolerance of Forward Voltage +/-0.1V4.Caution in ESD:Static Electricity and surge damages the LED.It is recommend to use a wrist band or anti-electrostatic glove when handling the LED.All devices,equipment and machinery must be properly grounded.5.CAS140B is the test standard for the chromaticity coordinates IV.Bin Code ListLuminous Spec.TableLuminous Flux (lm)I F :R=25mA,G=30mA,B=15mA Ranks Min.Max.W0 5.91 6.41W1 6.417.05W27.057.76W37.768.53W48.539.38Tolerance on each Luminous Intensity bin is +/-10%Color Ranks TableRanks Color bin limitsI F :R=25mA,G=30mA,B=15mA Ranks Color bin limitsI F :R=25mA,G=30mA,B=15mA x 0.24310.25630.25630.2431x 0.25630.26940.26940.2563H4y 0.21420.21860.22740.2230J4y 0.21860.22300.23180.2274x 0.24310.25630.25630.2431x 0.25630.26940.26940.2563H5y 0.22290.22730.23610.2317J5y 0.22730.23170.24050.2361x 0.24310.25630.25630.2431x 0.25630.26940.26940.2563H6y 0.23170.23610.24480.2404J6y 0.23610.24050.24920.2448x 0.24310.25630.25630.2431x 0.25630.26940.26940.2563H7y 0.24040.24480.25360.2492J7y 0.24480.24920.25800.2536x 0.24310.25630.25630.2431x 0.25630.26940.26940.2563H8y 0.24920.25360.26230.2579J8y 0.25360.25800.26670.2623x 0.24310.25630.25630.2431x 0.25630.26940.26940.2563H9y 0.25790.26230.27110.2667J9y 0.26230.26670.27550.2711x 0.26940.28250.28250.2694x 0.28250.29560.29560.2825K4y 0.22300.22740.23610.2318L4y 0.22740.23170.24050.2361x 0.26940.28250.28250.2694x 0.28250.29560.29560.2825K5y 0.23170.23610.24480.2405L5y 0.23610.24040.24920.2448x 0.26940.28250.28250.2694x 0.28250.29560.29560.2825K6y 0.24050.24480.25360.2492L6y 0.24480.24920.25790.2536x 0.26940.28250.28250.2694x 0.28250.29560.29560.2825K7y 0.24920.25360.26230.2580L7y 0.25360.25790.26670.2623x 0.26940.28250.28250.2694x 0.28250.29560.29560.2825K8y 0.25800.26230.27110.2667L8y 0.26230.26670.27540.2711Bin Code ListColor Ranks TableRanks Color bin limitsI F :R=25mA,G=30mA,B=15mA Ranks Color bin limitsI F :R=25mA,G=30mA,B=15mA x 0.26940.28250.28250.2694x 0.28250.29560.29560.2825K9y 0.26670.27110.27980.2755L9y 0.27110.27540.28420.27980.29560.30870.30870.29560.30870.32180.32180.3087M40.23170.23610.24480.2405N40.23610.24040.24920.2449x 0.29560.30870.30870.2956x 0.30870.32180.32180.3087M5y 0.24040.24480.25350.2492N5y 0.24480.24910.25790.2536x 0.29560.30870.30870.2956x 0.32180.30870.30870.3218M6y 0.24920.25350.26230.2579N6y 0.25790.25360.26230.2666x 0.29560.30870.30870.2956x 0.30870.32180.32180.3087M7y 0.25790.26230.27100.2667N7y 0.26230.26660.27540.2711x 0.30870.29560.29560.3087x 0.32180.30870.30870.3218M8y 0.27100.26670.27540.2798N8y 0.27540.27110.27980.2841x 0.29560.30870.30870.2956x 0.30870.32180.32180.3087M9y 0.27540.27980.28850.2842N9y 0.27980.28410.29290.2886Tolerance on each Hue bin (x,y)bin is +/-0.01.C.I.E.1931Chromaticity DiagramH5H6H7H8H9J5J6J7J8J9K5K6K7K8K9L5L6L7L8L9M5M6M7M8M9N5N6N7N8N9H4J4K4L4M4N40.210.220.230.240.250.260.270.280.290.300.240.250.260.270.280.290.300.310.320.33X-coordinateY -c o o r d i n a t eShipping Label Code ListShipping Label CodeLuminous Flux RanksW0W1W2W3W4H 4A1B1C1D1E1H5A2B2C2D2E2H6A3B3C3D3E3H7A4B4C4D4E4H8A5B5C5D5E5H9A6B6C6D6E6J4A7B7C7D7E7J5A8B8C8D8E8J6A9B9C9D9E9J7A10B10C10D10E10J8A11B11C11D11E11J9A12B12C12D12E12K4A13B13C13D13E13K5A14B14C14D14E14K6A15B15C15D15E15K7A16B16C16D16E16K8A17B17C17D17E17K9A18B18C18D18E18L4A19B19C19D19E19L5A20B20C20D20E20L6A21B21C21D21E21L7A22B22C22D22E22L8A23B23C23D23E23L9A24B24C24D24E24M4A25B25C25D25E25M5A26B26C26D26E26M6A27B27C27D27E27M7A28B28C28D28E28M8A29B29C29D29E29M9A30B30C30D30E30N4A31B31C31D31E31N5A32B32C32D32E32N6A33B33C33D33E33N7A34B34C34D34E34N8A35B35C35D35E35C o l o r R a n k sN9A36B36C36D36E36CAUTIONS1.ApplicationThe LEDs described here are intended to be used for ordinary electronic equipment(such as officee q u i p m e n t,c o m m u n i c a t i o n e q u i p m e n t a n d h o u s e h o l d a p p l i c a t i o n s).C o n s u l t L i t e o n’s S a l e s in advance forinformation on applications in which exceptional reliability is required,particularly when the failure or malfunction of the LEDs may directly jeopardize life or health(such as in aviation,transportation,traffic control equipment,medical and life support systems and safety devices).2.StorageThis product is qualified as Moisture sensitive Level3per JEDEC J-STD-020Precaution when handing this moisture sensitive product is important to ensure the reliability of the product.The package is sealed:The LEDs should be stored at30°C or less and90%RH or less.And the LEDs are limited to use within one year,while the LEDs is packed in moisture-proof package with the desiccants inside.The package is opened:The LEDs should be stored at30°C or less and60%RH or less.Moreover,the LEDs are limited tosolder process within168hrs.If the Humidity Indicator shows the pink color in10%even higher or exceed the storage limiting time since opened,that we recommended to baking LEDs at60°C at least 48hrs.To seal the remainder LEDs return to package,it’s recommended to be with workabledesiccants in original package.3.CleaningUse alcohol-based cleaning solvents such as isopropyl alcohol to clean the LED if necessary.4.SolderingRecommended soldering conditions:Reflow soldering Soldering ironPre-heatPre-heat time Soldering Temp. Soldering time 120~150°C120sec.Max.260°C Max.30sec.Max.TemperatureSoldering time300°C Max.3sec.Max.(one time only)5.Drive MethodAn LED is a current-operated device.In order to ensure intensity uniformity on multiple LEDs connected in parallel in an application,it is recommended that a current limiting resistor be incorporated in the drive circuit,in series with each LED as shown in Circuit A below.Circuit model A Circuit model BLED LED(A)Recommended circuit.(B)The brightness of each LED might appear different due to the differences in the I-V characteristicsof those LEDs.6.ESD(Electrostatic Discharge)Static Electricity or power surge will damage the LED.Suggestions to prevent ESD damage:⏹Use of a conductive wrist band or anti-electrostatic glove when handling these LEDs.⏹All devices,equipment,and machinery must be properly grounded.⏹Work tables,storage racks,etc.should be properly grounded.⏹U s e i o n b l o w e r t o n e u t r a l i z e t h e s t a t i c c h a r g e w h i c h m i g h t h a v e b u i l t u p o n s u r f a c e o f t h e L E D’splastic lens as a result of friction between LEDs during storage and handling.ESD-damaged LEDs will exhibit abnormal characteristics such as high reverse leakage current,low forward Voltage,or“no light-up”at low currents.To verify for ESD damage,check for“light up”and Vf of the suspect LEDs at low currents.The Vf of“good”LEDs should be>2.0V@0.1mA for InGaN product.7.Reliability TestITEM TEST ITEM CONDITION DURATION SAMPLE SIZEP1Resistance to soldering heat(RTSH)JEITA ED-4701300301IR soldering according attachedlead free(Refer to J-STD-020D.1)10sec/3x3lots*30P2Temperature cycle(TC)-20~25~85'C/30min each(20mins trans)2500cycles3lots*30P3Steady state life test(SSLT)Ta=60'CIf(RGB)=25/30/15mA20000hrs3lots*30P4Pulse life test(PLT)Ta=60’CIf(RGB)=25/30/15mA20000hrs3lots*308.Suggested Checking ListTraining and Certification1.Everyone working in a static-safe area is ESD-certified?2.Training records kept and re-certification dates monitored?Static-Safe Workstation&Work Areas1.Static-safe workstation or work-areas have ESD signs?2.All surfaces and objects at all static-safe workstation and within1ft measure less than100V?3.All ionizer activated,positioned towards the units?4.Each work surface mats grounding is good?Personnel Grounding1.Every person(including visitors)handling ESD sensitive(ESDS)items wear wrist strap,heel strapor conductive shoes with conductive flooring?2.If conductive footwear used,conductive flooring also present where operator stand or walk?3.Garments,hairs or anything closer than1ft to ESD items measure less than100V*?4.Every wrist strap or heel strap/conductive shoes checked daily and result recorded for all DLs?5.All wrist strap or heel strap checkers calibration up to date?Note:*50V for Blue LED.Device Handling1.Every ESDS items identified by EIA-471labels on item or packaging?2.All ESDS items completely inside properly closed static-shielding containers when not at static-safeworkstation?3.No static charge generators(e.g.plastics)inside shielding containers with ESDS items?4.All flexible conductive and dissipative package materials inspected before reuse or recycle?Others1.Audit result reported to entity ESD control coordinator?2.Corrective action from previous audits completed?3.Are audit records complete and on file?Version Page Content of Change Date Record A1The package layout changed.2010/05/05B3,41.Red min.lumen spec modify from1.61to1.702.White min.lumen spec modify form6.32to6.41(Based onRed min lumen modify)3.Green max.Vf spec modify from3.6to3.552010/05/07C1,6,71.New design solder pin of lead frame modify.2.Typical electrical/optical characteristics curves modify.2010/07/13D3,4,5Luminous flux and color spec modify.2010/08/24E1,3,101.Add the dimensions of pick-up area.2.Green max.Vf spec modify from3.65to3.553.Duration time for RA test modify.(follow2K10)2010/10/22F6Add shipping label code list2010/12/08 G4,5,6Color spec modify2011/01/24。

Manufacturer: National InstrumentsBoard Assembly Part Numbers (Refer to Procedure 1 for identification procedure): Part Number and Revision Description191649A-01(L) or later PCI-6510190184A-01(L) or later PCI-6511190359A-01(L) or later PXI-6511190356A-02(L) or later PCI-6512190853A-02(L) or later PXI-6512190356A-01(L) or later PCI-6513190853A-01(L) or later PXI-6513189924A-02(L) or later PCI-6514190318A-02(L) or later PXI-6514189924A-01(L) or later PCI-6515190318A-01(L) or later PXI-6515191649A-02(L) or later PCI-6516191649A-03(L) or later PCI-6517191649A-04(L) or later PCI-6518191649A-05(L) or later PCI-6519192323A-01(L) or later PCI-6520192323A-02(L) or later PCI-6521192320A-01(L) or later PXI-6521Volatile MemoryTarget Data Type Size Backup1Accessible Accessible ProcedureEPM7032AEGlue Logic FPGA IntelEP1C3No No No Cycle Power Non-Volatile Memory (incl. Media Storage)Target Data Type Size BatteryBackupUserAccessibleSystemAccessibleSanitizationProcedureDevice configuration •Device information •FPGA bitstream •Output power-up states (except 6510/11) Flash 128 kB NoNoNoNoYesYesYesNoneNoneNone1 Refer to Terms and Definitions section for clarification of User and System AccessibleProceduresProcedure 1 – Board Assembly Part Number identification:To determine the Board Assembly Part Number and Revision, refer to the “P/N” label applied to the surface of your product as shown below. The Assembly Part Number should be formatted as “P/N: ######a-vvL” where “a” is the letter revision of the Board Assembly (eg. A, B, C…) and the “vv” is the type identifier. If the product is RoHS compliant, “L” can be found at the end of the part number.PCI-6510/16/17/18/19PCI-6511 PXI-6511PCI-6512/13 PXI-6512/13PCI-6514/15PXI-6514/15PCI-6520/21 (Bottom View)PXI-6521Terms and DefinitionsCycle Power:The process of completely removing power from the device and its components and allowing for adequate discharge. This process includes a complete shutdown of the PC and/or chassis containing the device; a reboot is not sufficient for the completion of this process.Volatile Memory:Requires power to maintain the stored information. When power is removed from this memory, its contents are lost. This type of memory typically contains application specific data such as capture waveforms.Non-Volatile Memory:Power is not required to maintain the stored information. Device retains its contents when power is removed.This type of memory typically contains information necessary to boot, configure, or calibrate the product or may include device power up states.User Accessible:The component is read and/or write addressable such that a user can store arbitrary information to the component from the host using a publicly distributed NI tool, such as a Driver API, the System Configuration API, or MAX. System Accessible:The component is read and/or write addressable from the host without the need to physically alter the product. Clearing:Per NIST Special Publication 800-88 Revision 1, “clearing” is a logical technique to sanitize data in all User Accessible storage locations for protection against simple non-invasive data recovery techniques using the same interface available to the user; typically applied through the standard read and write commands to the storage device.Sanitization:Per NIST Special Publication 800-88 Revision 1, “sanitization” is a process to render access to “Target Data” on the media infeasible for a given level of effort. In this document, clearing is the degree of sanitization described.。

芯片24C64中文资料I2C总线I2C总线（Inter Integrated Circuit内部集成电路总线）是两线式串行总线，仅需要时钟和数据两根线就能够进行数据传输，仅需要占用微处理器的2个IO引脚，使用时十分方便。

I2C总线还能够在同一总线上挂多个器件，每个器件能够有自己的器件地址，读写操作时需要先发送器件地址，该地址的器件得到确认后便执行相应的操作，而在同一总线上的其它器件不做响应，称之为器件寻址，那个原理就像我们打的原理相当。

I2C总线产生80年代，由PHLIPS公司开发，早期多用于音频和视频设备，现在I2C总线的器件和设备已多不胜数。

最常见的采纳I2C总线的EEPROM也已被广泛使用于各种家电、工业及通信设备中，要紧用于储存设备所需要的配置数据、采集数据及程序等。

生产I2C总线EEPROM的厂商专门多，如ATMEL、Microchip公司，它们差不多上以24来开头命名芯片型号，最常用确实是24C系列。

24C系列从24C01到24C512，C后面的数字代表该型号的芯片有多少K 的储备位。

如ATMEL的24C64，储备位是64K位，也确实是说能够储备8K（8192）字节，它支持1.8V到5V电源，能够擦写1百万次，数据能够保持100年，使用5V电源时时钟能够达到400KHz，同时有多种封装可供选择。

我们能够专门容易的在周围的电器设备中发觉它们的身影，如电视中用于储存频道信息，电脑内存条中储存内存大小等相关信息，汽车里用于储存里程信息等等。

图一确实是ATMEL24C64芯片的PID封装和用于内存条SPD(Serial Presence Detect)上的24芯片。

图1图2图二是ATMEL公司24C64的引脚定义图。

A0-A2用于设置芯片的器件地址，在同一总线上有多个器件时，能够通过设置A0-A2引脚来确定器件地址。

SDA是串行数据引脚，用于在芯片读写时输入或输出数据、地址等，那个引脚是双向引脚，它是漏极开路的，使用时需要加上一个上拉电阻。

HCPL-0601中⽂资料CAUTION: The small device geometries inherent to the design of this bipolar component increase the component's susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.Small Outline, 5 Lead, High CMR, High Speed, Logic Gate Optocouplers Technical DataHCPL-M600HCPL-M601HCPL-M611DescriptionThese small outline high CMR,high speed, logic gate optocoup-lers are single channel devices in a five lead miniature footprint.They are electrically equivalent to the following Agilentoptocouplers (except there is no output enable feature):SO-5 Package Standard DIP SO-8 Package HCPL-M6006N137HCPL-0600HCPL-M601HCPL-2601HCPL-0601HCPL-M611HCPL-2611HCPL-0611The SO-5 JEDEC registered (MO-155) package outline does not require “through holes” in a PCB.This package occupies approximately one fourth the footprint area of the standard dual-in-line package. The lead profile is designed to be com-patible with standard surface mount processes.The HCPL-M600/01/11 optically coupled gates combine a GaAsP light emitting diode and an integrated high gain photon detector. The output of thedetector I.C. is an Open-collectorSchottky-clamped transistor. The internal shield provides a guaranteed common modetransient immunity specification of 5,000 V/µs for the HCPL-M601,and 10,000 V/µs for the HCPL-M611.This unique design provides maximum ac and dc circuit isolation while achieving TTL compatibility. The optocoupler ac and dc operational parameters are guaranteed from -40°C to 85°C allowing trouble free system performance.FeaturesSurface MountableVery Small, Low Profile JEDEC Registered Package OutlineCompatible with Infrared Vapor Phase Reflow and Wave Soldering Processes Internal Shield for High Common Mode Rejection (CMR)HCPL-M601: 10,000 V/µs at V CM = 50 VHCPL-M611: 15,000 V/µs at V CM = 1000 VHigh Speed: 10 Mbd LSTTL/TTL Compatible Low Input Current Capability: 5 mAGuaranteed ac and dc Performance overTemperature: -40°C to 85°C ? Recognized under theComponent Program of U.L.(File No. E55361) forDielectric Withstand Proof Test Voltage of 2500 Vac, 1MinuteThe HCPL-M600/01/11 are suitable for high speed logic interfacing, input/outputbuffering, as line receivers in environments that conventionalline receivers cannot tolerate, and are recommended for use inextremely high ground or induced noise environments.Outline Drawing (JEDEC MO-155)ApplicationsIsolated Line Receiver Simplex/Multiplex Data TransmissionComputer-Peripheral InterfaceMicroprocessor System InterfaceDigital Isolation for A/D, D/A ConversionSwitching Power Supply Instrument Input/Output IsolationGround Loop Elimination Pulse Transformer ReplacementPin Location (for reference only)SchematicUSE OF A 0.1 µF BYPASS CAPACITOR MUST BE CONNECTED BETWEEN PINS 6 AND 4 (SEE NOTE 1). V CC V OGNDTRUTH TABLE (POSITIVE LOGIC)LEDONOFFOUTPUT L H65431V CCV OUT GNDANODE 0.71 (0.028)UNDERSIDE OF THE PACKAGEDIMENSIONS IN MILLIMETERS (INCHES) * MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006) Recommended Operating ConditionsParameterSymbol Min.Max.Units Input Current, Low Level I FL *0250µA Input Current, High Level I FH 515m A Supply Voltage, Output V CC 4.55.5V Fan Out (R L = 1 k ?)N 5TTLLoads Output Pull-Up Resistor R L 3304,000?Operating TemperatureT A-4085°C* The off condition can also be guaranteed by ensuring that V F (off) ≤ 0.8 volts.Absolute Maximum Ratings(No Derating Required up to 85°C)Storage Temperature....................................................-55°C to +125°C Operating Temperature ..................................................-40°C to +85°C Forward Input Current - I F (see Note 2).......................................20 mA Reverse Input Voltage - V R .................................................................5 V Supply Voltage - V CC (1 Minute Maximum)........................................7 V Output Collector Current - I O ........................................................50 mA Output Collector Power Dissipation .. (85)mW Output Collector Voltage - V O ............................................................7 V (Selection for higher output voltages up to 20 V is available)Infrared and Vapor Phase Reflow Temperature.......................see belowMaximum Solder Reflow Thermal Profile.(Note: Use of Non-Chlorine Activated Fluxes is Recommended.)240TIME – MINUTEST E M P E R A T U R E – °C220200180160140120100806040200260Insulation Related SpecificationsParameter Symbol Value Units ConditionsMin. External Air Gap L(IO1)≥5mm Measured from input terminals (Clearance)to output terminalsMin. External Tracking Path L(IO2)≥5mm Measured from input terminals (Creepage)to output terminalsMin. Internal Plastic Gap0.08mm Through insulation distance (Clearance)conductor to conductor Tracking Resistance CTI175V DIN IEC 112/VDE 0303 Part 1 Isolation Group (per DIN VDE 0109)IIIa Material Group DIN VDE 0109 Electrical SpecificationsOver recommended temperature (T A = -40°C to 85°C) unless otherwise specified. (See note 1.)*All typicals at T A = 25°C, V CC = 5 V.Switching SpecificationsOver recommended temperature (T A = -40°C to 85°C), V CC = 5 V, I F = 7.5 mA unless otherwise specified.*All typicals at T A = 25°C, V CC = 5 V.Notes:1. Bypassing of the power supply line is required with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler. The total leadlength between both ends of the capacitor and the isolator pins should not exceed 10mm.2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20mA.3. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.4. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥3000 V RMS for 1 second(Leakage detection current limit, I I-O≤ 5 µA).5. The t PLH propagation delay is measured from 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the output pulse.6. The t PHL propagation delay is measured from 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the output pulse.7. CM H is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logicstate (i.e., V OUT > 2.0V).8. CM L is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., V OUT > 0.8 V).9. For sinusoidal voltages, (|dV CM|/dt)max = πf CM V CM(p-p).10. See application section; “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information.11. t PSK is equal to the worst case difference in t PHL and/or t PLH that will be seen between units at any given temperature withinthe worst case operating condition range.Figure 5. Low Level Output Current vs. Temperature.Figure 4. Output Voltage vs.Forward Input current.Figure 1. High Level Output Current vs. Temperature.Figure 2. Low Level Output Voltage vs. Temperature.Figure 3. Input Diode Forward Characteristic.Figure 6. Test Circuit for t PHL and t PLH .I O H – H I G H L E V E L O U T P U T C U R R E N T – µAT A – TEMPERATURE – °C101550.4T A – TEMPERATURE – °C 0.30.1V O L – L O W L E V E L O U T P U T V O L T A G E – V0.2V F – FORWARD VOLTAGE – VOLTS10I F – F O R W A R D C U R R E N T – m A100I F – FORWARD INPUT CURRENT – mAV O – O U T P U TV O L T A G E – VI O L – L O W L E V E L O U T P U T C U R R E N T – m A T A – TEMPERATURE – °C60802040OUTPUT V O MONITORING NODEI FV F = 7.5 mAF = 3.75 mAFigure 12. Temperature Coefficient for Forward Voltage vs. Input Current.Figure 10. Rise and Fall Time vs.Temperature.Figure 9. Pulse Width Distortion vs.Temperature.Figure 8. Propagation Delay vs.Pulse Input Current.Figure 7. Propagation Delay vs.Temperature.Figure 11. Test Circuit for Common Mode Transient Immunity and Typical Waveforms.10080T A – TEMPERATURE – °C 600t P – P R O P A G A T I O N D E L A Y – n s402010590I F – PULSE INPUT CURRENT – mA7530t P – P R O P A G A T I O N D E L A Y – n s60454030T A – TEMPERATURE – °C20P W D – P U L S E W I D T H D I S T O R T I O N – n s10-10t r , t f– R I S E , F A L L T I M E – n sT A – TEMPERATURE – °Cd V F /d T – F O R W A R D V O L T A G E T E M P E R A T U R E C O E F F I C I E N T – m V /°C0.1110100I F – PULSE INPUT CURRENT – mA-1.4-2.2-2.0-1.8-1.6-1.2-2.4V O 0.5 VV O (MIN.)5 V0 V SWITCH AT A: I F = 0 mA SWITCH AT B: I F = 7.5 mAV CMCM HCM LV O (MAX.)V CM (PEAK)V O+5 VO GENERATOR Z O = 50 ?Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew Propagation delay is a figure of merit which describes how quickly a logic signal propagates through a system. The propaga-tion delay from low to high (t PLH) is the amount of time required for an input signal to propagate to the output, causing the output to change from low to high. Similarly, the propagation delay from high to low (t PHL) is the amount of time required for the input signal to propagate to the output, causing the output to change from high to low (see Figure 7).Pulse-width distortion (PWD) results when t PLH and t PHL d iffer in value. PWD is defined as the difference between t PLH and t PHL and often determines the maxi-mum data rate capability of a transmission system. PWD can be expressed in percent by dividing the PWD (in ns) by the minimum pulse width (in ns) being transmitted. Typically, PWD on the order of 20-30% of the minimum pulse width is tolerable; the exact figure depends on the particular application (RS232,RS422, T-1, etc.).Propagation delay skew, t PSK, is an important parameter to consider in parallel data appli-cations where synchronization of signals on parallel data lines is a concern. If the parallel data is being sent through a group ofoptocouplers, differences inpropagation delays will cause thedata to arrive at the outputs of theoptocouplers at different times. Ifthis difference in propagationdelays is large enough, it willdetermine the maximum rate atwhich parallel data can be sentthrough the optocouplers.Propagation delay skew is definedas the difference between theminimum and maximumpropagation delays, either t PLH ort PHL, for any given group ofoptocouplers which are operatingunder the same conditions (i.e.,the same drive current, supplyvoltage, output load, andoperating temperature). Asillustrated in Figure 15, if theinputs of a group of optocouplers are switched either ON or OFF at the same time, t PSK is the difference between the shortest propagation delay, either t PLH or t PHL, and the longest propagation delay, either t PLH or t PHL.As mentioned earlier, t PSK can determine the maximum parallel data transmission rate. Figure 11 is the timing diagram of a typical parallel data application with both the clock and the data lines being sent through optocouplers. The figure shows data and clock signals at the inputs and outputs of the optocouplers. To obtain the maximum data transmission rate, both edges of the clock signal are being used to clock the data; if only one edge were used, the clock signal would need to be twice as fast.Propagation delay skew represents the uncertainty of where an edge might be after being sent through an optocoupler. Figure 16 shows that there will be uncertainty in both the data and the clock lines. It is important that these two areas of uncertainty not overlap, otherwise the clock signal might arrive before all of the data outputs have settled, or some ofthe data outputs may start tochange before the clock signalhas arrived. From theseconsiderations, the absoluteminimum pulse width that can besent through optocouplers in aparallel application is twice t PSK. Acautious design should use aslightly longer pulse width toensure that any additionaluncertainty in the rest of thecircuit does not cause a problem.The t PSK specified optocouplersoffer the advantages ofguaranteed specifications forpropagation delays, pulse-widthdistortion and propagation delayskew over the recommendedtemperature, and input current,and power supply ranges.Figure 15. Illustration ofPropagation Delay Skew – t PSK .Figure 13. Input Threshold Current vs. Temperature.Figure 14. Recommended TTL/LSTTL to TTL/LSTTL Interface Circuit. Figure 16. Parallel Data Transmission Example.I T H – I N P U T T H R E S H O L D C U R R E N T – m AT A – TEMPERATURE – °C452316V* DIODE D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED FOR UNITS WITH OPEN COLLECTOR OUTPUT. CC 2I FV OI FV ODATAINPUTS CLOCKDATAOUTPUTSCLOCK/doc/9b0bff6d783e0912a2162a2e.html Data subject to change.Copyright ? 1999 Agilent Technologies Obsoletes 5091-9635E (10/93)5966-4942E (11/99)。

25LC640中文翻译资料山东泰开自动化李凯设备选择表(25AA64025C640)64KSPI总线串口EEPROM：封装类型：方块图特征：低功率COMS工艺-写电流：3mA标准-读电流：500u标准-待机电流：500nA标准8192某8位组织32字节页写周期时间：5mA最大自动同步擦除和写入周期块写入保护-未保护，1/4，1/2，或全部数组内置的写保护-电源开/关数据保护电路-写允许锁存器-写保护管脚连续读高可靠性-耐久度：1M周期（可保证的）-数据保持：大于200年-静电防护：大于4000V8脚PDIP,SOPC,和TSSOP封装温度范围支持;-商业级：（C)0℃至+70℃-工业级：（I)-40℃至+85℃-汽车级：（E)-40℃至+125℃说明：美国微芯科技公司的25AA640/25LC640/25C640(25某某640)是64K 比特电可擦除PROM。

这个存储器的使用通道是简单串行外围接口（SPI）兼容串行总线。

这个总线信号需要时钟输入（SCK)加单独数据在（SI)和数据输出（SO)连线。

进入装置的控制是通过芯片选择（CS)输入。

通信到装置能够暂停通道保持管脚（HOLD)。

虽然装置是暂停，转变在输入将是忽略，除了志片的选择，允许主动服务较高优先级的中断。

1.0电气特性图形1-1：AC测试电路1.1最大等级Vcc.................................7.0V全部输入和输出w.r.t.V...-0.6至Vcc+1.0V储存温度.....................-65℃至150℃引线的焊接温度（10秒）.............+300℃静电保护在全部管脚...................4kV注意：强调以上这些列出关于“最大等级”可能引出永久损伤到设备。

这强调的等级仅和设备的功能操作，而且那些或任何其它的条件超出那些声明在说明书的操作表中是未隐含的。

12864C-1液晶中文显示模块(一)概述 (3)(一)(二)外形尺寸1 方框图 (3)2 外型尺寸图 (4)(二)(三)模块的接口 (4)(三)(四)硬件说明 (5)(五) 指令说明 (7)(四)(五)读写操作时序 (8)(五)(六)交流参数 (11)(六)(七)软件初始化过程 (12)(七)(八)应用举例 (13)(八)(九)附录1半宽字符表 (20)2 汉字字符表 (21)一、概述12864C-1是一种具有4位/8位并行、2线或3线串行多种接口方式，内部含有国标一级、二级简体中文字库的点阵图形液晶显示模块；其显示分辨率为128×64, 内置8192个16*16点汉字，和128个16*8点ASCII字符集.利用该模块灵活的接口方式和简单、方便的操作指令，可构成全中文人机交互图形界面。

可以显示8×4行16×16点阵的汉字. 也可完成图形显示.低电压低功耗是其又一显著特点。

由该模块构成的液晶显示方案与同类型的图形点阵液晶显示模块相比，不论硬件电路结构或显示程序都要简洁得多，且该模块的价格也略低于相同点阵的图形液晶模块。

基本特性:●●低电源电压（VDD:+3.0--+5.5V）●●显示分辨率:128×64点●●内置汉字字库，提供8192个16×16点阵汉字(简繁体可选)●●内置 128个16×8点阵字符●●2MHZ时钟频率●●显示方式：STN、半透、正显●●驱动方式：1/32DUTY，1/5BIAS●●视角方向：6点●●背光方式：侧部高亮白色LED，功耗仅为普通LED的1/5—1/10●●通讯方式：串行、并口可选●●内置DC-DC转换电路，无需外加负压●●无需片选信号，简化软件设计●●工作温度: 0℃ - +55℃ ,存储温度: -20℃ - +60℃二、方框图3、外形尺寸图三、模块接口说明*注释1：如在实际应用中仅使用串口通讯模式，可将PSB接固定低电平，也可以将模块上的J8和“GND”用焊锡短接。

Seite 1 von 5 - Änderungen vorbehaltenPreisliste 2003 (€) - INTEL-DIALOGIC-ProdukteGültig bis: 01.12.03INTEL-Produktcode Produktbeschreibung Art.#Preis (€)Bemerkung ISA Voice Products with on-board Telephone InterfacesPROLINE2VDE 841043PROLINE2VDE841043€ 481D21H 838269D21H838269€ 456D21HDE 843951D21HDE843951€ 456DIALOG4 838537DIALOG4838537€ 603SCbus ProductsD41ESCEURO 841284D41ESCEURO841284€ 1.074Analogue High Density Products with ScbusD160SCHS 840521D/160SCHS840521€ 1.998D160SCLSHIZ 841497D160SCLSHIZ 841497€ 3.867D160SCLSREV3 848344D160SCLSREV3848344€ 3.470SA160CONNKIT 841963SA/160 STATION ADAPTER841963€ 199PCI Voice Products with on-board Telephone interfacesD4PCIU 854088D4PCIU854088€ 705SC/CTbus productsD120JCTTOBCPKIT841667D120JCTTOBCPKIT841667€ 124CBLD120PCI25PP 843092D120JCTCable843092€ 120D120JCTLSEUROU 850181D120JCTLSEUROU 850181€ 2.993BOB25POSJ11 843121BREAKOUT BOX FOR D/120JCT-LS843121€ 133D41EPCI 841279D41EPCI841279€ 1.074D41JCTLSEURO 850203D41JCTLSEURO 850203€ 1.194PBX Integration ProductsD42JCTU 842308D/42JCTU842308€ 2.430D82JCTUPCI UNIV. 848146D82JCTUPCI UNIV.848146€ 3.343D82UCABLE 838652D82JCTUCABLE838652€ 100SA102 841964SA102 BreakoutBoxD82JCTU841964€ 146D42DSXP 840561D42DSX 840561€ 1.620D42NSC 840560D42NE2 ISA840560€ 1.976D42NE2PCI 838513D42NE2 PCI838513€ 1.976PCI Digital Network cards with voice ressourcesBRI2VFD 842209BRI2VFD842209€ 1.976D300PCIE1120 841177D300PCIE1120841177€ 7.018D300JCTE1120R2U854864D300JCTE1120R2U854864€ 5.859NEU !!! D600JCT1E1120 845841D600JCT1E1120845841€ 6.738D600JCT2E1120R2845837D600JCT2E1120845837€ 9.911PCI Voice Products with on-board Telephone Interfaces (SC/CT bus)DMN12004E1PCIU 851029DMN12004E1PCIU851029€ 4.870DMT12004E1PCIU 851025DMT12004E1PCIU851025€ 7.304DMV1200A4E1PCI 849026DMV1200A4E1PCI 849026€ 16.969DMV6002E1PCIHIZ850662DMV6002E1PCIHIZ850662€ 10.114DMV6004E1PCIU 851024DMV6004E1PCIU851024€ 10.957DMV600A2E1PCI 849028DMV600A2E1PCI849028€ 12.366DMVF3001E1PCI 842246DMVF3001E1PCI 842246€ 15.652DMVF3001E1PCIU 849737DMVF3001E1PCIU 849737€ 15.652cPCI Voice Products with on-board Telephone Interfaces (SC/CT bus)DMN12004E1CPCI 842237DMN12004E1CPCI842237€ 4.870DMT12004E1CPCI 850994DMT12004E1CPCI850994€ 7.304NEU !!! DMV12004E1CPCI 842264DMV12004E1CPCI842264€ 12.174DMV1200A4E1CPCI849741DMV1200A4E1CPCI849741€ 16.969DMV6004E1CPCI 850993DMV6004E1CPCI850993€ 10.957NEU !!! DMV600A2E1CPCI 849742DMV600A2E1CPCI849742€ 12.366ISA Sharable Voice ResourcesD80SCREV2 838531D80SC838531€ 1.628D160SCREV2 841763D160SC841763€ 2.855D320SCREV3 845846D320SC845846€ 4.757D640SC 841319D640SC 841319€ 8.564PCI and cPCI Sharable Voice ResourcesD80PCI 841320D80PCI841320€ 1.628D160JCT 854825D160JCT854825€ 2.482D320PCI 841260D320PCI841260€ 4.757D320JCTU 855085D320JCTU855085€ 4.137ISA Digital Telephone Network Interfaces (SC-Bus)BRIPWRSPLYCORD 838649BRIPWRSPLYCORD838649€ 266 BRIYCABLE 838650BRIYCABLE838650€ 132 SHIELDEDBOB 843433SHIELDEDBOB843433€ 266DTI300SC120REV2841451DTI300SC120841451€ 2.254DTI301SC120REV2841899DTI301SC120841899€ 3.644DTI600SC120 841901DTI600SC120841901€ 3.605DTI601SC120REV2840996DTI601SC120840996€ 6.736PCI Digital Telephone Network InterfacesBRI160PCI 841214BRI160PCI841214€ 3.988BRI80PCI 841221BRI80PCI841221€ 3.360PlatformsPFMULWIN11200 8458631U chassis, WIN2KPRO, DM/V1200A-4E1 (120) ports, 2 Gig RAM, 18 Gig HD845863€ 20.835PFMULRH11200 8458641U chassis, Linux 7.2, DM/V1200A-4E1 (120) ports, 2 Gig RAM, 18 Gig HD845864€ 20.327INTEL-Produktcode Produktbeschreibung Art.#Preis (€)Bemerkung PFLANWIN21200 8458662U chassis, WIN2KPRO, DM/V1200A-4E1 (2) (240) ports, 4 Gig RAM, 18 Gig HD845866€ 32.952PFLANRH21200 8458692U chassis, Linux 7.2, DM/V1200A-4E1 (2) (240) ports, 4 Gig RAM, 18 Gig HD845869€ 32.444VP22RHE1 8481262U chassis, Linux 7.2, DM/V1200A-4E1 (2) (240) ports, 2 Gig RAM, 18 Gig HD848126€ 29.239VP22WIN2KE1 8481272U chassis, WIN2KPRO, DM/V1200A-4E1 (2) (240) ports, 2 Gig RAM, 18 Gig HD848127€ 29.743VP12RHE1S120 8481311U chassis, Linux 7.2, D/600JCT-E1-120 (30) ports, 1 Gig RAM, 18 Gig HD848131€ 12.691VP12RHE1D 8481331U chassis, Linux 7.2, DM/V1200A-4E1 (120) ports, 1 Gig RAM, 18 Gig HD848133€ 18.488VP12WIN2KE1D 8481341U chassis, WIN2KPRO, DM/V1200A-4E1 (120) ports, 1 Gig RAM, 18 Gig HD848134€ 19.069VP12WIN2KE1S1208481371U chassis, WIN2KPRO, D/600JCT-1E1-120 (30) ports, 1 Gig RAM, 18 Gig HD848137€ 13.273PF13W41T1 851175CHASSIS PF13W41T1 2 XEON 0 RESOURCE PORT851175€ 5.473NEU !!! PF23W1GB 851176CHASSIS PF23W1GB 2 XEON 0 RESOURCE PORT851176€ 10.731NEU !!! PF13W964T1 851177CHASSIS PF13W964T1 2 XEON 0 RESOURCE PORT851177€ 15.023NEU !!!PCI Fax Products/ Analog Network InterfaceCPI200PCIEURO 844398CPI200PCIEURO844398€ 1.411CPI400PCIEURO 843464CPI400PCIEURO843464€ 2.635VFXPCI 842141VFX40PCI842141€ 2.093VFX41JCTLS 848260VFX41JCTLS 848260€ 1.252PCI Fax Products/ Digital Network InterfaceDMF3001E1PCIU 853200DMF3001E1PCIU853200€ 13.043DMF300PCIU 850985DMF300PCIU850985€ 10.672NEU !!! DMF300PCI 842241DMF300PCI842241€ 10.672NEU !!! DMF300CPCI 842284DMF300CPCI 842284€ 10.672CPI30001E1PCIU 850988CPI30001E1PCIU850988€ 16.957NEU !!! CPI3000PCIU 850989CPI3000PCIU850989€ 10.672NEU !!! CPI400BRIPCI 851756CPI/400 BRI PCI851756€ 2.692IPT Network InterfaceDMT160TEC 849031DMT160TEC 849031€ 15.500NEU !!!HMP1.1 Host Media Processing ProductsDMIPS10V11W 856585SW LICENSE DMIPS10V11W ( Voice)856585€ 47DMIPS10F11W 856587SW LICENSE DMIPS10F11W ( Fax )856587€ 109DMIPS10C11W 856591SW LICENSE DMIPS10C11W ( Conferencing )856591€ 37DMIPS10S11W 856590SW LICENSE DMIPS10S11W ( Speech integration )856590€ 37DMIPS10R11W 856589SW LICENSE DMIPS10R11W ( RTP G. 711 )856589€ 37DMIPS10E11W 856588SW LICENSE DMIPS10E11W ( Enhanced RTP )856588€ 48DMIPS10I11W 856584SW LICENSE DMIPS10I11W ( IP Call Control )856584€ 16HMP1.0 Host Media Processing ProductsDMIPS40AW 851457SW LICENSE DMIPS40AW851457€ 388NEU !!! DMIPS80AW 851458SW LICENSE DMIPS80AW851458€ 620NEU !!! DMIPS160AW 851459SW LICENSE DMIPS160AW851459€ 1.240NEU !!! DMIPS320AW 851460SW LICENSE DMIPS320AW851460€ 2.170NEU !!! DMIPS640AW 851461SW LICENSE DMIPS640AW851461€ 3.844NEU !!! DMIPS321AW 851462SW LICENSE DMIPS321AW851462€ 2.790NEU !!! DMIPS480AW 851463SW LICENSE DMIPS480AW851463€ 3.503NEU !!! DMIPS322AW 851464SW LICENSE DMIPS322AW851464€ 3.162NEU !!! DMIPS641AW 851465SW LICENSE DMIPS641AW851465€ 4.836NEU !!! DMIPS642AW 851466SW LICENSE DMIPS642AW851466€ 5.580NEU !!!Netmerge ProductsNM3016LIC 851067NETMERGE CCS 3.0 16-PORT SERVER LICENSE851067€ 392NEU !!! NM30384LIC 851068CT MEDIA2 384-PORT SERVER LICENSE851068€ 1.322NEU !!! NM301023LIC 851069NETMERGE CCS 3.0 1023-PORT SERVER LICENSE851069€ 1.986NEU !!! NM302047LIC 851070NETMERGE CCS 3.0 2047-PORT SERVER LICENSE851070€ 2.651NEU !!! NM3016LUP120 851071NETMERGE CCS 3.0 16-120-PORT SERVER UPGRADE LICENSE851071€ 292NEU !!! NM3016LUP384 851072NETMERGE CCS 3.0 16-384-PORT SERVER UPGRADE LICENSE851072€ 1.023NEU !!! NM3016LUP1023 851073NETMERGE CCS 3.0 16-1023-PORT SERVER UPGRADE LICENSE851073€ 1.754NEU !!! NM3016LUP2047 851074NETMERGE CCS 3.0 16-2047-PORT SERVER UPGRADE LICENSE851074€ 2.192NEU !!! NM30120LUP384 851075NETMERGE CCS 3.0 120-384-PORT SERVER UPGRADE LICENSE851075€ 731NEU !!! NM30120LUP1023 851076NETMERGE CCS 3.0 120-1023-PORT SERVER UPGRADE LICENSE851076€ 1.461NEU !!! NM30120LUP2047 851077NETMERGE CCS 3.0 120-2047-PORT SERVER UPGRADE LICENSE851077€ 2.192NEU !!! NM30384LUP1023 851078NETMERGE CCS 3.0 384-1023-PORT SERVER UPGRADE LICENSE851078€ 731NEU !!! NM30384LUP2047 851079NETMERGE CCS 3.0 384-2047-PORT SERVER UPGRADE LICENSE851079€ 1.461NEU !!! NM301023LUP2047851080NETMERGE CCS 3.0 1023-2047-PORT SERVER UPGRADE LICENSE851080€ 731NEU !!! CMS100DS20 851083NETMERGE MCCS 1.0 DEVELOPER SYSTEM851083€ 133NEU !!! CMS100PS20 851084NETMERGE MCCS 1.0 PROG SWTICH SYSTEM851084€ 133NEU !!! NM30120LIC 851092NETMERGE CCS 3.0 120-PORT SERVER LICENSE851092€ 658NEU !!!INTEL-Produktcode Produktbeschreibung Art.#Preis (€)Bemerkung ISA Switching/Conferencing Products (SCbus)SI80SCGBL 838602MSISI/80Global838602€ 868MSI80SCGBL 838586MSI80SCGBL838586€ 2.100MSI160SCGLOBAL 840572MSI160SCGLOBAL840572€ 2.968MSI240SCGLOBAL 840575MSI240SCGLOBAL840575€ 3.836 MSISCGBLPWRMOD 838660MSIGlobalPowerModule838660€ 259SA240MSIGLOBAL 841678SA240MSIGLOBAL841678€ 199DCB320REV3 843966DCB320REV3 843966843966€ 1.163DCB960SCREV3 850701DCB960SCREV3 850701€ 2.302SCX160SCXBUSADP840770SCX160SCXBUSADPBoard840770€ 60SCX160KIT 838667SCX160KIT (Board +Cable)838667€ 1.759SCX160TERMTRKIT838668SCX160TERMTRKIT838668€ 100SCX1601MTRCBL 838666SCX1601MTRCBL838666€ 40PCI Switching/Conferencing ProductsATMCP155H110MMF840783ATMCP155H110MMF840783€ 9.920ATMPC155H100MMF840781ATMPC155H100MMF840781€ 9.223ATMPC155H100UTP840782ATMPC155H100UTP840782€ 9.223ATMPCI25H100UTP840785ATMPCI25H100UTP840785€ 3.023MSI160PCIGBL 848889MSI160PCIGBL848889€ 2.968MSI80PCIGBL 850065MSI80PCIGBL850065€ 2.100SA240PCI 841677SA240PCI841677€ 199SI80PCIGBL 838600MSISI80PCIGBL838600€ 868CT ConnectCPSV6FULLWINPPK 851500Intel NetMerge CPS V6.0 Full License For WIN Parallel key (unlimited)851500€ 17.252CPSV6MONWINPPK 851502Intel NetMerge CPS V6.0 Monitor License For WIn Parallel key (unlimited)851502€ 6.326CPSV6MIDWINPPK 851510Intel NetMerge CPS V6.0 Mid License For WIN Parallel key (75 user)851510€ 8.627CPSV6LOWWINPPK 851512Intel NetMerge CPS V6.0 Low License For WIN Parallel key (32 user)851512€ 2.877CPSV6PRODUPG 851518Intel NetMerge CPS V6.0 Software Upgrade For WIN 851518€ 775CPSV6ENTWINPPK 851519Intel NetMerge CPS V6.0 Enterprise License For WIN Parallel key (unlimited)851519€ 21.804NCCSV1.1WINPPK 851521Network Call Control Software V1.1 For WIN Parallel key851521€ 15.500CPSV6FULLWINUSB 851509Intel NetMerge CPS V6.0 Full License For WIN USB key (unlimited)851509€ 17.252CPSV6MONWINUSB 851503Intel NetMerge CPS V6.0 Monitor License For WIN USB key (unlimited)851503€ 6.326CPSV6MIDWINUSB 851511Intel NetMerge CPS V6.0 Mid License For WIN USB key (75 user)851511€ 8.627CPSV6LOWWINUSB 851517Intel NetMerge CPS V6.0 Low License For WIN USB key (32 user)851517€ 2.877CPSV6ENTWINUSB 851520Intel NetMerge CPS V6.0 Enterprise License For WIN USB key (unlimited)851520€ 21.804NCCSV1.1WINUSB 851523Network Call Control Software V1.1 For WIN USB Key (Gatekeeper + ACD fr.)851523€ 15.500 CTCESDKSUBSRV 840710CT CONNECT ENHANCED SW DEVELOPERS KIT840710€ 8.680 ESDKSUBSERVRNEW 840629CTC ENHANCED SDK SUBSCRIPTION RENEWAL840629€ 6.848 CSTASSIMFORNT 840597CSTA SWITCH SIMULATOR V1.0 PROD FOR NT840597€ 10.230CTCCIM25KIT 841657CIM (Call Information Manager) V3.0 25 DEVICE / single site841657€ 2.753CIM25MSTEKIT 842585CIM 25 DEVICE / Multi Stie842585€ 5.503 CIMKITUMLIMITED 840734CIM MGR V3.0 Unlimited Device / Single site840734€ 8.254 CTCCIMUDMSITEKT 842970CIM V3.0 Unlimited Device/ Multi Site842970€ 14.308 CTCCIMUPDKIT 846558CIM Software UPDATE FOR NT from V3.0 to V3.5846558€ 543 CTCCRMGR 840605CTC CALL ROUTING MANAGER840605€ 4.600 CTCCMMSINLINK 842588CTC CALL MONITORING Manager Single Link842588€ 4.600 CTCCMMMULLINK 842589CTC CALL MONITORING Manager Multiple Link842589€ 5.867 CTCOEMLIC 844781CT CONNECT OEM per client844781€ 233CT ADE Software-ProgrammiertoolBei den unter CT ADE V8.2 zusammengefassten Programmiertools Graphical VOS und Call Suite handelt es sich um bewährteCTI-Programmiersprachen speziell für die INTEL-Dialogic-Boards mit denen CTI-Applikationen professionell und zügig entwickelt sowie getestet werden können. Mit seinem hohen Koprimierungsgrad bei gleichzeitig geringem Overhead und idealer Abstimmung auf dieINTEL-Dialogic-Boards gilt CT ADE nicht nur als das mit Abstand leistungsfähigste Tool seiner Art. Aufgrund der Lizenzpreis-Politikkann es jetzt auch als das derzeit kostengünstigste und effizienteste Programmiertool - insbesondere zur Erstellung grosserUnified Messaging-Lösungen gelten:CT ADE -Lizenzierung basiert auf dem sog. TOPAZ-Layer: Mit Erwerb der Lizenzen auf TOPAZ hat der Nutzer gleichermaßenZugriff auf die Produkte VOS/Graphical VOS und Call Suite. Die Runtime-Lizenzierung erfolgt lediglich pro Medienport(Voice- bzw. Fax-Ressourcen des INTEL-Dialogic-Boards). Darüber hinaus gehende Lizenzgebühren (z.B. für Conferencing-, MSI-Funktionalitätenoder zusätzliche Faxapplikationen) entstehen bei CT ADE nicht!Die Demo-CD ist auf Anfrage kostenlos bei uns erhältlich. Im Web kann diese Demo wie auch das Datenblatt hierzuauch unter /network/csp/products/ct_ade.htm kostenlos heruntergeladen werden.INTEL-Produktcode Produktbeschreibung Art.#Preis (€)Bemerkung ParityCTADEVRTPTLIC 851255CT ADE Runtime Licenses per port851255€ 184CTADE2DEVKEY 847127CT ADE v8.2 2.port Development Kit847127€ 649CTADE24DEVKEY 848750CT ADE 24 PORT Development Kit848750€ 4.693CTADE30DEVKEY 848752CT ADE 30 PORT Development Kit 848752€ 5.796CTADE2RT 847140CT ADE 2.port RunTime HW Key847140€ 368CTADE4RT 847141CT ADE 4.port RunTime HW Key847141€ 735CTADE8RT 847142CT ADE 8.port RunTime HW Key847142€ 1.471CTADE12RT 847143CT ADE 12.port RunTime HW Key847143€ 2.206CTADE16RT 847144CT ADE 16.port RunTime HW Key847144€ 2.941INTEL-Produktcode Produktbeschreibung Art.#Preis (€)Bemerkung CTADE24RT 847145CT ADE 24.port RunTime HW Key847145€ 4.412CTADE30RT 847146CT ADE 30.port RunTime HW Key847146€ 5.515CTADE36RT 849068CT ADE 36.port RunTime HW Key849068€ 6.618CTADE48RT 847147CT ADE 48.port RunTime HW Key847147€ 8.824CTADE60RT 847148CT ADE 60.port RunTime HW Key847148€ 11.030CTADE64RT 847149CT ADE 64.port RunTime HW Key847149€ 11.766CTADE72RT 847150CT ADE 72.port Runtime HW Key 847150€ 13.236CTADE96RT 847151CT ADE 96.port RunTime HW Key847151€ 17.648CTADE120RT 847152CT ADE 120.port RunTime HW Key847152€ 22.060CTADE128RT 847153CT ADE 128.port RunTime HW Key847153€ 23.531CTADE192RT 847154CT ADE 192.port RunTime HW Key847154€ 35.297CTADE240RT 847155CT ADE 240.port RunTime HW Key847155€ 44.121CTADE256RT 847156CT ADE 256.port RunTime HW Key847156€ 47.062CTADE384RT 848249CT ADE 384.port RunTime HW Key848249€ 70.593CTADE480RT 848253CT ADE 480.port RunTime HW Key848253€ 88.242CTADE0PROGKEY 847625CTADE0PROGKEY847625€ 65CTADE2DEVKEYUSB847157CT ADE v8 2.port Development KitUSB847157€ 649CTADE24DEVUSB 848751CT ADE 24 PORT Development Kit USB 848751€ 4.693CTADE30DEVUSB 848753CT ADE 30 PORT Development Kit USB848753€ 5.796CTADE2RTUSB 847158CT ADE 2.port RunTime HW KeyUSB847158€ 368CTADE4RTUSB 847161CT ADE 4.port RunTime HW KeyUSB847161€ 735CTADE8RTUSB 847164CT ADE 8.port RunTime HW KeyUSB847164€ 1.471CTADE12RTUSB 847169CT ADE 12.port RunTime HW KeyUSB847169€ 2.206CTADE16RTUSB 847175CT ADE 16.port RunTime HW KeyUSB847175€ 2.941CTADE30RTUSB 847185CT ADE 30.port RunTime HW KeyUSB847185€ 5.515CTADE48RTUSB 847189CT ADE 48.port RunTime HW KeyUSB847189€ 8.824CTADE60RTUSB 847190CT ADE 60.port RunTime HW KeyUSB847190€ 11.030CTADE64RTUSB 847191CT ADE 64.port RunTime HW KeyUSB847191€ 11.766CTADE72RTUSB 847192CT ADE 72.port Runtime HW KeyUSB 847192€ 13.236CTADE96RTUSB 847193CT ADE 96.port RunTime HW KeyUSB847193€ 17.648CTADE120RTUSB 847194CT ADE 120.port RunTime HW KeyUSB847194€ 22.060CTADE128RTUSB 847195CT ADE 128.port RunTime HW KeyUSB847195€ 23.531CTADE192RTUSB 847196CT ADE 192.port RunTime HW KeyUSB847196€ 35.297CTADE240RTUSB 847197CT ADE 240.port RunTime HW KeyUSB847197€ 44.121CTADE256RTUSB 847198CT ADE 256.port RunTime HW KeyUSB847198€ 47.062CTADE384RTUSB 848255CT ADE 384.port RunTime HW KeyUSB848255€ 70.593CTADE480RTUSB 848252CT ADE 480.port RunTime HW KeyUSB848252€ 88.242CTADE0PRGKEYUSB847624CT ADE 0-port programmableKeyUSB847624€ 65 CTADEJUMPSTRNG 844634CT ADE JumpStart Training Day844634€ 1.694DM 3/IPLINK ProductsDMIP3011E1P100 845746DMIP3011E1P100845746€ 7.673DMIP6012E1C100 849679MEDIA DMIP6012E1C100 CR CT HIGH 60 RESO>849679€ 11.625DMIP6012E1P100 850043DMIP6012E1P100850043€ 11.625DMIP601C100BT 850046DMIP601C100BT850046€ 9.688REARIOV19E1120 843491REAR I/O Modul,CPCI V1.9,E1-120843491€ 438IPT Network InterfaceDMN160TEC 850226NIF DMN160TEC CF CT HIGH 0 RESOURCE POR>850226€ 15.500NEU !!! RIODMX160RJ48M 847556DTI16 REAR I/O ASSY847556€ 494NEU !!! RJ48MTORJ45BOB 842514RJ48M TO RJ45 BREAKOUT BOX842514€ 157NEU !!! CBLRJ21XMSISC CABLE ASSY,RJ-21X FOR MSI/SC-FERRITE844094€ 113NEU !!! IPT4800C 850485MEDIA IPT4800C CF CT 0 NO CPU HIGH COMM>850485€ 41.013NEU !!! IPT2400C 850487MEDIA IPT2400C CF CT 0 NO CPU HIGH COMM>850487€ 29.295NEU !!! IPT1200C 850488MEDIA IPT1200C CF CT 0 NO CPU HIGH COMM>850488€ 19.530NEU !!! IPT6720C 849971MEDIA IPT6720C CF 0 NO CPU 0 RESOURCE P>849971€ 48.825NEU !!! IPTREARIO 849970PMAC TRANSITION MODULE849970€ 426NEU !!!PBX Media GatewayPIMG80PBXDNI 851308NGN PIMG80PBXDNI 0 NO CPU BASICVOICE 8 >851308€ 2.558NEU !!! PIMG80LS 851309NGN PIMG80LS 0 NO CPU BASICVOICE 8 RESO>851309€ 1.995NEU !!! PIMG80MTLPBXDNI851333NGN PIMG80MTLPBXDNI 0 NO CPU BASICVOICE>851333€ 2.558NEU !!! PIMG80PBXDSI 851334NGN PIMG80PBXDSI 0 NO CPU BASICVOICE 8 >851334€ 2.558NEU !!!PCI and cPCI Sharable Voice ResourcesAUDIOCONFPROGGD840121AUDIOCONFPROGGD840121€ 60 AUDIOCONFSWREF 840120AUDIOCONFSWREF840120€ 60DSE boardsDL300208 841860DL300208841860€ 2.054DL300212 841861DL300212841861€ 2.364DL300216 841331DL300216841331€ 2.674DL300708 840920DL300708840920€ 2.703DL300716 840921DL300716840921€ 2.674DL300908 841333DL300908841333€ 2.054DL300912 841334DL300912841334€ 2.364DL300916 841335DL300916841335€ 2.674Tools / Utilities / DocumentationSR51LINUX 848551SFT SR51LINUX N CD-ROM848551€ 101SR511WINFP1 851585SFT SR511WINFP1 N CD-ROM851585€ 495NEU !!! SR60CPCIWIN 850406EXP SR 6.0 FOR cPCI ON WINDOWS850406€ 767NEU !!! SR51LINUXFP1 854941SR 5.1 Feature Pack 1 for LINUX854941€ 495NEU !!! SR60CPCILINUX 850407SR 6.0 FOR cPCI ON LINUX850407€ 767NEU !!!INTEL-Produktcode Produktbeschreibung Art.#Preis (€)Bemerkung CablesCTBUSTOSCBUSADP838651H.100 Adapter838651€ 53CBLCTB68C12DROP843089CTbus Cable, 12 Drop843089€ 179CBLCTB68C16DROP843090CTbus Cable, 16 Drop843090€ 219CBLCTB68C3DROP 843086CTbus Cable, 3 Drop843086€ 100CBLCTB68C4DROP 843087CTbus Cable, 4 Drop843087€ 100 CBLPEBSCB4DROP 843075PEB/SCBUS 4DROP SCBUS Cable843075€ 40 CBLPEBSCB8DROP 843076PEB/SCBUS 8DROP SCBUS Cable843076€ 40CBLRJ14TORJ11YA843115CBLRJ14TORJ11YA843115€ 40CBLRJ21FORMSI 843072CBLRJ21FORMSI843072€ 113CBLSCB26C6DROP 843073CBLSCB26C6DROP843073€ 40CBLYDID 843082CBLYDID843082€ 40CBLTAC0X32 844098Telco Adapter Cable, DI/SI32844098€ 100NEU !!! TIA0X32 842499TIA (DI/SI32) Unpowered 842499€ 498NEU !!!HDSIDI0408LSA 850975INT DI0408LSA PF LSGS CT LOW LSGS 12 RE>850975€ 3.098DI0408CBLKIT 841679ACCESSORY DI0408CBLKIT 0 RESOURCE PORTS>841679€ 132 DISIBOBKIT 841659DISIBOBKIT 841659841659€ 279DISI32 849972MEDIA DISI32 PFU LSGS CT HIGH COMM BUIL>849972€ 5.169DISI16R2 853739DISI16R2853739€ 3.593HDSIPCIU 849440STATION HDSIPCIU PFU LSGS CT HIGH LSGS >849440€ 5.417HDSI1200PCIU 849681STATION HDSI1200PCIU PFU LSGS CT HIGH C>849681€ 20.291HDSI960PCIU 849683STATION HDSI960PCIU PFU LSGS CT HIGH CO>849683€ 16.616HDSI720PCIU 849685STATION HDSI720PCIU PFU LSGS CT HIGH CO>849685€ 12.941HDSI480PCIU 849689STATION HDSI480PCIU PFU LSGS CT HIGH CO>849689€ 9.266HDSI720CPCI 849690STATION HDSI720CPCI CF LSGS CT HIGH COM>849690€ 12.941HDSI480CPCI 849732STATION HDSI480CPCI CF LSGS CT HIGH COM>849732€ 9.266Bei Bestellung unter € 1000.-- netto wird ein Transportkostenaufschlag von € 30.-- erhoben.Lieferzeit:ca. 2 Wochen ab AuftragserteilungPreise:die genannten Preise verstehen sich in € ab Lager Gröbenzell,zuzüglich der gesetzlichen Mehrwertsteuer/FrachtZahlungsbedingung:Bei Erst- und Folgebestellung per Nachnahme/ V-Scheck/ Vorauskasse,danach kann u.U. auf Rechnung, 14 Tage netto gewährt werden.Änderungen vorbehalten. Es gelten unsere allgemeinen Geschäftsbedingungen. Stand 07/2003.。

特 征• 全集成MIL-STD-1553接口终端• 灵活的处理器/存储器接口 • 标准的4K ×16以及可选的 12K ×16或8K ×17RAM • 可选的RAM 奇偶产生/校验 • 自动BC 重试• 可编程的BC 间隔定时 • BC 帧自动重复• 灵活的RT 数据缓存 • 可编程的非法化 • 可任选的消息监控器 • 同时制RT/监控器模式通道A 通道B 参见命名信息以获得可用的存储器图1 ACE 模块图表1注：注1到注6适用于接收器差分电阻及差分电容的说明⑴该说明包括接收器及发送器（在内部是连在一起的）⑵阻抗的测试是直接在BU-65170/61580××混合器的管脚TX/RX A(B)及TX/RX A(B)之间进行的。

⑶假定混合器所有的电源及地输入端都被连接。

⑷该说明适用于上电及非上电两种情况⑸该说明假定是2V rms的平衡、差分、正旋输入的情况，适用频率范围是75KHz到1MHz。

⑹所给的最小电阻及最大电容参数在整个工作范围内都是满足要求的，但未经在整个工作范围内测试。

⑺假定共模电压的频率范围是直流到2MHz，在短截线一侧的隔离变压器的管脚上（直接耦合或变压器耦合）测得，以混合器的地为参考点。

使用的变压器必须是DDC推荐的或能提供相同的最小CMRR（共模抑制比）的其它变压器。

⑻对最小消息间间隔定时来说，其典型值在软件的控制下可以增加到（65535us 减去消息本身的时间），其单位增量是1us。

⑼是软件可编程的（4个选项），包括RT-to-RT暂停（发送指令的中间奇偶位到发送RT状态的中间同步位之间的时间）。

⑽是对+5V逻辑及收发器而言的，对通道A及通道B来说，是+5V。

⑾是从指令字的中间奇偶位过零点开始到RT状态字的中间同步位过零点为止进行测量的。

⑿对BU-65171、BU-61581、及BU-61586的说明与对BU-65170、BU-61580、及BU-61585的说明是分别完全相同的。

MultiMediaCard SpecificationVersion : Ver. 0.9Date 4 – June - 2004Samsung Electronics Co., LTDSemiconductor Flash Memory Product Planning & Applications1 Introduction to the MultiMediaCard ----------------------------------------------------------- 51.1 System Features ----------------------------------------------------------------------------------------- 5-------------------------------------------------------------------------------------- 51.2 ProductModel2 Function Description ------------------------------------------------------------------------------- 72.1 Flash Technology Independence ------------------------------------------------------------------ 72.2 Defect and Error Management --------------------------------------------------------------------- 72.3 Endurance ----------------------------------------------------------------------------------------------- 72.4 Automatic Sleep Mode ------------------------------------------------------------------------------- 72.5 Hot Insertion -------------------------------------------------------------------------------------------- 82.6 MultiMediaCard Mode -------------------------------------------------------------------------------- 82.6.1 MultiMediaCard Standard Compliance ----------------------------------------------------------- 82.6.2 Negotiation Operation Conditions ----------------------------------------------------------------- 82.6.3 Card Acquisition and Identification ---------------------------------------------------------------- 82.6.4 Card Status ---------------------------------------------------------------------------------------------- 82.6.5 Memory Array Partitioning --------------------------------------------------------------------------- 92.6.6 Read and Write Operations ------------------------------------------------------------------------- 92.6.7 Data Transfer Rate ------------------------------------------------------------------------------------102.6.8 Data Protection in the Flash Card -----------------------------------------------------------------10-----------------------------------------------------------------------------------------------------10 2.6.9 Erase2.6.10 Write Protection ----------------------------------------------------------------------------------------102.6.11 Copy Bit ------------------------------------------------------------------------------------------------- 102.6.12 The CSD Register ------------------------------------------------------------------------------------ 112.7 SPI Mode ----------------------------------------------------------------------------------------------- 112.7.1 Negotiating Operation Conditions ---------------------------------------------------------------- 112.7.2 Card Acquisition and Identification --------------------------------------------------------------- 112.7.3 Card Status --------------------------------------------------------------------------------------------- 112.7.4 Memory Array Partitioning -------------------------------------------------------------------------- 112.7.5 Read and Write Operations ------------------------------------------------------------------------- 112.7.6 Data Transfer Rate ------------------------------------------------------------------------------------ 112.7.7 Data Protection in the MultiMediaCard ----------------------------------------------------------- 1212-----------------------------------------------------------------------------------------------------2.7.8 Erase2.7.9 Write Protection ---------------------------------------------------------------------------------------- 123 Product Specifications ----------------------------------------------------------------------------- 133.1 Recommended Operating Conditions ------------------------------------------------------------------------- 133.2 Operating Characteristis ----------------------------------------------------------------- 143.3 System Environmental Specifications ----------------------------------------------------------------- 153.4 System Reliability and Maintenance -------------------------------------------------------------- 153.5 Physical Specifications ------------------------------------------------------------------------------- 164 MultiMediaCard Interface Description --------------------------------------------------------- 174.1 Pin Assignments in MultiMediaCard Mode ------------------------------------------------------- 174.2 Pin Assignments in SPI Mode ---------------------------------------------------------------------- 184.3 MultiMediaCard Bus Topology ---------------------------------------------------------------------- 184.4 SPI Bus Topology -------------------------------------------------------------------------------------------------- 194.4.1 SPI Interface Concept ------------------------------------------------------------------------------------------- 194.4.2 SPI Bus Topology ------------------------------------------------------------------------------------------------ 1920------------------------------------------------------------------------------------------------- 4.5 Registers4.5.1 Operation Condition Register (OCR) ---------------------------------------------------------------------------204.5.2 Card Identification (CID) ------------------------------------------------------------------------------214.5.3 Relative Card Address (RCA) ----------------------------------------------------------------------- 21 4.5.4 Card Specific Data (CSD) ---------------------------------------------------------------------------- 22 4.6 MultiMediaCard Communication -------------------------------------------------------------------- 3030----------------------------------------------------------------------------------------------- 4.6.1 Commands4.7 Read, Write and Erase Time-out Conditions ----------------------------------------------------- 33 4.8 Card Identification Mode ------------------------------------------------------------------------------ 34 4.8.1 Operating Voltage Range Validation --------------------------------------------------------------- 35 4.9 Data Transfer Mode ------------------------------------------------------------------------------------ 35 4.9.1 Block Read ----------------------------------------------------------------------------------------------- 37 4.9.2 Block Write ----------------------------------------------------------------------------------------------- 3738------------------------------------------------------------------------------------------------------ 4.9.3 Erase4.9.4 Write Protect Management -------------------------------------------------------------------------- 38 4.9.5 Card Lock/Unlock Operation ------------------------------------------------------------------------ 38----------------------------------------------------------------------------------------------- 41 4.9.6 Responses4.9.7 Status ------------------------------------------------------------------------------------------------------ 42 4.9.8 Command Response Timing ------------------------------------------------------------------------ 4448 4.9.9 Reset------------------------------------------------------------------------------------------------------ 4.10 SPI Communication ----------------------------------------------------------------------------------- 49 4.10.1 Mode Selection ----------------------------------------------------------------------------------------- 49 4.10.2 Bus Transfer Protection ------------------------------------------------------------------------------ 49 4.10.3 Data Read Overview ---------------------------------------------------------------------------------- 50 4.10.4 Data Write Overview ---------------------------------------------------------------------------------- 51 4.10.5 Erase and Write Protect Management ----------------------------------------------------------- 52 4.10.6 Reading CID/CSD Registers ------------------------------------------------------------------------ 53 4.10.7 Reset Sequence --------------------------------------------------------------------------------------- 53 4.10.8 Error Conditions ---------------------------------------------------------------------------------------- 53 4.10.9 Memory Array Partitioning --------------------------------------------------------------------------- 53 4.10.10 Card Lock/Unlock -------------------------------------------------------------------------------------- 53 4.10.11 Commands ----------------------------------------------------------------------------------------------- 54 4.10.12 Responses ----------------------------------------------------------------------------------------------- 56 4.10.13 Data Tokens --------------------------------------------------------------------------------------------- 58 4.10.14 Data Error Token --------------------------------------------------------------------------------------- 59 4.10.15 Clearing Status Bits ------------------------------------------------------------------------------------ 60 4.11 SPI Bus Timing ----------------------------------------------------------------------------------------- 61 4.12 Error Handling ------------------------------------------------------------------------------------------ 64 4.12.1 Error Correction Code (ECC) ----------------------------------------------------------------------- 64 4.12.2 Cyclic Redundancy Check (CRC) ----------------------------------------------------------------- 642 Function Description2.1 Flash Technology IndependenceThe 512 byte sector size of the MultiMediaCard is the same as that in an IDE magnetic disk drive. To write or read a sector (or multiple sectors), the host computer software simply issues a Read or Write command to the MultiMediaCard. This command contains the address and the number of sectors to write/read. The host software then waits for the command to complete. The host software does not get involved in the details of how the flash memory is erased, programmed or read. This is extremely important as flash devices are expected to get more and more complex in the future. Because the MultiMediaCard uses an intelligent on-board controller, the host system software will not require changing as new flash memory evolves. In other words, systems that support the MultiMediaCard today will be able to access future MultiMediaCards built with new flash technology without having to update or change host software.2.2 Defect and Error ManagementMultiMediaCards contain a sophisticated defect and error management system. This system is analogous to the systems found in magnetic disk drives and in many cases offers enhancements. For instance, disk drives do not typically perform a read after write to confirm the data is written correctly because of the performance penalty that would be incurred. MultiMediaCards do a read after write under margin conditions to verify that the data is written correctly (except in the case of a Write without Erase Command). In the rare case that a bit is found to be defective, MultiMediaCards replace this bad bit with a spare bit within the sector header. If necessary, MultiMediaCards will even replace the entire sector with a spare sector. This is completely transparent to the host and does not consume any user data space.The MultiMediaCards soft error rate specification is much better than the magnetic disk drive specification. In the extremely rare case a read error does occur, MultiMediaCards have innovative algorithms to recover the data. This is similar to using retries on a disk drive but is much more sophisticated. The last line of defense is to employ powerful ECC to correct the data. If ECC is used to recover data, defective bits are replaced with spare bits to ensure they do not cause any future problems.These defect and error management systems coupled with the solid-state construction give MultiMediaCards unparalleled reliability2.3 EnduranceMultiMediaCards have an endurance specification for each sector of 1,000,000 writes (reading a logical sector is unlimited). This is far beyond what is needed in nearly all applications of MultiMediaCards. Even very heavy use of the MultiMediaCard in cellular phones, personal communicators, pagers and voice recorders will use only a fraction of the total endurance over the typical device’s five year lifetime. For instance, it would take over 100 years to wear out an area on the MultiMediaCard on which a files of any size (from 512 bytes to capacity) was rewritten 3 times per hour, 8 hours a day, 365 days per year.With typical applications the endurance limit is not of any practical concern to the vast majority of users.2.4 Automatic Sleep ModeAn important feature of the MultiMediaCard is automatic entrance and exit from sleep mode. Upon completion of an operation, the MultiMediaCard will enter the sleep mode to conserve power if no further commands are received within 5 msec The host does not have to take any action for this to occur. In most systems, the MultiMediaCard is in sleep mode except when the host is accessing it, thus conserving power. When the host is ready to access the MultiMediaCard and it is in sleep mode, any command issued to the MultiMediaCard will cause it to exit sleep and respond. The host does not have to issue a reset first. It may do this if desired, but it is not needed. By not issuing the reset, performance is improved through the reduction of overhead.2.5 Hot InsertionSupport for hot insertion will be required on the host but will be supported through the connector. Connector manufacturers will provide connectors that have power pins long enough to be powered before contact is made with the other pins. Please see connector data sheets for more details. This approach is similar to that used in PCMCIA to allow for hot insertion. This applies to both MultiMediaCard and SPI modes.2.6 MultiMediaCard Mode2.6.1 MultiMediaCard Standard ComplianceThe MultiMediaCard is fully compliant with MultiMediaCard standard specification V3.31.The structure of the Card Specific Data (CSD) register is compliant with CSD structure V1.2.2.6.2 Negotiating Operation ConditionsThe MultiMediaCard supports the operation condition verification sequence defined in the MultiMediaCard standard specifications. The MultiMediaCard host should define an operating voltage range that is not supported by the MultiMediaCard. It will put itself in an inactive state and ignore any bus communication. The only way to get the card out of the inactive state is by powering it down and up again. In addition the host can explicitly send the card to the inactive state by using the GO_INACTIVE_STATE command.2.6.3 Card Acquisition and IdentificationThe MultiMediaCard bus is a single master (MultiMediaCard host) and multi-slaves (cards) bus. The host can query the bus and find out how many cards of which type are currently connected. The MultiMediaCard’s CID register is pre-programmed with a unique card identification number which is used during the acquisition and identification procedureIn addition, the MultiMediaCard host can read the card’s CID register using the READ_CID MultiMediaCard command. The CID register is programmed during the MultiMediaCard testing and formatting procedure, on the manufacturing floor. The MultiMediaCard host can only read this register and not write to it.2.6.4 Card StatusMultiMediaCard status is stored in a 32 bit status register which is sent as the data field in the card respond to host commands. Status register provides information about the card’s current state and completion codes for the last host command. The card status can be explicitly read (polled) with the SEND_STATUS command.2.6.7 Data Protection in the Flash CardEvery sector is protected with an Error Correction Code (ECC). The ECC is generated (in the memory card) when the sectors are written and validated when the data is read. If defects are found, the data is corrected prior to transmission to the host.The MultiMediaCard can be considered error free and no additional data protection is needed. However, if an application uses additional, external, ECC protection, the data organization is defined in the user writeable section of the CSD register2.6.8 EraseThe smallest erasable unit in the MultiMediaCard is a erase group. In order to speed up the erase procedure, multiple erase groups can be erased in the same time. The erase operation is divided into two stages.Tagging - Selecting the Sectors for ErasingTo facilitate selection, a first command with the starting address is followed by a second command with the final address, and all erase groups within this range will be selected for erase.Erasing - Starting the Erase ProcessTagging can address erase groups. An arbitrary selection of erase groups may be erased at one time. Tagging and erasing must follow a strict command sequence (refer to the MultiMediaCard standard specification for details).2.6.9 Write ProtectionThe MultiMediaCard erase groups are grouped into write protection groups. Commands are provided for limiting and enabling write and erase privileges for each group individually. The current write protect map can be read using SEND_WRITE_PROT command.In addition two, permanent and temporary, card levels write protection options are available.Both can be set using the PROGRAM_CSD command (see below). The permanent write protect bit, once set, cannot be cleared.The One Time Programmable (OTP) characteristic of the permanent write protect bit is implemented in the MultiMediaCard controller firmware and not with a physical OTP cell.2.6.10 Copy BitThe content of an MultiMediaCard can be marked as an original or a copy using the copy bit in the CSD register. Once the Copy bit is set (marked as a copy) it cannot be cleared.The Copy bit of the MultiMediaCard is programmed (during test and formatting on the manufacturing floor) as a copy. The MultiMediaCard can be purchased with the copy bit set (copy) or cleared, indicating the card is a master.The One Time Programmable (OTP) characteristic of the Copy bit is implemented in the MultiMediaCard controller firmware and not with a physical OTP cell.2.6.11 The CSD RegisterAll the configuration information of the MultiMediaCard is stored in the CSD register. The MSB bytes of the register contain manufacturer data and the two least significant bytes contains the host controlled data - the card Copy and write protection and the user ECC register.The host can read the CSD register and alter the host controlled data bytes using the SEND_CSD and PROGRAM_CSD commands.2.7 SPI ModeThe SPI mode is a secondary (optional) communication protocol offered for MultiMediaCard. This mode is a subset of the MultiMediaCard protocol, designed to communicate with an SPI channel, commonly found in Motorola’s (and lately a few other vendors’) microcontrollers.2.7.1 Negotiating Operation ConditionsThe operating condition negotiation function of the MultiMediaCard bus is not supported in SPI mode. The host must work within the valid voltage range (2.7 to 3.6 volts) of the card.2.7.2 Card Acquisition and IdentificationThe card acquisition and identification function of the MultiMediaCard bus is not supported in SPI mode. The host must know the number of cards currently connected on the bus. Specific card selection is done via the CS signal.2.7.3 Card StatusIn SPI mode only 16 bits (containing the errors relevant to SPI mode) can be read out of the MultiMediaCard status register.2.7.4 Memory Array PartitioningMemory partitioning in SPI mode is equivalent to MultiMediaCard mode. All read and write commands are byte addressable.2.7.5 Read and Write OperationsIn SPI mode, only single block read/write mode is supported.2.7.6 Data Transfer RateIn SPI mode only block mode is supported. The typical access time (latency) for each data block, in read operation, is 1.5mS. The write typical access time (latency) for each data block, in read operation, is 1.5mS. The write block operation is done in handshake mode. The card will keep DataOut line low as long as the write operation is in progress and there are no write buffers available.2.7.7 Data Protection in the MultiMediaCardSame as for the MultiMediaCard mode.2.7.8 EraseSame as in MultiMediaCard mode2.7.9 Write ProtectionSame as in MultiMediaCard modeFigure 3-1 Timing Diagram of Data Input and Output3.5 Physical SpecificationsDimensions of Normal MMC(24mm x 32mm x 1.4mm)Dimensions of RS-MMC(24mm x 18mm x 1.4mm)rising and falling edges). If the host does not allow the switchable R OD implementation, a fix R CMD can be used. Consequently the maximum operating implementation, a fix R CMD can be used. Consequently the maximum operating frequency in the open drain mode has to be reduced in this case.4.4 SPI Bus Topology4.4.1 SPI Interface ConceptThe Serial Peripheral Interface (SPI) is a general-purpose synchronous serial interface originally found on certain Motorola micro-controllers. The MultiMediaCard SPI interface is compatible with SPI hosts available on the market. As any other SPI device the MultiMediaCard SPI channel consists of the following 4 signals:- CS : Host to card chip select signal- CLK : Host to card clock signal- DataIn : Host to card data signal- DataOut : Card to host data signalAnother SPI common characteristic, which is implemented in the MultiMediaCard card as well, is byte transfers. All data tokens are multiples of 8 bit bytes and always byte aligned to the CS signal. The SPI standard defines the physical link only and not the complete data transfer protocol. The MultiMediaCard uses a subset of the MultiMediaCard protocol and command set.4.4.2 SPI Bus TopologyThe MultiMediaCard card identification and addressing algorithms are replaced by hardware Chip Select (CS) signal. There are no broadcast commands. A card (slave) is selected, for every command, by asserting (active low) the CS signal (see Figure 4-3). The CS signal bust is continuously active for the duration of the SPI transaction (command, response and data). The only exception is card-programming time. At this time the host can de-assert the CS signal without affecting the programming process. The bi-directional CMD and DAT lines are replaced by unidirectional dataIn and dataOut signals. This eliminates the ability of executing commands while data is being read or written and, therefore, eliminates the sequential and multi block read/write operations. The SPI channel supports only single block read/write.Figure 4-3 SPI Bus SystemReadThe read access time is defined as the sum of the two times given by the CSD parameters TAAC and NSAC (refer to Table “Card Specific Data (CSD)”). These card parameters define the typical delay between the end bit of the read command and the start bit of the data block. This number is card dependent and should be used by the host to calculate throughput and the maximal frequency for stream read.WriteThe R2W_FACTOR field in the CSD is used to calculate the typical block program time obtained by multiplying the read access time by this factor. It applies to all write/erase commands (e.g. SET(CLEAR)_WRITE_PROTECT, PROGRAM_CSD(CID) and the block write commands). It should be used by the host to calculate throughput.EraseThe duration of an erase command will be (order of magnitude) the number of sectors to be erased multiplied by the block write delay.4.8 Card Identification ModeAll the data communication in the card identification mode uses only the command line (CMD). MultiMediaCard State Diagram (Card Identification Mode)Figure 4-2 MultiMediaCard State Diagram (Card Identification Mode)The host starts the card identification process in open drain mode with the identification clock rate f OD(generated by a push pull driver stage). The open drain driver stages on the CMD line allow the parallel card operation during card identification. After the bus is activated the host will request the cards to send their valid operation conditions with the command SEND_OP_COND (CMD1). Since the bus is in open drain mode, as long as there is more than one card with operating conditions restrictions, the host gets in the response to the CMD1 a “wired or” operation condition restrictions of those cards. The host then must pick a common denominator for operation and notify the application that cards with out of range parameters (from the host perspective) are connected to the bus. Incompatible cards go into Inactive State (refer to also Chapter “Operating Voltage Range Validation”). The busy bit in the CMD1 response can be used by a card to tell the host that it is still working on its power-up/reset procedure (e.g. downloading the register information from memory field) and is not ready yet for communication. In this case the host must repeat CMD1 until the busy bit is cleared. After an operating mode is established, the host asks all cards for their unique card identification (CID) number with the broadcast command ALL_SEND_CID (CMD2).All not already identified cards (i.e. those which are in Ready State) simultaneously start sending their CID numbers serially, while bit-wise monitoring their outgoing bitstream. Those cards, whose outgoing CID bits do not match the corresponding bits on the command line in any one of the bit periods, stop sending their CID immediately and must wait for the next identification cycle (cards stay in the Ready State). There should be only one card which successfully sends its full CID-number to the host. This card then goes into the Identification State. The host assigns to this card (using CMD3, SET_RELATIVE_ADDR) a relative card address (RCA, shorter than CID), which will be used to address the card in future communication (faster than with the CID). Once the RCA is received the card transfers to the Standby State and does not react to further identification cycles. The card also switches the output drivers from the open-drain to the push-pull mode in this state. The host repeats the identification process as long as it receives a response (CID) to its identification command (CMD2). When no card responds to this command, all cards have been identified. The time-out condition to recognize this, is waiting for the start bit for more than 5 clock periods after sending CMD24.8.1 Operating Voltage Range ValidationThe MultiMediaCard standards operating range validation is intended to support reduced voltage range MultiMediaCards. The MultiMediaCard supports the range of 2.7 V to 3.6V supply voltage. So the MultiMediaCard sends a R3 response to CMD1 which contains an OCR value of 0x80FF8000 if the busy flag is set to “ready” or 0x00FF8000 if the busy flag is active (refer to Chapter “Responses”). By omitting the voltage range in the command, the host can query the card stack and determine the common voltage range before sending out-of-range cards into the Inactive State. This bus query should be used if the host is able to select a common voltage range or if a notification to the application of non usable cards in the stack is desired. Afterwards, the host must choose a voltage for operation and reissue CMD1 with this condition sending incompatible cards into the Inactive State.4.9 Data Transfer ModeWhen in Standby State, both CMD and DAT lines are in the push-pull mode. As long as the content of all CSD registers is not known, the f PushPull clock rate is equal to the slow f OpenDrain clock rate. SEND_CSD (CMD9) allows the host to get the Card Specific Data (CSD register), e.g. ECC type, block length, card storage capacity, maximum clock rate etc..。

25LC640中文翻译资料山东泰开自动化李凯设备选择表(25AA640 25C640 )64K SPI 总线串口EEPROM：封装类型：方块图特征：●低功率COMS工艺-写电流：3mA标准-读电流：500u标准-待机电流：500nA标准●8192×8位组织●32字节页●写周期时间：5mA最大●自动同步擦除和写入周期●块写入保护-未保护，1/4，1/2，或全部数组●内置的写保护-电源开/关数据保护电路-写允许锁存器-写保护管脚●连续读●高可靠性-耐久度：1M周期（可保证的）-数据保持：大于200年-静电防护：大于4000V●8脚PDIP,SOPC,和TSSOP封装●温度范围支持;-商业级：（C) 0℃至 +70℃-工业级：（I) -40℃至 +85℃-汽车级：（E) -40℃至 +125℃说明：美国微芯科技公司的25AA640/25LC640/25C640(25XX640)是64K比特电可擦除PROM。

这个存储器的使用通道是简单串行外围接口（SPI）兼容串行总线。

这个总线信号需要时钟输入（SCK)加单独数据在（SI)和数据输出（SO)连线。

进入装置的控制是通过芯片选择（CS)输入。

通信到装置能够暂停通道保持管脚（HOLD)。

虽然装置是暂停，转变在输入将是忽略，除了志片的选择，允许主动服务较高优先级的中断。

1.0电气特性图形1-1： AC 测试电路1.1 最大等级Vcc .................................7.0V全部输入和输出w.r.t.Vss...-0.6至Vcc+1.0V储存温度.....................-65℃至150℃引线的焊接温度（10秒） (300)静电保护在全部管脚...................4kV注意：强调以上这些列出关于“最大等级”可能引出永久损伤到设备。

这强调的等级仅和设备的功能操作，而且那些或任何其它的条件超出那些声明在说明书的操作表中是未隐含的。