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MP-HW80EVAL-01MP-HW80EVAL-01Analog DC-DC Evaluation BoardUser GuidePRELIMINARY1.IntroductionMP-HW80EVAL-01 Evaluation Board User GuideThe MP-HW80EVAL-01 Evaluation Board is designed to assist with the evaluation of the IRH-W80, 250W, 10:1input range DC/DC converter module from Murata Power Solutions. The IRH-W80 series of isolated regulatedconverter modules, deliver an impressive 250W single output from a wide input range of 16V – 160Vdc, complyingwith the input battery voltage transient range of EN50155.The half brick module offers high efficiency levels up to 90%, with an input – output isolation voltage of 4242Vdc.The module features Overvoltage, Overcurrent, Short Circuit, Adjustable output voltage, Adjustable Current Limit,Positive or Negative Logic enable, Pulse output signal and Hold up function for an external capacitor. See Page 10for full schematic.Figure 1 – Evaluation BoardMP-HW80EVAL-01Analog DC-DC Evaluation BoardUser GuidePRELIMINARY2.Setup2.1 ConnectionsThis section describes the connector locations/pinouts on the evaluation board, to enable correct set up.Figure 2 - Connectors Position / Resistor Functions (Top View)H1 Input Voltage ConnectorH2 Signal Connector Resistor / Function Pin 1 VIN- Pin 1 PULSE R1 UVLOPin 2 VIN- Pin 2 VIN- R2 TRIM DOWNPin 3 VIN+ Pin 3 ON/OFF R3 TRIM UPPin 4 VIN+ Pin 4 PE R4 CHARGER5 SENSE (+) H3 Output Voltage Connector H4 External Hold Up Connector R6 SENSE (-)Pin 1 VOUT- Pin 1 VIN- R7 OCPPin 2 VOUT- Pin 2 CHOLD+ R1, R2, R3, R5, R6, R7 = SMD0805 Pin 3 VOUT+Pin 4 VOUT+MP-HW80EVAL-01Analog DC-DC Evaluation BoardUser GuidePRELIMINARY2.2 On Board Component Values2.2.3 OCP Resistor ValueR7 = OCP – Overcurrent Protection.By adding a resistor SMD0805 to position R7 on the PCB, it is possible to set the overcurrent threshold point.Leave unconnected if not used.Figure 3 - OCP Resistor SelectionR7 OCP Value 562Ω 665Ω 845Ω 1.13kΩ 1.69kΩ 3.32kΩ 6.65kΩ 10kΩ Open 24Vin 14.5A 16.2A 18.2A 20.2A 22.4A 24.3A 25A 25.5A 26A48Vin 15.5A 17.4A 19.4A 21.1A 23A 24.5A 25.4A 25.9A 26.5A72Vin 15.5A 17.4A 19.4A 21.1A 23A 24.5A 25.4A 25.9A 26.5A110Vin 11.6A 14A 17.1A 19.8A 22.1A 24.5A 25.4A 25.8A 27A2.2.4 Under Voltage Lockout. (UVLO)By adding a SMD0805 resistor to R1 position as per the table below, the converter will shut down if the inputvoltage drops below the threshold. The converter will automatically restart when the input voltages rises above theUVLO threshold. Leave unconnected if not used.Figure 4 - UVLO Resistor Value TableVin 24V 36V 48V 72V 96V 110VTurn Off 10V-12V 17.5V-19.5V 26V-28V 40V-43V 56V-60V 65V-70VTurn On 13V-15V 22V-24V 31V-34V 48V-51V 68V-72V 80V-84VResistor Value Open 27.4kΩ 13kΩ 6.8kΩ 4.3kΩ 3.57kΩ2.2.5 Output Voltage Trim ResistorsR3 and R2 – Trimming the Output Voltage.The trim pin of the converter allows the user to adjust the output either +10% or -20% by using SMD0805fixed value resistors.Figure 5 - Output Trim Resistor Values12V OutputOutput Voltage 9.6V 10.8V 11.4V 12.6V 13.2VR3 - Trim Up NA NA NA 188kΩ 97kΩR2 - Trim Down 4kΩ 8.9kΩ 18.7kΩ NA NAMP-HW80EVAL-01Analog DC-DC Evaluation BoardUser GuidePRELIMINARY2.2.6 Sense ConnectionsIf intended to utilize the output sense feature, please ensure that you short out, or add a zero ohm link in positionsR5, Sense (+) and R6, Sense (-). If it is proposed to use the sense function, then please leave R5 and R6 opencircuit, and connect output sense lines to the load. The sense connections can compensate up to 0.5V voltage dropof output leads.Figure 6 - Remote Sense Connection2.2.7 Hold Up CircuitThe BUS pin of the IRH250W80 module, is a voltage source output of 80Vdc to allow external capacitors to be connected in order to provide hold up power of the converter. The eval board houses a resistor (R4) to slowlycharge the capacitors up, and a feed forward diode (D1) for rapid discharge into the module during hold up mode.The capacitor value can be as per the below table to provide 10msec or 20msec of hold up. Connect the capacitorto H4 Pin 1 = VIN-, Pin 2 = CHOLD+. As per Figure 2.Figure 7 - Hold-Up Capacitor ValuesHold-up time 24Vin36Vin 48Vin 72Vin 96Vin 110Vin 10ms 2200uF 2200uF 2200uF 2200uF 1100uF 700uF20ms 4400uF 4400uF 4400uF 4400uF 2200uF 1400uF2.2.8 External FusingThe evaluation board does not have any fusing protection, the user must provide external fusing, circuit breaker protection as required.MP-HW80EVAL-01Analog DC-DC Evaluation BoardUser GuidePRELIMINARY2.2.9 Pulse OutThis pin outputs a 1kHz 50% duty cycle pulse voltage with 12V amplitude. It is designed to provide a bootstrapsignal for the input inrush current limit circuit and could also indicate operating status with a LED connected.Leave unconnected if not used.2.2.10 On/Off ControlConnect the On/Off pin (Pin 3, H2) to -VIN (Pin 2, H2) connection if “Negative” logic level is used in the part numberof the IRH-W80. Leave the On/Off pin open if “Positive” logic level is used.Note: A mechanical On/Off switch is also provided on the top side of the evaluation board.MP-HW80EVAL-01Analog DC-DC Evaluation BoardUser GuidePRELIMINARY3. EMI CircuitThe following schematic below meets EN55011 Class A.Figure 8 - EMI SchematicFigure 9 - EMI BOMReference Manufacturer MPN Type Specifications QtyMOV1 Epcos B72214S0141K101 Varistor 180V, 36J 1TVS1 Littel Fuse 1.5KE220A TVS diode 185V, 1.5KW 1C1 Faratronic C212E475K9AC000 Polyester capacitor 250V, 4.7uF 1C2, C3, C4 Murata GRM43DR72E474KW01L Capacitor MLCC 250V, 0.47uF 3C5, C6, C11, C12, C13, C14 Murata DE1E3RA102MA4BQ01F Safety ceramic cap 500V, 1000pF 6C9, C10 NCC EKXJ251EXX271ML40S E-cap 250V, 270uF 2C15, C16 Murata DE1E3RA472MA4BQ01F Safety ceramic cap 500V, 4700pF 2L1 Wurth 7448262013 CM choke 1.3mH, 20A 1L2, L3 Bourns 2300HT-220-V-RC1951 DM choke 22uH, 19A 2C7, C8 NA NOT USED NA NA 0C17, C18 NA NOT USED NA NA 0MP-HW80EVAL-01Analog DC-DC Evaluation BoardUser GuidePRELIMINARYFigure 10 - EMI ResultsLimit Line as per EN55011 level AVin = 110V, Line LMP-HW80EVAL-01Analog DC-DC Evaluation BoardUser GuidePRELIMINARY4. Circuit SchematicMP-HW80EVAL-01Analog DC-DC Evaluation BoardUser GuidePRELIMINARY5. Mechanical Drawings / Dimensions3: UNIT WEIGHT = 690 gramsMP-HW80EVAL-01 Analog DC-DC Evaluation Board User GuideDCAN-70_MP-HW80EVAL-01_A01.D08 Page 12 of 12PRELIMINARY6. Packaging InformationMurata Power Solutions, Inc.129 Flanders Rd., Westborough, MA 01581 USAISO 9001 and 14001 REGISTERED This product is subject to the following operating requirements and the Life and Safety Critical Application Sales Policy : Refer to: /requirements/Murata Power Solutions, Inc. makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change w ithout notice. © 2021 Murata Power Solutions, Inc.MP-HW80EVAL-01。
Vishay SiliconixSi4946BEYDocument Number: Dual N-Channel 60-V (D-S) 175 °C MOSFETFEATURES•Halogen-free According to IEC 61249-2-21Definition•TrenchFET ® Power MOSFET•175 °C Maximum Junction Temperature •100 % R g Tested•Compliant to RoHS directive 2002/95/ECPRODUCT SUMMARYV DS (V)R DS(on) (Ω)I D (A)Q g (Typ.)600.041 at V GS = 10 V 6.59.2 nC0.052 at V GS = 4.5 V5.8Notes:a. Surface Mounted on 1" x 1" FR4 board.b. t = 10 s.c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.d. Maximum under Steady State conditions is 110 °C/W. ABSOLUTE MAXIMUM RATINGS T A = 25 °C, unless otherwise notedarameter Symbol Limit UnitDrain-Source Voltage V DS 60VGate-Source VoltageV GS± 20Continuous Drain Current (T J = 150 °C)T C = 25 °CI D 6.5A T C = 70 °C 5.5T A = 25 °C 5.3a, b T A = 70 °C4.4a, b Pulsed Drain CurrentI DM 30Continuous Source Drain Diode Current T C = 25 °C I S 3.1T A = 25 °C 2a, b Avalanche CurrentL = 0 1 mH I AS 12Single-Pulse Avalanche EnergyE AS 7.2mJ Maximum Power DissipationT C = 25 °CP D 3.7W T C = 70 °C 2.6T A = 25 °C 2.4a, b T A = 70 °C1.7a, b Operating Junction and Storage T emperature RangeT J , T stg - 55 to 175°C THERMAL RESISTANCE RATINGSarameter Symbol Typical Maximum UnitMaximum Junction-to-Ambient a, c t ≤ 10 s R thJA 5062.5°C/WMaximum Junction-to-Foot (Drain)Steady StateR thJF3341 Document Number: 73411Vishay SiliconixSi4946BEYNotes:a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.b. Guaranteed by design, not subject to production testing.Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.SPECIFICATIONS T J = 25 °C, unless otherwise notedarameter Symbol Test Conditions Min.Typ.Max.Unit StaticDrain-Source Breakdown Voltage V DS V GS = 0 V , I D = 250 µA60VV DS Temperature Coefficient ΔV DS /T J I D = 250 µA 53mV/°C V GS(th) Temperature Coefficient ΔV GS(th)/T J - 6.7Gate-Source Threshold Voltage V GS(th) V DS = V GS , I D = 250 µA 1.02.43.0VGate-Source LeakageI GSS V DS = 0 V , V GS = ± 20 V ± 100 nAZero Gate Voltage Drain Current I DSS V DS = 60 V, V GS = 0 V 1µA V DS = 60 V , V GS = 0 V, T J = 55 °C10On-State Drain Current aI D(on) V DS ≥ 5 V , V GS = 10 V 30A Drain-Source On-State Resistance a R DS(on) V GS = 10 V , I D = 5.3 A 0.0330.041ΩV GS = 4.5 V , I D = 4.7 A 0.0410.052Forward T ransconductance a g fs V DS = 15 V , I D = 5.3 A24SDynamicbInput Capacitance C iss V DS = 30 V, V GS = 0 V , f = 1 MHz 840pFOutput CapacitanceC oss 71Reverse Transfer Capacitance C rss 44Total Gate Charge Q g V DS = 30 V, V GS = 10 V, ID = 5.3 A 1725nCV DS = 30 V , V GS = 5 V, I D = 5.3 A9.212Gate-Source Charge Q gs 3.3Gate-Drain Charge Q gd 3.7Gate Resistance R g f = 1 MHz3.16.59.5ΩTurn-On Delay Time t d(on) V DD = 30 V , R L = 6.8 ΩI D ≅ 4.4 A, V GEN = 4.5 V , R g = 1 Ω2030nsRise Timet r 120180Turn-Off Delay Time t d(off) 2030Fall Timet f 3045Turn-On Delay Time t d(on) V DD = 30 V , R L = 6.8 Ω I D ≅ 4.4 A, V GEN = 10 V , R g = 1 Ω1015Rise Timet r 1220Turn-Off Delay Time t d(off) 2540Fall Timet f1015Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current I S T C = 25 °C3.1A Pulse Diode Forward Current a I SM 30Body Diode VoltageV SD I S = 2 A0.8 1.2V Body Diode Reverse Recovery Time t rr I F = 4.4 A, dI/dt = 100 A/µs, T J = 25 °C2550ns Body Diode Reverse Recovery Charge Q rr 2550nC Reverse Recovery Fall Time t a 18nsReverse Recovery Rise Timet b7Document Number: On-Resistance vs. Drain Current and Gate VoltageTransfer CharacteristicsCapacitance Document Number: 73411Vishay SiliconixSi4946BEYTYPICAL CHARACTERISTICS 25°C, unless otherwise notedSource-Drain Diode Forward VoltageThreshold VoltageOn-Resistance vs. Gate-to-Source VoltageSingle Pulse Power, Junction-to-AmbientDocument Number: Vishay SiliconixSi4946BEYTYPICAL CHARACTERISTICS 25°C, unless otherwise noted* The power dissipation P D is based on T J(max) = 175 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit.Current Derating*Power, Junction-to-CaseSingle Pulse Avalanche CapabilitySi4946BEYVishay SiliconixTYPICAL CHARACTERISTICS 25°C, unless otherwise notedNormalized Thermal Transient Impedance, Junction-to-CaseVishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see /ppg?73411. Document Number: 73411Vishay SiliconixPackage InformationDocument Number: DIM MILLIMETERSINCHESMin Max Min Max A 1.35 1.750.0530.069A 10.100.200.0040.008B 0.350.510.0140.020C 0.190.250.00750.010D 4.80 5.000.1890.196E 3.804.000.1500.157e 1.27 BSC0.050 BSCH 5.80 6.200.2280.244h 0.250.500.0100.020L 0.500.930.0200.037q 0°8°0°8°S0.440.640.0180.026ECN: C-06527-Rev. I, 11-Sep-06DWG: 5498V I S H A Y S I L I C O N I XTrenchFET ® Power MOSFETsMounting LITTLE FOOT ®, SO-8 Power MOSFETsA P P L I C A T I O N N O T EWharton McDanielSurface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same.See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (/ppg?72286), for the basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package.In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board.Figure 1. Single MOSFET SO-8 Pad Pattern With Copper SpreadingFigure 2. Dual MOSFET SO-8 Pad PatternWith Copper SpreadingThe minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose.Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically.A final item to keep in mind is the width of the power traces.The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device.Application Note 826Vishay SiliconixA P P L I C A T I O N N O T ERECOMMENDED MINIMUM PADS FOR SO-8Legal Disclaimer Notice VishayDisclaimerALL PRODU CT, PRODU CT SPECIFICATIONS AND DATA ARE SU BJECT TO CHANGE WITHOU T NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product.Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability.Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein.Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.Material Category PolicyVishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (EEE) - recast, unless otherwise specified as non-compliant.Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards.Revision: 02-Oct-121Document Number: 91000。
MBS-SAM9G15/9G25 /9G35/9X25/9X35 User ManualRelease：V1.0 Date：2012.04.17Embest Info&Tech Co.,LTD.Revision historyRev Date Description by1.0 20120417 Initial version huangyin Note:This user guide introduces the ARM embedded evaluation board produced by Embest , based on A TMEL ARM926 -EJ-S-based processors as listed below:A T91SAM9G15A T91SAM9G25A T91SAM9G35A T91SAM9X25A T91SAM9X35The user guide pertains to the following kit references:MBS-SAM9G15MBS-SAM9G25MBS-SAM9G35MBS-SAM9X25MBS-SAM9X35The user guide gives design information on the kit and is made up of 4 sections:Section 1 includes a photo of the board, deliverables and applicable documents.Section 2 describes the hardware resource of the board.Section 3 describes the updating software list of the board.Section 4 provides the ways to contact us.This document copyright belongs to embest technology Co., LTD. © 2012In the passage , 9X5 serial general means 9G15,9G25,9G35,9X25,9X35.Section 1_Scope1.1 IntroductionThe MBS-SAM9X5 Series development board, which consists of two parts of the MBC-SAM9X5 core board and MBM-SAM9X5_9M10 main board, is the Embest launched based on the development board the A TMEL A T91SAM9X5. The core board is the smallest-sized 9X5 core board to help you as much as possible to reduce the product space, you can take advantage of the core board to complete product development easily and improve time to hit the market. Using industrial-grade connectors can achieve seamless connection with the custom main board, greatly improving the stability of the product.MBS-SAM9X5 SBC clocked up to 400MHz, the development board that supportsLinux-2.6.39 operating system debugging, angstrom, and the android-2.3.5_r1 file system test. With 256MB NandFlash, 128MB of DDR II, 4MB serial dataflash, 64KBserial eeprom, and a rich feature set expansion: high-speed USB 2.0 (480MHz), audio input, audio output, 10/100Mbps network, the JTAG debug interface, DBGU serial Micro SD card slot, SD/MMC card interface, CMOS camera interface, support for video data acquisition.1.2 Scope1.3 DeliverablesNO Items Qty Description Inspection1 MBS-SAM9X5 board 1 MBC + MBM SC2 Power Adapter (5V, 1.25A rating) 1 5V, 1.25A SC3 Micro USB Cable 1 Micro USB SC4 10/100 Ethernet Cable 1 Cross-over cable SC5 DB9-IDC10 Cable 1 Serial cable SC7 TFT LCD Panel 1 LCD with touch（4'', 7''）SCSection 2_Hardware2.1 Available resource for 9x5projects 9G15 9G25 9G35 9X25 9X35MPUs AT91SAM9G15/9G25/9G35/9X25/9X35(ARM926EJ-Score frequency400MHz) learn more <<memory 128MB SDRAMFlash256MB nandflash; 4MB serial dataflash;EEPROM64KB serial eeprom;256B 1-wire eeprom *2 (MBC+MBM)USBUSB HOST 2 2 2 2 2USB OTG 1 1 1 1 1 AudioAudio in 1 1 1 1 1Audio out 1 1 1 1 1 NET ETH 0 1 1 2 1 Camera Camera 0 1 0 0 0 UartUART interface 1 1 1 1 1USART interface 1 2 1 2 1 JTAG JTAG 1 1 1 1 1 RS485 RS485 2 2 2 2 2 CAN CAN 0 0 0 2 2 SD cardMicroSD 1 1 1 1 1SDCard 1 1 1 1 1 telephone telephone 1 1 1 1 1 LCD 4.3,7.0inch LCD 1 0 1 0 1button User button*2；Q touch button*41 1 1 1 1RTC Back up battery 1 1 1 1 1 Extended 30*2pin interface 1 1 1 1 1power 5V supply 1 1 1 1 1 2.2 Core Board2.2.1 ScopeFigure 2-1 core board frontFigure 2-2 core board back2.2.2 Structure2.2.3 Core board resourcesProcessor SAM9X5(SAM9G15/9G25/9G35/9X25/9X35)12MHz32.768MHz128MB DDR2 memory256MB nandflash memory with chip selection control switch4MB SPI Serial dataflash with chip selection control switch64KB EEPROM256B 1-wire EEPROMOn-board power regulationTwo user LEDsOptional PHYSDIOIMM200 card edge interface2.3 Function blocks for MBC-SAM9G15Here we make description about function blocks of the board with some parts of the schematic. For the whole schematic please refer to MBC-SAM9X5_REVB(embest).pdf and MBM_SAM9X5_9M10_RevA(embest).pdf (direct:)2.3.1 processorSAM9G15---ARM926EJ-S™ ARM® Thumb® Processor running at up to 400 MHz, System running at up to 133 MHz For more information about processor ATSAM9G15, please refer to SAM9G15 Complete.pdf or SAM9G15 Summary.pdf ()2.3.2 clock circuitryCrystal for internal clock, 12MHzCrystal for RTC clock, 32.768KHzCrystal for Ethernet clock RMII,50MHz2.3.4 Power supplies2.3.5 MemoryThe device serial processor features a DDR/SDR memory interface and an External Bus Interface to enable interfacing to a wide range of external memories and to almost any kind of parallel peripheral.The EBI is connected to two kinds of memory device:128MB DDR SDRAM256MB nandflash2.3.6 Dataflash(SPI controller)The serial processor provides two high-speed serial peripheral interface (SPI) controllers. One port is used to interface with the on-board serial Dataflash (4MB serial dateflash).2.3.7 EEPROM(TWI controller)The serial processor has a full speed(400KHz) master/slave TWI Serial Controller. The controller is mostly compatible with industry standard I2C and SMBus Interfaces. This port is used to interface with the on-board serial EEPROM,ISI, Qtouch device and audio codec interface.2.3.8 1-wire EEPROMThe board uses a 1-wire device as “firmware label”to store the information such as chip type, manufacturer’s name, production date etc.2.3.9 Optional PHYSome of the core boards (SAM9G15 not included) provide a location for a 10/100 Ethernet MAC/PHY interface. For more information about the Ethernet controller device, refer to the Dacvicom DM9161 controller manufacturer’s datasheet.2.3.10 SODIMM200 interface2.4 Main BoardThe main board is compatible with both the the 9m10 core board and 9x5 series core board.2.4.1 resourcesONE WIRE EPPROM(1024-bit);1 JTAG DEBUG interface;1 Camera interface(9m10 & 9G25);2 24-bit LCD interfaces(with touch);1 DBGU serial interface(3 wires);2 communication serial interfaces(5-wire & 3-wire);2 10/100Mb Ethernet interfaces;Note: 9m10 1; 9G15, 9G25, 9X35, 9G35 1; 9X25 22 RS485 interfaces;2 CANinterfaces;1 SmartDAA interface;2 USB 2.0 Host interfaces;Note: 9m10 1 (USB_A); 9x5 2 (USB_B & USB_C);1 USB high speed USB2.0 OTG interface;Note: 9m10(USB_B) and 9X5(USB_A) OTG interface;4 buttons (QTOUCH);2 buttons (reset, wakeup);1 Micro SD interface;1 SD card interface;3 LEDs;1 audio input and output interface;1 backup battery holder;User interface (50 GPIOs).2.4.2 Electrical CharacteristicsPower: 5V, 2A;Operating Temperature: 0~70C;Power Consumption: to be confirmed2.4.3 Mechanical and Physical CharacteristicsSize: 181x125mm;Board layer: 4;Board thickness: 6mm;Interface type: DIMM 200 Pins2.5 Function blocks for MBM-SAM9G152.5.1 Power supply2.5.2 AUDIOThe board includes a WM8731 CODEC for digital sound input and output. This interface includes audio jacks for line audio input and headphone line output.The SAM9 processor is configured in IIS slave mode to interface with the WM8731 Codec.2.5.3 Ethernet 0 interfaceEthernet 0 is available for the core board which has a optional PHY.2.5.4 Ethernet1Etherne1 is only available for SAM9X25, The PHY on Ethernet 1 is enabled by the SELCONFIG signal from a pull-down resistor on the core board.2.5.5 SD/MMC CardThe board has two high-speed Multi Media Card Interface. The first interface is used as a 4-bit interface (MCI0), connected to a MicroSD card slot. The second interface is used as a 4-bit Interface (MCI1), connected to an SD/MMCcard slot.2.5.6 1-wire EEPROM2.5.7 USB moduleThe board contains two USB HOST interfaces and an USB OTG interface.2.5.8 DBGUThe DBGU is connected to the DB-9 male socket through an RS-232 Transceiver (TXD and RXD only).2.5.9 USARTsThe USART0 and USART3 are used as serial communication ports. Both USARTs are buffered with an RS-232 Transceiver and connected to the DB-9 male socket. USART0 just own TXD and RXD signal, and USART3 equips addition handshake CTS/RTS control.The USART3 is only supported by SAM9G25 and SAM9X25 processors.USART0USART32.5.10 CANTwo boards(MBS-SAM9X35 and MBS-SAM9X25), feature two controller area network (CAN) ports with transceiver.2.5.11 RS485Two RS485 interfaces.2.5.12 JTAGSoftware debug is accessed by a standard 20-pin JTAG connection.2.5.13 Qtouch2.5.13 LCD interface 4.3 inch LCD interface7.0 inch LCD interface2.5.14 ISI Interface2.5.15 Telephone interfaceThe board features a smart DAA(DATA Access Arrangement) chip to drive an analog telephone line.2.5.16 Key2.5.17 RTC Power2.5.18 user interface2.6 Jumpers2.6.1 SW1 settingsNO. Setting 1 Nandflash enable 2 Dataflash enable2.6.2 SW2 settingsIt ’s used for matching Audio Lord the clock signal of the 9x5 core board NO. Settings 1 Do not care 2 Close 3 Open 4Close2.6.3 JP jumpersNO. settingsdefault JP1close ：force powerclose JP2,JP3,JP4,JP5,JP6.JP7, close ：enable RS485 terminal resistance open JP8,JP10close ：enable CAN terminal resistance openJP9 close ：DBGU available open ： CAN availableNote: if you download image to the board throughUSB, you must close the jumperclose JP11close: enable camera interface （for 9G25）openJP12 Open: disable external flashClose: enable external flash closeJP14,JP15 1-2：RS485 for 9M10 core 2-3：RS485 for 9x5 coreSection 3_Software (updating)3.1 MDK resourcesARM9 productsprojects9G15 9G25 9G35 9x25 9x35 adc √√√√√can × × × √√dma √√√√√eeprom √√√√√Emac(eth1) × × × √×getting-started √√√√√Hsmci_multimedia_card √√√√√Hsmci_sdcard √√√√√Hsmci_sdio √√√√√LCD_4.3 √× √× √LCD_7.0 √× √× √LCD_10.2 √× √× √periph_protect √√√√√pmc_clock_switching √√√√√pwm √√√√√qtouch √√√√√Rs485_loopback √√√√√Rs485_twoport √√√√√Smc_nandflash √√√√√Spi_serialflash √√√√√Ssc_dma_audio √√√√√sysc √√√√√tc_capture_waveform √√√√√Touchscreen_4.3 √× √× √Touchscreen_7.0 √× √× √twi √√√√√Usart_serial_COM0 √√√√√Usart_serial_COM3 × √× √× Usart_hw_handshaking_COM3 × √× √× usb_audio_looprec √√√√√usb_cdc_serial √√√√√usb_core √√√√√usb_hid_keyboard √√√√√usb_hid_mouse √√√√√usb_hid_msd √√√√√usb_hid_transfer √√√√√usb_iad_cdc_cdc √√√√√usb_iad_cdc_hid √√√√√usb_iad_cdc_msd √√√√√usb_masstorage √√√√√3.2 Linux resourcesnote ：(1) “√”--included, “×”-- not included; (2) Free and open CategoriesDrivers 9G159G259G359X259X359x5BootloaderAT91BootstrapLead Uboottested, free&openUboot1. NandFlash erasing ,reading and writing2.support network download images3. Support the establishment, save the environmentvariable4. Support the memory contents display, contrast,and modification5. Support bootm 、bootargs settingstested, free&openkernelnetETH0× √ √ √ √ tested, free&open ETH1 × × × √ × tested, free&open serialUSART0√ √ √ √ √ tested, free&open USART3 × √ × √ × tested, free&open DBGU √ √ √ √ √ tested, free&open CANCAN0× × × √ √ untested, providecodes CAN1 × × × √ √ untested, providecodes USBUSB_HOST*2 √ √ √ √ √ tested, free&open USB_OTG √ √ √ √ √ tested, free&open SMD 驱动√ √ √ √ √ provide hardware interface only SDcardMicroSD√ √ √ √ √ tested, free&open SDCard√ √ √ √ √ tested, free&open camera (ISI) × √ × × × untested, providecodes LCD+touch √ × √ × √ tested, free&open Zigbee√ √ √ √ √ provide hardware interface only SPI√√√√√reuse, unregistered equipmentTWI √√√√√tested, free&openQtouch √√√√√tested, free&openDMA √√√√√tested, free&openGPIO √√√√√tested, free&openAngstrom √√√√√provide file system File systemAndroid √× √× √provide file systemSection 4_Purchase and serviceIf you are interested in the board ,you may connect:Sales and marketing: **********************For Technical Support: ************************URL: /en/。
1SWCU181C–January 2016–Revised September 2016Submit Documentation FeedbackCopyright ©2016,Texas Instruments IncorporatedTPS659114for Freescale i.MX6Dual/Quad User's Guide User's GuideSWCU181C–January 2016–Revised September 2016TPS659114for Freescale i.MX6Dual/Quad User's Guide1IntroductionThis document is an application note describing the EEPROM configuration and the power-up sequence of the TPS659114power-management integrated circuit (PMIC).For details of the PMIC features and performance,refer to the full specification document TPS65911data manual (SWCS049).SWCU181-0012.7V < Vin <3.6V If LDO1 or LDO2usedPlatform Connection 2SWCU181C–January 2016–Revised September 2016Submit Documentation FeedbackCopyright ©2016,Texas Instruments IncorporatedTPS659114for Freescale i.MX6Dual/Quad User's Guide2Platform ConnectionFigure 1.Connecting TPS659114to Freescale i.MX6 EEPROM Setting3SWCU181C–January 2016–Revised September 2016Submit Documentation FeedbackCopyright ©2016,Texas Instruments IncorporatedTPS659114for Freescale i.MX6Dual/Quad User's Guide 3EEPROM SettingTable 1describes the EEPROM configuration for the TPS659114power-up sequence with BOOT1=1.When a resource is associated to time slot 0,it means that the resource is OFF at power up.Table 1.EEPROM Configuration for TPS659114REGISTERBITDESCRIPTIONOPTION SELECTEDVDD1_OP_REG/VDD1_SR_REG SEL VDD1voltage level selection for boot. 1.5V VDD1_REG VGAIN_SELVDD1gain selection,x1or x2x1EEPROM VDD1time slot selection 7DCDCCTRL_REG VDD1_PSKIP VDD1pulse skip mode enable Skip enabledVDD2_OP_REG/VDD2_SR_REG SEL VDD2voltage level selection for boot 1.1V VDD2_REG VGAIN_SEL VDD2gain selection,x1or x3x3EEPROM VDD2time slot selection 3DCDCCTRL_REG VDD2_PSKIP VDD2pulse skip mode enable Skip enabledVIO_REG SEL[3:9]VIO voltage selection 1.5V EEPROM VIO time slot selection 7DCDCCTRL_REG VIO_PSKIP VIO pulse skip mode enableSkip enabled VDDCtrl_OP_REG/VDDCtrl_SR_REG SELVDDCtrl voltage level selection for boot 1.35V EEPROM VDDCtrl time slot 6LDO1_REG SEL[7:2]LDO1voltage selection 1.8V EEPROM LDO1time slot 5LDO2_REG SEL[7:2]LDO2voltage selection 1.5V EEPROM LDO2time slot 4LDO3_REG SEL[6:2]LDO3voltage selection 2.5V EEPROM LDO3time slot 5LDO4_REG SEL[7:2]LDO4voltage selection 3.0V EEPROM LDO4time slot 1LDO5_REG SEL[6:2]LDO5voltage selection 2.8V EEPROM LDO5time slot 2LDO6_REG SEL[6:2]LDO6voltage selection 3.3V EEPROM LDO6time slot 4LDO7_REG SEL[6:2]LDO7voltage selection 3.3V EEPROM LDO7time slot 4LDO8_REG SEL[6:2]LDO8voltage selection 3.3V EEPROM LDO8time slot 5CLK32KOUT pinCLK32KOUT time slot 8NRESPWRON,NRESPWRON2pin NRESPWRON time slot 9GPIO0pin GPIO0time slot 1GPIO2pin GPIO2time slot 0GPIO6pin GPIO6time slot 0GPIO7pin GPIO7time slotVRTC_REGVRTC_OFFMASK 0=VRTC LDO will be in low-power mode during OFF state.1=VRC LDO will be in full-power mode during OFF state.Full-power modeDEVCTRL_REG CK32K_CTRL 0=Clock source is crystal/external clock.1=Clock source is internal RC oscillator.ExternalEEPROM Setting 4SWCU181C–January 2016–Revised September 2016Submit Documentation FeedbackCopyright ©2016,Texas Instruments IncorporatedTPS659114for Freescale i.MX6Dual/Quad User's GuideTable 1.EEPROM Configuration for TPS659114(continued)REGISTERBITDESCRIPTIONOPTION SELECTEDDEVCTRL_REGDEV_ON0=No impact1=Will maintain device on,in ACTIVE or SLEEP stateDEVCTRL2_REG TSLOT_LENGTH Boot sequence time slot duration:0=0.5ms 1=2ms2msDEVCTRL2_REG PWON_LP_OFF 0=Turn-off after PWRON long press not allowed.1=Turn-off after PWRON long press.1DEVCTRL2_REG PWON_LP_RST 0=No impact1=Reset digital core when device is OFF.0DEVCTRL2_REG IT_POL 0=INT1signal will be active low.1=INT1signal will be active high.Active lowINT_MSK_REGVMBHI_IT_MSK0=Device automatically switches on at NO SUPPLY-to-OFF or BACKUP-to-OFF transition.1=Start-up is reason required before switch-on.1=Start-up requires activity on PWRHOLDor PWRONINT_MSK3_REG GPIO5_F_IT_MSK0=GPIO5falling edge detection interrupt not masked.1=GPIO5falling edge detection interrupt masked.MaskedINT_MSK3_REG GPIO5_R_IT_MSK 0=GPIO5rising edge detection interrupt not masked.1=GPIO5rising edge detection interrupt masked.MaskedINT_MSK3_REG GPIO4_F_IT_MSK 0=GPIO4falling edge detection interrupt not masked.1=GPIO4falling edge detection interrupt masked.MaskedINT_MSK3_REG GPIO4_R_IT_MSK 0=GPIO4rising edge detection interrupt not masked.1=GPIO4rising edge detection interrupt masked.MaskedGPIO0_REG GPIO_ODEN 0=GPIO0configured as push-pull output.1=GPIO0configured as open-drain output.Push-pull WATCHDOG_REGWATCHDOG_EN0=Watchdog disabled1=Watchdog enabled,periodic operation with 100sDisabledVMBCH_REG VMBBUF_BYPASS 0=Enable input buffer for external resistive divider.1=In single-cell system,disable buffer for lower power consumption.Enable bufferVMBCH_REG VMBCH_SEL[5:1]Select threshold for boot gating comparator COMP1,2.5–3.5V.3.1VEEPROMAUTODEV_ON0=PWRHOLD pin is used as PWRHOLD feature.1=PWRHOLD pin is GPI.After power-on,DEV_ON is set high internally,no processor action needed to maintain supplies.PWRHOLD feature implementedEEPROM PWRDN_POL 0=PWRDN signal is active low.1=PWRDN signal is active high.Active low1PWRON button press falling edge 2Valid press after debounce3First step of power up sequence available for DCDC,LDO activation.Time slot (2ms between slots):Event DescriptionEvent:VIO,1.3-A limit LDO6, 300-mA limit LDO7, 300-mA limit VDD1,2-A limit LDO1, 320-mA limit LDO8, 300-mA limit VDDCTRL,6-A+limitCLK32KOUTLDO3, 200-mA limit PWRON buttonVDD_RTC/VRTCLDO4, 50-mA limit LDO5, 300-mA limit VDD2, 1.2-A limit LDO2, 320-mA limit GPIO0, push-pull NRESPWRONEEPROM Setting5SWCU181C–January 2016–Revised September 2016Submit Documentation FeedbackCopyright ©2016,Texas Instruments IncorporatedTPS659114for Freescale i.MX6Dual/Quad User's Guide Figure 2.Timing DiagramGetting Started With 6SWCU181C–January 2016–Revised September 2016Submit Documentation FeedbackCopyright ©2016,Texas Instruments IncorporatedTPS659114for Freescale i.MX6Dual/Quad User's Guide4Getting Started With TPS6591144.1First Initialization4.1.1DCDC Maximum Current CapabilityUpon reset,all buck converters initialize with ILMAX =0,which may not allow proper regulation across all expected loads.In VIO_REG,VDD1_REG,and VDD2_REG,set the ILMAX bit according to the required maximum current.4.1.2I/O Polarity/Muxing ConfigurationVoltage scaling for VDD1,VDD2,and VDDCtrl can be done either through the main I 2C interface orthrough dedicated interface EN1/EN2.Refer to the processor documentation for information on which one is supported.To enable the dedicated voltage scaling interface,set the SR_CTL_I2C_SEL bit to 0in the DEVCTRL_REG register.If sleep mode is supported,program the SLEEPSIG_POL bit in the DEVCTRL2_REG register according to the GPIO from the processor.This can be set to active-low or active-high for SLEEP transitions.Software can configure specific power resources to enter the LOW-POWER or OFF state in sleep mode.In the DEVCTRL_REG register,set the DEV_SLP bit to 1to allow the SLEEP transition when requested through the SLEEP pin.Update the GPIOx configuration (GPIOx_REG)based on the specification needs.4.1.3Define Wake Up/Interrupt Event (SLEEP or OFF)Select the appropriate bits in the INT_MSK_REG,INT_MSK2_REG,and INT_MSK3_REG registers to activate an interrupt to the processor on the INT1line.4.1.4Backup Battery ConfigurationBackup Battery charging is disabled by default.To enable,set the BBCHEN bit to 1in the BBCH_REG register.The maximum voltage can be set based on backup battery specifications by using the BBSEL bits in the BBCH_REG register.4.1.5Sleep Platform ConfigurationSleep mode is disabled by default.To use the sleep pin,sleep mode must first be enabled by setting DEV_SLP to 1in the DEVCTRL_REG.Configure the state of the DC-DCs and LDOs when the SLEEP signal is used.By default,in sleep mode all resources maintain their output voltage and load capability,but response to transients (load change)is reduced.GPIO0can follow sleep state.Resources that must provide full load capability must be set in the SLEEP_KEEP_LDO_ON_REG and SLEEP_KEEP_RES_ON_REG registers.Resources that can be set to off in the SLEEP state to optimize power consumption must be set in the SLEEP_SET_LDO_OFF_REG and SLEEP_SET_RES_OFF_REG registers.4.2Event Management Through InterruptsThis section describes the TPS659114interrupts.4.2.1INT_STS_REG.VMBHI_ITThe VMBHI_IT interrupt bit indicates that a supply (VBAT)is connected (PMIC leaving the BACKUP or NO SUPPLY state)and the system must be initialized (see Section 4.1,First Initialization ).4.2.2INT_STS_REG.PWRON_ITThe PWRON_IT interrupt bit is triggered by pressing the PWRON button.If the device is in the OFF or SLEEP state,then this acts as a wake-up event and resources are reinitialized. Ordering Information7SWCU181C–January 2016–Revised September 2016Submit Documentation FeedbackCopyright ©2016,Texas Instruments IncorporatedTPS659114for Freescale i.MX6Dual/Quad User's Guide 4.2.3INT_STS_REG.PWRON_LP_ITThe PWRON_LP_IT interrupt bit is the PWRON long-press interrupt.This interrupt is generated when the PWRON button is pressed for 4seconds.The application processor can make a decision to acknowledge the interrupt.If this interrupt is not acknowledged within the next second,the device interprets this as a power-down event.4.2.4INT_STS_REG.HOTDIE_ITThe HOTDIE_IT interrupt bit indicates that the temperature of the die is reaching the limit.The software must take action to decrease the power consumption before automatic shutdown.4.2.5INT_STS_REG.PWRHOLD_R/F_ITThe PWRHOLD_R/F_IT interrupt bit indicates a GPI interrupt event.4.2.6INT_STS_REG.RTC_ALARM_ITThe RTC_ALARM_IT interrupt bit is triggered when the RTC alarm set time is reached.4.2.7INT_STS2(3)_REG.GPIO_R/F_ITThe GPIOx_R/F_IT interrupt bit indicates a GPIO1,GPIO2or GPIO3interrupt event.It can be used to wake up the device from SLEEP state.This can be an interrupt coming from any peripheral device or alike.4.2.8INT_STS3_REG.PWRDN_ITThe PWRDN_IT interrupt bit is triggered when PWRDN reset is detected.4.2.9INT_STS3_REG.VMBDCH2_H/L_ITThe VMBDCH2_H_IT or VMBDCH2_L_IT interrupt bit is triggered when comparator 2input (VCCS)is above or below the threshold,respectively.4.2.10INT_STS3_REG.WATCHDOG_ITThe WATCHDOG_IT interrupt bit is triggered from the watchdog (periodic or interrupt mode).5Ordering InformationTable 2.Ordering InformationPART NUMBER ORDERING INFORMATIONPROCESSOR TPS659114TPS659114A2ZRC/RFreescale i.MX6Revision History 8SWCU181C–January 2016–Revised September 2016Submit Documentation FeedbackCopyright ©2016,Texas Instruments IncorporatedRevision HistoryRevision HistoryChanges from B Revision (August 2016)to C Revision Page •Changed document title from TPS659114User's Guide :to TPS659114for Freescale i.MX6Dual/Quad User's Guide..1Changes from A Revision (January 2016)to B Revision Page •Changed VMBHI_IT_MSK Bit OPTION SELECTED in Table 1 (4)Changes from Original (January 2016)to A Revision Page •Updated Figure 1 (2)IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46,latest issue,and to discontinue any product or service per JESD48,latest issue.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right relating to any combination,machine,or process in which TI components or services are rmation published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. 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ATMEL - AT91SAM9G20-EK - AT91SAM9G20-EK EvaluationKitProduct Overview:The AT91SAM9G20-EK Evaluation Kit enables theevaluation of and code development for applicationsrunning on an AT91SAM9G20 device. This guidefocuses on the AT91SAM9G20-EK board as anevaluation platform. The board supports theAT91SAM9G20 in a 217-ball LFBGA RoHS-compliantPackage.Kit Contents:The AT91SAM9G20-EK package contains the following items:board∙ AnAT91SAM9G20-EK∙ A universal input AC/DC power supply with US and Europe plug adapter∙One A/B-type USB cable one serial RS232 cable∙One RJ45 crossed Ethernet cable∙One CD-ROM that allows the user to begin evaluating the AT91 ARM® Thumb® 32-bit microcontroller quickly∙One 3V Lithium batteryKey Features:∙64 Mbytes of SDRAM memory∙256 Mbytes of NAND Flash memory∙One Atmel® serial Data Flash®∙One Atmel TWI serial EEPROM∙One USB Device port interface∙Two USB Host port interfaces∙One DBGU serial communication port∙One complete MODEM serial communication port∙One additional serial communication port with RTS/CTS handshake control∙JTAG/ICE debug interface∙One PHY Ethernet 100-base TX with three status LEDs∙One on-board Audio DAC∙One Power LED and one general-purpose LED∙Two user-input push buttons∙One Wakeup-input push button∙One reset push button∙Two Data Flash SD/MMC card slots∙Four expansion connectors (PIOA, PIOB, PIOC, IMAGE SENSOR)∙One BGA-like EBI expansion footprint connector∙One Lithium Coin Cell Battery Retainer for 12 mm cell sizeOrdering Information:Products:Part Number Manufacturer Farnell P/N Newark P/NAT91SAM9G20-EK Atmel 1715470 15R0327 Associated Products:Part Number Manufacturer Description Farnell P/N Newark P/NAT91SAM-ICE Atmel ICE for AT91 ARM Cores1095464 23M5083AT91SAM9G20B-CU Atmel ARM9 Microcontroller 1715469 15R0328MAX3241ECAI+ Maxim RS-232 Transceiver9724940 68K4636LT1963AEQ-3.3#PBF Linear LDO Regulator1273626 57M7440TPS60500DGSR TI Step-down charge pump1412493 77C0634WM8731SEDS Wolfson Audio CODEC Driver 1776264 50M5333 Similar Products:Part Number Manufacturer Description SupportDeviceFarnellP/NNewarkP/NAT91SAM9261-EK AtmelEvaluation forAT91SAM926EJAT91SAM9261 1629538 02P6236AT91SAM9263-EK AtmelEvaluation forAT91SAM9263AT91SAM9263 1629539 02P6237AT91SAM9RL-EK AtmelEvaluation forAT91SAM9RL-EKAT91SAM9RL 1648589 11P0231AT91SAM9XE-EK AtmelEvaluation forAT91SAM9XE-EKAT91SAM9XE 1648590 11P0232Document List:Datasheets:Part Number Description SizeMAX3241E ±15kV ESD-Protected, Down to 10nA, 3.0V to 5.5V, up to 1Mbps,True RS-232 Transceivers298KBLT1963A Series 1.5A, Low Noise, fAST Transient Response LDO Regulators 278KBARM9TDMI ARM9TDMI Technical Reference Manual 920KBARM920T ARM920T Technical Reference Manual 2.11MBAT91SAM9G20B AT91SAM9G20B Microcontroller 12.1MBTPS60500 High efficiency, 250-mA, Step-down charge pump 510KBK9F2G08UXA K9F2G08UXA Flash Memory datasheet 999KBMT48LC64M4A2 MT48LC64M4A2 Synchronous DRAM 256MB 1.47MBWM8731 WM8731 Portable Internet Audio CODEC with Headphone Driver 762KBApplication Notes:File Name SizeAT91 Assembler Code Startup Sequence for C Code Applications Software 116KBAT91 Assembler Code Startup Sequence for C Code Applications Software Based on theAT91SAM7S64 Evaluate140KBAT91SAM9RL-EK Evaluation Board 968KBAT91SAM Internet Radio 425KB Connecting an Atmel ARM-based Serial Synchronous Controller to an I2S-compatible SerialBus114KBInterfacing a 4x4 Keyboard to an AT91 Microcontroller 898KBMigrating to an AT91SAM9G20-based System from an AT91SAM9260-based System 190KBPulse Width Modulation Generation Using the AT91 Timer and Counter 87KBUsing the ECC Controller on AT91SAM9260 and AT91SAM7SE Microcontrollers 774KBUsing the Serial Peripheral Interface with AT91SAMxx Devices 149KBUsing the Two-wire interface (TWI) in Master Mode on AT91SAM Microcontrollers 1.05MBInterfacing a Hard Disk Drive to an AT91RM9200 Microcontroller 112KBInterfacing a PC Card to an AT91RM9200-DK 184KBInterrupt Generation Using the AT91 Timer and Counter 112KBHardware & Software:File Name SizeAT91SAM9G20-EK Hardware Files 2.37MB Install AT91-ISP v1.13(Windows XP - v1.13 current release) 3.64MBSAM-BA_CDC(Windows Vista - v1.13 current release) 6.85MB。
