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MAX5292EUD+T中文资料

General Description

The MAX5290–MAX5295 dual, 12-/10-/8-bit, voltage-output digital-to-analog converters (DACs) offer buffered outputs and a 3μs maximum settling time at the 12-bit level. The DACs operate from a 2.7V to 5.25V analog supply and a separate 1.8V to 3.6V digital sup-ply. The 20MHz 3-wire serial interface is compatible with SPI?, QSPI?, MICROWIRE?, and digital signal processor (DSP) protocol applications. Multiple devices can share a common serial interface in direct access or daisy-chained configuration. The MAX5290–MAX5295provide two multifunctional, user-programmable, digital I/O ports. The externally selectable power-up states of the DAC outputs are either zero scale, midscale, or full scale. Software-selectable FAST and SLOW settling modes decrease settling time in FAST mode, or reduce supply current in SLOW mode.

The MAX5290/MAX5291 are 12-bit DACs, the MAX5292/MAX5293 are 10-bit DACs, and the MAX5294/MAX5295are 8-bit DACs. The MAX5290/ MAX5292/MAX5294 pro-vide unity-gain-configured output buffers, while the MAX5291/MAX5293/MAX5295 provide force-sense-con-figured output buffers. The MAX5290– MAX5295 are specified over the extended -40°C to +85°C temperature range, and are available in space-saving 4mm x 4mm,16-pin thin QFN and 6.5mm x 5mm, 14-pin and 16-pin TSSOP packages.

Applications

Portable Instrumentation

Automatic Test Equipment (ATE)Digital Offset and Gain Adjustment Automatic Tuning

Programmable Voltage and Current Sources Programmable Attenuators Industrial Process Controls Motion Control

Microprocessor (μP)-Controlled Systems Power Amplifier Control

Fast Parallel-DAC to Serial-DAC Upgrades

Features

?Dual, 12-/10-/8-Bit Serial DACs in 4mm x 4mm Thin QFN and TSSOP Packages ?3μs (max) 12-Bit Settling Time to 1/2 LSB

?Integral Nonlinearity

1 LSB (max) MAX5290/MAX5291 A-Grade (12-Bit)1 LSB (max) MAX5292/MAX5293 (10-Bit)1/

2 LSB (max) MAX5294/MAX5295 (8-Bit)?Guaranteed Monotonic, ±1 LSB (max) DNL ?Two User-Programmable Digital I/O Ports ?Single +2.7V to +5.25V Analog Supply ?+1.8V to AV DD Digital Supply

?20MHz 3-Wire SPI-/QSPI-/MICROWIRE- and DSP-Compatible Serial Interface ?Glitch-Free Outputs Power Up to Zero Scale,Midscale or Full Scale ?Unity-Gain- or Force-Sense-Configured Output Buffers

MAX5290–MAX5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,

Voltage-Output DACs

________________________________________________________________Maxim Integrated Products

1

Ordering Information

19-3005; Rev 3; 7/07

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,or visit Maxim’s website at https://www.doczj.com/doc/c110837857.html,.

*Future product—contact factory for availability. Specifications are preliminary.**EP = Exposed paddle.

Selector Guide and Pin Configurations appear at end of data sheet.

SPI/QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

M A X 5290–M A X 5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,Voltage-Output DACs 2_______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(AV

= 2.7V to 5.25V, DV = 1.8V to AV , AGND = 0, DGND = 0, V = 2.5V, R = 10k ?, C = 100pF, T = T to T ,Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

AV DD to DV DD ........................................................................±6V AGND to DGND..................................................................±0.3V AV DD to AGND, DGND.............................................-0.3V to +6V DV DD to AGND, DGND............................................-0.3V to +6V FB_, OUT_,

REF to AGND........-0.3V to the lower of (AV DD + 0.3V) or +6V SCLK, DIN, CS , PU,

DSP to DGND.......-0.3V to the lower of (DV DD + 0.3V) or +6V UPIO1, UPIO2

to DGND...............-0.3V to the lower of (DV DD + 0.3V) or +6V

Maximum Current into Any Pin.........................................±50mA Continuous Power Dissipation (T A = +70°C)

14-Pin TSSOP (derate 9.1mW/°C above +70°C).........727mW 16-Pin TSSOP (derate 9.4mW/°C above +70°C).........755mW 16-Pin Thin QFN (derate 16.9mW/°C above +70°C).1349mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range.............................-65°C to +150°C Maximum Junction Temperature.....................................+150°C Lead Temperature (soldering, 10s).................................+300°C

MAX5290–MAX5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,

Voltage-Output DACs

_______________________________________________________________________________________3

ELECTRICAL CHARACTERISTICS (continued)

M A X 5290–M A X 5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,Voltage-Output DACs 4_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(AV

= 2.7V to 5.25V, DV = 1.8V to AV , AGND = 0, DGND = 0, V = 2.5V, R = 10k ?, C = 100pF, T = T to T ,

MAX5290–MAX5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,

Voltage-Output DACs

_______________________________________________________________________________________5

ELECTRICAL CHARACTERISTICS (continued)

(AV DD = 2.7V to 5.25V, DV DD = 1.8V to AV DD , AGND = 0, DGND = 0, V REF = 2.5V, R L = 10k ?, C L = 100pF, T A = T MIN to T MAX ,unless otherwise noted. Typical values are at T

= +25°C.) (Note 1)

TIMING CHARACTERISTICS—DSP Mode Disabled (3V, 3.3V Logic) (Figure 1)

M A X 5290–M A X 5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,Voltage-Output DACs 6_______________________________________________________________________________________

TIMING CHARACTERISTICS—DSP Mode Disabled (3V, 3.3V Logic) (Figure 1) (continued)

(DV DD = 2.7V to 5.25V, DGND = 0, T A = T MIN to T MAX , unless otherwise noted.)

TIMING CHARACTERISTICS—DSP Mode Disabled (1.8V Logic) (Figure 1)

(DV DD = 1.8V to 5.25V, DGND = 0, T A = T MIN to T MAX , unless otherwise noted.)

MAX5290–MAX5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,

Voltage-Output DACs

_______________________________________________________________________________________7

TIMING CHARACTERISTICS—DSP Mode Disabled (1.8V Logic) (Figure 1) (continued)

TIMING CHARACTERISTICS—DSP Mode Enabled (3V, 3.3V Logic) (Figure 2)

M A X 5290–M A X 5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,Voltage-Output DACs 8_______________________________________________________________________________________

TIMING CHARACTERISTICS—DSP Mode Enabled (3V, 3.3V Logic) (Figure 2) (continued)

(DV DD = 2.7V to 5.25V, DGND = 0, T A = T MIN to T MAX , unless otherwise noted.)

TIMING CHARACTERISTICS—DSP Mode Enabled (1.8V Logic) (Figure 2)

MAX5290–MAX5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,

Voltage-Output DACs

_______________________________________________________________________________________9

TIMING CHARACTERISTICS—DSP Mode Enabled (1.8V Logic) (Figure 2) (continued)

Note 1:For the force-sense versions, FB_ is connected to its respective OUT_. V OUT (max) = V REF / 2, unless otherwise noted.

Note 2:Linearity guaranteed from decimal code 40 to 4095 for the MAX5290A/MAX5291A (12-bit, A-grade), code 82 to 4095 for the

MAX5290B/MAX5291B (12-bit, B-grade), code 21 to 1023 for the MAX5292/MAX5293 (10-bit), and code 5 to 255 for the MAX5294/MAX5295 (8-bit).

Note 3:DAC-to-DAC crosstalk is measured as follows: outputs of DACA and DACB are set to full scale and the output of DACB is

measured. While keeping DACB unchanged, the output of DACA is transitioned to zero scale and the ?V OUT of DACB is measured. The procedure is repeated with DACA and DACB interchanged. DAC-to-DAC crosstalk is the maximum ?V OUT measured.

Note 4:Represents the functional range. The linearity is guaranteed at V REF = 2.5V. See the Typical Operating Characteristics sec-tion for linearity at other voltages.

Note 5:Guaranteed by design.

Note 6:The reference -3dB bandwidth is measured with a 0.1V P-P sine wave on V REF and with the input code at full scale.

Note 7:In some daisy-chain modes, data is required to be clocked in on one clock edge and the shifted data clocked out on the fol-lowing edge. In the case of a 1/2 clock-period delay, it is necessary to increase the minimum high/low clock times to 25ns (2.7V) or 50ns (1.8V).

Note 8:The falling edge of DSP starts a DSP-type bus cycle, provided that CS is also active low to select the device. DSP active low

and CS active low must overlap by a minimum of 10ns (2.7V) or 20ns (1.8V). CS can be permanently low in this mode of

M A X 5290–M A X 5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,Voltage-Output DACs 10______________________________________________________________________________________

Typical Operating Characteristics

(AV DD = DV DD = 3V, V REF = 2.5V, R L = 10k ?, C L = 100pF, speed mode = FAST, PU = floating, T A = +25°C, unless otherwise noted.)

-0.8

-0.4-0.60-0.20.20.40

2000

1000

3000

4000

4096

INTEGRAL NONLINEARITY vs. DIGITAL

INPUT CODE (MAX5290A)

M A X 5290 t o c 01

INPUT CODE

I N L (L S B )

-0.35

-0.20-0.25-0.30

-0.15-0.10-0.0500.050.100.150

2000

1000

3000

4000

4096

INTEGRAL NONLINEARITY vs. DIGITAL

INPUT CODE (MAX5291A)

M A X 5290 t o c 02

INPUT CODE

I N L (L S B )

INTEGRAL NONLINEARITY vs. DIGITAL INPUT CODE (12-BIT)

DIGITAL INPUT CODE

I N L (L S B )

3072

2048

1024

-3

-2-101234

-4

4096

INTEGRAL NONLINEARITY vs. DIGITAL INPUT CODE (10-BIT)

DIGITAL INPUT CODE

I N L (L S B )

768

512

256

-0.75-0.50-0.2500.250.500.751.00-1.00

1024

INTEGRAL NONLINEARITY vs. DIGITAL INPUT CODE (8-BIT)

DIGITAL INPUT CODE

I N L (L S B )

192

128

64

-0.2500.25

0.50

-0.50

256

DIFFERENTIAL NONLINEARITY vs. DIGITAL INPUT CODE (12-BIT)

DIGITAL INPUT CODE

D N L (L S B )

3072

2048

1024

-0.1

0.1

0.2

-0.2

4096

DIFFERENTIAL NONLINEARITY vs. DIGITAL INPUT CODE (10-BIT)

DIGITAL INPUT CODE

D N L (L S B )

768

512

256

-0.02500.0250.050

-0.050

1024

DIFFERENTIAL NONLINEARITY vs. DIGITAL INPUT CODE (8-BIT)

DIGITAL INPUT CODE

D N L (L S B )

192

128

64

-0.010

0.01

0.02

-0.02

256

00.05

0.100.15

0.200.250.300.350.40

-40

-15

10

35

60

85

INTEGRAL NONLINEARITY vs. TEMPERATURE (A-GRADE)

TEMPERATURE (°C)

I N L (L S B )

MAX5290–MAX5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,

Voltage-Output DACs

______________________________________________________________________________________11

Typical Operating Characteristics (continued)

(AV DD = DV DD = 3V, V REF = 2.5V, R L = 10k ?, C L = 100pF, speed mode = FAST, PU = floating, T A = +25°C, unless otherwise noted.)

INTEGRAL NONLINEARITY vs. TEMPERATURE (12-BIT)

TEMPERATURE (°C)

I N L (L S B )

60

35

10

-15

-202

4

-4-40

85

DIFFERENTIAL NONLINEARITY

vs. TEMPERATURE (12-BIT)

TEMPERATURE (°C)

D N L (L S B )

60

35

10

-15

-0.1

0.1

0.2

-0.2

-40

85

00.100.05

0.200.150.300.250.350.450.400.50

1.0

2.0

2.5

1.5

3.0 3.5

4.0

4.5

5.0

M A X 5290 t o c 12

V REF (V)

I N L (L S B )INTEGRAL NONLINEARITY

vs. REFERENCE VOLTAGE (MAX5290A)

00.20.10.40.30.60.50.70.90.81.01.0

2.0

2.5

1.5

3.0 3.5

4.0

4.5

5.0

INTEGRAL NONLINEARITY

vs. REFERENCE VOLTAGE (MAX5291A)

M A X 5290 t o c 13

V REF (V)

I N L (L S B )

0.10.20.30.40.50.60.70.8

-40

-15

10

35

60

85

OFFSET ERROR vs. TEMPERATURE

(A-GRADE)

TEMPERATURE (°C)

O F F S E T E R R O R (m V )

OFFSET ERROR vs. TEMPERATURE

TEMPERATURE (°C)

O F F S E T E R R O R (L S B )

60

35

10

-15

-8

-6

-4

-20

-10

-40

85

-0.35

-0.20-0.25-0.30-0.15-0.10-0.0500.050.100.15-40

10

-15

35

60

85

GAIN ERROR vs. TEMPERATURE

(A-GRADE)

TEMPERATURE (°C)

G A I N E R R O R (L S B )

GAIN ERROR vs. TEMPERATURE

TEMPERATURE (°C)

G A I N E R R O R (L S B )

60

35

10

-15

-8

-6

-4-20

-10

-40

85

REFERENCE INPUT BANDWIDTH

FREQUENCY (Hz)

G A I N (d B )

1M

100k

10k

1k

-25-20

-15-10-505-30

10M

M A X 5290–M A X 5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,Voltage-Output DACs 12______________________________________________________________________________________

Typical Operating Characteristics

(T A = +25°C, unless otherwise noted.)

0.40.70.60.50.80.91.11.01.20

1024

2048

3072

4096

SUPPLY CURRENT vs. DIGITAL INPUT CODE (FORCE SENSE)

DIGITAL INPUT CODE

S U P P L Y C U R R E N T (m A )

0.30.20.10

00.10.20.30.40.50.60.70.80

1024

2048

3072

4096

SUPPLY CURRENT vs. DIGITAL INPUT CODE (UNITY GAIN)

DIGITAL INPUT CODE

S U P P L Y C U R R E N T (m A )

0.4

0.70.60.5

0.90.81.31.21.11.01.4

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

SUPPLY CURRENT vs. SUPPLY VOLTAGE (FORCE SENSE)

SUPPLY VOLTAGE (V)

S U P P L Y C U R R E N T (m A )

00.30.20.10.50.40.90.80.70.61.02.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

SUPPLY CURRENT vs. SUPPLY

VOLTAGE (UNITY GAIN)

SUPPLY VOLTAGE (V)

S U P P L Y C U R R E N T (m A )

50

6560557570959085801002.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5SHUTDOWN SUPPLY CURRENT

vs. SUPPLY VOLTAGE

SUPPLY VOLTAGE (V)S H U T D O W N S U P P L Y C U R R E N T (n A )

-5

-2

-3-4-1012345

-4010-15356085

OFFSET ERROR vs. TEMPERATURE

TEMPERATURE (°C)

O F F S E T E R R O R (L S B )

-5

-2-3-4-1012345-40

10

-15

35

60

85

GAIN ERROR vs. TEMPERATURE

TEMPERATURE (°C)

G A I N E R R O R (L S B )

1.80

1.901.85

2.001.95

2.05 2.102.152.20

-40

-20

-10

-30

10

20

30

40

OUTPUT VOLTAGE vs. OUTPUT SOURCE/SINK CURRENT

I OUT (mA)

O U T P U T V O L T A G E (V )200ns/div

MAJOR-CARRY TRANSITION GLITCH

OUT_

(AC-COUPLED)10mV/div

MAX5290 toc27

CS 2V/div

MAX5290–MAX5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,

Voltage-Output DACs

______________________________________________________________________________________13

400ns/div SETTLING TIME POSITIVE

OUT_2V/div

CS 2V/div FULL-SCALE TRANSITION

400ns/div

SETTLING TIME NEGATIVE

OUT_2V/div

CS 2V/div

FULL-SCALE TRANSITION

REFERENCE INPUT BANDWIDTH

FREQUENCY (kHz)

G A I N (d B )

1000

10010

-20-15-10-505-25

1

10,000

REFERENCE FEEDTHROUGH AT 1kHz

M A X 5290 t o c 31

FREQUENCY (kHz)

5.04.53.5 4.0 1.5 2.0 2.5 3.01.0-110-120-130-100-90-80-70-60-50-40-30-22-142

0.5 5.5

100μs/div DAC-TO-DAC CROSSTALK

OUTB 1mV/div

MAX5290 toc32

OUTA 2V/div

1μs/div

DIGITAL FEEDTHROUGH

OUT_

(AC-COUPLED)10mV/div

MAX5290 toc33

SCLK 2V/div

20μs/div

POWER-UP GLITCH

AV DD 2V/div

OUT_1V/div

PU = FLOATING

10μs/div

EXITING SHUTDOWN TO MIDSCALE

OUT_1V/div

UPIO_2V/div

PU = FLOATING

Typical Operating Characteristics

(T A = +25°C, unless otherwise noted.)

M A X 5290–M A X 5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,Voltage-Output DACs 14______________________________________________________________________________________

Pin Description

MAX5290–MAX5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,

Voltage-Output DACs

Functional Diagrams

M A X 5290–M A X 5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,Voltage-Output DACs

Functional Diagrams (continued)

MAX5290–MAX5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,

Voltage-Output DACs

______________________________________________________________________________________17

M A X 5290–M A X 5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,Voltage-Output DACs 18

______________________________________________________________________________________

Table 1. Serial Write Data Format

Figure 1. Serial-Interface Timing Diagram (DSP Mode Disabled)

Figure 2. Serial-Interface Timing Diagram (DSP Mode Enabled)

MAX5290–MAX5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,

Voltage-Output DACs

______________________________________________________________________________________

19

Figure 3. MICROWIRE and SPI (CPOL = 0, CPHA = 0 or CPOL = 1, CPHA = 1) DAC Writes

Figure 4. DSP and SPI (CPOL = 0, CPHA = 1 or CPOL = 1, CPHA = 0) DAC Writes

Serial-Interface Programming Commands

Tables 2a, 2b, and 2c provide all of the serial-interface programming commands for the MAX5290–MAX5295.Table 2a shows the basic DAC programming com-mands, Table 2b gives the advanced-feature program-ming commands, and Table 2c provides the 24-bit read commands. Figures 3 and 4 illustrate the serial-interface diagrams for read and write operations.

Loading Input and DAC Registers

The MAX5290–MAX5295 contain a 16-bit shift register that is followed by a 12-bit input register and a 12-bit DAC register for each channel (see the Functional Diagrams ). Tables 3, 4, and 5 highlight a few of the com-mands for the loading of the input and DAC registers.See Table 2a for all DAC programming commands.

M A X 5290–M A X 5295

Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,Voltage-Output DACs

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