IRFI4019HG-117P
Notes through are on page 2
DIGITAL AUDIO MOSFET
TO-220 Full-Pak 5 PIN
Features
Integrated Half-Bridge Package Reduces the Part Count by Half Facilitates Better PCB Layout
Key Parameters Optimized for Class-D Audio Amplifier Applications
Low R DS(ON) for Improved Efficiency Low Qg and Qsw for Better THD and Improved Efficiency
Low Qrr for Better THD and Lower EMI Can Delivery up to 200W per Channel into 8? Load in Half-Bridge Configuration Amplifier
Lead-Free Package
Halogen-Free
Description
This Digital Audio MosFET Half-Bridge is specifically designed for Class D audio amplifier applications. It consists of two power MosFET switches connected in half-bridge configuration. The latest process is used to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery, and internal Gate resistance are optimized to improve key Class D audio amplifier performance factors such as efficiency, THD and EMI. These combine to make this Half-Bridge a highly efficient, robust and reliable device for Class D audio amplifier applications.G1, G2
D1, D2
S1, S2
Gate
S2
G2
S1/D2G1D1
PD - 96274
IRFI4019HG-117P
Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25°C, L = 5.8mH, R G = 25?, I AS = 5.2A. Pulse width ≤ 400μs; duty cycle ≤ 2%.
Notes:
R θ is measured at T J of approximately 90°C.
Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive
avalanche information
Specifications refer to single MosFET.
= 0V e
IRFI4019HG-117P
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
V DS , Drain-to-Source Voltage (V)V DS , Drain-to-Source Voltage (V)
5
10
15
20
Q G Total Gate Charge (nC)
04
8
12
16
20V G S , G a t e -t o -S o u r c e V o l t a g e (V )
V DS , Drain-to-Source Voltage (V)
T J , Junction Temperature (°C)
R D S (o n ) , D r a i n -t o -S o u r c e O n R e s i s t a n c e (N o r m a l i z e d )
IRFI4019HG-117P
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
Fig 10. Threshold Voltage vs. Temperature
25
50
75
100
125
150
T J , Junction Temperature (°C)02
4
6
8
10
I D , D r a i n C u r r e n t (A
)
0.1
1
10
100
I S D , R e v e r s e D r a i n C u r r e n t (A )
T J , Temperature ( °C )
V G S (t h ) G a t e t h r e s h o l d V o l t a g e (V )
t 1 , Rectangular Pulse Duration (sec)
T h e r m a l R e s p o n s e ( Z )
1
10
100
1000
V DS , Drain-toSource Voltage (V)
0.1
1
10
100
I D , D r a i n -t o -S o u r c e C u r r e n t (A
)
IRFI4019HG-117P
Fig 13. Maximum Avalanche Energy Vs. Drain Current
Fig 12. On-Resistance Vs. Gate Voltage 4
5
6
7
8
9
10
V GS , Gate-to-Source Voltage (V)
0.0
0.1
0.2
0.3
0.4
0.5
R D S (o n ), D r a i n -t o -S o u r c e O n R e s i s t a n c e (?
)
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
050100150200250300350E A S , S i n g l e P u l s e A v a l a n c h e E n e r g y (m J
)
Fig 14. Diode Reverse Recovery Test Circuit for HEXFET ? Power MOSFETs
*** V GS = 5V for Logic Level Devices
Use P-Channel Driver for P-Channel Measurements ** Reverse Polarity for P-Channel
IRFI4019HG-117P
Fig 16a. Switching Time Test Circuit Fig 16b.
Switching Time Waveforms
V V DS
90%
10%
d(on)
d(off)
r
f
Fig 15b. Unclamped Inductive Waveforms
Fig 15a. Unclamped Inductive Test Circuit
I AS
V DD
Fig 17a. Gate Charge Test Circuit
Fig 17b
Gate Charge Waveform
Id
Qgs1Qgs2Qgd Qgodr
R D
V DD
IRFI4019HG-117P
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at https://www.doczj.com/doc/b44684002.html, for sales contact information . 10/2009
TO-220 Full-Pak 5-Pin Part Marking Information
TO-220AB Full-Pak 5-Pin package is not recommended for Surface Mount Application.
TO-220 Full-Pak 5-Pin Package Outline, Lead-Form Option 117
(Dimensions are shown in millimeters (inches))
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IRFI4019HG-117P