December 2007 Rev 51/31
VND5160J-E
Double channel high side driver for automotive applications
Features
■
General
–
Inrush current active management by power limitation
–Very low stand-by current – 3.0V CMOS compatible input
–Optimized electromagnetic emission –Very low electromagnetic susceptibility –In compliance with the 2002/95/EC European directive ■
Diagnostic functions
–Open drain status output –On state open load detection –Off state open load detection –Thermal shutdown indication
■
Protection
–Undervoltage shut-down –Overvoltage clamp
–Output stuck to Vcc detection –Load current limitation
–Self limiting of fast thermal transients
–Protection against loss of ground and loss of V CC
–Thermal shut down
–Reverse battery protection (see Figure 28)
–Electrostatic discharge protection
Application
■
All types of resistive, inductive and capacitive loads
Description
The VND5160J-E is a monolithic device made using STMicroelectronics VIPower M0-5
technology. It is intended for driving resistive or inductive loads with one side connected to
ground. Active V CC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).
The device detects open load condition in both ON and OFF states, when ST AT_DIS is left open or driven low. Output shorted to V CC is detected in the OFF state.
When STAT_DIS is driven high, the STATUS pin is in a high impedance condition.
Output current limitation protects the device in overload condition. In case of long duration
overload, the device limits the dissipated power to safe level up to thermal shut-down intervention. Thermal shut-down with automatic restart allows the device to recover normal operation as soon as fault condition disappears.
Max supply voltage V CC 41V Operating voltage range V CC 4.5 to 36V Max on-state resistance R ON 160 m ?Current limitation (typ)I LIMH 5A Off state supply current (typ)
I S
2 μA (1)
1.Typical value with all loads connected.PowerSSO-12
Table 1.
Device summary
Package
Order codes
Part number (Tube)
Part number (Tape & Reel)
PowerSSO-12
VND5160J-E
VND5160JTR-E
https://www.doczj.com/doc/ae11470646.html,
Contents VND5160J-E
Contents
1Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.1GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 20
3.1.1Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 20
3.1.2Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 21
3.2Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.5Maximum demagnetization energy (VCC=13.5V) . . . . . . . . . . . . . . . . . 23
4Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1PowerSSO-12? thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1ECOP ACK? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2PowerSSO-12? package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31
VND5160J-E List of tables List of tables
Table 1.Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2.Pin functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3.Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4.Absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5.Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 6.Power section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 7.Switching (VCC=13V; Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 8.Status pin (V SD=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 9.Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 10.Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 11.Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 12.Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 13.Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 14.Thermal parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 15.PowerSSO-12? mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 16.Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
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List of figures VND5160J-E List of figures
Figure 1.Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2.Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3.Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 4.Status timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 5.Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6.Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7.Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 8.Off state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 9.Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 10.High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 11.Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 12.Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 13.Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 14.Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 15.Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 16.Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 17.On state resistance vs T case . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 18.On state resistance vs V CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 19.Openload On state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 20.Openload Off state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 21.Turn - On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 22.Turn - Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 23.I LIM vs T case. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 24.Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 25.STAT_DIS clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 26.High level STAT_DIS voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 27.Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 28.Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 29.Open load detection in Off state. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 30.Maximum turn Off current versus inductance (for each channel). . . . . . . . . . . . . . . . . . . . 23 Figure 31.PowerSSO-12? PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 32.Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 24 Figure 33.PowerSSO-12? Thermal impedance junction ambient single pulse (one channel ON) . . 25 Figure 34.Thermal fitting model of a double channel HSD in PowerSSO-12? . . . . . . . . . . . . . . . . . 25 Figure 35.PowerSSO-12? package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 36.PowerSSO-12? tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 37.PowerSSO-12? tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4/31
VND5160J-E Block diagram and pin description
5/31
1 Block diagram and pin description
Table 2.
Pin functions
Name Function
V CC
Battery connection.OUTPUTn Power output.
GND Ground connection. Must be reverse battery protected by an external diode/ resistor network.
INPUTn Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state.
ST A TUSn Open Drain digital diagnostic pin.
STA T_DIS
Active high CMOS compatible pin, to disable the STA TUS pin.
Block diagram and pin description VND5160J-E
6/31
Table 3.Suggested connections for unused and N.C. pins
Connection / Pin STATUS N.C.OUTPUT INPUT STAT_DIS Floating X X X X X
T o ground N.R.(1)
1.Not recommended.
X N.R.
Through 10k?
resistor
Through 10k?
resistor
VND5160J-E Electrical specifications
7/31
2 Electrical specifications
Note:
V Fn = V OUTn - V CCn during reverse battery condition.
2.1 Absolute maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
Table 4.
Absolute maximum ratings
Symbol Parameter
Value Unit V CC DC supply voltage 41V -V CC Reverse DC supply voltage 0.3V -I GND DC reverse ground pin current 200mA I OUT DC output current
Internally limited
A -I OUT Reverse DC output current 6A I IN DC input current +10 / -1mA I STAT
DC status current
+10 / -1mA I STA T_DIS DC status disable current +10 / -1mA E MAX
Maximum switching energy
(L=12mH; R L =0?; V bat =13.5V; T jstart =150°C; I OUT = I limL (T yp.) )
33
mJ
Electrical specifications
VND5160J-E
8/31
2.2 Thermal data
V ESD
Electrostatic discharge (Human Body Model: R=1.5K ?; C=100pF)–INPUT –STA TUS –STA T_DIS –OUTPUT –V CC
40004000400050005000V V V V V V ESD Charge device model (CDM-AEC-Q100-011)750V T j Junction operating temperature -40 to 150°C T stg
Storage temperature
-55 to 150
°C
Table 4.
Absolute maximum ratings (continued)
Symbol
Parameter
Value
Unit
Table 5.
Thermal data
Symbol
Parameter
Max value
Unit R thj-case Thermal resistance junction-case (max.) (with one channel ON)8°C/W R thj-amb
Thermal resistance junction-ambient
See Figure 32
°C/W
VND5160J-E Electrical specifications
9/31
2.3 Electrical characteristics
Values specified in this section are for 8V stated. . Table 6.Power section Symbol Parameter Test conditions Min.Typ.Max.Unit V CC Operating supply voltage 4.5 1336V V USD Undervoltage shutdown 3.5 4.5 V V USDhyst Undervoltage Shut-down hysteresis 0.5 V R ON On state resistance (2) I OUT = 1A; T j = 25°C I OUT = 1A; T j = 150°C I OUT = 1A; V CC = 5V; T j = 25°C 160320210 m ?m ?m ?V clamp Clamp voltage I S = 20mA 41 46 52 V I S Supply current Off State; V CC =13V; V IN =V OUT =0 T j =25°C; On State; V CC =13V; V IN =5V; I OUT =0A 2(1)31.PowerMOS leakage included.5(1)6μA mA I L(off1)Off state output current (2)2.For each channel. V IN =V OUT =0V; V CC =13V; T j =25°C V IN =V OUT =0V; V CC =13V; T j =125°C 000.01 35μA I L(off2)V IN =0V; V OUT =4V -75 0V F Output - V CC diode voltage (2) -I OUT =0.6A; T j =150°C 0.7 V Table 7. Switching (V CC =13V;T j =25°C) Symbol Parameter Test conditions Min.Typ.Max.Unit t d(on)T urn-On delay time R L =13? (see Figure 6)10μs t d(off) T urn-Off delay time R L =13? (see Figure 6)15μs dV OUT /dt (on)T urn-On voltage slope R L =13?See Figure 21V /μs dV OUT /dt (off)T urn-Off voltage slope R L =13? See Figure 22 V /μs W ON Switching energy losses during t won R L =13? (see Figure 6)0.07mJ W OFF Switching energy losses during t woff R L =13? (see Figure 6) 0.04 mJ Electrical specifications VND5160J-E 10/31Table 8.Status pin (V SD=0) Symbol Parameter Test conditions Min.Typ.Max.Unit V STAT Status low output voltage I STA T= 1.6 mA, V SD=0V0.5V I LST AT Status leakage current Normal operation or V SD=5V, V STA T= 5V 10μA C ST AT Status pin input capacitance Normal operation or V SD=5V, V STA T= 5V 100pF V SCL Status clamp voltage I STA T= 1mA I STA T= - 1mA 5.5 -0.7 7V V Table 9.Protection(1) 1.To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Symbol Parameter Test conditions Min.Typ.Max.Unit I limH DC short circuit current V CC= 13V 5V 3.557.5 7.5 A A I limL Short circuit current during thermal cycling V CC= 13V T R Status delay in overload conditions T j>T TSD20μs V DEMAG Turn-Off output voltage clamp I OUT=1A; V IN=0; L=20mH V CC-41V CC-46V CC-52V V ON Output voltage drop limitation I OUT= 0.03A; T j= -40°C...+150°C (see Figure5) 25mV VND5160J-E Electrical specifications 11/31 Table 10. Openload detection Symbol Parameter Test conditions Min.Typ.Max.Unit I OL Openload On state detection threshold V IN = 5V , 8V See Figure 19 40mA t DOL(on) Openload On state detection delay I OUT = 0A, V CC =13V (see Figure 4) 200 μs t POL Delay between INPUT falling edge and ST A TUS rising edge in Openload condition I OUT = 0A (see Figure 4)200 5001000μs V OL Openload Off state voltage detection threshold V IN = 0V , 8V 4V t DSTKON Output short circuit to V cc detection delay at turn Off See Figure 4 180 t POL μs Table 11. Logic input Symbol Parameter Test conditions Min. Typ.Max.Unit V IL Input low level voltage 0.9 V I IL Low level input current V IN = 0.9V 1μA V IH Input high level voltage 2.1 V I IH High level input current V IN = 2.1V 10 μA V I(hyst)Input hysteresis voltage 0.25V V ICL Input clamp voltage I IN = 1mA I IN = -1mA 5.5 -0.7 7 V V V SDL STA T_DIS low level voltage 0.9V I SDL Low level ST A T_DIS current V CSD = 0.9V 1μA V SDH STA T_DIS high level voltage 2.1 V I SDH High level STA T_DIS current V CSD = 2.1V 10 μA V SD(hyst)STA T_DIS hysteresis voltage 0.25 V V SDCL STA T_DIS clamp voltage I SD = 1mA I SD = -1mA 5.5 -0.7 7 V V Electrical specifications VND5160J-E 12/31 Figure 5.Output voltage drop limitation V on I out V cc-V out T j=150o C T j=25 o C T j=-40o C V on/R on(T) VND5160J-E Electrical specifications 13/31 Figure 6.Switching characteristics Table 12. Truth table Conditions INPUT n OUTPUT n STATUS n (V SD =0V)(1) 1.If the V SD is high, the STATUS pin is in a high impedance. Normal operation L H L H H H Current limitation L H L X H H Overtemperature L H L L H L Undervoltage L H L L X X Output Voltage > V OL L H H H L (2)H 2.The STATUS pin is low with a delay equal to t DSTKON after INPUT falling edge.Output Current < I OL L H L H H (3)L 3.The STATUS pin becomes high with a delay equal to t POL after INPUT falling edge. V OUT dV OUT /dt (on) t r 80% 10% t f dV OUT /dt (off) t d(off) t d(on) INPUT t t 90% t Won t Woff Electrical specifications VND5160J-E 14/31Table 13.Electrical transient requirements ISO 7637-2: 2004(E) test pulse Test levels(1)Number of pulses or test times Burst cycle/pulse repetition time Delays and impedance III IV 1-75V-100V5000 pulses0.5 s 5 s 2 ms, 10 ?2a+37V+50V5000 pulses0.2 s 5 s50 μs, 2 ?3a-100V-150V1h90 ms100 ms0.1 μs, 50 ?3b+75V+100V1h90 ms100 ms0.1 μs, 50 ?4-6V-7V 1 pulse100 ms, 0.01?5b(2)+65V+87V 1 pulse400 ms, 2?ISO 7637-2: 2004(E) test pulse Test level results(1) 1.The above test levels must be considered referred to V CC = 13.5V except for pulse 5b. III IV 1C C 2a C C 3a C C 3b C C 4C C 5b(2) 2.Valid in case of external load dump clamp: 40V maximum referred to ground. C C Class Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. VND5160J-E Electrical specifications 15/31 Electrical specifications VND5160J-E 16/31 2.4 Electrical characteristics curves Figure 8. Off state output current Figure 9. Input clamp voltage Figure 10.High level input current Figure 11.Input high level Figure 12.Input low level Figure 13.Input hysteresis voltage VND5160J-E Electrical specifications 17/31 Figure 14.Status low output voltage Figure 15.Status leakage current Figure 16.Status clamp voltage Figure 17.On state resistance vs T case Figure 18.On state resistance vs V CC Figure 19.Openload On state detection threshold Electrical specifications VND5160J-E 18/31 Figure 20.Openload Off state voltage detection threshold Figure 21.Turn - On voltage slope Figure 22.Turn - Off voltage slope Figure 23.I LIM vs T case Figure 24.Undervoltage shutdown Figure 25.STAT_DIS clamp voltage VND5160J-E Electrical specifications 19/31 Figure 26.High level STAT_DIS voltage Figure 27.Low level STAT_DIS voltage Application information VND5160J-E 20/31 3 Application information Figure 28.Application schematic Note:Channels 2, has the same internal circuit as channel 1. 3.1 GND protection network against reverse battery 3.1.1 Solution 1 : resistor in the ground line (R GND only) This can be used with any type of load. The following is an indication on how to dimension the R GND resistor.1. R GND ≤ 600mV / (I S(on)max ). 2. R GND ≥ (?V CC ) / (-I GND ) where -I GND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in R GND (when V CC <0: during reverse battery situations) is:P D = (-V CC )2/R GND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where I S(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the R GND will produce a shift (I S(on)max * R GND ) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same R GND . V CC GND OUTPUT D GND R GND D ld μC +5V V GND ST A T_DIS INPUT R prot R prot R prot +5V ST A TUS
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