? 2000 Fairchild Semiconductor Corporation DS006413
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August 1986Revised March 2000
DM74LS245 3-STATE Octal Bus Transceiver
DM74LS245
3-STATE Octal Bus Transceiver
General Description
These octal bus transceivers are designed for asynchro-nous two-way communication between data buses. The control function implementation minimizes external timing requirements.
The device allows data transmission from the A Bus to the B Bus or from the B Bus to the A Bus depending upon the logic level at the direction control (DIR) input. The enable input (G) can be used to disable the device so that the buses are effectively isolated.
Features
s Bi-Directional bus transceiver in a high-density 20-pin package s 3-STATE outputs drive bus lines directly s PNP inputs reduce DC loading on bus lines s Hysteresis at bus inputs improve noise margins s Typical propagation delay times, port-to-port 8 ns s Typical enable/disable times 17 ns s I OL (sink current)
24 mA
s I OH (source current)
?15 mA
Ordering Code:
Devices also available in T ape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Function Table
H = HIGH Level L = LOW Level X = Irrelevant
Order Number Package Number
Package Description
DM74LS245WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS245N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Enable Direction Operation
G Control DIR L L B Data to A Bus L H A Data to B Bus
H
X
Isolation
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D M 74L S 245
Absolute Maximum Ratings (Note 1)
Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings.The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)Note 2: All typicals are at V CC = 5V, T A = 25°C.
Note 3: Not more than one output should be shorted at a time, not to exceed one second duration
Supply Voltage 7V
Input Voltage
DIR or G 7V A or B
5.5V
Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range
?65°C to +150°C
Symbol Parameter
Min Nom Max Units V CC Supply Voltage
4.755
5.25
V V IH HIGH Level Input Voltage 2
V V IL LOW Level Input Voltage 0.8V I OH HIGH Level Output Current ?15mA I OL LOW Level Output Current 24mA T A
Free Air Operating Temperature
70
°C
Symbol Parameter
Conditions Min
Typ Max Units (Note 2)V I Input Clamp Voltage V CC = Min, I I = ?18 mA ?1.5
V HYS Hysteresis (V T + ? V T ?)V CC = Min
0.20.4
V
V OH
HIGH Level V CC = Min, V IH = Min 2.7Output Voltage
V IL = Max, I OH = ?1 mA V CC = Min, V IL = Min 2.4 3.4V
V IL = Max, I OH = ?3 mA V CC = Min, V IH = Min 2
V IL = 0.5V, I OH = Max
V OL
LOW Level V CC = Min I OL = 12 mA 0.4Output Voltage
V IL = Max I OL = Max 0.5V
V IH = Min I OZH Off-State Output Current,V CC = Max V O = 2.7V 20μA HIGH Level Voltage Applied V IL = Max I OZL Off-State Output Current,V IH = Min V O = 0.4V ?200μA LOW Level Voltage Applied I I Input Current at Maximum V CC = Max
A or
B V I = 5.5V 0.1mA Input Voltage
DIR or G
V I = 7V
0.1I IH HIGH Level Input Current V CC = Max, V I = 2.7V 20μA I IL LOW Level Input Current V CC = Max, V I = 0.4V ?0.2
mA I OS Short Circuit Output Current V CC = Max (Note 3)?40
?225mA
I CC
Supply Current
Outputs HIGH V CC = Max
48
70Outputs LOW 6290mA Outputs at Hi-Z
64
95
DM74LS245 Switching Characteristics
V CC= 5V, T A= 25°C
Symbol Parameter Conditions Min Max Units
t PLH Propagation Delay Time,C L= 45 pF
12ns LOW-to-HIGH Level Output R L= 667?
t PHL Propagation Delay Time,
12ns HIGH-to-LOW Level Output
t PZL Output Enable Time
40ns to LOW Level
t PZH Output Enable Time
40ns to HIGH Level
t PLZ Output Disable Time C L= 5 pF
25ns from LOW Level R L= 667?
t PHZ Output Disable Time
25ns from HIGH Level
t PLH Propagation Delay Time, C L= 150 pF
16ns LOW-to-HIGH Level Output R L= 667?
t PHL Propagation Delay Time,
17ns HIGH-to-LOW Level Output
t PZL Output Enable Time
45ns to LOW Level
t PZH Output Enable Time
45ns to HIGH Level
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D M 74L S 245
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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D M 74L S 245 3-S T A T
E O c t a l B u s T r a n s c e i v e r
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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