1.Product profile
1.1General description
Standard level N-channel MOSFET in DFN3333-8 package qualified to 150 °C. This product is designed and qualified for use in a wide range of industrial, communications and power supply equipment.
1.2Features and benefits
?High efficiency due to low switching and conduction losses ?Small footprint for compact designs
?Suitable for standard level gate drive sources
1.3Applications
?DC-to-DC converters ?Lithium-ion battery protection
?Load switching
1.4Quick reference data
PSMN023-80LS
N-channel DFN3333-8 80 V 23 m ? standard level MOSFET
Rev. 3 — 12 December 2011
Product data sheet
Table 1.Quick reference data Symbol Parameter
Conditions
Min Typ Max Unit V DS drain-source voltage T j ≥25°C; T j ≤175°C --80V I D drain current
T mb =25°C; V GS =10V; see Figure 1
--34A P tot total power dissipation T mb =25°C; see Figure 2
--65W T j junction temperature
-55-150°C Static characteristics
R DSon
drain-source on-state resistance V GS =10V;I D =10A;T j =100°C;
see Figure 12
--38m ?V GS =10V;I D =10A;T j =25°C; see Figure 13
-19
23
m ?
Dynamic characteristics Q GD gate-drain charge V GS =10V;I D =30A;V DS =40V; see Figure 14; see Figure 15
- 4.8-nC Q G(tot)total gate charge
-21-nC Avalanche ruggedness
E DS(AL)S
non-repetitive drain-source avalanche energy
V GS =10V;T j(init)=25°C; I D =34A; V sup ≤80V; R GS =50?; unclamped
--37
mJ
2.Pinning information
3.Ordering information
4.Limiting values
Table 2.Pinning information Pin Symbol Description Simplified outline Graphic symbol
1S source SOT873-1 (DFN3333-8)
2S source 3S source 4G gate 5,6,7,8
D drain
mb
D
mounting base; connected to drain
Transparent top view Table 3.
Ordering information
Type number
Package Name
Description
Version PSMN023-80LS
DFN3333-8
plastic thermal enhanced very thin small outline package; no leads; 8 terminals
SOT873-1
Table 4.Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min Max Unit V DS drain-source voltage T j ≥25°C; T j ≤175°C
-80V V DGR drain-gate voltage T j ≥25°C; T j ≤175°C; R GS =20k ?-80V V GS gate-source voltage -2020V I D drain current V GS =10V;T mb =100°C; see Figure 1-22A V GS =10V;T mb =25°C; see Figure 1-34A I DM peak drain current pulsed; t p ≤10μs; T mb =25°C;see Figure 3-137A P tot total power dissipation T mb =25°C; see Figure 2
-65W T stg storage temperature -55150°C T j junction temperature -55150°C T sld(M)peak soldering temperature -260°C Source-drain diode
I S source current T mb =25°C
-34A I SM peak source current pulsed; t p ≤10μs; T mb =25°C -137A Avalanche ruggedness
E DS(AL)S
non-repetitive drain-source avalanche energy
V GS =10V;T j(init)=25°C; I D =34A; V sup ≤80V; R GS =50?; unclamped
-37
mJ
5.Thermal characteristics
Table 5.Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit R th(j-mb)thermal resistance from junction to mounting base see Figure 4-1 1.3K/W R th(j-a)thermal resistance from junction to ambient[1]-5360K/W
[1]R th(j-a) is guaranteed by design and assumes that the device is mounted on a 40mm x 40mm x 70μm copper pad at 20°C ambient
temperature. In practice R th(j-a) will be determined by the customer’s PCB characteristics
6.Characteristics
Table 6.Characteristics
Symbol Parameter Conditions Min Typ Max Unit Static characteristics
V(BR)DSS drain-source breakdown voltage I D=250μA; V GS=0V; T j=-55°C73--V
I D=250μA; V GS=0V; T j=25°C80--V
V GS(th)gate-source threshold voltage I D=1mA; V DS=V GS; T j=175°C;
see Figure 10
1--V
I D=1mA; V DS=V GS; T j=-55°C;
see Figure 10
-- 4.7V
I D=1mA; V DS=V GS; T j=25°C;
see Figure 10; see Figure 11
2.334V
I DSS drain leakage current V DS=80V; V GS=0V; T j=25°C-0.12μA
V DS=80V; V GS=0V; T j=125°C--50μA I GSS gate leakage current V GS=-20V;V DS=0V; T j=25°C-10100nA
V GS=20V;V DS=0V; T j=25°C-10100nA R DSon drain-source on-state resistance V GS=10V;I D=10A;T j=150°C;
see Figure 12
-39.948.3m?
V GS=10V;I D=10A;T j=100°C;
see Figure 12
--38m?
V GS=10V;I D=10A;T j=25°C;
see Figure 13
-1923m?R G internal gate resistance (AC)f=1MHz-1-?Dynamic characteristics
Q G(tot)total gate charge I D=0A; V DS=0V;V GS=10V;
see Figure 14
-18.4-nC
I D=30A;V DS=40V; V GS=10V; see Figure 14; see Figure 15-21-nC
Q GS gate-source charge- 6.6-nC Q GS(th)pre-threshold gate-source
charge
- 3.9-nC
Q GS(th-pl)post-threshold gate-source
charge
- 2.7-nC Q GD gate-drain charge- 4.8-nC V GS(pl)gate-source plateau voltage I D=30A;V DS=40V;see Figure 14;
see Figure 15
-5-V
C iss input capacitance V DS=40V; V GS=0V; f=1MHz;
T j=25°C;see Figure 16-1295-pF
C oss output capacitance-125-pF C rss reverse transfer capacitance-69-pF t d(on)turn-on delay time V DS=40V;R L=1.33?; V GS=10V;
R G(ext)=4.7?
-10.5-ns
t r rise time V DS=40V; V GS=10V;
R G(ext)=4.7?
-8-ns
t d(off)turn-off delay time V DS=40V;R L=1.33?; V GS=10V;
R G(ext)=4.7?-20.5-ns
t f fall time- 5.4-ns
Source-drain diode
V SD source-drain voltage I S =10A;V GS =0V; T j =25°C; see Figure 17
-0.85 1.2V t rr reverse recovery time I S =10A;dI S /dt =100A/μs; V GS =0V; V DS =40V
-36-ns Q r
recovered charge
-
53
-
nC
Table 6.Characteristics …continued Symbol Parameter
Conditions
Min Typ Max Unit
7.Package outline
DFN3333-8: plastic thermal enhanced very thin small outline package; no leads;
Fig 18.Package outline SOT873-1 (DFN3333-8)
分销商库存信息: NXP
PSMN023-80LS,115