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Altera Corporation
1
MAX 9000
Programmable Logic
Device Family
December 2002, ver. 6.4
Data Sheet
%
Usable gates 6,0008,00010,00012,000Flipflops 484580676772Macrocells
320400480560Logic array blocks (LABs)20253035Maximum user I/O pins 168159175216t PD1 (ns)10151010t FSU (ns) 3.05 3.0 3.0t FCO (ns) 4.57 4.8 4.8f CNT (MHz)144
118
144
144
MAX 9000 Programmable Logic Device Family Data Sheet
EPM932060 (2)132–168–168
EPM9320A60 (2)132–––168
EPM940059 (2)139159–––
EPM9480–146175–––
EPM9560–153 191216216216
EPM9560A–153 191––216
2Altera Corporation
MAX 9000 Programmable Logic Device Family Data Sheet
EPM9320
EPM9320A
EPM9400
EPM9480
EPM9560
EPM9560A
16-bit loadable counter16144118100MHz 16-bit up/down counter16144118100MHz 16-bit prescaled counter16144118100MHz 16-bit address decode1 5.6 (10)7.9 (15)10 (20)ns 16-to-1 multiplexer17.7 (12.1)10.9 (18)16 (26)ns
Altera Corporation 3
4Altera Corporation
MAX 9000 Programmable Logic Device Family Data Sheet
%
Altera Corporation 5
MAX 9000 Programmable Logic Device Family Data Sheet
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MAX 9000 Programmable Logic Device Family Data Sheet
IOC
IOC IOC IOC
IOC IOC
IOC IOC
IOC IOC
IOC IOC IOC
IOC IOC IOC
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MAX 9000 Programmable Logic Device Family Data Sheet
33
48
T o Peripheral Bus and Other LABs in the Device
DIN2GCLR
1616
48
Macrocell 1Macrocell 2Macrocell 3Macrocell 4Macrocell 5Macrocell 6Macrocell 7Macrocell 81616
16
GCLK1
GCLK2
16
DIN3
DIN4
GOE
T o Peripheral Bus
DIN1
Macrocell 9Macrocell 10Macrocell 11Macrocell 12Macrocell 13Macrocell 14Macrocell 15Macrocell 16
8Altera Corporation
MAX 9000 Programmable Logic Device Family Data Sheet
VCC
Product-Term Select Matrix
16 Local Feedbacks
16 Shareable
Expander Product
LAB Local Array
Parallel Expanders (from Other Macrocells)
Clear Select
Global Clear
Global Clocks Clock/Enable Select
2
PRN CLRN
D/T Q ENA To Row or Column FastTrack Interconnect
Local Array Feedback
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MAX 9000 Programmable Logic Device Family Data Sheet
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MAX 9000 Programmable Logic Device Family Data Sheet
16 Local Feedbacks 16 Shared
Expanders
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MAX 9000 Programmable Logic Device Family Data Sheet
Preset
Clock
Clear
Product-T erm Select Matrix
Preset
Clock Clear
Product-T erm Select Matrix
From Previous Macrocell
T o Next Macrocell
16 Local Feedbacks 16 Shared Expanders
12Altera Corporation
MAX 9000 Programmable Logic Device Family Data Sheet
Altera Corporation 13
MAX 9000 Programmable Logic Device Family Data Sheet
LAB A1
LAB A2
LAB B1
LAB B2
IOC1IOC10IOC1IOC10
IOC1
IOC8
IOC1
IOC8
IOC1IOC10
IOC1IOC10IOC1
IOC8IOC1
IOC8
EPM9320, EPM9320A 45EPM940055EPM9480
65EPM9560, EPM9560A
7
5
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MAX 9000 Programmable Logic Device Family Data Sheet
Macrocell 1
Macrocell 2
To LAB Local Array
LAB
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MAX 9000 Programmable Logic Device Family Data Sheet
96
96
IOC8
IOC1
10
10
Row FastTrack Interconnect
96
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MAX 9000 Programmable Logic Device Family Data Sheet
48
17
17
Column FastTrack Interconnect
IOC10
IOC148
48
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MAX 9000 Programmable Logic Device Family Data Sheet
Slew-Rate Control
From Row or
Column FastTrack Interconnect
42
8
13
To Row or
Column FastTrack Interconnect OE [7..0]
CLK [3..0]
ENA [5..0]
CLR [1..0]
Peripheral Control Bus [12..0]
CLRN
D
Q
ENA VCC
VCC
6VCC
18Altera Corporation
MAX 9000 Programmable Logic Device Family Data Sheet
Row C Row E Row F Row G Row B Row E Row F Row F Row A Row E Row E Row E Row B Row B Row B Row B Row A Row A Row A Row A Row D Row D Row D Row D Row C Row C Row C Row C Row B/Row B/Row B/Row B/Row A/
Row A/
Row A/
Row A/
Row D Row D Row D Row D Row C
Row C
Row C
Row C
MAX 9000 Programmable Logic Device Family Data Sheet
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20Altera Corporation
MAX 9000 Programmable Logic Device Family Data Sheet
SAMPLE/PRELOAD Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins.EXTEST Allows the external circuitry and board-level interconnections to be tested by forcing a test pattern at the output pins and capturing test results at the input pins.
BYPASS
Places the 1-bit bypass register between the and pins, which allows the BST data to pass synchronously through a selected device to adjacent devices during normal device operation.
IDCODE
Selects the IDCODE register and places it between and , allowing the IDCODE to be shifted out of . Supported by the EPM9320A, EPM9400, EPM9480, and EPM9560A devices only.
UESCODE Selects the user electronic signature (UESCODE) register and allows the UESCODE to be shifted out of serially. This instruction is supported by MAX 9000A devices only.ISP Instructions
These instructions are used when programming MAX 9000 devices via the JTAG ports with the BitBlaster or ByteBlasterMV download cable, or using a Jam File (.jam ), Jam Byte-Code File (.jbc ), or Serial Vector Format (.svf ) File via an embedded processor or test equipment.